Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

dmaengine: xilinx_dma: autodetect whether the HW supports scatter-gather

The AXIDMA and CDMA HW can be either direct-access or scatter-gather
version. These are SW incompatible.

The driver can handle both versions: a DT property was used to
tell the driver whether to assume the HW is in scatter-gather mode.

This patch makes the driver to autodetect this information. The DT
property is not required anymore.

No changes for VDMA.

Cc: Rob Herring <robh+dt@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: devicetree@vger.kernel.org
Cc: Radhey Shyam Pandey <radhey.shyam.pandey@xilinx.com>
Signed-off-by: Andrea Merello <andrea.merello@gmail.com>
Reviewed-by: Radhey Shyam Pandey <radhey.shyam.pandey@xilinx.com>
Signed-off-by: Vinod Koul <vkoul@kernel.org>

authored by

Andrea Merello and committed by
Vinod Koul
05f7ea7f ae809690

+10 -4
+10 -4
drivers/dma/xilinx/xilinx_dma.c
··· 86 86 #define XILINX_DMA_DMASR_DMA_DEC_ERR BIT(6) 87 87 #define XILINX_DMA_DMASR_DMA_SLAVE_ERR BIT(5) 88 88 #define XILINX_DMA_DMASR_DMA_INT_ERR BIT(4) 89 + #define XILINX_DMA_DMASR_SG_MASK BIT(3) 89 90 #define XILINX_DMA_DMASR_IDLE BIT(1) 90 91 #define XILINX_DMA_DMASR_HALTED BIT(0) 91 92 #define XILINX_DMA_DMASR_DELAY_MASK GENMASK(31, 24) ··· 415 414 * @dev: Device Structure 416 415 * @common: DMA device structure 417 416 * @chan: Driver specific DMA channel 418 - * @has_sg: Specifies whether Scatter-Gather is present or not 419 417 * @mcdma: Specifies whether Multi-Channel is present or not 420 418 * @flush_on_fsync: Flush on frame sync 421 419 * @ext_addr: Indicates 64 bit addressing is supported by dma device ··· 434 434 struct device *dev; 435 435 struct dma_device common; 436 436 struct xilinx_dma_chan *chan[XILINX_DMA_MAX_CHANS_PER_DEVICE]; 437 - bool has_sg; 438 437 bool mcdma; 439 438 u32 flush_on_fsync; 440 439 bool ext_addr; ··· 2420 2421 2421 2422 chan->dev = xdev->dev; 2422 2423 chan->xdev = xdev; 2423 - chan->has_sg = xdev->has_sg; 2424 2424 chan->desc_pendingcount = 0x0; 2425 2425 chan->ext_addr = xdev->ext_addr; 2426 2426 /* This variable ensures that descriptors are not ··· 2517 2519 } else { 2518 2520 chan->start_transfer = xilinx_vdma_start_transfer; 2519 2521 chan->stop_transfer = xilinx_dma_stop_transfer; 2522 + } 2523 + 2524 + /* check if SG is enabled (only for AXIDMA and CDMA) */ 2525 + if (xdev->dma_config->dmatype != XDMA_TYPE_VDMA) { 2526 + if (dma_ctrl_read(chan, XILINX_DMA_REG_DMASR) & 2527 + XILINX_DMA_DMASR_SG_MASK) 2528 + chan->has_sg = true; 2529 + dev_dbg(chan->dev, "ch %d: SG %s\n", chan->id, 2530 + chan->has_sg ? "enabled" : "disabled"); 2520 2531 } 2521 2532 2522 2533 /* Initialize the tasklet */ ··· 2666 2659 return PTR_ERR(xdev->regs); 2667 2660 2668 2661 /* Retrieve the DMA engine properties from the device tree */ 2669 - xdev->has_sg = of_property_read_bool(node, "xlnx,include-sg"); 2670 2662 xdev->max_buffer_len = GENMASK(XILINX_DMA_MAX_TRANS_LEN_MAX - 1, 0); 2671 2663 2672 2664 if (xdev->dma_config->dmatype == XDMA_TYPE_AXIDMA) {