···278on systems where System RAM exists above 4G _physical_ address.279280Drivers for all PCI-X and PCIe compliant devices must call281-pci_set_dma_mask() as they are 64-bit DMA devices.282283Similarly, drivers must also "register" this capability if the device284-can directly address "consistent memory" in System RAM above 4G physical285-address by calling pci_set_consistent_dma_mask().286Again, this includes drivers for all PCI-X and PCIe compliant devices.287Many 64-bit "PCI" devices (before PCI-X) and some PCI-X devices are28864-bit DMA capable for payload ("streaming") data but not control289-("consistent") data.290291292Setup shared control data293-------------------------294-Once the DMA masks are set, the driver can allocate "consistent" (a.k.a. shared)295memory. See Documentation/core-api/dma-api.rst for a full description of296the DMA APIs. This section is just a reminder that it needs to be done297before enabling DMA on the device.···367 - Disable the device from generating IRQs368 - Release the IRQ (free_irq())369 - Stop all DMA activity370- - Release DMA buffers (both streaming and consistent)371 - Unregister from other subsystems (e.g. scsi or netdev)372 - Disable device from responding to MMIO/IO Port addresses373 - Release MMIO/IO Port resource(s)···420I.e. unmap data buffers and return buffers to "upstream"421owners if there is one.422423-Then clean up "consistent" buffers which contain the control data.424425See Documentation/core-api/dma-api.rst for details on unmapping interfaces.426
···278on systems where System RAM exists above 4G _physical_ address.279280Drivers for all PCI-X and PCIe compliant devices must call281+set_dma_mask() as they are 64-bit DMA devices.282283Similarly, drivers must also "register" this capability if the device284+can directly address "coherent memory" in System RAM above 4G physical285+address by calling dma_set_coherent_mask().286Again, this includes drivers for all PCI-X and PCIe compliant devices.287Many 64-bit "PCI" devices (before PCI-X) and some PCI-X devices are28864-bit DMA capable for payload ("streaming") data but not control289+("coherent") data.290291292Setup shared control data293-------------------------294+Once the DMA masks are set, the driver can allocate "coherent" (a.k.a. shared)295memory. See Documentation/core-api/dma-api.rst for a full description of296the DMA APIs. This section is just a reminder that it needs to be done297before enabling DMA on the device.···367 - Disable the device from generating IRQs368 - Release the IRQ (free_irq())369 - Stop all DMA activity370+ - Release DMA buffers (both streaming and coherent)371 - Unregister from other subsystems (e.g. scsi or netdev)372 - Disable device from responding to MMIO/IO Port addresses373 - Release MMIO/IO Port resource(s)···420I.e. unmap data buffers and return buffers to "upstream"421owners if there is one.422423+Then clean up "coherent" buffers which contain the control data.424425See Documentation/core-api/dma-api.rst for details on unmapping interfaces.426