tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux
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MIPS: Replace 'kernel_uses_smartmips_rixi' with 'cpu_has_rixi'.

Remove usage of the 'kernel_uses_smartmips_rixi' macro from all files
and use new 'cpu_has_rixi' instead.

Signed-off-by: Steven J. Hill <sjhill@mips.com>
Acked-by: David Daney <david.daney@cavium.com>

Steven J. Hill 05857c64 b2ab4f08

+26 -29
-3
arch/mips/include/asm/cpu-features.h
··· 98 98 #ifndef cpu_has_rixi 99 99 #define cpu_has_rixi (cpu_data[0].options & MIPS_CPU_RIXI) 100 100 #endif 101 - #ifndef kernel_uses_smartmips_rixi 102 - #define kernel_uses_smartmips_rixi 0 103 - #endif 104 101 #ifndef cpu_has_vtag_icache 105 102 #define cpu_has_vtag_icache (cpu_data[0].icache.flags & MIPS_CACHE_VTAG) 106 103 #endif
+1 -1
arch/mips/include/asm/mach-cavium-octeon/cpu-feature-overrides.h
··· 58 58 #define cpu_has_veic 0 59 59 #define cpu_hwrena_impl_bits 0xc0000000 60 60 61 - #define kernel_uses_smartmips_rixi (cpu_data[0].cputype != CPU_CAVIUM_OCTEON) 61 + #define cpu_has_rixi (cpu_data[0].cputype != CPU_CAVIUM_OCTEON) 62 62 63 63 #define ARCH_HAS_IRQ_PER_CPU 1 64 64 #define ARCH_HAS_SPINLOCK_PREFETCH 1
+9 -9
arch/mips/include/asm/pgtable-bits.h
··· 79 79 /* implemented in software */ 80 80 #define _PAGE_PRESENT_SHIFT (0) 81 81 #define _PAGE_PRESENT (1 << _PAGE_PRESENT_SHIFT) 82 - /* implemented in software, should be unused if kernel_uses_smartmips_rixi. */ 83 - #define _PAGE_READ_SHIFT (kernel_uses_smartmips_rixi ? _PAGE_PRESENT_SHIFT : _PAGE_PRESENT_SHIFT + 1) 84 - #define _PAGE_READ ({if (kernel_uses_smartmips_rixi) BUG(); 1 << _PAGE_READ_SHIFT; }) 82 + /* implemented in software, should be unused if cpu_has_rixi. */ 83 + #define _PAGE_READ_SHIFT (cpu_has_rixi ? _PAGE_PRESENT_SHIFT : _PAGE_PRESENT_SHIFT + 1) 84 + #define _PAGE_READ ({BUG_ON(cpu_has_rixi); 1 << _PAGE_READ_SHIFT; }) 85 85 /* implemented in software */ 86 86 #define _PAGE_WRITE_SHIFT (_PAGE_READ_SHIFT + 1) 87 87 #define _PAGE_WRITE (1 << _PAGE_WRITE_SHIFT) ··· 104 104 #endif 105 105 106 106 /* Page cannot be executed */ 107 - #define _PAGE_NO_EXEC_SHIFT (kernel_uses_smartmips_rixi ? _PAGE_HUGE_SHIFT + 1 : _PAGE_HUGE_SHIFT) 108 - #define _PAGE_NO_EXEC ({if (!kernel_uses_smartmips_rixi) BUG(); 1 << _PAGE_NO_EXEC_SHIFT; }) 107 + #define _PAGE_NO_EXEC_SHIFT (cpu_has_rixi ? _PAGE_HUGE_SHIFT + 1 : _PAGE_HUGE_SHIFT) 108 + #define _PAGE_NO_EXEC ({BUG_ON(!cpu_has_rixi); 1 << _PAGE_NO_EXEC_SHIFT; }) 109 109 110 110 /* Page cannot be read */ 111 - #define _PAGE_NO_READ_SHIFT (kernel_uses_smartmips_rixi ? _PAGE_NO_EXEC_SHIFT + 1 : _PAGE_NO_EXEC_SHIFT) 112 - #define _PAGE_NO_READ ({if (!kernel_uses_smartmips_rixi) BUG(); 1 << _PAGE_NO_READ_SHIFT; }) 111 + #define _PAGE_NO_READ_SHIFT (cpu_has_rixi ? _PAGE_NO_EXEC_SHIFT + 1 : _PAGE_NO_EXEC_SHIFT) 112 + #define _PAGE_NO_READ ({BUG_ON(!cpu_has_rixi); 1 << _PAGE_NO_READ_SHIFT; }) 113 113 114 114 #define _PAGE_GLOBAL_SHIFT (_PAGE_NO_READ_SHIFT + 1) 115 115 #define _PAGE_GLOBAL (1 << _PAGE_GLOBAL_SHIFT) ··· 155 155 */ 156 156 static inline uint64_t pte_to_entrylo(unsigned long pte_val) 157 157 { 158 - if (kernel_uses_smartmips_rixi) { 158 + if (cpu_has_rixi) { 159 159 int sa; 160 160 #ifdef CONFIG_32BIT 161 161 sa = 31 - _PAGE_NO_READ_SHIFT; ··· 220 220 221 221 #endif 222 222 223 - #define __READABLE (_PAGE_SILENT_READ | _PAGE_ACCESSED | (kernel_uses_smartmips_rixi ? 0 : _PAGE_READ)) 223 + #define __READABLE (_PAGE_SILENT_READ | _PAGE_ACCESSED | (cpu_has_rixi ? 0 : _PAGE_READ)) 224 224 #define __WRITEABLE (_PAGE_WRITE | _PAGE_SILENT_WRITE | _PAGE_MODIFIED) 225 225 226 226 #define _PAGE_CHG_MASK (_PFN_MASK | _PAGE_ACCESSED | _PAGE_MODIFIED | _CACHE_MASK)
+6 -6
arch/mips/include/asm/pgtable.h
··· 22 22 struct vm_area_struct; 23 23 24 24 #define PAGE_NONE __pgprot(_PAGE_PRESENT | _CACHE_CACHABLE_NONCOHERENT) 25 - #define PAGE_SHARED __pgprot(_PAGE_PRESENT | _PAGE_WRITE | (kernel_uses_smartmips_rixi ? 0 : _PAGE_READ) | \ 25 + #define PAGE_SHARED __pgprot(_PAGE_PRESENT | _PAGE_WRITE | (cpu_has_rixi ? 0 : _PAGE_READ) | \ 26 26 _page_cachable_default) 27 - #define PAGE_COPY __pgprot(_PAGE_PRESENT | (kernel_uses_smartmips_rixi ? 0 : _PAGE_READ) | \ 28 - (kernel_uses_smartmips_rixi ? _PAGE_NO_EXEC : 0) | _page_cachable_default) 29 - #define PAGE_READONLY __pgprot(_PAGE_PRESENT | (kernel_uses_smartmips_rixi ? 0 : _PAGE_READ) | \ 27 + #define PAGE_COPY __pgprot(_PAGE_PRESENT | (cpu_has_rixi ? 0 : _PAGE_READ) | \ 28 + (cpu_has_rixi ? _PAGE_NO_EXEC : 0) | _page_cachable_default) 29 + #define PAGE_READONLY __pgprot(_PAGE_PRESENT | (cpu_has_rixi ? 0 : _PAGE_READ) | \ 30 30 _page_cachable_default) 31 31 #define PAGE_KERNEL __pgprot(_PAGE_PRESENT | __READABLE | __WRITEABLE | \ 32 32 _PAGE_GLOBAL | _page_cachable_default) 33 - #define PAGE_USERIO __pgprot(_PAGE_PRESENT | (kernel_uses_smartmips_rixi ? 0 : _PAGE_READ) | _PAGE_WRITE | \ 33 + #define PAGE_USERIO __pgprot(_PAGE_PRESENT | (cpu_has_rixi ? 0 : _PAGE_READ) | _PAGE_WRITE | \ 34 34 _page_cachable_default) 35 35 #define PAGE_KERNEL_UNCACHED __pgprot(_PAGE_PRESENT | __READABLE | \ 36 36 __WRITEABLE | _PAGE_GLOBAL | _CACHE_UNCACHED) ··· 299 299 static inline pte_t pte_mkyoung(pte_t pte) 300 300 { 301 301 pte_val(pte) |= _PAGE_ACCESSED; 302 - if (kernel_uses_smartmips_rixi) { 302 + if (cpu_has_rixi) { 303 303 if (!(pte_val(pte) & _PAGE_NO_READ)) 304 304 pte_val(pte) |= _PAGE_SILENT_READ; 305 305 } else {
+1 -1
arch/mips/mm/cache.c
··· 142 142 143 143 static inline void setup_protection_map(void) 144 144 { 145 - if (kernel_uses_smartmips_rixi) { 145 + if (cpu_has_rixi) { 146 146 protection_map[0] = __pgprot(_page_cachable_default | _PAGE_PRESENT | _PAGE_NO_EXEC | _PAGE_NO_READ); 147 147 protection_map[1] = __pgprot(_page_cachable_default | _PAGE_PRESENT | _PAGE_NO_EXEC); 148 148 protection_map[2] = __pgprot(_page_cachable_default | _PAGE_PRESENT | _PAGE_NO_EXEC | _PAGE_NO_READ);
+1 -1
arch/mips/mm/fault.c
··· 114 114 if (!(vma->vm_flags & VM_WRITE)) 115 115 goto bad_area; 116 116 } else { 117 - if (kernel_uses_smartmips_rixi) { 117 + if (cpu_has_rixi) { 118 118 if (address == regs->cp0_epc && !(vma->vm_flags & VM_EXEC)) { 119 119 #if 0 120 120 pr_notice("Cpu%d[%s:%d:%0*lx:%ld:%0*lx] XI violation\n",
+1 -1
arch/mips/mm/tlb-r4k.c
··· 401 401 current_cpu_type() == CPU_R14000) 402 402 write_c0_framemask(0); 403 403 404 - if (kernel_uses_smartmips_rixi) { 404 + if (cpu_has_rixi) { 405 405 /* 406 406 * Enable the no read, no exec bits, and enable large virtual 407 407 * address.
+7 -7
arch/mips/mm/tlbex.c
··· 586 586 static __cpuinit __maybe_unused void build_convert_pte_to_entrylo(u32 **p, 587 587 unsigned int reg) 588 588 { 589 - if (kernel_uses_smartmips_rixi) { 589 + if (cpu_has_rixi) { 590 590 UASM_i_SRL(p, reg, reg, ilog2(_PAGE_NO_EXEC)); 591 591 UASM_i_ROTR(p, reg, reg, ilog2(_PAGE_GLOBAL) - ilog2(_PAGE_NO_EXEC)); 592 592 } else { ··· 990 990 if (cpu_has_64bits) { 991 991 uasm_i_ld(p, tmp, 0, ptep); /* get even pte */ 992 992 uasm_i_ld(p, ptep, sizeof(pte_t), ptep); /* get odd pte */ 993 - if (kernel_uses_smartmips_rixi) { 993 + if (cpu_has_rixi) { 994 994 UASM_i_SRL(p, tmp, tmp, ilog2(_PAGE_NO_EXEC)); 995 995 UASM_i_SRL(p, ptep, ptep, ilog2(_PAGE_NO_EXEC)); 996 996 UASM_i_ROTR(p, tmp, tmp, ilog2(_PAGE_GLOBAL) - ilog2(_PAGE_NO_EXEC)); ··· 1017 1017 UASM_i_LW(p, ptep, sizeof(pte_t), ptep); /* get odd pte */ 1018 1018 if (r45k_bvahwbug()) 1019 1019 build_tlb_probe_entry(p); 1020 - if (kernel_uses_smartmips_rixi) { 1020 + if (cpu_has_rixi) { 1021 1021 UASM_i_SRL(p, tmp, tmp, ilog2(_PAGE_NO_EXEC)); 1022 1022 UASM_i_SRL(p, ptep, ptep, ilog2(_PAGE_NO_EXEC)); 1023 1023 UASM_i_ROTR(p, tmp, tmp, ilog2(_PAGE_GLOBAL) - ilog2(_PAGE_NO_EXEC)); ··· 1183 1183 UASM_i_LW(p, even, 0, ptr); /* get even pte */ 1184 1184 UASM_i_LW(p, odd, sizeof(pte_t), ptr); /* get odd pte */ 1185 1185 } 1186 - if (kernel_uses_smartmips_rixi) { 1186 + if (cpu_has_rixi) { 1187 1187 uasm_i_dsrl_safe(p, even, even, ilog2(_PAGE_NO_EXEC)); 1188 1188 uasm_i_dsrl_safe(p, odd, odd, ilog2(_PAGE_NO_EXEC)); 1189 1189 uasm_i_drotr(p, even, even, ··· 1545 1545 { 1546 1546 int t = scratch >= 0 ? scratch : pte; 1547 1547 1548 - if (kernel_uses_smartmips_rixi) { 1548 + if (cpu_has_rixi) { 1549 1549 if (use_bbit_insns()) { 1550 1550 uasm_il_bbit0(p, r, pte, ilog2(_PAGE_PRESENT), lid); 1551 1551 uasm_i_nop(p); ··· 1875 1875 if (m4kc_tlbp_war()) 1876 1876 build_tlb_probe_entry(&p); 1877 1877 1878 - if (kernel_uses_smartmips_rixi) { 1878 + if (cpu_has_rixi) { 1879 1879 /* 1880 1880 * If the page is not _PAGE_VALID, RI or XI could not 1881 1881 * have triggered it. Skip the expensive test.. ··· 1929 1929 build_pte_present(&p, &r, wr.r1, wr.r2, wr.r3, label_nopage_tlbl); 1930 1930 build_tlb_probe_entry(&p); 1931 1931 1932 - if (kernel_uses_smartmips_rixi) { 1932 + if (cpu_has_rixi) { 1933 1933 /* 1934 1934 * If the page is not _PAGE_VALID, RI or XI could not 1935 1935 * have triggered it. Skip the expensive test..