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serial: sirf: rename marco to atlas7

MARCO will not be supported any more and the project was dropped.
it has been replaced by CSR atlas7.

Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

authored by

Barry Song and committed by
Greg Kroah-Hartman 057badd6 eef15e2a

+24 -24
+2 -2
Documentation/devicetree/bindings/serial/sirf-uart.txt
··· 2 2 3 3 Required properties: 4 4 - compatible : Should be "sirf,prima2-uart", "sirf, prima2-usp-uart", 5 - "sirf,marco-uart" or "sirf,marco-bt-uart" which means 5 + "sirf,atlas7-uart" or "sirf,atlas7-bt-uart" which means 6 6 uart located in BT module and used for BT. 7 7 - reg : Offset and length of the register set for the device 8 8 - interrupts : Should contain uart interrupt ··· 37 37 for uart use in BT module, 38 38 uart6: uart@11000000 { 39 39 cell-index = <6>; 40 - compatible = "sirf,marco-bt-uart", "sirf,marco-uart"; 40 + compatible = "sirf,atlas7-bt-uart", "sirf,atlas7-uart"; 41 41 reg = <0x11000000 0x1000>; 42 42 interrupts = <0 100 0>; 43 43 clocks = <&clks 138>, <&clks 140>, <&clks 141>;
+20 -20
drivers/tty/serial/sirfsoc_uart.c
··· 177 177 dmaengine_pause(sirfport->tx_dma_chan); 178 178 sirfport->tx_dma_state = TX_DMA_PAUSE; 179 179 } else { 180 - if (!sirfport->is_marco) 180 + if (!sirfport->is_atlas7) 181 181 wr_regl(port, ureg->sirfsoc_int_en_reg, 182 182 rd_regl(port, ureg->sirfsoc_int_en_reg) & 183 183 ~uint_en->sirfsoc_txfifo_empty_en); ··· 186 186 uint_en->sirfsoc_txfifo_empty_en); 187 187 } 188 188 } else { 189 - if (!sirfport->is_marco) 189 + if (!sirfport->is_atlas7) 190 190 wr_regl(port, ureg->sirfsoc_int_en_reg, 191 191 rd_regl(port, ureg->sirfsoc_int_en_reg) & 192 192 ~uint_en->sirfsoc_txfifo_empty_en); ··· 217 217 } 218 218 if (sirfport->tx_dma_state == TX_DMA_RUNNING) 219 219 return; 220 - if (!sirfport->is_marco) 220 + if (!sirfport->is_atlas7) 221 221 wr_regl(port, ureg->sirfsoc_int_en_reg, 222 222 rd_regl(port, ureg->sirfsoc_int_en_reg)& 223 223 ~(uint_en->sirfsoc_txfifo_empty_en)); ··· 244 244 } 245 245 if (tran_size < 4) 246 246 sirfsoc_uart_pio_tx_chars(sirfport, tran_size); 247 - if (!sirfport->is_marco) 247 + if (!sirfport->is_atlas7) 248 248 wr_regl(port, ureg->sirfsoc_int_en_reg, 249 249 rd_regl(port, ureg->sirfsoc_int_en_reg)| 250 250 uint_en->sirfsoc_txfifo_empty_en); ··· 293 293 sirfsoc_uart_pio_tx_chars(sirfport, 294 294 SIRFSOC_UART_IO_TX_REASONABLE_CNT); 295 295 wr_regl(port, ureg->sirfsoc_tx_fifo_op, SIRFUART_FIFO_START); 296 - if (!sirfport->is_marco) 296 + if (!sirfport->is_atlas7) 297 297 wr_regl(port, ureg->sirfsoc_int_en_reg, 298 298 rd_regl(port, ureg->sirfsoc_int_en_reg)| 299 299 uint_en->sirfsoc_txfifo_empty_en); ··· 311 311 312 312 wr_regl(port, ureg->sirfsoc_rx_fifo_op, 0); 313 313 if (sirfport->rx_dma_chan) { 314 - if (!sirfport->is_marco) 314 + if (!sirfport->is_atlas7) 315 315 wr_regl(port, ureg->sirfsoc_int_en_reg, 316 316 rd_regl(port, ureg->sirfsoc_int_en_reg) & 317 317 ~(SIRFUART_RX_DMA_INT_EN(port, uint_en) | ··· 322 322 uint_en->sirfsoc_rx_done_en); 323 323 dmaengine_terminate_all(sirfport->rx_dma_chan); 324 324 } else { 325 - if (!sirfport->is_marco) 325 + if (!sirfport->is_atlas7) 326 326 wr_regl(port, ureg->sirfsoc_int_en_reg, 327 327 rd_regl(port, ureg->sirfsoc_int_en_reg)& 328 328 ~(SIRFUART_RX_IO_INT_EN(port, uint_en))); ··· 344 344 if (sirfport->uart_reg->uart_type == SIRF_REAL_UART) { 345 345 wr_regl(port, ureg->sirfsoc_afc_ctrl, 346 346 rd_regl(port, ureg->sirfsoc_afc_ctrl) & ~0x3FF); 347 - if (!sirfport->is_marco) 347 + if (!sirfport->is_atlas7) 348 348 wr_regl(port, ureg->sirfsoc_int_en_reg, 349 349 rd_regl(port, ureg->sirfsoc_int_en_reg)& 350 350 ~uint_en->sirfsoc_cts_en); ··· 380 380 wr_regl(port, ureg->sirfsoc_afc_ctrl, 381 381 rd_regl(port, ureg->sirfsoc_afc_ctrl) | 382 382 SIRFUART_AFC_TX_EN | SIRFUART_AFC_RX_EN); 383 - if (!sirfport->is_marco) 383 + if (!sirfport->is_atlas7) 384 384 wr_regl(port, ureg->sirfsoc_int_en_reg, 385 385 rd_regl(port, ureg->sirfsoc_int_en_reg) 386 386 | uint_en->sirfsoc_cts_en); ··· 544 544 sirfport->rx_io_count = 0; 545 545 wr_regl(port, ureg->sirfsoc_int_st_reg, 546 546 uint_st->sirfsoc_rx_done); 547 - if (!sirfport->is_marco) 547 + if (!sirfport->is_atlas7) 548 548 wr_regl(port, ureg->sirfsoc_int_en_reg, 549 549 rd_regl(port, ureg->sirfsoc_int_en_reg) & 550 550 ~(uint_en->sirfsoc_rx_done_en)); ··· 555 555 } else { 556 556 wr_regl(port, ureg->sirfsoc_int_st_reg, 557 557 uint_st->sirfsoc_rx_done); 558 - if (!sirfport->is_marco) 558 + if (!sirfport->is_atlas7) 559 559 wr_regl(port, ureg->sirfsoc_int_en_reg, 560 560 rd_regl(port, ureg->sirfsoc_int_en_reg) | 561 561 (uint_en->sirfsoc_rx_done_en)); ··· 578 578 dmaengine_terminate_all(sirfport->rx_dma_chan); 579 579 sirfport->rx_dma_items[sirfport->rx_issued].xmit.head = 580 580 SIRFSOC_RX_DMA_BUF_SIZE - tx_state.residue; 581 - if (!sirfport->is_marco) 581 + if (!sirfport->is_atlas7) 582 582 wr_regl(port, ureg->sirfsoc_int_en_reg, 583 583 rd_regl(port, ureg->sirfsoc_int_en_reg) & 584 584 ~(uint_en->sirfsoc_rx_timeout_en)); ··· 598 598 sirfsoc_uart_pio_rx_chars(port, 4 - sirfport->rx_io_count); 599 599 if (sirfport->rx_io_count == 4) { 600 600 sirfport->rx_io_count = 0; 601 - if (!sirfport->is_marco) 601 + if (!sirfport->is_atlas7) 602 602 wr_regl(port, ureg->sirfsoc_int_en_reg, 603 603 rd_regl(port, ureg->sirfsoc_int_en_reg) & 604 604 ~(uint_en->sirfsoc_rx_done_en)); ··· 748 748 for (i = 0; i < SIRFSOC_RX_LOOP_BUF_CNT; i++) 749 749 sirfsoc_rx_submit_one_dma_desc(port, i); 750 750 sirfport->rx_completed = sirfport->rx_issued = 0; 751 - if (!sirfport->is_marco) 751 + if (!sirfport->is_atlas7) 752 752 wr_regl(port, ureg->sirfsoc_int_en_reg, 753 753 rd_regl(port, ureg->sirfsoc_int_en_reg) | 754 754 SIRFUART_RX_DMA_INT_EN(port, uint_en)); ··· 770 770 if (sirfport->rx_dma_chan) 771 771 sirfsoc_uart_start_next_rx_dma(port); 772 772 else { 773 - if (!sirfport->is_marco) 773 + if (!sirfport->is_atlas7) 774 774 wr_regl(port, ureg->sirfsoc_int_en_reg, 775 775 rd_regl(port, ureg->sirfsoc_int_en_reg) | 776 776 SIRFUART_RX_IO_INT_EN(port, uint_en)); ··· 1124 1124 { 1125 1125 struct sirfsoc_uart_port *sirfport = to_sirfport(port); 1126 1126 struct sirfsoc_register *ureg = &sirfport->uart_reg->uart_reg; 1127 - if (!sirfport->is_marco) 1127 + if (!sirfport->is_atlas7) 1128 1128 wr_regl(port, ureg->sirfsoc_int_en_reg, 0); 1129 1129 else 1130 1130 wr_regl(port, SIRFUART_INT_EN_CLR, ~0UL); ··· 1271 1271 1272 1272 static struct of_device_id sirfsoc_uart_ids[] = { 1273 1273 { .compatible = "sirf,prima2-uart", .data = &sirfsoc_uart,}, 1274 - { .compatible = "sirf,marco-uart", .data = &sirfsoc_uart}, 1274 + { .compatible = "sirf,atlas7-uart", .data = &sirfsoc_uart}, 1275 1275 { .compatible = "sirf,prima2-usp-uart", .data = &sirfsoc_usp}, 1276 1276 {} 1277 1277 }; ··· 1350 1350 gpio_direction_output(sirfport->rts_gpio, 1); 1351 1351 } 1352 1352 usp_no_flow_control: 1353 - if (of_device_is_compatible(pdev->dev.of_node, "sirf,marco-uart")) 1354 - sirfport->is_marco = true; 1353 + if (of_device_is_compatible(pdev->dev.of_node, "sirf,atlas7-uart")) 1354 + sirfport->is_atlas7 = true; 1355 1355 1356 1356 if (of_property_read_u32(pdev->dev.of_node, 1357 1357 "fifosize", ··· 1393 1393 goto err; 1394 1394 } 1395 1395 port->uartclk = clk_get_rate(sirfport->clk); 1396 - if (of_device_is_compatible(pdev->dev.of_node, "sirf,marco-bt-uart")) { 1396 + if (of_device_is_compatible(pdev->dev.of_node, "sirf,atlas7-bt-uart")) { 1397 1397 sirfport->clk_general = devm_clk_get(&pdev->dev, "general"); 1398 1398 if (IS_ERR(sirfport->clk_general)) { 1399 1399 ret = PTR_ERR(sirfport->clk_general);
+2 -2
drivers/tty/serial/sirfsoc_uart.h
··· 421 421 bool is_bt_uart; 422 422 struct clk *clk_general; 423 423 struct clk *clk_noc; 424 - /* for SiRFmarco, there are SET/CLR for UART_INT_EN */ 425 - bool is_marco; 424 + /* for SiRFatlas7, there are SET/CLR for UART_INT_EN */ 425 + bool is_atlas7; 426 426 struct sirfsoc_uart_register *uart_reg; 427 427 struct dma_chan *rx_dma_chan; 428 428 struct dma_chan *tx_dma_chan;