tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux
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Merge tag 'arc-5.5-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/vgupta/arc

Pull ARC updates from Vineet Gupta

- Jump Label support for ARC

- kmemleak enabled

- arc mm backend TLB Miss / flush optimizations

- nSIM platform switching to dwuart (vs. arcuart) and ensuing defconfig
updates and cleanups

- axs platform pll / video-mode updates

* tag 'arc-5.5-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/vgupta/arc:
ARC: add kmemleak support
ARC: [plat-axs10x]: remove hardcoded video mode from bootargs
ARC: [plat-axs10x]: use pgu pll instead of fixed clock
ARC: ARCv2: jump label: implement jump label patching
ARC: mm: tlb flush optim: elide redundant uTLB invalidates for MMUv3
ARC: mm: tlb flush optim: elide repeated uTLB invalidate in loop
ARC: mm: tlb flush optim: Make TLBWriteNI fallback to TLBWrite if not available
ARC: mm: TLB Miss optim: avoid re-reading ECR
ARCv2: mm: TLB Miss optim: Use double world load/stores LDD/STD
ARCv2: mm: TLB Miss optim: SMP builds can cache pgd pointer in mmu scratch reg
ARC: nSIM_700: remove unused network options
ARC: nSIM_700: switch to DW UART usage
ARC: merge HAPS-HS with nSIM-HS configs
ARC: HAPS: cleanup defconfigs from unused ETH drivers
ARC: HAPS: add HIGHMEM memory zone to DTS
ARC: HAPS: use same UART configuration everywhere
ARC: HAPS: cleanup defconfigs from unused IO-related options
ARC: regenerate nSIM and HAPS defconfigs

Linus Torvalds 056df578 aedc0650

+363 -411
+9
arch/arc/Kconfig
··· 29 29 select HAVE_ARCH_KGDB 30 30 select HAVE_ARCH_TRACEHOOK 31 31 select HAVE_DEBUG_STACKOVERFLOW 32 + select HAVE_DEBUG_KMEMLEAK 32 33 select HAVE_FUTEX_CMPXCHG if FUTEX 33 34 select HAVE_IOREMAP_PROT 34 35 select HAVE_KERNEL_GZIP ··· 46 45 select OF_EARLY_FLATTREE 47 46 select PCI_SYSCALL if PCI 48 47 select PERF_USE_VMALLOC if ARC_CACHE_VIPT_ALIASING 48 + select HAVE_ARCH_JUMP_LABEL if ISA_ARCV2 && !CPU_ENDIAN_BE32 49 49 50 50 config ARCH_HAS_CACHE_LINE_SIZE 51 51 def_bool y ··· 526 524 config ARC_DBG_TLB_PARANOIA 527 525 bool "Paranoia Checks in Low Level TLB Handlers" 528 526 527 + config ARC_DBG_JUMP_LABEL 528 + bool "Paranoid checks in Static Keys (jump labels) code" 529 + depends on JUMP_LABEL 530 + default y if STATIC_KEYS_SELFTEST 531 + help 532 + Enable paranoid checks and self-test of both ARC-specific and generic 533 + part of static keys (jump labels) related code. 529 534 endif 530 535 531 536 config ARC_BUILTIN_DTB_NAME
+1 -1
arch/arc/Makefile
··· 3 3 # Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com) 4 4 # 5 5 6 - KBUILD_DEFCONFIG := nsim_hs_defconfig 6 + KBUILD_DEFCONFIG := haps_hs_smp_defconfig 7 7 8 8 ifeq ($(CROSS_COMPILE),) 9 9 CROSS_COMPILE := $(call cc-cross-prefix, arc-linux- arceb-linux-)
+6
arch/arc/boot/dts/axc001.dtsi
··· 28 28 clock-frequency = <750000000>; 29 29 }; 30 30 31 + input_clk: input-clk { 32 + #clock-cells = <0>; 33 + compatible = "fixed-clock"; 34 + clock-frequency = <33333333>; 35 + }; 36 + 31 37 core_intc: arc700-intc@cpu { 32 38 compatible = "snps,arc700-intc"; 33 39 interrupt-controller;
+1 -1
arch/arc/boot/dts/axs101.dts
··· 14 14 compatible = "snps,axs101", "snps,arc-sdp"; 15 15 16 16 chosen { 17 - bootargs = "earlycon=uart8250,mmio32,0xe0022000,115200n8 console=tty0 console=ttyS3,115200n8 consoleblank=0 video=1280x720@60 print-fatal-signals=1"; 17 + bootargs = "earlycon=uart8250,mmio32,0xe0022000,115200n8 console=tty0 console=ttyS3,115200n8 consoleblank=0 print-fatal-signals=1"; 18 18 }; 19 19 };
+1 -1
arch/arc/boot/dts/axs103_idu.dts
··· 17 17 compatible = "snps,axs103", "snps,arc-sdp"; 18 18 19 19 chosen { 20 - bootargs = "earlycon=uart8250,mmio32,0xe0022000,115200n8 console=tty0 console=ttyS3,115200n8 print-fatal-signals=1 consoleblank=0 video=1280x720@60"; 20 + bootargs = "earlycon=uart8250,mmio32,0xe0022000,115200n8 console=tty0 console=ttyS3,115200n8 print-fatal-signals=1 consoleblank=0"; 21 21 }; 22 22 };
+6 -5
arch/arc/boot/dts/axs10x_mb.dtsi
··· 61 61 clock-frequency = <25000000>; 62 62 #clock-cells = <0>; 63 63 }; 64 + }; 64 65 65 - pguclk: pguclk { 66 - #clock-cells = <0>; 67 - compatible = "fixed-clock"; 68 - clock-frequency = <74250000>; 69 - }; 66 + pguclk: pguclk@10080 { 67 + compatible = "snps,axs10x-pgu-pll-clock"; 68 + reg = <0x10080 0x10>, <0x110 0x10>; 69 + #clock-cells = <0>; 70 + clocks = <&input_clk>; 70 71 }; 71 72 72 73 gmac: ethernet@18000 {
+9 -6
arch/arc/boot/dts/haps_hs.dts
··· 9 9 / { 10 10 model = "snps,zebu_hs"; 11 11 compatible = "snps,zebu_hs"; 12 - #address-cells = <1>; 13 - #size-cells = <1>; 12 + #address-cells = <2>; 13 + #size-cells = <2>; 14 14 interrupt-parent = <&core_intc>; 15 15 16 16 memory { 17 17 device_type = "memory"; 18 - reg = <0x80000000 0x20000000>; /* 512 */ 18 + /* CONFIG_LINUX_RAM_BASE needs to match low mem start */ 19 + reg = <0x0 0x80000000 0x0 0x20000000 /* 512 MB low mem */ 20 + 0x1 0x00000000 0x0 0x40000000>; /* 1 GB highmem */ 19 21 }; 20 22 21 23 chosen { ··· 33 31 #address-cells = <1>; 34 32 #size-cells = <1>; 35 33 36 - /* child and parent address space 1:1 mapped */ 37 - ranges; 34 + /* only perip space at end of low mem accessible 35 + bus addr, parent bus addr, size */ 36 + ranges = <0x80000000 0x0 0x80000000 0x80000000>; 38 37 39 38 core_clk: core_clk { 40 39 #clock-cells = <0>; ··· 50 47 }; 51 48 52 49 uart0: serial@f0000000 { 53 - compatible = "ns8250"; 50 + compatible = "ns16550a"; 54 51 reg = <0xf0000000 0x2000>; 55 52 interrupts = <24>; 56 53 clock-frequency = <50000000>;
-1
arch/arc/boot/dts/haps_hs_idu.dts
··· 54 54 }; 55 55 56 56 uart0: serial@f0000000 { 57 - /* compatible = "ns8250"; Doesn't use FIFOs */ 58 57 compatible = "ns16550a"; 59 58 reg = <0xf0000000 0x2000>; 60 59 interrupt-parent = <&idu_intc>;
+11 -25
arch/arc/boot/dts/nsim_700.dts
··· 14 14 interrupt-parent = <&core_intc>; 15 15 16 16 chosen { 17 - bootargs = "earlycon=arc_uart,mmio32,0xc0fc1000,115200n8 console=ttyARC0,115200n8 print-fatal-signals=1"; 17 + bootargs = "earlycon=uart8250,mmio32,0xf0000000,115200n8 console=ttyS0,115200n8 print-fatal-signals=1"; 18 18 }; 19 19 20 20 aliases { 21 - serial0 = &arcuart0; 21 + serial0 = &uart0; 22 22 }; 23 23 24 24 fpga { ··· 41 41 #interrupt-cells = <1>; 42 42 }; 43 43 44 - arcuart0: serial@c0fc1000 { 45 - compatible = "snps,arc-uart"; 46 - reg = <0xc0fc1000 0x100>; 47 - interrupts = <5>; 48 - clock-frequency = <80000000>; 49 - current-speed = <115200>; 50 - status = "okay"; 51 - }; 52 - 53 - ethernet@c0fc2000 { 54 - compatible = "snps,arc-emac"; 55 - reg = <0xc0fc2000 0x3c>; 56 - interrupts = <6>; 57 - mac-address = [ 00 11 22 33 44 55 ]; 58 - clock-frequency = <80000000>; 59 - max-speed = <100>; 60 - phy = <&phy0>; 61 - 62 - #address-cells = <1>; 63 - #size-cells = <0>; 64 - phy0: ethernet-phy@0 { 65 - reg = <1>; 66 - }; 44 + uart0: serial@f0000000 { 45 + compatible = "ns16550a"; 46 + reg = <0xf0000000 0x2000>; 47 + interrupts = <24>; 48 + clock-frequency = <50000000>; 49 + baud = <115200>; 50 + reg-shift = <2>; 51 + reg-io-width = <4>; 52 + no-loopback-test = <1>; 67 53 }; 68 54 69 55 arcpct0: pct {
-67
arch/arc/boot/dts/nsim_hs.dts
··· 1 - // SPDX-License-Identifier: GPL-2.0-only 2 - /* 3 - * Copyright (C) 2014-15 Synopsys, Inc. (www.synopsys.com) 4 - */ 5 - /dts-v1/; 6 - 7 - /include/ "skeleton_hs.dtsi" 8 - 9 - / { 10 - model = "snps,nsim_hs"; 11 - compatible = "snps,nsim_hs"; 12 - #address-cells = <2>; 13 - #size-cells = <2>; 14 - interrupt-parent = <&core_intc>; 15 - 16 - memory { 17 - device_type = "memory"; 18 - /* CONFIG_LINUX_RAM_BASE needs to match low mem start */ 19 - reg = <0x0 0x80000000 0x0 0x20000000 /* 512 MB low mem */ 20 - 0x1 0x00000000 0x0 0x40000000>; /* 1 GB highmem */ 21 - }; 22 - 23 - chosen { 24 - bootargs = "earlycon=arc_uart,mmio32,0xc0fc1000,115200n8 console=ttyARC0,115200n8 print-fatal-signals=1"; 25 - }; 26 - 27 - aliases { 28 - serial0 = &arcuart0; 29 - }; 30 - 31 - fpga { 32 - compatible = "simple-bus"; 33 - #address-cells = <1>; 34 - #size-cells = <1>; 35 - 36 - /* only perip space at end of low mem accessible 37 - bus addr, parent bus addr, size */ 38 - ranges = <0x80000000 0x0 0x80000000 0x80000000>; 39 - 40 - core_clk: core_clk { 41 - #clock-cells = <0>; 42 - compatible = "fixed-clock"; 43 - clock-frequency = <80000000>; 44 - }; 45 - 46 - core_intc: core-interrupt-controller { 47 - compatible = "snps,archs-intc"; 48 - interrupt-controller; 49 - #interrupt-cells = <1>; 50 - }; 51 - 52 - arcuart0: serial@c0fc1000 { 53 - compatible = "snps,arc-uart"; 54 - reg = <0xc0fc1000 0x100>; 55 - interrupts = <24>; 56 - clock-frequency = <80000000>; 57 - current-speed = <115200>; 58 - status = "okay"; 59 - }; 60 - 61 - arcpct0: pct { 62 - compatible = "snps,archs-pct"; 63 - #interrupt-cells = <1>; 64 - interrupts = <20>; 65 - }; 66 - }; 67 - };
-65
arch/arc/boot/dts/nsim_hs_idu.dts
··· 1 - // SPDX-License-Identifier: GPL-2.0-only 2 - /* 3 - * Copyright (C) 2014-15 Synopsys, Inc. (www.synopsys.com) 4 - */ 5 - /dts-v1/; 6 - 7 - /include/ "skeleton_hs_idu.dtsi" 8 - 9 - / { 10 - model = "snps,nsim_hs-smp"; 11 - compatible = "snps,nsim_hs"; 12 - interrupt-parent = <&core_intc>; 13 - 14 - chosen { 15 - bootargs = "earlycon=arc_uart,mmio32,0xc0fc1000,115200n8 console=ttyARC0,115200n8 print-fatal-signals=1"; 16 - }; 17 - 18 - aliases { 19 - serial0 = &arcuart0; 20 - }; 21 - 22 - fpga { 23 - compatible = "simple-bus"; 24 - #address-cells = <1>; 25 - #size-cells = <1>; 26 - 27 - /* child and parent address space 1:1 mapped */ 28 - ranges; 29 - 30 - core_clk: core_clk { 31 - #clock-cells = <0>; 32 - compatible = "fixed-clock"; 33 - clock-frequency = <80000000>; 34 - }; 35 - 36 - core_intc: core-interrupt-controller { 37 - compatible = "snps,archs-intc"; 38 - interrupt-controller; 39 - #interrupt-cells = <1>; 40 - }; 41 - 42 - idu_intc: idu-interrupt-controller { 43 - compatible = "snps,archs-idu-intc"; 44 - interrupt-controller; 45 - interrupt-parent = <&core_intc>; 46 - #interrupt-cells = <1>; 47 - }; 48 - 49 - arcuart0: serial@c0fc1000 { 50 - compatible = "snps,arc-uart"; 51 - reg = <0xc0fc1000 0x100>; 52 - interrupt-parent = <&idu_intc>; 53 - interrupts = <0>; 54 - clock-frequency = <80000000>; 55 - current-speed = <115200>; 56 - status = "okay"; 57 - }; 58 - 59 - arcpct0: pct { 60 - compatible = "snps,archs-pct"; 61 - #interrupt-cells = <1>; 62 - interrupts = <20>; 63 - }; 64 - }; 65 - };
+6 -24
arch/arc/configs/haps_hs_defconfig
··· 4 4 # CONFIG_CROSS_MEMORY_ATTACH is not set 5 5 CONFIG_NO_HZ_IDLE=y 6 6 CONFIG_HIGH_RES_TIMERS=y 7 + CONFIG_PREEMPT=y 7 8 CONFIG_IKCONFIG=y 8 9 CONFIG_IKCONFIG_PROC=y 9 10 CONFIG_NAMESPACES=y ··· 16 15 CONFIG_PERF_EVENTS=y 17 16 # CONFIG_COMPAT_BRK is not set 18 17 CONFIG_SLAB=y 18 + CONFIG_ARC_BUILTIN_DTB_NAME="haps_hs" 19 19 CONFIG_MODULES=y 20 20 # CONFIG_BLK_DEV_BSG is not set 21 - # CONFIG_IOSCHED_DEADLINE is not set 22 - # CONFIG_IOSCHED_CFQ is not set 23 - CONFIG_ISA_ARCV2=y 24 - CONFIG_ARC_BUILTIN_DTB_NAME="haps_hs" 25 - CONFIG_PREEMPT=y 26 21 # CONFIG_COMPACTION is not set 27 22 CONFIG_NET=y 28 23 CONFIG_PACKET=y ··· 27 30 CONFIG_UNIX_DIAG=y 28 31 CONFIG_NET_KEY=y 29 32 CONFIG_INET=y 30 - # CONFIG_INET_XFRM_MODE_TRANSPORT is not set 31 - # CONFIG_INET_XFRM_MODE_TUNNEL is not set 32 - # CONFIG_INET_XFRM_MODE_BEET is not set 33 33 # CONFIG_IPV6 is not set 34 34 # CONFIG_WIRELESS is not set 35 35 CONFIG_DEVTMPFS=y ··· 36 42 CONFIG_VIRTIO_BLK=y 37 43 CONFIG_NETDEVICES=y 38 44 CONFIG_VIRTIO_NET=y 39 - # CONFIG_NET_VENDOR_ARC is not set 40 - # CONFIG_NET_VENDOR_BROADCOM is not set 41 - # CONFIG_NET_VENDOR_INTEL is not set 42 - # CONFIG_NET_VENDOR_MARVELL is not set 43 - # CONFIG_NET_VENDOR_MICREL is not set 44 - # CONFIG_NET_VENDOR_NATSEMI is not set 45 - # CONFIG_NET_VENDOR_SEEQ is not set 46 - # CONFIG_NET_VENDOR_STMICRO is not set 47 - # CONFIG_NET_VENDOR_VIA is not set 48 - # CONFIG_NET_VENDOR_WIZNET is not set 45 + # CONFIG_ETHERNET is not set 49 46 # CONFIG_WLAN is not set 50 47 CONFIG_INPUT_EVDEV=y 51 - CONFIG_MOUSE_PS2_TOUCHKIT=y 52 - # CONFIG_SERIO_SERPORT is not set 53 - CONFIG_SERIO_ARC_PS2=y 48 + # CONFIG_INPUT_KEYBOARD is not set 49 + # CONFIG_INPUT_MOUSE is not set 50 + # CONFIG_SERIO is not set 54 51 # CONFIG_LEGACY_PTYS is not set 55 52 CONFIG_SERIAL_8250=y 56 53 CONFIG_SERIAL_8250_CONSOLE=y ··· 51 66 CONFIG_SERIAL_OF_PLATFORM=y 52 67 # CONFIG_HW_RANDOM is not set 53 68 # CONFIG_HWMON is not set 54 - CONFIG_FB=y 55 - CONFIG_FRAMEBUFFER_CONSOLE=y 56 - CONFIG_LOGO=y 57 69 # CONFIG_HID is not set 58 70 # CONFIG_USB_SUPPORT is not set 59 71 CONFIG_VIRTIO_MMIO=y
+7 -25
arch/arc/configs/haps_hs_smp_defconfig
··· 4 4 # CONFIG_CROSS_MEMORY_ATTACH is not set 5 5 CONFIG_NO_HZ_IDLE=y 6 6 CONFIG_HIGH_RES_TIMERS=y 7 + CONFIG_PREEMPT=y 7 8 CONFIG_IKCONFIG=y 8 9 CONFIG_IKCONFIG_PROC=y 9 10 CONFIG_NAMESPACES=y ··· 17 16 # CONFIG_VM_EVENT_COUNTERS is not set 18 17 # CONFIG_COMPAT_BRK is not set 19 18 CONFIG_SLAB=y 19 + CONFIG_SMP=y 20 + CONFIG_ARC_BUILTIN_DTB_NAME="haps_hs_idu" 20 21 CONFIG_KPROBES=y 21 22 CONFIG_MODULES=y 22 23 # CONFIG_BLK_DEV_BSG is not set 23 - # CONFIG_IOSCHED_DEADLINE is not set 24 - # CONFIG_IOSCHED_CFQ is not set 25 - CONFIG_ISA_ARCV2=y 26 - CONFIG_SMP=y 27 - CONFIG_ARC_BUILTIN_DTB_NAME="haps_hs_idu" 28 - CONFIG_PREEMPT=y 29 24 # CONFIG_COMPACTION is not set 30 25 CONFIG_NET=y 31 26 CONFIG_PACKET=y ··· 30 33 CONFIG_UNIX_DIAG=y 31 34 CONFIG_NET_KEY=y 32 35 CONFIG_INET=y 33 - # CONFIG_INET_XFRM_MODE_TRANSPORT is not set 34 - # CONFIG_INET_XFRM_MODE_TUNNEL is not set 35 - # CONFIG_INET_XFRM_MODE_BEET is not set 36 36 # CONFIG_IPV6 is not set 37 37 # CONFIG_WIRELESS is not set 38 38 CONFIG_DEVTMPFS=y ··· 37 43 # CONFIG_PREVENT_FIRMWARE_BUILD is not set 38 44 # CONFIG_BLK_DEV is not set 39 45 CONFIG_NETDEVICES=y 40 - # CONFIG_NET_VENDOR_ARC is not set 41 - # CONFIG_NET_VENDOR_BROADCOM is not set 42 - # CONFIG_NET_VENDOR_INTEL is not set 43 - # CONFIG_NET_VENDOR_MARVELL is not set 44 - # CONFIG_NET_VENDOR_MICREL is not set 45 - # CONFIG_NET_VENDOR_NATSEMI is not set 46 - # CONFIG_NET_VENDOR_SEEQ is not set 47 - # CONFIG_NET_VENDOR_STMICRO is not set 48 - # CONFIG_NET_VENDOR_VIA is not set 49 - # CONFIG_NET_VENDOR_WIZNET is not set 46 + # CONFIG_ETHERNET is not set 50 47 # CONFIG_WLAN is not set 51 48 CONFIG_INPUT_EVDEV=y 52 - CONFIG_MOUSE_PS2_TOUCHKIT=y 53 - # CONFIG_SERIO_SERPORT is not set 54 - CONFIG_SERIO_ARC_PS2=y 49 + # CONFIG_INPUT_KEYBOARD is not set 50 + # CONFIG_INPUT_MOUSE is not set 51 + # CONFIG_SERIO is not set 55 52 # CONFIG_LEGACY_PTYS is not set 56 53 CONFIG_SERIAL_8250=y 57 54 CONFIG_SERIAL_8250_CONSOLE=y ··· 52 67 CONFIG_SERIAL_OF_PLATFORM=y 53 68 # CONFIG_HW_RANDOM is not set 54 69 # CONFIG_HWMON is not set 55 - CONFIG_FB=y 56 - CONFIG_FRAMEBUFFER_CONSOLE=y 57 - CONFIG_LOGO=y 58 70 # CONFIG_HID is not set 59 71 # CONFIG_USB_SUPPORT is not set 60 72 # CONFIG_IOMMU_SUPPORT is not set
+10 -9
arch/arc/configs/nsim_700_defconfig
··· 4 4 CONFIG_POSIX_MQUEUE=y 5 5 # CONFIG_CROSS_MEMORY_ATTACH is not set 6 6 CONFIG_HIGH_RES_TIMERS=y 7 + CONFIG_PREEMPT=y 7 8 CONFIG_IKCONFIG=y 8 9 CONFIG_IKCONFIG_PROC=y 9 10 CONFIG_NAMESPACES=y ··· 18 17 # CONFIG_SLUB_DEBUG is not set 19 18 # CONFIG_COMPAT_BRK is not set 20 19 CONFIG_ISA_ARCOMPACT=y 20 + CONFIG_ARC_BUILTIN_DTB_NAME="nsim_700" 21 21 CONFIG_KPROBES=y 22 22 CONFIG_MODULES=y 23 23 # CONFIG_BLK_DEV_BSG is not set 24 - # CONFIG_IOSCHED_DEADLINE is not set 25 - # CONFIG_IOSCHED_CFQ is not set 26 - CONFIG_ARC_BUILTIN_DTB_NAME="nsim_700" 27 - CONFIG_PREEMPT=y 28 24 # CONFIG_COMPACTION is not set 29 25 CONFIG_NET=y 30 26 CONFIG_PACKET=y ··· 35 37 # CONFIG_PREVENT_FIRMWARE_BUILD is not set 36 38 # CONFIG_BLK_DEV is not set 37 39 CONFIG_NETDEVICES=y 38 - CONFIG_ARC_EMAC=y 39 - CONFIG_LXT_PHY=y 40 - # CONFIG_INPUT_MOUSEDEV_PSAUX is not set 40 + # CONFIG_ETHERNET is not set 41 + # CONFIG_WLAN is not set 41 42 # CONFIG_INPUT_KEYBOARD is not set 42 43 # CONFIG_INPUT_MOUSE is not set 43 44 # CONFIG_SERIO is not set 44 45 # CONFIG_LEGACY_PTYS is not set 45 - CONFIG_SERIAL_ARC=y 46 - CONFIG_SERIAL_ARC_CONSOLE=y 46 + CONFIG_SERIAL_8250=y 47 + CONFIG_SERIAL_8250_CONSOLE=y 48 + CONFIG_SERIAL_8250_NR_UARTS=1 49 + CONFIG_SERIAL_8250_RUNTIME_UARTS=1 50 + CONFIG_SERIAL_8250_DW=y 51 + CONFIG_SERIAL_OF_PLATFORM=y 47 52 # CONFIG_HW_RANDOM is not set 48 53 # CONFIG_HWMON is not set 49 54 # CONFIG_HID is not set
-60
arch/arc/configs/nsim_hs_defconfig
··· 1 - # CONFIG_LOCALVERSION_AUTO is not set 2 - # CONFIG_SWAP is not set 3 - CONFIG_SYSVIPC=y 4 - CONFIG_POSIX_MQUEUE=y 5 - # CONFIG_CROSS_MEMORY_ATTACH is not set 6 - CONFIG_HIGH_RES_TIMERS=y 7 - CONFIG_IKCONFIG=y 8 - CONFIG_IKCONFIG_PROC=y 9 - CONFIG_NAMESPACES=y 10 - # CONFIG_UTS_NS is not set 11 - # CONFIG_PID_NS is not set 12 - CONFIG_BLK_DEV_INITRD=y 13 - CONFIG_CC_OPTIMIZE_FOR_PERFORMANCE_O3=y 14 - CONFIG_KALLSYMS_ALL=y 15 - CONFIG_EMBEDDED=y 16 - CONFIG_PERF_EVENTS=y 17 - # CONFIG_SLUB_DEBUG is not set 18 - # CONFIG_COMPAT_BRK is not set 19 - CONFIG_KPROBES=y 20 - CONFIG_MODULES=y 21 - CONFIG_MODULE_FORCE_LOAD=y 22 - CONFIG_MODULE_UNLOAD=y 23 - CONFIG_MODULE_FORCE_UNLOAD=y 24 - # CONFIG_BLK_DEV_BSG is not set 25 - # CONFIG_IOSCHED_DEADLINE is not set 26 - # CONFIG_IOSCHED_CFQ is not set 27 - CONFIG_ISA_ARCV2=y 28 - CONFIG_ARC_BUILTIN_DTB_NAME="nsim_hs" 29 - CONFIG_PREEMPT=y 30 - # CONFIG_COMPACTION is not set 31 - CONFIG_NET=y 32 - CONFIG_PACKET=y 33 - CONFIG_UNIX=y 34 - CONFIG_UNIX_DIAG=y 35 - CONFIG_NET_KEY=y 36 - CONFIG_INET=y 37 - # CONFIG_IPV6 is not set 38 - CONFIG_DEVTMPFS=y 39 - # CONFIG_STANDALONE is not set 40 - # CONFIG_PREVENT_FIRMWARE_BUILD is not set 41 - # CONFIG_BLK_DEV is not set 42 - # CONFIG_INPUT_MOUSEDEV_PSAUX is not set 43 - # CONFIG_INPUT_KEYBOARD is not set 44 - # CONFIG_INPUT_MOUSE is not set 45 - # CONFIG_SERIO is not set 46 - # CONFIG_LEGACY_PTYS is not set 47 - CONFIG_SERIAL_ARC=y 48 - CONFIG_SERIAL_ARC_CONSOLE=y 49 - # CONFIG_HW_RANDOM is not set 50 - # CONFIG_HWMON is not set 51 - # CONFIG_HID is not set 52 - # CONFIG_USB_SUPPORT is not set 53 - # CONFIG_IOMMU_SUPPORT is not set 54 - CONFIG_EXT2_FS=y 55 - CONFIG_EXT2_FS_XATTR=y 56 - CONFIG_TMPFS=y 57 - # CONFIG_MISC_FILESYSTEMS is not set 58 - CONFIG_NFS_FS=y 59 - # CONFIG_ENABLE_MUST_CHECK is not set 60 - # CONFIG_DEBUG_PREEMPT is not set
-58
arch/arc/configs/nsim_hs_smp_defconfig
··· 1 - # CONFIG_LOCALVERSION_AUTO is not set 2 - # CONFIG_SWAP is not set 3 - # CONFIG_CROSS_MEMORY_ATTACH is not set 4 - CONFIG_HIGH_RES_TIMERS=y 5 - CONFIG_IKCONFIG=y 6 - CONFIG_IKCONFIG_PROC=y 7 - CONFIG_NAMESPACES=y 8 - # CONFIG_UTS_NS is not set 9 - # CONFIG_PID_NS is not set 10 - CONFIG_BLK_DEV_INITRD=y 11 - CONFIG_CC_OPTIMIZE_FOR_PERFORMANCE_O3=y 12 - CONFIG_KALLSYMS_ALL=y 13 - CONFIG_EMBEDDED=y 14 - CONFIG_PERF_EVENTS=y 15 - # CONFIG_SLUB_DEBUG is not set 16 - # CONFIG_COMPAT_BRK is not set 17 - CONFIG_KPROBES=y 18 - CONFIG_MODULES=y 19 - CONFIG_MODULE_FORCE_LOAD=y 20 - CONFIG_MODULE_UNLOAD=y 21 - CONFIG_MODULE_FORCE_UNLOAD=y 22 - # CONFIG_BLK_DEV_BSG is not set 23 - # CONFIG_IOSCHED_DEADLINE is not set 24 - # CONFIG_IOSCHED_CFQ is not set 25 - CONFIG_ISA_ARCV2=y 26 - CONFIG_SMP=y 27 - CONFIG_ARC_BUILTIN_DTB_NAME="nsim_hs_idu" 28 - CONFIG_PREEMPT=y 29 - # CONFIG_COMPACTION is not set 30 - CONFIG_NET=y 31 - CONFIG_PACKET=y 32 - CONFIG_UNIX=y 33 - CONFIG_UNIX_DIAG=y 34 - CONFIG_NET_KEY=y 35 - CONFIG_INET=y 36 - # CONFIG_IPV6 is not set 37 - CONFIG_DEVTMPFS=y 38 - # CONFIG_STANDALONE is not set 39 - # CONFIG_PREVENT_FIRMWARE_BUILD is not set 40 - # CONFIG_BLK_DEV is not set 41 - # CONFIG_INPUT_MOUSEDEV_PSAUX is not set 42 - # CONFIG_INPUT_KEYBOARD is not set 43 - # CONFIG_INPUT_MOUSE is not set 44 - # CONFIG_SERIO is not set 45 - # CONFIG_LEGACY_PTYS is not set 46 - CONFIG_SERIAL_ARC=y 47 - CONFIG_SERIAL_ARC_CONSOLE=y 48 - # CONFIG_HW_RANDOM is not set 49 - # CONFIG_HWMON is not set 50 - # CONFIG_HID is not set 51 - # CONFIG_USB_SUPPORT is not set 52 - # CONFIG_IOMMU_SUPPORT is not set 53 - CONFIG_EXT2_FS=y 54 - CONFIG_EXT2_FS_XATTR=y 55 - CONFIG_TMPFS=y 56 - # CONFIG_MISC_FILESYSTEMS is not set 57 - CONFIG_NFS_FS=y 58 - # CONFIG_ENABLE_MUST_CHECK is not set
+2
arch/arc/include/asm/cache.h
··· 25 25 26 26 #ifndef __ASSEMBLY__ 27 27 28 + #include <linux/build_bug.h> 29 + 28 30 /* Uncached access macros */ 29 31 #define arc_read_uncached_32(ptr) \ 30 32 ({ \
+2 -2
arch/arc/include/asm/entry-compact.h
··· 130 130 * to be saved again on kernel mode stack, as part of pt_regs. 131 131 *-------------------------------------------------------------*/ 132 132 .macro PROLOG_FREEUP_REG reg, mem 133 - #ifdef CONFIG_SMP 133 + #ifndef ARC_USE_SCRATCH_REG 134 134 sr \reg, [ARC_REG_SCRATCH_DATA0] 135 135 #else 136 136 st \reg, [\mem] ··· 138 138 .endm 139 139 140 140 .macro PROLOG_RESTORE_REG reg, mem 141 - #ifdef CONFIG_SMP 141 + #ifndef ARC_USE_SCRATCH_REG 142 142 lr \reg, [ARC_REG_SCRATCH_DATA0] 143 143 #else 144 144 ld \reg, [\mem]
+72
arch/arc/include/asm/jump_label.h
··· 1 + /* SPDX-License-Identifier: GPL-2.0 */ 2 + #ifndef _ASM_ARC_JUMP_LABEL_H 3 + #define _ASM_ARC_JUMP_LABEL_H 4 + 5 + #ifndef __ASSEMBLY__ 6 + 7 + #include <linux/stringify.h> 8 + #include <linux/types.h> 9 + 10 + #define JUMP_LABEL_NOP_SIZE 4 11 + 12 + /* 13 + * NOTE about '.balign 4': 14 + * 15 + * To make atomic update of patched instruction available we need to guarantee 16 + * that this instruction doesn't cross L1 cache line boundary. 17 + * 18 + * As of today we simply align instruction which can be patched by 4 byte using 19 + * ".balign 4" directive. In that case patched instruction is aligned with one 20 + * 16-bit NOP_S if this is required. 21 + * However 'align by 4' directive is much stricter than it actually required. 22 + * It's enough that our 32-bit instruction don't cross L1 cache line boundary / 23 + * L1 I$ fetch block boundary which can be achieved by using 24 + * ".bundle_align_mode" assembler directive. That will save us from adding 25 + * useless NOP_S padding in most of the cases. 26 + * 27 + * TODO: switch to ".bundle_align_mode" directive using whin it will be 28 + * supported by ARC toolchain. 29 + */ 30 + 31 + static __always_inline bool arch_static_branch(struct static_key *key, 32 + bool branch) 33 + { 34 + asm_volatile_goto(".balign "__stringify(JUMP_LABEL_NOP_SIZE)" \n" 35 + "1: \n" 36 + "nop \n" 37 + ".pushsection __jump_table, \"aw\" \n" 38 + ".word 1b, %l[l_yes], %c0 \n" 39 + ".popsection \n" 40 + : : "i" (&((char *)key)[branch]) : : l_yes); 41 + 42 + return false; 43 + l_yes: 44 + return true; 45 + } 46 + 47 + static __always_inline bool arch_static_branch_jump(struct static_key *key, 48 + bool branch) 49 + { 50 + asm_volatile_goto(".balign "__stringify(JUMP_LABEL_NOP_SIZE)" \n" 51 + "1: \n" 52 + "b %l[l_yes] \n" 53 + ".pushsection __jump_table, \"aw\" \n" 54 + ".word 1b, %l[l_yes], %c0 \n" 55 + ".popsection \n" 56 + : : "i" (&((char *)key)[branch]) : : l_yes); 57 + 58 + return false; 59 + l_yes: 60 + return true; 61 + } 62 + 63 + typedef u32 jump_label_t; 64 + 65 + struct jump_entry { 66 + jump_label_t code; 67 + jump_label_t target; 68 + jump_label_t key; 69 + }; 70 + 71 + #endif /* __ASSEMBLY__ */ 72 + #endif
+6
arch/arc/include/asm/mmu.h
··· 40 40 #define ARC_REG_SCRATCH_DATA0 0x46c 41 41 #endif 42 42 43 + #if defined(CONFIG_ISA_ARCV2) || !defined(CONFIG_SMP) 44 + #define ARC_USE_SCRATCH_REG 45 + #endif 46 + 43 47 /* Bits in MMU PID register */ 44 48 #define __TLB_ENABLE (1 << 31) 45 49 #define __PROG_ENABLE (1 << 30) ··· 67 63 #if (CONFIG_ARC_MMU_VER >= 2) 68 64 #define TLBWriteNI 0x5 /* write JTLB without inv uTLBs */ 69 65 #define TLBIVUTLB 0x6 /* explicitly inv uTLBs */ 66 + #else 67 + #define TLBWriteNI TLBWrite /* Not present in hardware, fallback */ 70 68 #endif 71 69 72 70 #if (CONFIG_ARC_MMU_VER >= 4)
+1 -1
arch/arc/include/asm/mmu_context.h
··· 144 144 */ 145 145 cpumask_set_cpu(cpu, mm_cpumask(next)); 146 146 147 - #ifndef CONFIG_SMP 147 + #ifdef ARC_USE_SCRATCH_REG 148 148 /* PGD cached in MMU reg to avoid 3 mem lookups: task->mm->pgd */ 149 149 write_aux_reg(ARC_REG_SCRATCH_DATA0, next->pgd); 150 150 #endif
+1 -1
arch/arc/include/asm/pgtable.h
··· 350 350 * Thus use this macro only when you are certain that "current" is current 351 351 * e.g. when dealing with signal frame setup code etc 352 352 */ 353 - #ifndef CONFIG_SMP 353 + #ifdef ARC_USE_SCRATCH_REG 354 354 #define pgd_offset_fast(mm, addr) \ 355 355 ({ \ 356 356 pgd_t *pgd_base = (pgd_t *) read_aux_reg(ARC_REG_SCRATCH_DATA0); \
+1
arch/arc/kernel/Makefile
··· 20 20 obj-$(CONFIG_KGDB) += kgdb.o 21 21 obj-$(CONFIG_ARC_METAWARE_HLINK) += arc_hostlink.o 22 22 obj-$(CONFIG_PERF_EVENTS) += perf_event.o 23 + obj-$(CONFIG_JUMP_LABEL) += jump_label.o 23 24 24 25 obj-$(CONFIG_ARC_FPU_SAVE_RESTORE) += fpu.o 25 26 CFLAGS_fpu.o += -mdpfp
+170
arch/arc/kernel/jump_label.c
··· 1 + // SPDX-License-Identifier: GPL-2.0 2 + 3 + #include <linux/kernel.h> 4 + #include <linux/jump_label.h> 5 + 6 + #include "asm/cacheflush.h" 7 + 8 + #define JUMPLABEL_ERR "ARC: jump_label: ERROR: " 9 + 10 + /* Halt system on fatal error to make debug easier */ 11 + #define arc_jl_fatal(format...) \ 12 + ({ \ 13 + pr_err(JUMPLABEL_ERR format); \ 14 + BUG(); \ 15 + }) 16 + 17 + static inline u32 arc_gen_nop(void) 18 + { 19 + /* 1x 32bit NOP in middle endian */ 20 + return 0x7000264a; 21 + } 22 + 23 + /* 24 + * Atomic update of patched instruction is only available if this 25 + * instruction doesn't cross L1 cache line boundary. You can read about 26 + * the way we achieve this in arc/include/asm/jump_label.h 27 + */ 28 + static inline void instruction_align_assert(void *addr, int len) 29 + { 30 + unsigned long a = (unsigned long)addr; 31 + 32 + if ((a >> L1_CACHE_SHIFT) != ((a + len - 1) >> L1_CACHE_SHIFT)) 33 + arc_jl_fatal("instruction (addr %px) cross L1 cache line border", 34 + addr); 35 + } 36 + 37 + /* 38 + * ARCv2 'Branch unconditionally' instruction: 39 + * 00000ssssssssss1SSSSSSSSSSNRtttt 40 + * s S[n:0] lower bits signed immediate (number is bitfield size) 41 + * S S[m:n+1] upper bits signed immediate (number is bitfield size) 42 + * t S[24:21] upper bits signed immediate (branch unconditionally far) 43 + * N N <.d> delay slot mode 44 + * R R Reserved 45 + */ 46 + static inline u32 arc_gen_branch(jump_label_t pc, jump_label_t target) 47 + { 48 + u32 instruction_l, instruction_r; 49 + u32 pcl = pc & GENMASK(31, 2); 50 + u32 u_offset = target - pcl; 51 + u32 s, S, t; 52 + 53 + /* 54 + * Offset in 32-bit branch instruction must to fit into s25. 55 + * Something is terribly broken if we get such huge offset within one 56 + * function. 57 + */ 58 + if ((s32)u_offset < -16777216 || (s32)u_offset > 16777214) 59 + arc_jl_fatal("gen branch with offset (%d) not fit in s25", 60 + (s32)u_offset); 61 + 62 + /* 63 + * All instructions are aligned by 2 bytes so we should never get offset 64 + * here which is not 2 bytes aligned. 65 + */ 66 + if (u_offset & 0x1) 67 + arc_jl_fatal("gen branch with offset (%d) unaligned to 2 bytes", 68 + (s32)u_offset); 69 + 70 + s = (u_offset >> 1) & GENMASK(9, 0); 71 + S = (u_offset >> 11) & GENMASK(9, 0); 72 + t = (u_offset >> 21) & GENMASK(3, 0); 73 + 74 + /* 00000ssssssssss1 */ 75 + instruction_l = (s << 1) | 0x1; 76 + /* SSSSSSSSSSNRtttt */ 77 + instruction_r = (S << 6) | t; 78 + 79 + return (instruction_r << 16) | (instruction_l & GENMASK(15, 0)); 80 + } 81 + 82 + void arch_jump_label_transform(struct jump_entry *entry, 83 + enum jump_label_type type) 84 + { 85 + jump_label_t *instr_addr = (jump_label_t *)entry->code; 86 + u32 instr; 87 + 88 + instruction_align_assert(instr_addr, JUMP_LABEL_NOP_SIZE); 89 + 90 + if (type == JUMP_LABEL_JMP) 91 + instr = arc_gen_branch(entry->code, entry->target); 92 + else 93 + instr = arc_gen_nop(); 94 + 95 + WRITE_ONCE(*instr_addr, instr); 96 + flush_icache_range(entry->code, entry->code + JUMP_LABEL_NOP_SIZE); 97 + } 98 + 99 + void arch_jump_label_transform_static(struct jump_entry *entry, 100 + enum jump_label_type type) 101 + { 102 + /* 103 + * We use only one NOP type (1x, 4 byte) in arch_static_branch, so 104 + * there's no need to patch an identical NOP over the top of it here. 105 + * The generic code calls 'arch_jump_label_transform' if the NOP needs 106 + * to be replaced by a branch, so 'arch_jump_label_transform_static' is 107 + * never called with type other than JUMP_LABEL_NOP. 108 + */ 109 + BUG_ON(type != JUMP_LABEL_NOP); 110 + } 111 + 112 + #ifdef CONFIG_ARC_DBG_JUMP_LABEL 113 + #define SELFTEST_MSG "ARC: instruction generation self-test: " 114 + 115 + struct arc_gen_branch_testdata { 116 + jump_label_t pc; 117 + jump_label_t target_address; 118 + u32 expected_instr; 119 + }; 120 + 121 + static __init int branch_gen_test(const struct arc_gen_branch_testdata *test) 122 + { 123 + u32 instr_got; 124 + 125 + instr_got = arc_gen_branch(test->pc, test->target_address); 126 + if (instr_got == test->expected_instr) 127 + return 0; 128 + 129 + pr_err(SELFTEST_MSG "FAIL:\n arc_gen_branch(0x%08x, 0x%08x) != 0x%08x, got 0x%08x\n", 130 + test->pc, test->target_address, 131 + test->expected_instr, instr_got); 132 + 133 + return -EFAULT; 134 + } 135 + 136 + /* 137 + * Offset field in branch instruction is not continuous. Test all 138 + * available offset field and sign combinations. Test data is generated 139 + * from real working code. 140 + */ 141 + static const struct arc_gen_branch_testdata arcgenbr_test_data[] __initconst = { 142 + {0x90007548, 0x90007514, 0xffcf07cd}, /* tiny (-52) offs */ 143 + {0x9000c9c0, 0x9000c782, 0xffcf05c3}, /* tiny (-574) offs */ 144 + {0x9000cc1c, 0x9000c782, 0xffcf0367}, /* tiny (-1178) offs */ 145 + {0x9009dce0, 0x9009d106, 0xff8f0427}, /* small (-3034) offs */ 146 + {0x9000f5de, 0x90007d30, 0xfc0f0755}, /* big (-30892) offs */ 147 + {0x900a2444, 0x90035f64, 0xc9cf0321}, /* huge (-443616) offs */ 148 + {0x90007514, 0x9000752c, 0x00000019}, /* tiny (+24) offs */ 149 + {0x9001a578, 0x9001a77a, 0x00000203}, /* tiny (+514) offs */ 150 + {0x90031ed8, 0x90032634, 0x0000075d}, /* tiny (+1884) offs */ 151 + {0x9008c7f2, 0x9008d3f0, 0x00400401}, /* small (+3072) offs */ 152 + {0x9000bb38, 0x9003b340, 0x17c00009}, /* big (+194568) offs */ 153 + {0x90008f44, 0x90578d80, 0xb7c2063d} /* huge (+5701180) offs */ 154 + }; 155 + 156 + static __init int instr_gen_test(void) 157 + { 158 + int i; 159 + 160 + for (i = 0; i < ARRAY_SIZE(arcgenbr_test_data); i++) 161 + if (branch_gen_test(&arcgenbr_test_data[i])) 162 + return -EFAULT; 163 + 164 + pr_info(SELFTEST_MSG "OK\n"); 165 + 166 + return 0; 167 + } 168 + early_initcall(instr_gen_test); 169 + 170 + #endif /* CONFIG_ARC_DBG_JUMP_LABEL */
+30 -51
arch/arc/mm/tlb.c
··· 118 118 write_aux_reg(ARC_REG_TLBCOMMAND, TLBWrite); 119 119 } 120 120 121 + static void utlb_invalidate(void) 122 + { 123 + #if (CONFIG_ARC_MMU_VER >= 2) 124 + 125 + #if (CONFIG_ARC_MMU_VER == 2) 126 + /* MMU v2 introduced the uTLB Flush command. 127 + * There was however an obscure hardware bug, where uTLB flush would 128 + * fail when a prior probe for J-TLB (both totally unrelated) would 129 + * return lkup err - because the entry didn't exist in MMU. 130 + * The Workround was to set Index reg with some valid value, prior to 131 + * flush. This was fixed in MMU v3 132 + */ 133 + unsigned int idx; 134 + 135 + /* make sure INDEX Reg is valid */ 136 + idx = read_aux_reg(ARC_REG_TLBINDEX); 137 + 138 + /* If not write some dummy val */ 139 + if (unlikely(idx & TLB_LKUP_ERR)) 140 + write_aux_reg(ARC_REG_TLBINDEX, 0xa); 141 + #endif 142 + 143 + write_aux_reg(ARC_REG_TLBCOMMAND, TLBIVUTLB); 144 + #endif 145 + 146 + } 147 + 121 148 #if (CONFIG_ARC_MMU_VER < 4) 122 149 123 150 static inline unsigned int tlb_entry_lkup(unsigned long vaddr_n_asid) ··· 174 147 WARN(idx == TLB_DUP_ERR, "Probe returned Dup PD for %x\n", 175 148 vaddr_n_asid); 176 149 } 177 - } 178 - 179 - /**************************************************************************** 180 - * ARC700 MMU caches recently used J-TLB entries (RAM) as uTLBs (FLOPs) 181 - * 182 - * New IVUTLB cmd in MMU v2 explictly invalidates the uTLB 183 - * 184 - * utlb_invalidate ( ) 185 - * -For v2 MMU calls Flush uTLB Cmd 186 - * -For v1 MMU does nothing (except for Metal Fix v1 MMU) 187 - * This is because in v1 TLBWrite itself invalidate uTLBs 188 - ***************************************************************************/ 189 - 190 - static void utlb_invalidate(void) 191 - { 192 - #if (CONFIG_ARC_MMU_VER >= 2) 193 - 194 - #if (CONFIG_ARC_MMU_VER == 2) 195 - /* MMU v2 introduced the uTLB Flush command. 196 - * There was however an obscure hardware bug, where uTLB flush would 197 - * fail when a prior probe for J-TLB (both totally unrelated) would 198 - * return lkup err - because the entry didn't exist in MMU. 199 - * The Workround was to set Index reg with some valid value, prior to 200 - * flush. This was fixed in MMU v3 hence not needed any more 201 - */ 202 - unsigned int idx; 203 - 204 - /* make sure INDEX Reg is valid */ 205 - idx = read_aux_reg(ARC_REG_TLBINDEX); 206 - 207 - /* If not write some dummy val */ 208 - if (unlikely(idx & TLB_LKUP_ERR)) 209 - write_aux_reg(ARC_REG_TLBINDEX, 0xa); 210 - #endif 211 - 212 - write_aux_reg(ARC_REG_TLBCOMMAND, TLBIVUTLB); 213 - #endif 214 - 215 150 } 216 151 217 152 static void tlb_entry_insert(unsigned int pd0, pte_t pd1) ··· 207 218 } 208 219 209 220 #else /* CONFIG_ARC_MMU_VER >= 4) */ 210 - 211 - static void utlb_invalidate(void) 212 - { 213 - /* No need since uTLB is always in sync with JTLB */ 214 - } 215 221 216 222 static void tlb_entry_erase(unsigned int vaddr_n_asid) 217 223 { ··· 251 267 for (entry = 0; entry < num_tlb; entry++) { 252 268 /* write this entry to the TLB */ 253 269 write_aux_reg(ARC_REG_TLBINDEX, entry); 254 - write_aux_reg(ARC_REG_TLBCOMMAND, TLBWrite); 270 + write_aux_reg(ARC_REG_TLBCOMMAND, TLBWriteNI); 255 271 } 256 272 257 273 if (IS_ENABLED(CONFIG_TRANSPARENT_HUGEPAGE)) { ··· 262 278 263 279 for (entry = stlb_idx; entry < stlb_idx + 16; entry++) { 264 280 write_aux_reg(ARC_REG_TLBINDEX, entry); 265 - write_aux_reg(ARC_REG_TLBCOMMAND, TLBWrite); 281 + write_aux_reg(ARC_REG_TLBCOMMAND, TLBWriteNI); 266 282 } 267 283 } 268 284 ··· 339 355 } 340 356 } 341 357 342 - utlb_invalidate(); 343 - 344 358 local_irq_restore(flags); 345 359 } 346 360 ··· 367 385 start += PAGE_SIZE; 368 386 } 369 387 370 - utlb_invalidate(); 371 - 372 388 local_irq_restore(flags); 373 389 } 374 390 ··· 387 407 388 408 if (asid_mm(vma->vm_mm, cpu) != MM_CTXT_NO_ASID) { 389 409 tlb_entry_erase((page & PAGE_MASK) | hw_pid(vma->vm_mm, cpu)); 390 - utlb_invalidate(); 391 410 } 392 411 393 412 local_irq_restore(flags); ··· 847 868 write_aux_reg(ARC_REG_PID, MMU_ENABLE); 848 869 849 870 /* In smp we use this reg for interrupt 1 scratch */ 850 - #ifndef CONFIG_SMP 871 + #ifdef ARC_USE_SCRATCH_REG 851 872 /* swapper_pg_dir is the pgd for the kernel, used by vmalloc */ 852 873 write_aux_reg(ARC_REG_SCRATCH_DATA0, swapper_pg_dir); 853 874 #endif
+11 -7
arch/arc/mm/tlbex.S
··· 122 122 #else /* ARCv2 */ 123 123 124 124 .macro TLBMISS_FREEUP_REGS 125 + #ifdef CONFIG_ARC_HAS_LL64 126 + std r0, [sp, -16] 127 + std r2, [sp, -8] 128 + #else 125 129 PUSH r0 126 130 PUSH r1 127 131 PUSH r2 128 132 PUSH r3 133 + #endif 129 134 .endm 130 135 131 136 .macro TLBMISS_RESTORE_REGS 137 + #ifdef CONFIG_ARC_HAS_LL64 138 + ldd r0, [sp, -16] 139 + ldd r2, [sp, -8] 140 + #else 132 141 POP r3 133 142 POP r2 134 143 POP r1 135 144 POP r0 145 + #endif 136 146 .endm 137 147 138 148 #endif ··· 203 193 204 194 lr r2, [efa] 205 195 206 - #ifndef CONFIG_SMP 196 + #ifdef ARC_USE_SCRATCH_REG 207 197 lr r1, [ARC_REG_SCRATCH_DATA0] ; current pgd 208 198 #else 209 199 GET_CURR_TASK_ON_CPU r1 ··· 292 282 sr TLBGetIndex, [ARC_REG_TLBCOMMAND] 293 283 294 284 /* Commit the Write */ 295 - #if (CONFIG_ARC_MMU_VER >= 2) /* introduced in v2 */ 296 285 sr TLBWriteNI, [ARC_REG_TLBCOMMAND] 297 - #else 298 - sr TLBWrite, [ARC_REG_TLBCOMMAND] 299 - #endif 300 286 301 287 #else 302 288 sr TLBInsertEntry, [ARC_REG_TLBCOMMAND] ··· 376 370 377 371 ;---------------------------------------------------------------- 378 372 ; UPDATE_PTE: Let Linux VM know that page was accessed/dirty 379 - lr r3, [ecr] 380 373 or r0, r0, _PAGE_ACCESSED ; Accessed bit always 381 - btst_s r3, ECR_C_BIT_DTLB_ST_MISS ; See if it was a Write Access ? 382 374 or.nz r0, r0, _PAGE_DIRTY ; if Write, set Dirty bit as well 383 375 st_s r0, [r1] ; Write back PTE 384 376
-1
arch/arc/plat-sim/platform.c
··· 21 21 "snps,nsim", 22 22 "snps,nsimosci", 23 23 #else 24 - "snps,nsim_hs", 25 24 "snps,nsimosci_hs", 26 25 "snps,zebu_hs", 27 26 #endif