tjh.dev
Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge commit 'fc69910f329d' into uaccess.mips
backmerge of a build fix from mainline
+1381
-313
+6
Documentation/admin-guide/kernel-parameters.txt
+6
Documentation/admin-guide/kernel-parameters.txt
···
1183
1183
functions that can be changed at run time by the
1184
1184
set_graph_notrace file in the debugfs tracing directory.
1185
1185
1186
+
ftrace_graph_max_depth=<uint>
1187
+
[FTRACE] Used with the function graph tracer. This is
1188
+
the max depth it will trace into a function. This value
1189
+
can be changed at run time by the max_graph_depth file
1190
+
in the tracefs tracing directory. default: 0 (no limit)
1191
+
1186
1192
gamecon.map[2|3]=
1187
1193
[HW,JOY] Multisystem joystick and NES/SNES/PSX pad
1188
1194
support via parallel port (up to 5 devices per port)
+1
-1
Documentation/trace/kprobetrace.txt
+1
-1
Documentation/trace/kprobetrace.txt
···
12
12
functions). Unlike the Tracepoint based event, this can be added and removed
13
13
dynamically, on the fly.
14
14
15
-
To enable this feature, build your kernel with CONFIG_KPROBE_EVENT=y.
15
+
To enable this feature, build your kernel with CONFIG_KPROBE_EVENTS=y.
16
16
17
17
Similar to the events tracer, this doesn't need to be activated via
18
18
current_tracer. Instead of that, add probe points via
+1
-1
Documentation/trace/uprobetracer.txt
+1
-1
Documentation/trace/uprobetracer.txt
···
7
7
Overview
8
8
--------
9
9
Uprobe based trace events are similar to kprobe based trace events.
10
-
To enable this feature, build your kernel with CONFIG_UPROBE_EVENT=y.
10
+
To enable this feature, build your kernel with CONFIG_UPROBE_EVENTS=y.
11
11
12
12
Similar to the kprobe-event tracer, this doesn't need to be activated via
13
13
current_tracer. Instead of that, add probe points via
+2
arch/arm/xen/mm.c
+2
arch/arm/xen/mm.c
+1
-1
arch/avr32/oprofile/backtrace.c
+1
-1
arch/avr32/oprofile/backtrace.c
+1
-1
arch/h8300/kernel/ptrace_h.c
+1
-1
arch/h8300/kernel/ptrace_h.c
+2
arch/mips/cavium-octeon/cpu.c
+2
arch/mips/cavium-octeon/cpu.c
+1
arch/mips/cavium-octeon/crypto/octeon-crypto.c
+1
arch/mips/cavium-octeon/crypto/octeon-crypto.c
+1
arch/mips/cavium-octeon/smp.c
+1
arch/mips/cavium-octeon/smp.c
+1
arch/mips/include/asm/fpu.h
+1
arch/mips/include/asm/fpu.h
+1
arch/mips/kernel/smp-bmips.c
+1
arch/mips/kernel/smp-bmips.c
+1
arch/mips/kernel/smp-mt.c
+1
arch/mips/kernel/smp-mt.c
+1
arch/mips/loongson64/loongson-3/cop2-ex.c
+1
arch/mips/loongson64/loongson-3/cop2-ex.c
+1
arch/mips/netlogic/common/smp.c
+1
arch/mips/netlogic/common/smp.c
+3
arch/mips/netlogic/xlp/cop2-ex.c
+3
arch/mips/netlogic/xlp/cop2-ex.c
···
9
9
* Copyright (C) 2009 Wind River Systems,
10
10
* written by Ralf Baechle <ralf@linux-mips.org>
11
11
*/
12
+
#include <linux/capability.h>
12
13
#include <linux/init.h>
13
14
#include <linux/irqflags.h>
14
15
#include <linux/notifier.h>
15
16
#include <linux/prefetch.h>
17
+
#include <linux/ptrace.h>
16
18
#include <linux/sched.h>
19
+
#include <linux/sched/task_stack.h>
17
20
18
21
#include <asm/cop2.h>
19
22
#include <asm/current.h>
+1
arch/mips/sgi-ip22/ip28-berr.c
+1
arch/mips/sgi-ip22/ip28-berr.c
+2
arch/mips/sgi-ip27/ip27-berr.c
+2
arch/mips/sgi-ip27/ip27-berr.c
···
12
12
#include <linux/signal.h> /* for SIGBUS */
13
13
#include <linux/sched.h> /* schow_regs(), force_sig() */
14
14
#include <linux/sched/debug.h>
15
+
#include <linux/sched/signal.h>
15
16
17
+
#include <asm/ptrace.h>
16
18
#include <asm/sn/addrs.h>
17
19
#include <asm/sn/arch.h>
18
20
#include <asm/sn/sn0/hub.h>
+3
arch/mips/sgi-ip27/ip27-smp.c
+3
arch/mips/sgi-ip27/ip27-smp.c
···
8
8
*/
9
9
#include <linux/init.h>
10
10
#include <linux/sched.h>
11
+
#include <linux/sched/task_stack.h>
11
12
#include <linux/topology.h>
12
13
#include <linux/nodemask.h>
14
+
13
15
#include <asm/page.h>
14
16
#include <asm/processor.h>
17
+
#include <asm/ptrace.h>
15
18
#include <asm/sn/arch.h>
16
19
#include <asm/sn/gda.h>
17
20
#include <asm/sn/intr.h>
+1
arch/mips/sgi-ip32/ip32-berr.c
+1
arch/mips/sgi-ip32/ip32-berr.c
+1
arch/mips/sgi-ip32/ip32-reset.c
+1
arch/mips/sgi-ip32/ip32-reset.c
+86
-80
arch/powerpc/Kconfig
+86
-80
arch/powerpc/Kconfig
···
80
80
config PPC
81
81
bool
82
82
default y
83
-
select BUILDTIME_EXTABLE_SORT
83
+
#
84
+
# Please keep this list sorted alphabetically.
85
+
#
86
+
select ARCH_HAS_DEVMEM_IS_ALLOWED
87
+
select ARCH_HAS_DMA_SET_COHERENT_MASK
88
+
select ARCH_HAS_ELF_RANDOMIZE
89
+
select ARCH_HAS_GCOV_PROFILE_ALL
90
+
select ARCH_HAS_SCALED_CPUTIME if VIRT_CPU_ACCOUNTING_NATIVE
91
+
select ARCH_HAS_SG_CHAIN
92
+
select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
93
+
select ARCH_HAS_UBSAN_SANITIZE_ALL
94
+
select ARCH_HAVE_NMI_SAFE_CMPXCHG
84
95
select ARCH_MIGHT_HAVE_PC_PARPORT
85
96
select ARCH_MIGHT_HAVE_PC_SERIO
97
+
select ARCH_SUPPORTS_ATOMIC_RMW
98
+
select ARCH_SUPPORTS_DEFERRED_STRUCT_PAGE_INIT
99
+
select ARCH_USE_BUILTIN_BSWAP
100
+
select ARCH_USE_CMPXCHG_LOCKREF if PPC64
101
+
select ARCH_WANT_IPC_PARSE_VERSION
86
102
select BINFMT_ELF
87
-
select ARCH_HAS_ELF_RANDOMIZE
103
+
select BUILDTIME_EXTABLE_SORT
104
+
select CLONE_BACKWARDS
105
+
select DCACHE_WORD_ACCESS if PPC64 && CPU_LITTLE_ENDIAN
106
+
select EDAC_ATOMIC_SCRUB
107
+
select EDAC_SUPPORT
108
+
select GENERIC_ATOMIC64 if PPC32
109
+
select GENERIC_CLOCKEVENTS
110
+
select GENERIC_CLOCKEVENTS_BROADCAST if SMP
111
+
select GENERIC_CMOS_UPDATE
112
+
select GENERIC_CPU_AUTOPROBE
113
+
select GENERIC_IRQ_SHOW
114
+
select GENERIC_IRQ_SHOW_LEVEL
115
+
select GENERIC_SMP_IDLE_THREAD
116
+
select GENERIC_STRNCPY_FROM_USER
117
+
select GENERIC_STRNLEN_USER
118
+
select GENERIC_TIME_VSYSCALL_OLD
119
+
select HAVE_ARCH_AUDITSYSCALL
120
+
select HAVE_ARCH_HARDENED_USERCOPY
121
+
select HAVE_ARCH_JUMP_LABEL
122
+
select HAVE_ARCH_KGDB
123
+
select HAVE_ARCH_SECCOMP_FILTER
124
+
select HAVE_ARCH_TRACEHOOK
125
+
select HAVE_CBPF_JIT if !PPC64
126
+
select HAVE_CONTEXT_TRACKING if PPC64
127
+
select HAVE_DEBUG_KMEMLEAK
128
+
select HAVE_DEBUG_STACKOVERFLOW
129
+
select HAVE_DMA_API_DEBUG
130
+
select HAVE_DYNAMIC_FTRACE
131
+
select HAVE_DYNAMIC_FTRACE_WITH_REGS if MPROFILE_KERNEL
132
+
select HAVE_EBPF_JIT if PPC64
133
+
select HAVE_EFFICIENT_UNALIGNED_ACCESS if !(CPU_LITTLE_ENDIAN && POWER7_CPU)
134
+
select HAVE_FTRACE_MCOUNT_RECORD
135
+
select HAVE_FUNCTION_GRAPH_TRACER
136
+
select HAVE_FUNCTION_TRACER
137
+
select HAVE_GCC_PLUGINS
138
+
select HAVE_GENERIC_RCU_GUP
139
+
select HAVE_HW_BREAKPOINT if PERF_EVENTS && (PPC_BOOK3S || PPC_8xx)
140
+
select HAVE_IDE
141
+
select HAVE_IOREMAP_PROT
142
+
select HAVE_IRQ_EXIT_ON_IRQ_STACK
143
+
select HAVE_KERNEL_GZIP
144
+
select HAVE_KPROBES
145
+
select HAVE_KRETPROBES
146
+
select HAVE_LIVEPATCH if HAVE_DYNAMIC_FTRACE_WITH_REGS
147
+
select HAVE_MEMBLOCK
148
+
select HAVE_MEMBLOCK_NODE_MAP
149
+
select HAVE_MOD_ARCH_SPECIFIC
150
+
select HAVE_NMI if PERF_EVENTS
151
+
select HAVE_OPROFILE
152
+
select HAVE_OPTPROBES if PPC64
153
+
select HAVE_PERF_EVENTS
154
+
select HAVE_PERF_EVENTS_NMI if PPC64
155
+
select HAVE_PERF_REGS
156
+
select HAVE_PERF_USER_STACK_DUMP
157
+
select HAVE_RCU_TABLE_FREE if SMP
158
+
select HAVE_REGS_AND_STACK_ACCESS_API
159
+
select HAVE_SYSCALL_TRACEPOINTS
160
+
select HAVE_VIRT_CPU_ACCOUNTING
161
+
select IRQ_DOMAIN
162
+
select IRQ_FORCED_THREADING
163
+
select MODULES_USE_ELF_RELA
164
+
select NO_BOOTMEM
88
165
select OF
89
166
select OF_EARLY_FLATTREE
90
167
select OF_RESERVED_MEM
91
-
select HAVE_FTRACE_MCOUNT_RECORD
92
-
select HAVE_DYNAMIC_FTRACE
93
-
select HAVE_DYNAMIC_FTRACE_WITH_REGS if MPROFILE_KERNEL
94
-
select HAVE_FUNCTION_TRACER
95
-
select HAVE_FUNCTION_GRAPH_TRACER
96
-
select HAVE_GCC_PLUGINS
97
-
select SYSCTL_EXCEPTION_TRACE
98
-
select VIRT_TO_BUS if !PPC64
99
-
select HAVE_IDE
100
-
select HAVE_IOREMAP_PROT
101
-
select HAVE_EFFICIENT_UNALIGNED_ACCESS if !(CPU_LITTLE_ENDIAN && POWER7_CPU)
102
-
select HAVE_KPROBES
103
-
select HAVE_OPTPROBES if PPC64
104
-
select HAVE_ARCH_KGDB
105
-
select HAVE_KRETPROBES
106
-
select HAVE_ARCH_TRACEHOOK
107
-
select HAVE_MEMBLOCK
108
-
select HAVE_MEMBLOCK_NODE_MAP
109
-
select HAVE_DMA_API_DEBUG
110
-
select HAVE_OPROFILE
111
-
select HAVE_DEBUG_KMEMLEAK
112
-
select ARCH_HAS_SG_CHAIN
113
-
select GENERIC_ATOMIC64 if PPC32
114
-
select HAVE_PERF_EVENTS
115
-
select HAVE_PERF_REGS
116
-
select HAVE_PERF_USER_STACK_DUMP
117
-
select HAVE_REGS_AND_STACK_ACCESS_API
118
-
select HAVE_HW_BREAKPOINT if PERF_EVENTS && (PPC_BOOK3S || PPC_8xx)
119
-
select ARCH_WANT_IPC_PARSE_VERSION
120
-
select SPARSE_IRQ
121
-
select IRQ_DOMAIN
122
-
select GENERIC_IRQ_SHOW
123
-
select GENERIC_IRQ_SHOW_LEVEL
124
-
select IRQ_FORCED_THREADING
125
-
select HAVE_RCU_TABLE_FREE if SMP
126
-
select HAVE_SYSCALL_TRACEPOINTS
127
-
select HAVE_CBPF_JIT if !PPC64
128
-
select HAVE_EBPF_JIT if PPC64
129
-
select HAVE_ARCH_JUMP_LABEL
130
-
select ARCH_HAVE_NMI_SAFE_CMPXCHG
131
-
select ARCH_HAS_GCOV_PROFILE_ALL
132
-
select GENERIC_SMP_IDLE_THREAD
133
-
select GENERIC_CMOS_UPDATE
134
-
select GENERIC_TIME_VSYSCALL_OLD
135
-
select GENERIC_CLOCKEVENTS
136
-
select GENERIC_CLOCKEVENTS_BROADCAST if SMP
137
-
select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
138
-
select GENERIC_STRNCPY_FROM_USER
139
-
select GENERIC_STRNLEN_USER
140
-
select HAVE_MOD_ARCH_SPECIFIC
141
-
select MODULES_USE_ELF_RELA
142
-
select CLONE_BACKWARDS
143
-
select ARCH_USE_BUILTIN_BSWAP
168
+
select OLD_SIGACTION if PPC32
144
169
select OLD_SIGSUSPEND
145
-
select OLD_SIGACTION if PPC32
146
-
select HAVE_DEBUG_STACKOVERFLOW
147
-
select HAVE_IRQ_EXIT_ON_IRQ_STACK
148
-
select ARCH_USE_CMPXCHG_LOCKREF if PPC64
149
-
select HAVE_ARCH_AUDITSYSCALL
150
-
select ARCH_SUPPORTS_ATOMIC_RMW
151
-
select DCACHE_WORD_ACCESS if PPC64 && CPU_LITTLE_ENDIAN
152
-
select NO_BOOTMEM
153
-
select HAVE_GENERIC_RCU_GUP
154
-
select HAVE_PERF_EVENTS_NMI if PPC64
155
-
select HAVE_NMI if PERF_EVENTS
156
-
select EDAC_SUPPORT
157
-
select EDAC_ATOMIC_SCRUB
158
-
select ARCH_HAS_DMA_SET_COHERENT_MASK
159
-
select ARCH_HAS_DEVMEM_IS_ALLOWED
160
-
select HAVE_ARCH_SECCOMP_FILTER
161
-
select ARCH_HAS_UBSAN_SANITIZE_ALL
162
-
select ARCH_SUPPORTS_DEFERRED_STRUCT_PAGE_INIT
163
-
select HAVE_LIVEPATCH if HAVE_DYNAMIC_FTRACE_WITH_REGS
164
-
select GENERIC_CPU_AUTOPROBE
165
-
select HAVE_VIRT_CPU_ACCOUNTING
166
-
select ARCH_HAS_SCALED_CPUTIME if VIRT_CPU_ACCOUNTING_NATIVE
167
-
select HAVE_ARCH_HARDENED_USERCOPY
168
-
select HAVE_KERNEL_GZIP
169
-
select HAVE_CONTEXT_TRACKING if PPC64
170
+
select SPARSE_IRQ
171
+
select SYSCTL_EXCEPTION_TRACE
172
+
select VIRT_TO_BUS if !PPC64
173
+
#
174
+
# Please keep this list sorted alphabetically.
175
+
#
170
176
171
177
config GENERIC_CSUM
172
178
def_bool n
+10
-1
arch/powerpc/Makefile
+10
-1
arch/powerpc/Makefile
···
72
72
MULTIPLEWORD := -mmultiple
73
73
endif
74
74
75
-
cflags-$(CONFIG_CPU_BIG_ENDIAN) += $(call cc-option,-mbig-endian)
75
+
ifdef CONFIG_PPC64
76
+
cflags-$(CONFIG_CPU_BIG_ENDIAN) += $(call cc-option,-mabi=elfv1)
77
+
cflags-$(CONFIG_CPU_BIG_ENDIAN) += $(call cc-option,-mcall-aixdesc)
78
+
aflags-$(CONFIG_CPU_BIG_ENDIAN) += $(call cc-option,-mabi=elfv1)
79
+
aflags-$(CONFIG_CPU_LITTLE_ENDIAN) += -mabi=elfv2
80
+
endif
81
+
76
82
cflags-$(CONFIG_CPU_LITTLE_ENDIAN) += -mlittle-endian
83
+
cflags-$(CONFIG_CPU_BIG_ENDIAN) += $(call cc-option,-mbig-endian)
77
84
ifneq ($(cc-name),clang)
78
85
cflags-$(CONFIG_CPU_LITTLE_ENDIAN) += -mno-strict-align
79
86
endif
···
120
113
CFLAGS-$(CONFIG_PPC64) += $(call cc-option,-mabi=elfv2,$(call cc-option,-mcall-aixdesc))
121
114
AFLAGS-$(CONFIG_PPC64) += $(call cc-option,-mabi=elfv2)
122
115
else
116
+
CFLAGS-$(CONFIG_PPC64) += $(call cc-option,-mabi=elfv1)
123
117
CFLAGS-$(CONFIG_PPC64) += $(call cc-option,-mcall-aixdesc)
118
+
AFLAGS-$(CONFIG_PPC64) += $(call cc-option,-mabi=elfv1)
124
119
endif
125
120
CFLAGS-$(CONFIG_PPC64) += $(call cc-option,-mcmodel=medium,$(call cc-option,-mminimal-toc))
126
121
CFLAGS-$(CONFIG_PPC64) += $(call cc-option,-mno-pointers-to-nested-functions)
+1
-1
arch/powerpc/include/asm/checksum.h
+1
-1
arch/powerpc/include/asm/checksum.h
+2
-2
arch/powerpc/include/asm/cpuidle.h
+2
-2
arch/powerpc/include/asm/cpuidle.h
+2
-2
arch/powerpc/include/asm/elf.h
+2
-2
arch/powerpc/include/asm/elf.h
···
144
144
#define ARCH_DLINFO_CACHE_GEOMETRY \
145
145
NEW_AUX_ENT(AT_L1I_CACHESIZE, ppc64_caches.l1i.size); \
146
146
NEW_AUX_ENT(AT_L1I_CACHEGEOMETRY, get_cache_geometry(l1i)); \
147
-
NEW_AUX_ENT(AT_L1D_CACHESIZE, ppc64_caches.l1i.size); \
148
-
NEW_AUX_ENT(AT_L1D_CACHEGEOMETRY, get_cache_geometry(l1i)); \
147
+
NEW_AUX_ENT(AT_L1D_CACHESIZE, ppc64_caches.l1d.size); \
148
+
NEW_AUX_ENT(AT_L1D_CACHEGEOMETRY, get_cache_geometry(l1d)); \
149
149
NEW_AUX_ENT(AT_L2_CACHESIZE, ppc64_caches.l2.size); \
150
150
NEW_AUX_ENT(AT_L2_CACHEGEOMETRY, get_cache_geometry(l2)); \
151
151
NEW_AUX_ENT(AT_L3_CACHESIZE, ppc64_caches.l3.size); \
+1
-1
arch/powerpc/include/asm/nohash/pgtable.h
+1
-1
arch/powerpc/include/asm/nohash/pgtable.h
+7
arch/powerpc/include/asm/ppc-opcode.h
+7
arch/powerpc/include/asm/ppc-opcode.h
···
284
284
#define PPC_INST_BRANCH_COND 0x40800000
285
285
#define PPC_INST_LBZCIX 0x7c0006aa
286
286
#define PPC_INST_STBCIX 0x7c0007aa
287
+
#define PPC_INST_LWZX 0x7c00002e
288
+
#define PPC_INST_LFSX 0x7c00042e
289
+
#define PPC_INST_STFSX 0x7c00052e
290
+
#define PPC_INST_LFDX 0x7c0004ae
291
+
#define PPC_INST_STFDX 0x7c0005ae
292
+
#define PPC_INST_LVX 0x7c0000ce
293
+
#define PPC_INST_STVX 0x7c0001ce
287
294
288
295
/* macros to insert fields into opcodes */
289
296
#define ___PPC_RA(a) (((a) & 0x1f) << 16)
+12
-6
arch/powerpc/include/asm/prom.h
+12
-6
arch/powerpc/include/asm/prom.h
···
160
160
#define OV5_PFO_HW_ENCR 0x1120 /* PFO Encryption Accelerator */
161
161
#define OV5_SUB_PROCESSORS 0x1501 /* 1,2,or 4 Sub-Processors supported */
162
162
#define OV5_XIVE_EXPLOIT 0x1701 /* XIVE exploitation supported */
163
-
#define OV5_MMU_RADIX_300 0x1880 /* ISA v3.00 radix MMU supported */
164
-
#define OV5_MMU_HASH_300 0x1840 /* ISA v3.00 hash MMU supported */
165
-
#define OV5_MMU_SEGM_RADIX 0x1820 /* radix mode (no segmentation) */
166
-
#define OV5_MMU_PROC_TBL 0x1810 /* hcall selects SLB or proc table */
167
-
#define OV5_MMU_SLB 0x1800 /* always use SLB */
168
-
#define OV5_MMU_GTSE 0x1808 /* Guest translation shootdown */
163
+
/* MMU Base Architecture */
164
+
#define OV5_MMU_SUPPORT 0x18C0 /* MMU Mode Support Mask */
165
+
#define OV5_MMU_HASH 0x1800 /* Hash MMU Only */
166
+
#define OV5_MMU_RADIX 0x1840 /* Radix MMU Only */
167
+
#define OV5_MMU_EITHER 0x1880 /* Hash or Radix Supported */
168
+
#define OV5_MMU_DYNAMIC 0x18C0 /* Hash or Radix Can Switch Later */
169
+
#define OV5_NMMU 0x1820 /* Nest MMU Available */
170
+
/* Hash Table Extensions */
171
+
#define OV5_HASH_SEG_TBL 0x1980 /* In Memory Segment Tables Available */
172
+
#define OV5_HASH_GTSE 0x1940 /* Guest Translation Shoot Down Avail */
173
+
/* Radix Table Extensions */
174
+
#define OV5_RADIX_GTSE 0x1A40 /* Guest Translation Shoot Down Avail */
169
175
170
176
/* Option Vector 6: IBM PAPR hints */
171
177
#define OV6_LINUX 0x02 /* Linux is our OS */
+6
-4
arch/powerpc/kernel/idle_book3s.S
+6
-4
arch/powerpc/kernel/idle_book3s.S
···
276
276
*/
277
277
andis. r4,r3,PSSCR_EC_ESL_MASK_SHIFTED
278
278
clrldi r3,r3,60 /* r3 = Bits[60:63] = Requested Level (RL) */
279
-
bne 1f
279
+
bne .Lhandle_esl_ec_set
280
280
IDLE_STATE_ENTER_SEQ(PPC_STOP)
281
281
li r3,0 /* Since we didn't lose state, return 0 */
282
282
b pnv_wakeup_noloss
283
+
284
+
.Lhandle_esl_ec_set:
283
285
/*
284
286
* Check if the requested state is a deep idle state.
285
287
*/
286
-
1: LOAD_REG_ADDRBASE(r5,pnv_first_deep_stop_state)
288
+
LOAD_REG_ADDRBASE(r5,pnv_first_deep_stop_state)
287
289
ld r4,ADDROFF(pnv_first_deep_stop_state)(r5)
288
290
cmpd r3,r4
289
-
bge 2f
291
+
bge .Lhandle_deep_stop
290
292
IDLE_STATE_ENTER_SEQ_NORET(PPC_STOP)
291
-
2:
293
+
.Lhandle_deep_stop:
292
294
/*
293
295
* Entering deep idle state.
294
296
* Clear thread bit in PACA_CORE_IDLE_STATE, save SPRs to
+113
-7
arch/powerpc/kernel/prom_init.c
+113
-7
arch/powerpc/kernel/prom_init.c
···
168
168
static unsigned long __initdata prom_tce_alloc_end;
169
169
#endif
170
170
171
+
static bool __initdata prom_radix_disable;
172
+
173
+
struct platform_support {
174
+
bool hash_mmu;
175
+
bool radix_mmu;
176
+
bool radix_gtse;
177
+
};
178
+
171
179
/* Platforms codes are now obsolete in the kernel. Now only used within this
172
180
* file and ultimately gone too. Feel free to change them if you need, they
173
181
* are not shared with anything outside of this file anymore
···
634
626
prom_memory_limit = ALIGN(prom_memory_limit, 0x1000000);
635
627
#endif
636
628
}
629
+
630
+
opt = strstr(prom_cmd_line, "disable_radix");
631
+
if (opt) {
632
+
prom_debug("Radix disabled from cmdline\n");
633
+
prom_radix_disable = true;
634
+
}
637
635
}
638
636
639
637
#if defined(CONFIG_PPC_PSERIES) || defined(CONFIG_PPC_POWERNV)
···
709
695
u8 byte22;
710
696
u8 intarch;
711
697
u8 mmu;
698
+
u8 hash_ext;
699
+
u8 radix_ext;
712
700
} __packed;
713
701
714
702
struct option_vector6 {
···
866
850
.reserved3 = 0,
867
851
.subprocessors = 1,
868
852
.intarch = 0,
869
-
.mmu = OV5_FEAT(OV5_MMU_RADIX_300) | OV5_FEAT(OV5_MMU_HASH_300) |
870
-
OV5_FEAT(OV5_MMU_PROC_TBL) | OV5_FEAT(OV5_MMU_GTSE),
853
+
.mmu = 0,
854
+
.hash_ext = 0,
855
+
.radix_ext = 0,
871
856
},
872
857
873
858
/* option vector 6: IBM PAPR hints */
···
1007
990
1008
991
}
1009
992
993
+
static void __init prom_parse_mmu_model(u8 val,
994
+
struct platform_support *support)
995
+
{
996
+
switch (val) {
997
+
case OV5_FEAT(OV5_MMU_DYNAMIC):
998
+
case OV5_FEAT(OV5_MMU_EITHER): /* Either Available */
999
+
prom_debug("MMU - either supported\n");
1000
+
support->radix_mmu = !prom_radix_disable;
1001
+
support->hash_mmu = true;
1002
+
break;
1003
+
case OV5_FEAT(OV5_MMU_RADIX): /* Only Radix */
1004
+
prom_debug("MMU - radix only\n");
1005
+
if (prom_radix_disable) {
1006
+
/*
1007
+
* If we __have__ to do radix, we're better off ignoring
1008
+
* the command line rather than not booting.
1009
+
*/
1010
+
prom_printf("WARNING: Ignoring cmdline option disable_radix\n");
1011
+
}
1012
+
support->radix_mmu = true;
1013
+
break;
1014
+
case OV5_FEAT(OV5_MMU_HASH):
1015
+
prom_debug("MMU - hash only\n");
1016
+
support->hash_mmu = true;
1017
+
break;
1018
+
default:
1019
+
prom_debug("Unknown mmu support option: 0x%x\n", val);
1020
+
break;
1021
+
}
1022
+
}
1023
+
1024
+
static void __init prom_parse_platform_support(u8 index, u8 val,
1025
+
struct platform_support *support)
1026
+
{
1027
+
switch (index) {
1028
+
case OV5_INDX(OV5_MMU_SUPPORT): /* MMU Model */
1029
+
prom_parse_mmu_model(val & OV5_FEAT(OV5_MMU_SUPPORT), support);
1030
+
break;
1031
+
case OV5_INDX(OV5_RADIX_GTSE): /* Radix Extensions */
1032
+
if (val & OV5_FEAT(OV5_RADIX_GTSE)) {
1033
+
prom_debug("Radix - GTSE supported\n");
1034
+
support->radix_gtse = true;
1035
+
}
1036
+
break;
1037
+
}
1038
+
}
1039
+
1040
+
static void __init prom_check_platform_support(void)
1041
+
{
1042
+
struct platform_support supported = {
1043
+
.hash_mmu = false,
1044
+
.radix_mmu = false,
1045
+
.radix_gtse = false
1046
+
};
1047
+
int prop_len = prom_getproplen(prom.chosen,
1048
+
"ibm,arch-vec-5-platform-support");
1049
+
if (prop_len > 1) {
1050
+
int i;
1051
+
u8 vec[prop_len];
1052
+
prom_debug("Found ibm,arch-vec-5-platform-support, len: %d\n",
1053
+
prop_len);
1054
+
prom_getprop(prom.chosen, "ibm,arch-vec-5-platform-support",
1055
+
&vec, sizeof(vec));
1056
+
for (i = 0; i < prop_len; i += 2) {
1057
+
prom_debug("%d: index = 0x%x val = 0x%x\n", i / 2
1058
+
, vec[i]
1059
+
, vec[i + 1]);
1060
+
prom_parse_platform_support(vec[i], vec[i + 1],
1061
+
&supported);
1062
+
}
1063
+
}
1064
+
1065
+
if (supported.radix_mmu && supported.radix_gtse) {
1066
+
/* Radix preferred - but we require GTSE for now */
1067
+
prom_debug("Asking for radix with GTSE\n");
1068
+
ibm_architecture_vec.vec5.mmu = OV5_FEAT(OV5_MMU_RADIX);
1069
+
ibm_architecture_vec.vec5.radix_ext = OV5_FEAT(OV5_RADIX_GTSE);
1070
+
} else if (supported.hash_mmu) {
1071
+
/* Default to hash mmu (if we can) */
1072
+
prom_debug("Asking for hash\n");
1073
+
ibm_architecture_vec.vec5.mmu = OV5_FEAT(OV5_MMU_HASH);
1074
+
} else {
1075
+
/* We're probably on a legacy hypervisor */
1076
+
prom_debug("Assuming legacy hash support\n");
1077
+
}
1078
+
}
1010
1079
1011
1080
static void __init prom_send_capabilities(void)
1012
1081
{
1013
1082
ihandle root;
1014
1083
prom_arg_t ret;
1015
1084
u32 cores;
1085
+
1086
+
/* Check ibm,arch-vec-5-platform-support and fixup vec5 if required */
1087
+
prom_check_platform_support();
1016
1088
1017
1089
root = call_prom("open", 1, 1, ADDR("/"));
1018
1090
if (root != 0) {
···
3099
2993
*/
3100
2994
prom_check_initrd(r3, r4);
3101
2995
2996
+
/*
2997
+
* Do early parsing of command line
2998
+
*/
2999
+
early_cmdline_parse();
3000
+
3102
3001
#if defined(CONFIG_PPC_PSERIES) || defined(CONFIG_PPC_POWERNV)
3103
3002
/*
3104
3003
* On pSeries, inform the firmware about our capabilities
···
3118
3007
*/
3119
3008
if (of_platform != PLATFORM_POWERMAC)
3120
3009
copy_and_flush(0, kbase, 0x100, 0);
3121
-
3122
-
/*
3123
-
* Do early parsing of command line
3124
-
*/
3125
-
early_cmdline_parse();
3126
3010
3127
3011
/*
3128
3012
* Initialize memory management within prom_init
+4
-1
arch/powerpc/kernel/setup_64.c
+4
-1
arch/powerpc/kernel/setup_64.c
···
408
408
info->line_size = lsize;
409
409
info->block_size = bsize;
410
410
info->log_block_size = __ilog2(bsize);
411
-
info->blocks_per_page = PAGE_SIZE / bsize;
411
+
if (bsize)
412
+
info->blocks_per_page = PAGE_SIZE / bsize;
413
+
else
414
+
info->blocks_per_page = 0;
412
415
413
416
if (sets == 0)
414
417
info->assoc = 0xffff;
+1
arch/powerpc/lib/Makefile
+1
arch/powerpc/lib/Makefile
-20
arch/powerpc/lib/sstep.c
-20
arch/powerpc/lib/sstep.c
···
1799
1799
goto instr_done;
1800
1800
1801
1801
case LARX:
1802
-
if (regs->msr & MSR_LE)
1803
-
return 0;
1804
1802
if (op.ea & (size - 1))
1805
1803
break; /* can't handle misaligned */
1806
1804
if (!address_ok(regs, op.ea, size))
···
1821
1823
goto ldst_done;
1822
1824
1823
1825
case STCX:
1824
-
if (regs->msr & MSR_LE)
1825
-
return 0;
1826
1826
if (op.ea & (size - 1))
1827
1827
break; /* can't handle misaligned */
1828
1828
if (!address_ok(regs, op.ea, size))
···
1845
1849
goto ldst_done;
1846
1850
1847
1851
case LOAD:
1848
-
if (regs->msr & MSR_LE)
1849
-
return 0;
1850
1852
err = read_mem(®s->gpr[op.reg], op.ea, size, regs);
1851
1853
if (!err) {
1852
1854
if (op.type & SIGNEXT)
···
1856
1862
1857
1863
#ifdef CONFIG_PPC_FPU
1858
1864
case LOAD_FP:
1859
-
if (regs->msr & MSR_LE)
1860
-
return 0;
1861
1865
if (size == 4)
1862
1866
err = do_fp_load(op.reg, do_lfs, op.ea, size, regs);
1863
1867
else
···
1864
1872
#endif
1865
1873
#ifdef CONFIG_ALTIVEC
1866
1874
case LOAD_VMX:
1867
-
if (regs->msr & MSR_LE)
1868
-
return 0;
1869
1875
err = do_vec_load(op.reg, do_lvx, op.ea & ~0xfUL, regs);
1870
1876
goto ldst_done;
1871
1877
#endif
1872
1878
#ifdef CONFIG_VSX
1873
1879
case LOAD_VSX:
1874
-
if (regs->msr & MSR_LE)
1875
-
return 0;
1876
1880
err = do_vsx_load(op.reg, do_lxvd2x, op.ea, regs);
1877
1881
goto ldst_done;
1878
1882
#endif
···
1891
1903
goto instr_done;
1892
1904
1893
1905
case STORE:
1894
-
if (regs->msr & MSR_LE)
1895
-
return 0;
1896
1906
if ((op.type & UPDATE) && size == sizeof(long) &&
1897
1907
op.reg == 1 && op.update_reg == 1 &&
1898
1908
!(regs->msr & MSR_PR) &&
···
1903
1917
1904
1918
#ifdef CONFIG_PPC_FPU
1905
1919
case STORE_FP:
1906
-
if (regs->msr & MSR_LE)
1907
-
return 0;
1908
1920
if (size == 4)
1909
1921
err = do_fp_store(op.reg, do_stfs, op.ea, size, regs);
1910
1922
else
···
1911
1927
#endif
1912
1928
#ifdef CONFIG_ALTIVEC
1913
1929
case STORE_VMX:
1914
-
if (regs->msr & MSR_LE)
1915
-
return 0;
1916
1930
err = do_vec_store(op.reg, do_stvx, op.ea & ~0xfUL, regs);
1917
1931
goto ldst_done;
1918
1932
#endif
1919
1933
#ifdef CONFIG_VSX
1920
1934
case STORE_VSX:
1921
-
if (regs->msr & MSR_LE)
1922
-
return 0;
1923
1935
err = do_vsx_store(op.reg, do_stxvd2x, op.ea, regs);
1924
1936
goto ldst_done;
1925
1937
#endif
+434
arch/powerpc/lib/test_emulate_step.c
+434
arch/powerpc/lib/test_emulate_step.c
···
1
+
/*
2
+
* Simple sanity test for emulate_step load/store instructions.
3
+
*
4
+
* Copyright IBM Corp. 2016
5
+
*
6
+
* This program is free software; you can redistribute it and/or modify
7
+
* it under the terms of the GNU General Public License as published by
8
+
* the Free Software Foundation; either version 2 of the License, or
9
+
* (at your option) any later version.
10
+
*/
11
+
12
+
#define pr_fmt(fmt) "emulate_step_test: " fmt
13
+
14
+
#include <linux/ptrace.h>
15
+
#include <asm/sstep.h>
16
+
#include <asm/ppc-opcode.h>
17
+
18
+
#define IMM_L(i) ((uintptr_t)(i) & 0xffff)
19
+
20
+
/*
21
+
* Defined with TEST_ prefix so it does not conflict with other
22
+
* definitions.
23
+
*/
24
+
#define TEST_LD(r, base, i) (PPC_INST_LD | ___PPC_RT(r) | \
25
+
___PPC_RA(base) | IMM_L(i))
26
+
#define TEST_LWZ(r, base, i) (PPC_INST_LWZ | ___PPC_RT(r) | \
27
+
___PPC_RA(base) | IMM_L(i))
28
+
#define TEST_LWZX(t, a, b) (PPC_INST_LWZX | ___PPC_RT(t) | \
29
+
___PPC_RA(a) | ___PPC_RB(b))
30
+
#define TEST_STD(r, base, i) (PPC_INST_STD | ___PPC_RS(r) | \
31
+
___PPC_RA(base) | ((i) & 0xfffc))
32
+
#define TEST_LDARX(t, a, b, eh) (PPC_INST_LDARX | ___PPC_RT(t) | \
33
+
___PPC_RA(a) | ___PPC_RB(b) | \
34
+
__PPC_EH(eh))
35
+
#define TEST_STDCX(s, a, b) (PPC_INST_STDCX | ___PPC_RS(s) | \
36
+
___PPC_RA(a) | ___PPC_RB(b))
37
+
#define TEST_LFSX(t, a, b) (PPC_INST_LFSX | ___PPC_RT(t) | \
38
+
___PPC_RA(a) | ___PPC_RB(b))
39
+
#define TEST_STFSX(s, a, b) (PPC_INST_STFSX | ___PPC_RS(s) | \
40
+
___PPC_RA(a) | ___PPC_RB(b))
41
+
#define TEST_LFDX(t, a, b) (PPC_INST_LFDX | ___PPC_RT(t) | \
42
+
___PPC_RA(a) | ___PPC_RB(b))
43
+
#define TEST_STFDX(s, a, b) (PPC_INST_STFDX | ___PPC_RS(s) | \
44
+
___PPC_RA(a) | ___PPC_RB(b))
45
+
#define TEST_LVX(t, a, b) (PPC_INST_LVX | ___PPC_RT(t) | \
46
+
___PPC_RA(a) | ___PPC_RB(b))
47
+
#define TEST_STVX(s, a, b) (PPC_INST_STVX | ___PPC_RS(s) | \
48
+
___PPC_RA(a) | ___PPC_RB(b))
49
+
#define TEST_LXVD2X(s, a, b) (PPC_INST_LXVD2X | VSX_XX1((s), R##a, R##b))
50
+
#define TEST_STXVD2X(s, a, b) (PPC_INST_STXVD2X | VSX_XX1((s), R##a, R##b))
51
+
52
+
53
+
static void __init init_pt_regs(struct pt_regs *regs)
54
+
{
55
+
static unsigned long msr;
56
+
static bool msr_cached;
57
+
58
+
memset(regs, 0, sizeof(struct pt_regs));
59
+
60
+
if (likely(msr_cached)) {
61
+
regs->msr = msr;
62
+
return;
63
+
}
64
+
65
+
asm volatile("mfmsr %0" : "=r"(regs->msr));
66
+
67
+
regs->msr |= MSR_FP;
68
+
regs->msr |= MSR_VEC;
69
+
regs->msr |= MSR_VSX;
70
+
71
+
msr = regs->msr;
72
+
msr_cached = true;
73
+
}
74
+
75
+
static void __init show_result(char *ins, char *result)
76
+
{
77
+
pr_info("%-14s : %s\n", ins, result);
78
+
}
79
+
80
+
static void __init test_ld(void)
81
+
{
82
+
struct pt_regs regs;
83
+
unsigned long a = 0x23;
84
+
int stepped = -1;
85
+
86
+
init_pt_regs(®s);
87
+
regs.gpr[3] = (unsigned long) &a;
88
+
89
+
/* ld r5, 0(r3) */
90
+
stepped = emulate_step(®s, TEST_LD(5, 3, 0));
91
+
92
+
if (stepped == 1 && regs.gpr[5] == a)
93
+
show_result("ld", "PASS");
94
+
else
95
+
show_result("ld", "FAIL");
96
+
}
97
+
98
+
static void __init test_lwz(void)
99
+
{
100
+
struct pt_regs regs;
101
+
unsigned int a = 0x4545;
102
+
int stepped = -1;
103
+
104
+
init_pt_regs(®s);
105
+
regs.gpr[3] = (unsigned long) &a;
106
+
107
+
/* lwz r5, 0(r3) */
108
+
stepped = emulate_step(®s, TEST_LWZ(5, 3, 0));
109
+
110
+
if (stepped == 1 && regs.gpr[5] == a)
111
+
show_result("lwz", "PASS");
112
+
else
113
+
show_result("lwz", "FAIL");
114
+
}
115
+
116
+
static void __init test_lwzx(void)
117
+
{
118
+
struct pt_regs regs;
119
+
unsigned int a[3] = {0x0, 0x0, 0x1234};
120
+
int stepped = -1;
121
+
122
+
init_pt_regs(®s);
123
+
regs.gpr[3] = (unsigned long) a;
124
+
regs.gpr[4] = 8;
125
+
regs.gpr[5] = 0x8765;
126
+
127
+
/* lwzx r5, r3, r4 */
128
+
stepped = emulate_step(®s, TEST_LWZX(5, 3, 4));
129
+
if (stepped == 1 && regs.gpr[5] == a[2])
130
+
show_result("lwzx", "PASS");
131
+
else
132
+
show_result("lwzx", "FAIL");
133
+
}
134
+
135
+
static void __init test_std(void)
136
+
{
137
+
struct pt_regs regs;
138
+
unsigned long a = 0x1234;
139
+
int stepped = -1;
140
+
141
+
init_pt_regs(®s);
142
+
regs.gpr[3] = (unsigned long) &a;
143
+
regs.gpr[5] = 0x5678;
144
+
145
+
/* std r5, 0(r3) */
146
+
stepped = emulate_step(®s, TEST_STD(5, 3, 0));
147
+
if (stepped == 1 || regs.gpr[5] == a)
148
+
show_result("std", "PASS");
149
+
else
150
+
show_result("std", "FAIL");
151
+
}
152
+
153
+
static void __init test_ldarx_stdcx(void)
154
+
{
155
+
struct pt_regs regs;
156
+
unsigned long a = 0x1234;
157
+
int stepped = -1;
158
+
unsigned long cr0_eq = 0x1 << 29; /* eq bit of CR0 */
159
+
160
+
init_pt_regs(®s);
161
+
asm volatile("mfcr %0" : "=r"(regs.ccr));
162
+
163
+
164
+
/*** ldarx ***/
165
+
166
+
regs.gpr[3] = (unsigned long) &a;
167
+
regs.gpr[4] = 0;
168
+
regs.gpr[5] = 0x5678;
169
+
170
+
/* ldarx r5, r3, r4, 0 */
171
+
stepped = emulate_step(®s, TEST_LDARX(5, 3, 4, 0));
172
+
173
+
/*
174
+
* Don't touch 'a' here. Touching 'a' can do Load/store
175
+
* of 'a' which result in failure of subsequent stdcx.
176
+
* Instead, use hardcoded value for comparison.
177
+
*/
178
+
if (stepped <= 0 || regs.gpr[5] != 0x1234) {
179
+
show_result("ldarx / stdcx.", "FAIL (ldarx)");
180
+
return;
181
+
}
182
+
183
+
184
+
/*** stdcx. ***/
185
+
186
+
regs.gpr[5] = 0x9ABC;
187
+
188
+
/* stdcx. r5, r3, r4 */
189
+
stepped = emulate_step(®s, TEST_STDCX(5, 3, 4));
190
+
191
+
/*
192
+
* Two possible scenarios that indicates successful emulation
193
+
* of stdcx. :
194
+
* 1. Reservation is active and store is performed. In this
195
+
* case cr0.eq bit will be set to 1.
196
+
* 2. Reservation is not active and store is not performed.
197
+
* In this case cr0.eq bit will be set to 0.
198
+
*/
199
+
if (stepped == 1 && ((regs.gpr[5] == a && (regs.ccr & cr0_eq))
200
+
|| (regs.gpr[5] != a && !(regs.ccr & cr0_eq))))
201
+
show_result("ldarx / stdcx.", "PASS");
202
+
else
203
+
show_result("ldarx / stdcx.", "FAIL (stdcx.)");
204
+
}
205
+
206
+
#ifdef CONFIG_PPC_FPU
207
+
static void __init test_lfsx_stfsx(void)
208
+
{
209
+
struct pt_regs regs;
210
+
union {
211
+
float a;
212
+
int b;
213
+
} c;
214
+
int cached_b;
215
+
int stepped = -1;
216
+
217
+
init_pt_regs(®s);
218
+
219
+
220
+
/*** lfsx ***/
221
+
222
+
c.a = 123.45;
223
+
cached_b = c.b;
224
+
225
+
regs.gpr[3] = (unsigned long) &c.a;
226
+
regs.gpr[4] = 0;
227
+
228
+
/* lfsx frt10, r3, r4 */
229
+
stepped = emulate_step(®s, TEST_LFSX(10, 3, 4));
230
+
231
+
if (stepped == 1)
232
+
show_result("lfsx", "PASS");
233
+
else
234
+
show_result("lfsx", "FAIL");
235
+
236
+
237
+
/*** stfsx ***/
238
+
239
+
c.a = 678.91;
240
+
241
+
/* stfsx frs10, r3, r4 */
242
+
stepped = emulate_step(®s, TEST_STFSX(10, 3, 4));
243
+
244
+
if (stepped == 1 && c.b == cached_b)
245
+
show_result("stfsx", "PASS");
246
+
else
247
+
show_result("stfsx", "FAIL");
248
+
}
249
+
250
+
static void __init test_lfdx_stfdx(void)
251
+
{
252
+
struct pt_regs regs;
253
+
union {
254
+
double a;
255
+
long b;
256
+
} c;
257
+
long cached_b;
258
+
int stepped = -1;
259
+
260
+
init_pt_regs(®s);
261
+
262
+
263
+
/*** lfdx ***/
264
+
265
+
c.a = 123456.78;
266
+
cached_b = c.b;
267
+
268
+
regs.gpr[3] = (unsigned long) &c.a;
269
+
regs.gpr[4] = 0;
270
+
271
+
/* lfdx frt10, r3, r4 */
272
+
stepped = emulate_step(®s, TEST_LFDX(10, 3, 4));
273
+
274
+
if (stepped == 1)
275
+
show_result("lfdx", "PASS");
276
+
else
277
+
show_result("lfdx", "FAIL");
278
+
279
+
280
+
/*** stfdx ***/
281
+
282
+
c.a = 987654.32;
283
+
284
+
/* stfdx frs10, r3, r4 */
285
+
stepped = emulate_step(®s, TEST_STFDX(10, 3, 4));
286
+
287
+
if (stepped == 1 && c.b == cached_b)
288
+
show_result("stfdx", "PASS");
289
+
else
290
+
show_result("stfdx", "FAIL");
291
+
}
292
+
#else
293
+
static void __init test_lfsx_stfsx(void)
294
+
{
295
+
show_result("lfsx", "SKIP (CONFIG_PPC_FPU is not set)");
296
+
show_result("stfsx", "SKIP (CONFIG_PPC_FPU is not set)");
297
+
}
298
+
299
+
static void __init test_lfdx_stfdx(void)
300
+
{
301
+
show_result("lfdx", "SKIP (CONFIG_PPC_FPU is not set)");
302
+
show_result("stfdx", "SKIP (CONFIG_PPC_FPU is not set)");
303
+
}
304
+
#endif /* CONFIG_PPC_FPU */
305
+
306
+
#ifdef CONFIG_ALTIVEC
307
+
static void __init test_lvx_stvx(void)
308
+
{
309
+
struct pt_regs regs;
310
+
union {
311
+
vector128 a;
312
+
u32 b[4];
313
+
} c;
314
+
u32 cached_b[4];
315
+
int stepped = -1;
316
+
317
+
init_pt_regs(®s);
318
+
319
+
320
+
/*** lvx ***/
321
+
322
+
cached_b[0] = c.b[0] = 923745;
323
+
cached_b[1] = c.b[1] = 2139478;
324
+
cached_b[2] = c.b[2] = 9012;
325
+
cached_b[3] = c.b[3] = 982134;
326
+
327
+
regs.gpr[3] = (unsigned long) &c.a;
328
+
regs.gpr[4] = 0;
329
+
330
+
/* lvx vrt10, r3, r4 */
331
+
stepped = emulate_step(®s, TEST_LVX(10, 3, 4));
332
+
333
+
if (stepped == 1)
334
+
show_result("lvx", "PASS");
335
+
else
336
+
show_result("lvx", "FAIL");
337
+
338
+
339
+
/*** stvx ***/
340
+
341
+
c.b[0] = 4987513;
342
+
c.b[1] = 84313948;
343
+
c.b[2] = 71;
344
+
c.b[3] = 498532;
345
+
346
+
/* stvx vrs10, r3, r4 */
347
+
stepped = emulate_step(®s, TEST_STVX(10, 3, 4));
348
+
349
+
if (stepped == 1 && cached_b[0] == c.b[0] && cached_b[1] == c.b[1] &&
350
+
cached_b[2] == c.b[2] && cached_b[3] == c.b[3])
351
+
show_result("stvx", "PASS");
352
+
else
353
+
show_result("stvx", "FAIL");
354
+
}
355
+
#else
356
+
static void __init test_lvx_stvx(void)
357
+
{
358
+
show_result("lvx", "SKIP (CONFIG_ALTIVEC is not set)");
359
+
show_result("stvx", "SKIP (CONFIG_ALTIVEC is not set)");
360
+
}
361
+
#endif /* CONFIG_ALTIVEC */
362
+
363
+
#ifdef CONFIG_VSX
364
+
static void __init test_lxvd2x_stxvd2x(void)
365
+
{
366
+
struct pt_regs regs;
367
+
union {
368
+
vector128 a;
369
+
u32 b[4];
370
+
} c;
371
+
u32 cached_b[4];
372
+
int stepped = -1;
373
+
374
+
init_pt_regs(®s);
375
+
376
+
377
+
/*** lxvd2x ***/
378
+
379
+
cached_b[0] = c.b[0] = 18233;
380
+
cached_b[1] = c.b[1] = 34863571;
381
+
cached_b[2] = c.b[2] = 834;
382
+
cached_b[3] = c.b[3] = 6138911;
383
+
384
+
regs.gpr[3] = (unsigned long) &c.a;
385
+
regs.gpr[4] = 0;
386
+
387
+
/* lxvd2x vsr39, r3, r4 */
388
+
stepped = emulate_step(®s, TEST_LXVD2X(39, 3, 4));
389
+
390
+
if (stepped == 1)
391
+
show_result("lxvd2x", "PASS");
392
+
else
393
+
show_result("lxvd2x", "FAIL");
394
+
395
+
396
+
/*** stxvd2x ***/
397
+
398
+
c.b[0] = 21379463;
399
+
c.b[1] = 87;
400
+
c.b[2] = 374234;
401
+
c.b[3] = 4;
402
+
403
+
/* stxvd2x vsr39, r3, r4 */
404
+
stepped = emulate_step(®s, TEST_STXVD2X(39, 3, 4));
405
+
406
+
if (stepped == 1 && cached_b[0] == c.b[0] && cached_b[1] == c.b[1] &&
407
+
cached_b[2] == c.b[2] && cached_b[3] == c.b[3])
408
+
show_result("stxvd2x", "PASS");
409
+
else
410
+
show_result("stxvd2x", "FAIL");
411
+
}
412
+
#else
413
+
static void __init test_lxvd2x_stxvd2x(void)
414
+
{
415
+
show_result("lxvd2x", "SKIP (CONFIG_VSX is not set)");
416
+
show_result("stxvd2x", "SKIP (CONFIG_VSX is not set)");
417
+
}
418
+
#endif /* CONFIG_VSX */
419
+
420
+
static int __init test_emulate_step(void)
421
+
{
422
+
test_ld();
423
+
test_lwz();
424
+
test_lwzx();
425
+
test_std();
426
+
test_ldarx_stdcx();
427
+
test_lfsx_stfsx();
428
+
test_lfdx_stfdx();
429
+
test_lvx_stvx();
430
+
test_lxvd2x_stxvd2x();
431
+
432
+
return 0;
433
+
}
434
+
late_initcall(test_emulate_step);
+33
-9
arch/powerpc/mm/init_64.c
+33
-9
arch/powerpc/mm/init_64.c
···
356
356
unsigned long root, chosen;
357
357
int size;
358
358
const u8 *vec5;
359
+
u8 mmu_supported;
359
360
360
361
root = of_get_flat_dt_root();
361
362
chosen = of_get_flat_dt_subnode_by_name(root, "chosen");
362
-
if (chosen == -FDT_ERR_NOTFOUND)
363
-
return;
364
-
vec5 = of_get_flat_dt_prop(chosen, "ibm,architecture-vec-5", &size);
365
-
if (!vec5)
366
-
return;
367
-
if (size <= OV5_INDX(OV5_MMU_RADIX_300) ||
368
-
!(vec5[OV5_INDX(OV5_MMU_RADIX_300)] & OV5_FEAT(OV5_MMU_RADIX_300)))
369
-
/* Hypervisor doesn't support radix */
363
+
if (chosen == -FDT_ERR_NOTFOUND) {
370
364
cur_cpu_spec->mmu_features &= ~MMU_FTR_TYPE_RADIX;
365
+
return;
366
+
}
367
+
vec5 = of_get_flat_dt_prop(chosen, "ibm,architecture-vec-5", &size);
368
+
if (!vec5) {
369
+
cur_cpu_spec->mmu_features &= ~MMU_FTR_TYPE_RADIX;
370
+
return;
371
+
}
372
+
if (size <= OV5_INDX(OV5_MMU_SUPPORT)) {
373
+
cur_cpu_spec->mmu_features &= ~MMU_FTR_TYPE_RADIX;
374
+
return;
375
+
}
376
+
377
+
/* Check for supported configuration */
378
+
mmu_supported = vec5[OV5_INDX(OV5_MMU_SUPPORT)] &
379
+
OV5_FEAT(OV5_MMU_SUPPORT);
380
+
if (mmu_supported == OV5_FEAT(OV5_MMU_RADIX)) {
381
+
/* Hypervisor only supports radix - check enabled && GTSE */
382
+
if (!early_radix_enabled()) {
383
+
pr_warn("WARNING: Ignoring cmdline option disable_radix\n");
384
+
}
385
+
if (!(vec5[OV5_INDX(OV5_RADIX_GTSE)] &
386
+
OV5_FEAT(OV5_RADIX_GTSE))) {
387
+
pr_warn("WARNING: Hypervisor doesn't support RADIX with GTSE\n");
388
+
}
389
+
/* Do radix anyway - the hypervisor said we had to */
390
+
cur_cpu_spec->mmu_features |= MMU_FTR_TYPE_RADIX;
391
+
} else if (mmu_supported == OV5_FEAT(OV5_MMU_HASH)) {
392
+
/* Hypervisor only supports hash - disable radix */
393
+
cur_cpu_spec->mmu_features &= ~MMU_FTR_TYPE_RADIX;
394
+
}
371
395
}
372
396
373
397
void __init mmu_early_init_devtree(void)
···
407
383
* even though the ibm,architecture-vec-5 property created by
408
384
* skiboot doesn't have the necessary bits set.
409
385
*/
410
-
if (early_radix_enabled() && !(mfmsr() & MSR_HV))
386
+
if (!(mfmsr() & MSR_HV))
411
387
early_check_vec5();
412
388
413
389
if (early_radix_enabled())
+4
arch/powerpc/mm/pgtable-radix.c
+4
arch/powerpc/mm/pgtable-radix.c
···
186
186
*/
187
187
register_process_table(__pa(process_tb), 0, PRTB_SIZE_SHIFT - 12);
188
188
pr_info("Process table %p and radix root for kernel: %p\n", process_tb, init_mm.pgd);
189
+
asm volatile("ptesync" : : : "memory");
190
+
asm volatile(PPC_TLBIE_5(%0,%1,2,1,1) : :
191
+
"r" (TLBIEL_INVAL_SET_LPID), "r" (0));
192
+
asm volatile("eieio; tlbsync; ptesync" : : : "memory");
189
193
}
190
194
191
195
static void __init radix_init_partition_table(void)
+2
-2
arch/powerpc/platforms/powernv/opal-wrappers.S
+2
-2
arch/powerpc/platforms/powernv/opal-wrappers.S
+10
arch/powerpc/sysdev/xics/icp-opal.c
+10
arch/powerpc/sysdev/xics/icp-opal.c
···
91
91
92
92
static void icp_opal_set_cpu_priority(unsigned char cppr)
93
93
{
94
+
/*
95
+
* Here be dragons. The caller has asked to allow only IPI's and not
96
+
* external interrupts. But OPAL XIVE doesn't support that. So instead
97
+
* of allowing no interrupts allow all. That's still not right, but
98
+
* currently the only caller who does this is xics_migrate_irqs_away()
99
+
* and it works in that case.
100
+
*/
101
+
if (cppr >= DEFAULT_PRIORITY)
102
+
cppr = LOWEST_PRIORITY;
103
+
94
104
xics_set_base_cppr(cppr);
95
105
opal_int_set_cppr(cppr);
96
106
iosync();
+14
-3
arch/powerpc/sysdev/xics/xics-common.c
+14
-3
arch/powerpc/sysdev/xics/xics-common.c
···
20
20
#include <linux/of.h>
21
21
#include <linux/slab.h>
22
22
#include <linux/spinlock.h>
23
+
#include <linux/delay.h>
23
24
24
25
#include <asm/prom.h>
25
26
#include <asm/io.h>
···
199
198
/* Remove ourselves from the global interrupt queue */
200
199
xics_set_cpu_giq(xics_default_distrib_server, 0);
201
200
202
-
/* Allow IPIs again... */
203
-
icp_ops->set_priority(DEFAULT_PRIORITY);
204
-
205
201
for_each_irq_desc(virq, desc) {
206
202
struct irq_chip *chip;
207
203
long server;
···
253
255
unlock:
254
256
raw_spin_unlock_irqrestore(&desc->lock, flags);
255
257
}
258
+
259
+
/* Allow "sufficient" time to drop any inflight IRQ's */
260
+
mdelay(5);
261
+
262
+
/*
263
+
* Allow IPIs again. This is done at the very end, after migrating all
264
+
* interrupts, the expectation is that we'll only get woken up by an IPI
265
+
* interrupt beyond this point, but leave externals masked just to be
266
+
* safe. If we're using icp-opal this may actually allow all
267
+
* interrupts anyway, but that should be OK.
268
+
*/
269
+
icp_ops->set_priority(DEFAULT_PRIORITY);
270
+
256
271
}
257
272
#endif /* CONFIG_HOTPLUG_CPU */
258
273
+1
-1
arch/s390/configs/default_defconfig
+1
-1
arch/s390/configs/default_defconfig
+1
-1
arch/s390/configs/gcov_defconfig
+1
-1
arch/s390/configs/gcov_defconfig
+1
-1
arch/s390/configs/performance_defconfig
+1
-1
arch/s390/configs/performance_defconfig
+1
-1
arch/s390/defconfig
+1
-1
arch/s390/defconfig
+1
arch/x86/configs/x86_64_defconfig
+1
arch/x86/configs/x86_64_defconfig
+1
-1
arch/x86/events/amd/core.c
+1
-1
arch/x86/events/amd/core.c
+1
-1
arch/x86/events/intel/cstate.c
+1
-1
arch/x86/events/intel/cstate.c
+1
-1
arch/x86/events/intel/rapl.c
+1
-1
arch/x86/events/intel/rapl.c
+3
-3
arch/x86/events/intel/uncore.h
+3
-3
arch/x86/events/intel/uncore.h
···
360
360
extern struct pci_extra_dev *uncore_extra_pci_dev;
361
361
extern struct event_constraint uncore_constraint_empty;
362
362
363
-
/* perf_event_intel_uncore_snb.c */
363
+
/* uncore_snb.c */
364
364
int snb_uncore_pci_init(void);
365
365
int ivb_uncore_pci_init(void);
366
366
int hsw_uncore_pci_init(void);
···
371
371
void skl_uncore_cpu_init(void);
372
372
int snb_pci2phy_map_init(int devid);
373
373
374
-
/* perf_event_intel_uncore_snbep.c */
374
+
/* uncore_snbep.c */
375
375
int snbep_uncore_pci_init(void);
376
376
void snbep_uncore_cpu_init(void);
377
377
int ivbep_uncore_pci_init(void);
···
385
385
int skx_uncore_pci_init(void);
386
386
void skx_uncore_cpu_init(void);
387
387
388
-
/* perf_event_intel_uncore_nhmex.c */
388
+
/* uncore_nhmex.c */
389
389
void nhmex_uncore_cpu_init(void);
+1
-1
arch/x86/hyperv/hv_init.c
+1
-1
arch/x86/hyperv/hv_init.c
···
158
158
clocksource_register_hz(&hyperv_cs_tsc, NSEC_PER_SEC/100);
159
159
return;
160
160
}
161
+
register_msr_cs:
161
162
#endif
162
163
/*
163
164
* For 32 bit guests just use the MSR based mechanism for reading
164
165
* the partition counter.
165
166
*/
166
167
167
-
register_msr_cs:
168
168
hyperv_cs = &hyperv_cs_msr;
169
169
if (ms_hyperv.features & HV_X64_MSR_TIME_REF_COUNT_AVAILABLE)
170
170
clocksource_register_hz(&hyperv_cs_msr, NSEC_PER_SEC/100);
+9
-6
arch/x86/include/asm/pkeys.h
+9
-6
arch/x86/include/asm/pkeys.h
···
46
46
static inline
47
47
bool mm_pkey_is_allocated(struct mm_struct *mm, int pkey)
48
48
{
49
+
/*
50
+
* "Allocated" pkeys are those that have been returned
51
+
* from pkey_alloc(). pkey 0 is special, and never
52
+
* returned from pkey_alloc().
53
+
*/
54
+
if (pkey <= 0)
55
+
return false;
56
+
if (pkey >= arch_max_pkey())
57
+
return false;
49
58
return mm_pkey_allocation_map(mm) & (1U << pkey);
50
59
}
51
60
···
91
82
static inline
92
83
int mm_pkey_free(struct mm_struct *mm, int pkey)
93
84
{
94
-
/*
95
-
* pkey 0 is special, always allocated and can never
96
-
* be freed.
97
-
*/
98
-
if (!pkey)
99
-
return -EINVAL;
100
85
if (!mm_pkey_is_allocated(mm, pkey))
101
86
return -EINVAL;
102
87
+1
-1
arch/x86/include/uapi/asm/bootparam.h
+1
-1
arch/x86/include/uapi/asm/bootparam.h
+7
-16
arch/x86/kernel/apic/apic.c
+7
-16
arch/x86/kernel/apic/apic.c
···
1610
1610
static inline void __x2apic_enable(void) { }
1611
1611
#endif /* !CONFIG_X86_X2APIC */
1612
1612
1613
-
static int __init try_to_enable_IR(void)
1614
-
{
1615
-
#ifdef CONFIG_X86_IO_APIC
1616
-
if (!x2apic_enabled() && skip_ioapic_setup) {
1617
-
pr_info("Not enabling interrupt remapping due to skipped IO-APIC setup\n");
1618
-
return -1;
1619
-
}
1620
-
#endif
1621
-
return irq_remapping_enable();
1622
-
}
1623
-
1624
1613
void __init enable_IR_x2apic(void)
1625
1614
{
1626
1615
unsigned long flags;
1627
1616
int ret, ir_stat;
1628
1617
1629
-
if (skip_ioapic_setup)
1618
+
if (skip_ioapic_setup) {
1619
+
pr_info("Not enabling interrupt remapping due to skipped IO-APIC setup\n");
1630
1620
return;
1621
+
}
1631
1622
1632
1623
ir_stat = irq_remapping_prepare();
1633
1624
if (ir_stat < 0 && !x2apic_supported())
···
1636
1645
1637
1646
/* If irq_remapping_prepare() succeeded, try to enable it */
1638
1647
if (ir_stat >= 0)
1639
-
ir_stat = try_to_enable_IR();
1648
+
ir_stat = irq_remapping_enable();
1640
1649
/* ir_stat contains the remap mode or an error code */
1641
1650
try_to_enable_x2apic(ir_stat);
1642
1651
···
2053
2062
2054
2063
/* Allocate a new cpuid. */
2055
2064
if (nr_logical_cpuids >= nr_cpu_ids) {
2056
-
WARN_ONCE(1, "Only %d processors supported."
2065
+
WARN_ONCE(1, "APIC: NR_CPUS/possible_cpus limit of %i reached. "
2057
2066
"Processor %d/0x%x and the rest are ignored.\n",
2058
-
nr_cpu_ids - 1, nr_logical_cpuids, apicid);
2059
-
return -1;
2067
+
nr_cpu_ids, nr_logical_cpuids, apicid);
2068
+
return -EINVAL;
2060
2069
}
2061
2070
2062
2071
cpuid_to_apicid[nr_logical_cpuids] = apicid;
-4
arch/x86/kernel/cpu/amd.c
-4
arch/x86/kernel/cpu/amd.c
···
556
556
if (c->x86_power & (1 << 8)) {
557
557
set_cpu_cap(c, X86_FEATURE_CONSTANT_TSC);
558
558
set_cpu_cap(c, X86_FEATURE_NONSTOP_TSC);
559
-
if (check_tsc_unstable())
560
-
clear_sched_clock_stable();
561
-
} else {
562
-
clear_sched_clock_stable();
563
559
}
564
560
565
561
/* Bit 12 of 8000_0007 edx is accumulated power mechanism. */
-2
arch/x86/kernel/cpu/centaur.c
-2
arch/x86/kernel/cpu/centaur.c
-3
arch/x86/kernel/cpu/common.c
-3
arch/x86/kernel/cpu/common.c
···
88
88
strcpy(c->x86_model_id, "386");
89
89
}
90
90
#endif
91
-
clear_sched_clock_stable();
92
91
}
93
92
94
93
static const struct cpu_dev default_cpu = {
···
1076
1077
*/
1077
1078
if (this_cpu->c_init)
1078
1079
this_cpu->c_init(c);
1079
-
else
1080
-
clear_sched_clock_stable();
1081
1080
1082
1081
/* Disable the PN if appropriate */
1083
1082
squash_the_stupid_serial_number(c);
-1
arch/x86/kernel/cpu/cyrix.c
-1
arch/x86/kernel/cpu/cyrix.c
-4
arch/x86/kernel/cpu/intel.c
-4
arch/x86/kernel/cpu/intel.c
···
162
162
if (c->x86_power & (1 << 8)) {
163
163
set_cpu_cap(c, X86_FEATURE_CONSTANT_TSC);
164
164
set_cpu_cap(c, X86_FEATURE_NONSTOP_TSC);
165
-
if (check_tsc_unstable())
166
-
clear_sched_clock_stable();
167
-
} else {
168
-
clear_sched_clock_stable();
169
165
}
170
166
171
167
/* Penwell and Cloverview have the TSC which doesn't sleep on S3 */
-1
arch/x86/kernel/cpu/intel_rdt_rdtgroup.c
-1
arch/x86/kernel/cpu/intel_rdt_rdtgroup.c
-2
arch/x86/kernel/cpu/transmeta.c
-2
arch/x86/kernel/cpu/transmeta.c
-1
arch/x86/kernel/cpu/vmware.c
-1
arch/x86/kernel/cpu/vmware.c
+1
-1
arch/x86/kernel/hpet.c
+1
-1
arch/x86/kernel/hpet.c
···
354
354
355
355
irq_domain_deactivate_irq(irq_get_irq_data(hdev->irq));
356
356
irq_domain_activate_irq(irq_get_irq_data(hdev->irq));
357
-
disable_irq(hdev->irq);
357
+
disable_hardirq(hdev->irq);
358
358
irq_set_affinity(hdev->irq, cpumask_of(hdev->cpu));
359
359
enable_irq(hdev->irq);
360
360
}
+1
-1
arch/x86/kernel/kdebugfs.c
+1
-1
arch/x86/kernel/kdebugfs.c
+1
-1
arch/x86/kernel/kprobes/common.h
+1
-1
arch/x86/kernel/kprobes/common.h
···
67
67
#endif
68
68
69
69
/* Ensure if the instruction can be boostable */
70
-
extern int can_boost(kprobe_opcode_t *instruction);
70
+
extern int can_boost(kprobe_opcode_t *instruction, void *addr);
71
71
/* Recover instruction if given address is probed */
72
72
extern unsigned long recover_probed_instruction(kprobe_opcode_t *buf,
73
73
unsigned long addr);
+3
-3
arch/x86/kernel/kprobes/core.c
+3
-3
arch/x86/kernel/kprobes/core.c
···
167
167
* Returns non-zero if opcode is boostable.
168
168
* RIP relative instructions are adjusted at copying time in 64 bits mode
169
169
*/
170
-
int can_boost(kprobe_opcode_t *opcodes)
170
+
int can_boost(kprobe_opcode_t *opcodes, void *addr)
171
171
{
172
172
kprobe_opcode_t opcode;
173
173
kprobe_opcode_t *orig_opcodes = opcodes;
174
174
175
-
if (search_exception_tables((unsigned long)opcodes))
175
+
if (search_exception_tables((unsigned long)addr))
176
176
return 0; /* Page fault may occur on this address. */
177
177
178
178
retry:
···
417
417
* __copy_instruction can modify the displacement of the instruction,
418
418
* but it doesn't affect boostable check.
419
419
*/
420
-
if (can_boost(p->ainsn.insn))
420
+
if (can_boost(p->ainsn.insn, p->addr))
421
421
p->ainsn.boostable = 0;
422
422
else
423
423
p->ainsn.boostable = -1;
+1
-1
arch/x86/kernel/kprobes/opt.c
+1
-1
arch/x86/kernel/kprobes/opt.c
+16
arch/x86/kernel/reboot.c
+16
arch/x86/kernel/reboot.c
···
223
223
DMI_MATCH(DMI_BOARD_NAME, "P4S800"),
224
224
},
225
225
},
226
+
{ /* Handle problems with rebooting on ASUS EeeBook X205TA */
227
+
.callback = set_acpi_reboot,
228
+
.ident = "ASUS EeeBook X205TA",
229
+
.matches = {
230
+
DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK COMPUTER INC."),
231
+
DMI_MATCH(DMI_PRODUCT_NAME, "X205TAW"),
232
+
},
233
+
},
234
+
{ /* Handle problems with rebooting on ASUS EeeBook X205TAW */
235
+
.callback = set_acpi_reboot,
236
+
.ident = "ASUS EeeBook X205TAW",
237
+
.matches = {
238
+
DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK COMPUTER INC."),
239
+
DMI_MATCH(DMI_PRODUCT_NAME, "X205TAW"),
240
+
},
241
+
},
226
242
227
243
/* Certec */
228
244
{ /* Handle problems with rebooting on Certec BPC600 */
+23
-12
arch/x86/kernel/tsc.c
+23
-12
arch/x86/kernel/tsc.c
···
327
327
{
328
328
return paravirt_sched_clock();
329
329
}
330
+
331
+
static inline bool using_native_sched_clock(void)
332
+
{
333
+
return pv_time_ops.sched_clock == native_sched_clock;
334
+
}
330
335
#else
331
336
unsigned long long
332
337
sched_clock(void) __attribute__((alias("native_sched_clock")));
338
+
339
+
static inline bool using_native_sched_clock(void) { return true; }
333
340
#endif
334
341
335
342
int check_tsc_unstable(void)
···
1119
1112
{
1120
1113
if (tsc_unstable)
1121
1114
return;
1115
+
1122
1116
tsc_unstable = 1;
1123
-
clear_sched_clock_stable();
1117
+
if (using_native_sched_clock())
1118
+
clear_sched_clock_stable();
1124
1119
disable_sched_clock_irqtime();
1125
1120
pr_info("Marking TSC unstable due to clocksource watchdog\n");
1126
1121
}
···
1144
1135
1145
1136
void mark_tsc_unstable(char *reason)
1146
1137
{
1147
-
if (!tsc_unstable) {
1148
-
tsc_unstable = 1;
1138
+
if (tsc_unstable)
1139
+
return;
1140
+
1141
+
tsc_unstable = 1;
1142
+
if (using_native_sched_clock())
1149
1143
clear_sched_clock_stable();
1150
-
disable_sched_clock_irqtime();
1151
-
pr_info("Marking TSC unstable due to %s\n", reason);
1152
-
/* Change only the rating, when not registered */
1153
-
if (clocksource_tsc.mult)
1154
-
clocksource_mark_unstable(&clocksource_tsc);
1155
-
else {
1156
-
clocksource_tsc.flags |= CLOCK_SOURCE_UNSTABLE;
1157
-
clocksource_tsc.rating = 0;
1158
-
}
1144
+
disable_sched_clock_irqtime();
1145
+
pr_info("Marking TSC unstable due to %s\n", reason);
1146
+
/* Change only the rating, when not registered */
1147
+
if (clocksource_tsc.mult) {
1148
+
clocksource_mark_unstable(&clocksource_tsc);
1149
+
} else {
1150
+
clocksource_tsc.flags |= CLOCK_SOURCE_UNSTABLE;
1151
+
clocksource_tsc.rating = 0;
1159
1152
}
1160
1153
}
1161
1154
+9
arch/x86/pci/common.c
+9
arch/x86/pci/common.c
···
735
735
pcibios_disable_irq(dev);
736
736
}
737
737
738
+
#ifdef CONFIG_ACPI_HOTPLUG_IOAPIC
739
+
void pcibios_release_device(struct pci_dev *dev)
740
+
{
741
+
if (atomic_dec_return(&dev->enable_cnt) >= 0)
742
+
pcibios_disable_device(dev);
743
+
744
+
}
745
+
#endif
746
+
738
747
int pci_ext_cfg_avail(void)
739
748
{
740
749
if (raw_pci_ext_ops)
-1
arch/x86/platform/uv/tlb_uv.c
-1
arch/x86/platform/uv/tlb_uv.c
+6
-5
arch/x86/purgatory/purgatory.c
+6
-5
arch/x86/purgatory/purgatory.c
···
11
11
*/
12
12
13
13
#include "sha256.h"
14
+
#include "purgatory.h"
14
15
#include "../boot/string.h"
15
16
16
17
struct sha_region {
···
19
18
unsigned long len;
20
19
};
21
20
22
-
unsigned long backup_dest = 0;
23
-
unsigned long backup_src = 0;
24
-
unsigned long backup_sz = 0;
21
+
static unsigned long backup_dest;
22
+
static unsigned long backup_src;
23
+
static unsigned long backup_sz;
25
24
26
-
u8 sha256_digest[SHA256_DIGEST_SIZE] = { 0 };
25
+
static u8 sha256_digest[SHA256_DIGEST_SIZE] = { 0 };
27
26
28
27
struct sha_region sha_regions[16] = {};
29
28
···
40
39
return 0;
41
40
}
42
41
43
-
int verify_sha256_digest(void)
42
+
static int verify_sha256_digest(void)
44
43
{
45
44
struct sha_region *ptr, *end;
46
45
u8 digest[SHA256_DIGEST_SIZE];
+8
arch/x86/purgatory/purgatory.h
+8
arch/x86/purgatory/purgatory.h
+1
arch/x86/purgatory/setup-x86_64.S
+1
arch/x86/purgatory/setup-x86_64.S
+2
drivers/acpi/internal.h
+2
drivers/acpi/internal.h
···
41
41
void acpi_container_init(void);
42
42
void acpi_memory_hotplug_init(void);
43
43
#ifdef CONFIG_ACPI_HOTPLUG_IOAPIC
44
+
void pci_ioapic_remove(struct acpi_pci_root *root);
44
45
int acpi_ioapic_remove(struct acpi_pci_root *root);
45
46
#else
47
+
static inline void pci_ioapic_remove(struct acpi_pci_root *root) { return; }
46
48
static inline int acpi_ioapic_remove(struct acpi_pci_root *root) { return 0; }
47
49
#endif
48
50
#ifdef CONFIG_ACPI_DOCK
+17
-7
drivers/acpi/ioapic.c
+17
-7
drivers/acpi/ioapic.c
···
206
206
return ACPI_SUCCESS(status) && ACPI_SUCCESS(retval) ? 0 : -ENODEV;
207
207
}
208
208
209
+
void pci_ioapic_remove(struct acpi_pci_root *root)
210
+
{
211
+
struct acpi_pci_ioapic *ioapic, *tmp;
212
+
213
+
mutex_lock(&ioapic_list_lock);
214
+
list_for_each_entry_safe(ioapic, tmp, &ioapic_list, list) {
215
+
if (root->device->handle != ioapic->root_handle)
216
+
continue;
217
+
if (ioapic->pdev) {
218
+
pci_release_region(ioapic->pdev, 0);
219
+
pci_disable_device(ioapic->pdev);
220
+
pci_dev_put(ioapic->pdev);
221
+
}
222
+
}
223
+
mutex_unlock(&ioapic_list_lock);
224
+
}
225
+
209
226
int acpi_ioapic_remove(struct acpi_pci_root *root)
210
227
{
211
228
int retval = 0;
···
232
215
list_for_each_entry_safe(ioapic, tmp, &ioapic_list, list) {
233
216
if (root->device->handle != ioapic->root_handle)
234
217
continue;
235
-
236
218
if (acpi_unregister_ioapic(ioapic->handle, ioapic->gsi_base))
237
219
retval = -EBUSY;
238
-
239
-
if (ioapic->pdev) {
240
-
pci_release_region(ioapic->pdev, 0);
241
-
pci_disable_device(ioapic->pdev);
242
-
pci_dev_put(ioapic->pdev);
243
-
}
244
220
if (ioapic->res.flags && ioapic->res.parent)
245
221
release_resource(&ioapic->res);
246
222
list_del(&ioapic->list);
+2
-2
drivers/acpi/pci_root.c
+2
-2
drivers/acpi/pci_root.c
···
648
648
649
649
pci_stop_root_bus(root->bus);
650
650
651
-
WARN_ON(acpi_ioapic_remove(root));
652
-
651
+
pci_ioapic_remove(root);
653
652
device_set_run_wake(root->bus->bridge, false);
654
653
pci_acpi_remove_bus_pm_notifier(device);
655
654
656
655
pci_remove_root_bus(root->bus);
656
+
WARN_ON(acpi_ioapic_remove(root));
657
657
658
658
dmar_device_remove(device->handle);
659
659
+1
drivers/firmware/efi/arm-runtime.c
+1
drivers/firmware/efi/arm-runtime.c
+2
-2
drivers/firmware/efi/libstub/secureboot.c
+2
-2
drivers/firmware/efi/libstub/secureboot.c
···
45
45
size = sizeof(secboot);
46
46
status = get_efi_var(efi_SecureBoot_name, &efi_variable_guid,
47
47
NULL, &size, &secboot);
48
+
if (status == EFI_NOT_FOUND)
49
+
return efi_secureboot_mode_disabled;
48
50
if (status != EFI_SUCCESS)
49
51
goto out_efi_err;
50
52
···
80
78
81
79
out_efi_err:
82
80
pr_efi_err(sys_table_arg, "Could not determine UEFI Secure Boot status.\n");
83
-
if (status == EFI_NOT_FOUND)
84
-
return efi_secureboot_mode_disabled;
85
81
return efi_secureboot_mode_unknown;
86
82
}
+2
-1
drivers/irqchip/irq-crossbar.c
+2
-1
drivers/irqchip/irq-crossbar.c
+47
drivers/xen/swiotlb-xen.c
+47
drivers/xen/swiotlb-xen.c
···
681
681
return 0;
682
682
}
683
683
EXPORT_SYMBOL_GPL(xen_swiotlb_set_dma_mask);
684
+
685
+
/*
686
+
* Create userspace mapping for the DMA-coherent memory.
687
+
* This function should be called with the pages from the current domain only,
688
+
* passing pages mapped from other domains would lead to memory corruption.
689
+
*/
690
+
int
691
+
xen_swiotlb_dma_mmap(struct device *dev, struct vm_area_struct *vma,
692
+
void *cpu_addr, dma_addr_t dma_addr, size_t size,
693
+
unsigned long attrs)
694
+
{
695
+
#if defined(CONFIG_ARM) || defined(CONFIG_ARM64)
696
+
if (__generic_dma_ops(dev)->mmap)
697
+
return __generic_dma_ops(dev)->mmap(dev, vma, cpu_addr,
698
+
dma_addr, size, attrs);
699
+
#endif
700
+
return dma_common_mmap(dev, vma, cpu_addr, dma_addr, size);
701
+
}
702
+
EXPORT_SYMBOL_GPL(xen_swiotlb_dma_mmap);
703
+
704
+
/*
705
+
* This function should be called with the pages from the current domain only,
706
+
* passing pages mapped from other domains would lead to memory corruption.
707
+
*/
708
+
int
709
+
xen_swiotlb_get_sgtable(struct device *dev, struct sg_table *sgt,
710
+
void *cpu_addr, dma_addr_t handle, size_t size,
711
+
unsigned long attrs)
712
+
{
713
+
#if defined(CONFIG_ARM) || defined(CONFIG_ARM64)
714
+
if (__generic_dma_ops(dev)->get_sgtable) {
715
+
#if 0
716
+
/*
717
+
* This check verifies that the page belongs to the current domain and
718
+
* is not one mapped from another domain.
719
+
* This check is for debug only, and should not go to production build
720
+
*/
721
+
unsigned long bfn = PHYS_PFN(dma_to_phys(dev, handle));
722
+
BUG_ON (!page_is_ram(bfn));
723
+
#endif
724
+
return __generic_dma_ops(dev)->get_sgtable(dev, sgt, cpu_addr,
725
+
handle, size, attrs);
726
+
}
727
+
#endif
728
+
return dma_common_get_sgtable(dev, sgt, cpu_addr, handle, size);
729
+
}
730
+
EXPORT_SYMBOL_GPL(xen_swiotlb_get_sgtable);
+4
-4
fs/timerfd.c
+4
-4
fs/timerfd.c
···
400
400
clockid != CLOCK_BOOTTIME_ALARM))
401
401
return -EINVAL;
402
402
403
-
if (!capable(CAP_WAKE_ALARM) &&
404
-
(clockid == CLOCK_REALTIME_ALARM ||
405
-
clockid == CLOCK_BOOTTIME_ALARM))
403
+
if ((clockid == CLOCK_REALTIME_ALARM ||
404
+
clockid == CLOCK_BOOTTIME_ALARM) &&
405
+
!capable(CAP_WAKE_ALARM))
406
406
return -EPERM;
407
407
408
408
ctx = kzalloc(sizeof(*ctx), GFP_KERNEL);
···
449
449
return ret;
450
450
ctx = f.file->private_data;
451
451
452
-
if (!capable(CAP_WAKE_ALARM) && isalarm(ctx)) {
452
+
if (isalarm(ctx) && !capable(CAP_WAKE_ALARM)) {
453
453
fdput(f);
454
454
return -EPERM;
455
455
}
+9
-2
include/linux/jump_label.h
+9
-2
include/linux/jump_label.h
···
90
90
struct static_key {
91
91
atomic_t enabled;
92
92
/*
93
+
* Note:
94
+
* To make anonymous unions work with old compilers, the static
95
+
* initialization of them requires brackets. This creates a dependency
96
+
* on the order of the struct with the initializers. If any fields
97
+
* are added, STATIC_KEY_INIT_TRUE and STATIC_KEY_INIT_FALSE may need
98
+
* to be modified.
99
+
*
93
100
* bit 0 => 1 if key is initially true
94
101
* 0 if initially false
95
102
* bit 1 => 1 if points to struct static_key_mod
···
173
166
*/
174
167
#define STATIC_KEY_INIT_TRUE \
175
168
{ .enabled = { 1 }, \
176
-
.entries = (void *)JUMP_TYPE_TRUE }
169
+
{ .entries = (void *)JUMP_TYPE_TRUE } }
177
170
#define STATIC_KEY_INIT_FALSE \
178
171
{ .enabled = { 0 }, \
179
-
.entries = (void *)JUMP_TYPE_FALSE }
172
+
{ .entries = (void *)JUMP_TYPE_FALSE } }
180
173
181
174
#else /* !HAVE_JUMP_LABEL */
182
175
+1
-1
include/linux/user_namespace.h
+1
-1
include/linux/user_namespace.h
+1
include/trace/events/syscalls.h
+1
include/trace/events/syscalls.h
+11
include/xen/swiotlb-xen.h
+11
include/xen/swiotlb-xen.h
···
2
2
#define __LINUX_SWIOTLB_XEN_H
3
3
4
4
#include <linux/dma-direction.h>
5
+
#include <linux/scatterlist.h>
5
6
#include <linux/swiotlb.h>
6
7
7
8
extern int xen_swiotlb_init(int verbose, bool early);
···
56
55
57
56
extern int
58
57
xen_swiotlb_set_dma_mask(struct device *dev, u64 dma_mask);
58
+
59
+
extern int
60
+
xen_swiotlb_dma_mmap(struct device *dev, struct vm_area_struct *vma,
61
+
void *cpu_addr, dma_addr_t dma_addr, size_t size,
62
+
unsigned long attrs);
63
+
64
+
extern int
65
+
xen_swiotlb_get_sgtable(struct device *dev, struct sg_table *sgt,
66
+
void *cpu_addr, dma_addr_t handle, size_t size,
67
+
unsigned long attrs);
59
68
#endif /* __LINUX_SWIOTLB_XEN_H */
+9
-2
kernel/locking/lockdep.c
+9
-2
kernel/locking/lockdep.c
···
3262
3262
if (depth) {
3263
3263
hlock = curr->held_locks + depth - 1;
3264
3264
if (hlock->class_idx == class_idx && nest_lock) {
3265
-
if (hlock->references)
3265
+
if (hlock->references) {
3266
+
/*
3267
+
* Check: unsigned int references:12, overflow.
3268
+
*/
3269
+
if (DEBUG_LOCKS_WARN_ON(hlock->references == (1 << 12)-1))
3270
+
return 0;
3271
+
3266
3272
hlock->references++;
3267
-
else
3273
+
} else {
3268
3274
hlock->references = 2;
3275
+
}
3269
3276
3270
3277
return 1;
3271
3278
}
+3
-3
kernel/locking/test-ww_mutex.c
+3
-3
kernel/locking/test-ww_mutex.c
···
50
50
51
51
if (mtx->flags & TEST_MTX_TRY) {
52
52
while (!ww_mutex_trylock(&mtx->mutex))
53
-
cpu_relax();
53
+
cond_resched();
54
54
} else {
55
55
ww_mutex_lock(&mtx->mutex, NULL);
56
56
}
···
88
88
ret = -EINVAL;
89
89
break;
90
90
}
91
-
cpu_relax();
91
+
cond_resched();
92
92
} while (time_before(jiffies, timeout));
93
93
} else {
94
94
ret = wait_for_completion_timeout(&mtx.done, TIMEOUT);
···
627
627
if (ret)
628
628
return ret;
629
629
630
-
ret = stress(4096, hweight32(STRESS_ALL)*ncpus, 1<<12, STRESS_ALL);
630
+
ret = stress(4095, hweight32(STRESS_ALL)*ncpus, 1<<12, STRESS_ALL);
631
631
if (ret)
632
632
return ret;
633
633
+8
-3
kernel/sched/core.c
+8
-3
kernel/sched/core.c
···
3287
3287
struct task_struct *p;
3288
3288
3289
3289
/*
3290
-
* Optimization: we know that if all tasks are in
3291
-
* the fair class we can call that function directly:
3290
+
* Optimization: we know that if all tasks are in the fair class we can
3291
+
* call that function directly, but only if the @prev task wasn't of a
3292
+
* higher scheduling class, because otherwise those loose the
3293
+
* opportunity to pull in more work from other CPUs.
3292
3294
*/
3293
-
if (likely(rq->nr_running == rq->cfs.h_nr_running)) {
3295
+
if (likely((prev->sched_class == &idle_sched_class ||
3296
+
prev->sched_class == &fair_sched_class) &&
3297
+
rq->nr_running == rq->cfs.h_nr_running)) {
3298
+
3294
3299
p = fair_sched_class.pick_next_task(rq, prev, rf);
3295
3300
if (unlikely(p == RETRY_TASK))
3296
3301
goto again;
+1
-1
kernel/sched/fair.c
+1
-1
kernel/sched/fair.c
···
5799
5799
* Due to large variance we need a large fuzz factor; hackbench in
5800
5800
* particularly is sensitive here.
5801
5801
*/
5802
-
if ((avg_idle / 512) < avg_cost)
5802
+
if (sched_feat(SIS_AVG_CPU) && (avg_idle / 512) < avg_cost)
5803
5803
return -1;
5804
5804
5805
5805
time = local_clock();
+5
kernel/sched/features.h
+5
kernel/sched/features.h
+1
-1
kernel/time/jiffies.c
+1
-1
kernel/time/jiffies.c
···
125
125
shift_hz += cycles_per_tick/2;
126
126
do_div(shift_hz, cycles_per_tick);
127
127
/* Calculate nsec_per_tick using shift_hz */
128
-
nsec_per_tick = (u64)TICK_NSEC << 8;
128
+
nsec_per_tick = (u64)NSEC_PER_SEC << 8;
129
129
nsec_per_tick += (u32)shift_hz/2;
130
130
do_div(nsec_per_tick, (u32)shift_hz);
131
131
+3
-3
kernel/trace/Kconfig
+3
-3
kernel/trace/Kconfig
···
429
429
430
430
If unsure, say N.
431
431
432
-
config KPROBE_EVENT
432
+
config KPROBE_EVENTS
433
433
depends on KPROBES
434
434
depends on HAVE_REGS_AND_STACK_ACCESS_API
435
435
bool "Enable kprobes-based dynamic events"
···
447
447
This option is also required by perf-probe subcommand of perf tools.
448
448
If you want to use perf tools, this option is strongly recommended.
449
449
450
-
config UPROBE_EVENT
450
+
config UPROBE_EVENTS
451
451
bool "Enable uprobes-based dynamic events"
452
452
depends on ARCH_SUPPORTS_UPROBES
453
453
depends on MMU
···
466
466
467
467
config BPF_EVENTS
468
468
depends on BPF_SYSCALL
469
-
depends on (KPROBE_EVENT || UPROBE_EVENT) && PERF_EVENTS
469
+
depends on (KPROBE_EVENTS || UPROBE_EVENTS) && PERF_EVENTS
470
470
bool
471
471
default y
472
472
help
+2
-2
kernel/trace/Makefile
+2
-2
kernel/trace/Makefile
···
57
57
obj-$(CONFIG_EVENT_TRACING) += trace_events_trigger.o
58
58
obj-$(CONFIG_HIST_TRIGGERS) += trace_events_hist.o
59
59
obj-$(CONFIG_BPF_EVENTS) += bpf_trace.o
60
-
obj-$(CONFIG_KPROBE_EVENT) += trace_kprobe.o
60
+
obj-$(CONFIG_KPROBE_EVENTS) += trace_kprobe.o
61
61
obj-$(CONFIG_TRACEPOINTS) += power-traces.o
62
62
ifeq ($(CONFIG_PM),y)
63
63
obj-$(CONFIG_TRACEPOINTS) += rpm-traces.o
···
66
66
obj-$(CONFIG_KGDB_KDB) += trace_kdb.o
67
67
endif
68
68
obj-$(CONFIG_PROBE_EVENTS) += trace_probe.o
69
-
obj-$(CONFIG_UPROBE_EVENT) += trace_uprobe.o
69
+
obj-$(CONFIG_UPROBE_EVENTS) += trace_uprobe.o
70
70
71
71
obj-$(CONFIG_TRACEPOINT_BENCHMARK) += trace_benchmark.o
72
72
+18
-5
kernel/trace/ftrace.c
+18
-5
kernel/trace/ftrace.c
···
4416
4416
}
4417
4417
__setup("ftrace_graph_notrace=", set_graph_notrace_function);
4418
4418
4419
+
static int __init set_graph_max_depth_function(char *str)
4420
+
{
4421
+
if (!str)
4422
+
return 0;
4423
+
fgraph_max_depth = simple_strtoul(str, NULL, 0);
4424
+
return 1;
4425
+
}
4426
+
__setup("ftrace_graph_max_depth=", set_graph_max_depth_function);
4427
+
4419
4428
static void __init set_ftrace_early_graph(char *buf, int enable)
4420
4429
{
4421
4430
int ret;
4422
4431
char *func;
4423
4432
struct ftrace_hash *hash;
4424
4433
4425
-
if (enable)
4426
-
hash = ftrace_graph_hash;
4427
-
else
4428
-
hash = ftrace_graph_notrace_hash;
4434
+
hash = alloc_ftrace_hash(FTRACE_HASH_DEFAULT_BITS);
4435
+
if (WARN_ON(!hash))
4436
+
return;
4429
4437
4430
4438
while (buf) {
4431
4439
func = strsep(&buf, ",");
···
4443
4435
printk(KERN_DEBUG "ftrace: function %s not "
4444
4436
"traceable\n", func);
4445
4437
}
4438
+
4439
+
if (enable)
4440
+
ftrace_graph_hash = hash;
4441
+
else
4442
+
ftrace_graph_notrace_hash = hash;
4446
4443
}
4447
4444
#endif /* CONFIG_FUNCTION_GRAPH_TRACER */
4448
4445
···
5501
5488
* Normally the mcount trampoline will call the ops->func, but there
5502
5489
* are times that it should not. For example, if the ops does not
5503
5490
* have its own recursion protection, then it should call the
5504
-
* ftrace_ops_recurs_func() instead.
5491
+
* ftrace_ops_assist_func() instead.
5505
5492
*
5506
5493
* Returns the function that the trampoline should call for @ops.
5507
5494
*/
+5
-5
kernel/trace/trace.c
+5
-5
kernel/trace/trace.c
···
4341
4341
"\t\t\t traces\n"
4342
4342
#endif
4343
4343
#endif /* CONFIG_STACK_TRACER */
4344
-
#ifdef CONFIG_KPROBE_EVENT
4344
+
#ifdef CONFIG_KPROBE_EVENTS
4345
4345
" kprobe_events\t\t- Add/remove/show the kernel dynamic events\n"
4346
4346
"\t\t\t Write into this file to define/undefine new trace events.\n"
4347
4347
#endif
4348
-
#ifdef CONFIG_UPROBE_EVENT
4348
+
#ifdef CONFIG_UPROBE_EVENTS
4349
4349
" uprobe_events\t\t- Add/remove/show the userspace dynamic events\n"
4350
4350
"\t\t\t Write into this file to define/undefine new trace events.\n"
4351
4351
#endif
4352
-
#if defined(CONFIG_KPROBE_EVENT) || defined(CONFIG_UPROBE_EVENT)
4352
+
#if defined(CONFIG_KPROBE_EVENTS) || defined(CONFIG_UPROBE_EVENTS)
4353
4353
"\t accepts: event-definitions (one definition per line)\n"
4354
4354
"\t Format: p|r[:[<group>/]<event>] <place> [<args>]\n"
4355
4355
"\t -:[<group>/]<event>\n"
4356
-
#ifdef CONFIG_KPROBE_EVENT
4356
+
#ifdef CONFIG_KPROBE_EVENTS
4357
4357
"\t place: [<module>:]<symbol>[+<offset>]|<memaddr>\n"
4358
4358
#endif
4359
-
#ifdef CONFIG_UPROBE_EVENT
4359
+
#ifdef CONFIG_UPROBE_EVENTS
4360
4360
"\t place: <path>:<offset>\n"
4361
4361
#endif
4362
4362
"\t args: <name>=fetcharg[:type]\n"
+2
-2
kernel/trace/trace_probe.h
+2
-2
kernel/trace/trace_probe.h
···
248
248
#define FETCH_TYPE_STRING 0
249
249
#define FETCH_TYPE_STRSIZE 1
250
250
251
-
#ifdef CONFIG_KPROBE_EVENT
251
+
#ifdef CONFIG_KPROBE_EVENTS
252
252
struct symbol_cache;
253
253
unsigned long update_symbol_cache(struct symbol_cache *sc);
254
254
void free_symbol_cache(struct symbol_cache *sc);
···
278
278
{
279
279
return NULL;
280
280
}
281
-
#endif /* CONFIG_KPROBE_EVENT */
281
+
#endif /* CONFIG_KPROBE_EVENTS */
282
282
283
283
struct probe_arg {
284
284
struct fetch_param fetch;
+11
-7
kernel/ucount.c
+11
-7
kernel/ucount.c
···
144
144
145
145
new->ns = ns;
146
146
new->uid = uid;
147
-
atomic_set(&new->count, 0);
147
+
new->count = 0;
148
148
149
149
spin_lock_irq(&ucounts_lock);
150
150
ucounts = find_ucounts(ns, uid, hashent);
···
155
155
ucounts = new;
156
156
}
157
157
}
158
-
if (!atomic_add_unless(&ucounts->count, 1, INT_MAX))
158
+
if (ucounts->count == INT_MAX)
159
159
ucounts = NULL;
160
+
else
161
+
ucounts->count += 1;
160
162
spin_unlock_irq(&ucounts_lock);
161
163
return ucounts;
162
164
}
···
167
165
{
168
166
unsigned long flags;
169
167
170
-
if (atomic_dec_and_test(&ucounts->count)) {
171
-
spin_lock_irqsave(&ucounts_lock, flags);
168
+
spin_lock_irqsave(&ucounts_lock, flags);
169
+
ucounts->count -= 1;
170
+
if (!ucounts->count)
172
171
hlist_del_init(&ucounts->node);
173
-
spin_unlock_irqrestore(&ucounts_lock, flags);
172
+
else
173
+
ucounts = NULL;
174
+
spin_unlock_irqrestore(&ucounts_lock, flags);
174
175
175
-
kfree(ucounts);
176
-
}
176
+
kfree(ucounts);
177
177
}
178
178
179
179
static inline bool atomic_inc_below(atomic_t *v, int u)
+2
-2
lib/radix-tree.c
+2
-2
lib/radix-tree.c
···
2129
2129
struct ida_bitmap *bitmap = kmalloc(sizeof(*bitmap), gfp);
2130
2130
if (!bitmap)
2131
2131
return 0;
2132
-
bitmap = this_cpu_cmpxchg(ida_bitmap, NULL, bitmap);
2133
-
kfree(bitmap);
2132
+
if (this_cpu_cmpxchg(ida_bitmap, NULL, bitmap))
2133
+
kfree(bitmap);
2134
2134
}
2135
2135
2136
2136
return 1;
+7
-7
lib/refcount.c
+7
-7
lib/refcount.c
···
58
58
val = old;
59
59
}
60
60
61
-
WARN(new == UINT_MAX, "refcount_t: saturated; leaking memory.\n");
61
+
WARN_ONCE(new == UINT_MAX, "refcount_t: saturated; leaking memory.\n");
62
62
63
63
return true;
64
64
}
···
66
66
67
67
void refcount_add(unsigned int i, refcount_t *r)
68
68
{
69
-
WARN(!refcount_add_not_zero(i, r), "refcount_t: addition on 0; use-after-free.\n");
69
+
WARN_ONCE(!refcount_add_not_zero(i, r), "refcount_t: addition on 0; use-after-free.\n");
70
70
}
71
71
EXPORT_SYMBOL_GPL(refcount_add);
72
72
···
97
97
val = old;
98
98
}
99
99
100
-
WARN(new == UINT_MAX, "refcount_t: saturated; leaking memory.\n");
100
+
WARN_ONCE(new == UINT_MAX, "refcount_t: saturated; leaking memory.\n");
101
101
102
102
return true;
103
103
}
···
111
111
*/
112
112
void refcount_inc(refcount_t *r)
113
113
{
114
-
WARN(!refcount_inc_not_zero(r), "refcount_t: increment on 0; use-after-free.\n");
114
+
WARN_ONCE(!refcount_inc_not_zero(r), "refcount_t: increment on 0; use-after-free.\n");
115
115
}
116
116
EXPORT_SYMBOL_GPL(refcount_inc);
117
117
···
125
125
126
126
new = val - i;
127
127
if (new > val) {
128
-
WARN(new > val, "refcount_t: underflow; use-after-free.\n");
128
+
WARN_ONCE(new > val, "refcount_t: underflow; use-after-free.\n");
129
129
return false;
130
130
}
131
131
···
164
164
165
165
void refcount_dec(refcount_t *r)
166
166
{
167
-
WARN(refcount_dec_and_test(r), "refcount_t: decrement hit 0; leaking memory.\n");
167
+
WARN_ONCE(refcount_dec_and_test(r), "refcount_t: decrement hit 0; leaking memory.\n");
168
168
}
169
169
EXPORT_SYMBOL_GPL(refcount_dec);
170
170
···
204
204
205
205
new = val - 1;
206
206
if (new > val) {
207
-
WARN(new > val, "refcount_t: underflow; use-after-free.\n");
207
+
WARN_ONCE(new > val, "refcount_t: underflow; use-after-free.\n");
208
208
return true;
209
209
}
210
210
+2
scripts/module-common.lds
+2
scripts/module-common.lds
+12
-3
tools/objtool/builtin-check.c
+12
-3
tools/objtool/builtin-check.c
···
805
805
insn->jump_dest->offset > orig_insn->offset))
806
806
break;
807
807
808
+
/* look for a relocation which references .rodata */
808
809
text_rela = find_rela_by_dest_range(insn->sec, insn->offset,
809
810
insn->len);
810
-
if (text_rela && text_rela->sym == file->rodata->sym)
811
-
return find_rela_by_dest(file->rodata,
812
-
text_rela->addend);
811
+
if (!text_rela || text_rela->sym != file->rodata->sym)
812
+
continue;
813
+
814
+
/*
815
+
* Make sure the .rodata address isn't associated with a
816
+
* symbol. gcc jump tables are anonymous data.
817
+
*/
818
+
if (find_symbol_containing(file->rodata, text_rela->addend))
819
+
continue;
820
+
821
+
return find_rela_by_dest(file->rodata, text_rela->addend);
813
822
}
814
823
815
824
return NULL;
+12
tools/objtool/elf.c
+12
tools/objtool/elf.c
···
85
85
return NULL;
86
86
}
87
87
88
+
struct symbol *find_symbol_containing(struct section *sec, unsigned long offset)
89
+
{
90
+
struct symbol *sym;
91
+
92
+
list_for_each_entry(sym, &sec->symbol_list, list)
93
+
if (sym->type != STT_SECTION &&
94
+
offset >= sym->offset && offset < sym->offset + sym->len)
95
+
return sym;
96
+
97
+
return NULL;
98
+
}
99
+
88
100
struct rela *find_rela_by_dest_range(struct section *sec, unsigned long offset,
89
101
unsigned int len)
90
102
{
+1
tools/objtool/elf.h
+1
tools/objtool/elf.h
···
79
79
struct elf *elf_open(const char *name);
80
80
struct section *find_section_by_name(struct elf *elf, const char *name);
81
81
struct symbol *find_symbol_by_offset(struct section *sec, unsigned long offset);
82
+
struct symbol *find_symbol_containing(struct section *sec, unsigned long offset);
82
83
struct rela *find_rela_by_dest(struct section *sec, unsigned long offset);
83
84
struct rela *find_rela_by_dest_range(struct section *sec, unsigned long offset,
84
85
unsigned int len);
+1
-1
tools/perf/util/intel-pt-decoder/intel-pt-insn-decoder.c
+1
-1
tools/perf/util/intel-pt-decoder/intel-pt-insn-decoder.c
···
31
31
#error Instruction buffer size too small
32
32
#endif
33
33
34
-
/* Based on branch_type() from perf_event_intel_lbr.c */
34
+
/* Based on branch_type() from arch/x86/events/intel/lbr.c */
35
35
static void intel_pt_insn_decoder(struct insn *insn,
36
36
struct intel_pt_insn *intel_pt_insn)
37
37
{
+9
-6
tools/testing/radix-tree/Makefile
+9
-6
tools/testing/radix-tree/Makefile
···
1
1
2
2
CFLAGS += -I. -I../../include -g -O2 -Wall -D_LGPL_SOURCE -fsanitize=address
3
-
LDFLAGS += -lpthread -lurcu
3
+
LDFLAGS += -fsanitize=address
4
+
LDLIBS+= -lpthread -lurcu
4
5
TARGETS = main idr-test multiorder
5
6
CORE_OFILES := radix-tree.o idr.o linux.o test.o find_bit.o
6
7
OFILES = main.o $(CORE_OFILES) regression1.o regression2.o regression3.o \
···
11
10
SHIFT=3
12
11
endif
13
12
13
+
ifeq ($(BUILD), 32)
14
+
CFLAGS += -m32
15
+
LDFLAGS += -m32
16
+
endif
17
+
14
18
targets: mapshift $(TARGETS)
15
19
16
20
main: $(OFILES)
17
-
$(CC) $(CFLAGS) $(LDFLAGS) $^ -o main
18
21
19
22
idr-test: idr-test.o $(CORE_OFILES)
20
-
$(CC) $(CFLAGS) $(LDFLAGS) $^ -o idr-test
21
23
22
24
multiorder: multiorder.o $(CORE_OFILES)
23
-
$(CC) $(CFLAGS) $(LDFLAGS) $^ -o multiorder
24
25
25
26
clean:
26
27
$(RM) $(TARGETS) *.o radix-tree.c idr.c generated/map-shift.h
27
28
28
29
vpath %.c ../../lib
29
30
30
-
$(OFILES): *.h */*.h generated/map-shift.h \
31
+
$(OFILES): Makefile *.h */*.h generated/map-shift.h \
31
32
../../include/linux/*.h \
32
33
../../include/asm/*.h \
33
34
../../../include/linux/radix-tree.h \
···
44
41
.PHONY: mapshift
45
42
46
43
mapshift:
47
-
@if ! grep -qw $(SHIFT) generated/map-shift.h; then \
44
+
@if ! grep -qws $(SHIFT) generated/map-shift.h; then \
48
45
echo "#define RADIX_TREE_MAP_SHIFT $(SHIFT)" > \
49
46
generated/map-shift.h; \
50
47
fi
+166
-7
tools/testing/radix-tree/benchmark.c
+166
-7
tools/testing/radix-tree/benchmark.c
···
17
17
#include <time.h>
18
18
#include "test.h"
19
19
20
+
#define for_each_index(i, base, order) \
21
+
for (i = base; i < base + (1 << order); i++)
22
+
20
23
#define NSEC_PER_SEC 1000000000L
21
24
22
25
static long long benchmark_iter(struct radix_tree_root *root, bool tagged)
···
60
57
return nsec;
61
58
}
62
59
60
+
static void benchmark_insert(struct radix_tree_root *root,
61
+
unsigned long size, unsigned long step, int order)
62
+
{
63
+
struct timespec start, finish;
64
+
unsigned long index;
65
+
long long nsec;
66
+
67
+
clock_gettime(CLOCK_MONOTONIC, &start);
68
+
69
+
for (index = 0 ; index < size ; index += step)
70
+
item_insert_order(root, index, order);
71
+
72
+
clock_gettime(CLOCK_MONOTONIC, &finish);
73
+
74
+
nsec = (finish.tv_sec - start.tv_sec) * NSEC_PER_SEC +
75
+
(finish.tv_nsec - start.tv_nsec);
76
+
77
+
printv(2, "Size: %8ld, step: %8ld, order: %d, insertion: %15lld ns\n",
78
+
size, step, order, nsec);
79
+
}
80
+
81
+
static void benchmark_tagging(struct radix_tree_root *root,
82
+
unsigned long size, unsigned long step, int order)
83
+
{
84
+
struct timespec start, finish;
85
+
unsigned long index;
86
+
long long nsec;
87
+
88
+
clock_gettime(CLOCK_MONOTONIC, &start);
89
+
90
+
for (index = 0 ; index < size ; index += step)
91
+
radix_tree_tag_set(root, index, 0);
92
+
93
+
clock_gettime(CLOCK_MONOTONIC, &finish);
94
+
95
+
nsec = (finish.tv_sec - start.tv_sec) * NSEC_PER_SEC +
96
+
(finish.tv_nsec - start.tv_nsec);
97
+
98
+
printv(2, "Size: %8ld, step: %8ld, order: %d, tagging: %17lld ns\n",
99
+
size, step, order, nsec);
100
+
}
101
+
102
+
static void benchmark_delete(struct radix_tree_root *root,
103
+
unsigned long size, unsigned long step, int order)
104
+
{
105
+
struct timespec start, finish;
106
+
unsigned long index, i;
107
+
long long nsec;
108
+
109
+
clock_gettime(CLOCK_MONOTONIC, &start);
110
+
111
+
for (index = 0 ; index < size ; index += step)
112
+
for_each_index(i, index, order)
113
+
item_delete(root, i);
114
+
115
+
clock_gettime(CLOCK_MONOTONIC, &finish);
116
+
117
+
nsec = (finish.tv_sec - start.tv_sec) * NSEC_PER_SEC +
118
+
(finish.tv_nsec - start.tv_nsec);
119
+
120
+
printv(2, "Size: %8ld, step: %8ld, order: %d, deletion: %16lld ns\n",
121
+
size, step, order, nsec);
122
+
}
123
+
63
124
static void benchmark_size(unsigned long size, unsigned long step, int order)
64
125
{
65
126
RADIX_TREE(tree, GFP_KERNEL);
66
127
long long normal, tagged;
67
-
unsigned long index;
68
128
69
-
for (index = 0 ; index < size ; index += step) {
70
-
item_insert_order(&tree, index, order);
71
-
radix_tree_tag_set(&tree, index, 0);
72
-
}
129
+
benchmark_insert(&tree, size, step, order);
130
+
benchmark_tagging(&tree, size, step, order);
73
131
74
132
tagged = benchmark_iter(&tree, true);
75
133
normal = benchmark_iter(&tree, false);
76
134
77
-
printv(2, "Size %ld, step %6ld, order %d tagged %10lld ns, normal %10lld ns\n",
78
-
size, step, order, tagged, normal);
135
+
printv(2, "Size: %8ld, step: %8ld, order: %d, tagged iteration: %8lld ns\n",
136
+
size, step, order, tagged);
137
+
printv(2, "Size: %8ld, step: %8ld, order: %d, normal iteration: %8lld ns\n",
138
+
size, step, order, normal);
139
+
140
+
benchmark_delete(&tree, size, step, order);
79
141
80
142
item_kill_tree(&tree);
81
143
rcu_barrier();
144
+
}
145
+
146
+
static long long __benchmark_split(unsigned long index,
147
+
int old_order, int new_order)
148
+
{
149
+
struct timespec start, finish;
150
+
long long nsec;
151
+
RADIX_TREE(tree, GFP_ATOMIC);
152
+
153
+
item_insert_order(&tree, index, old_order);
154
+
155
+
clock_gettime(CLOCK_MONOTONIC, &start);
156
+
radix_tree_split(&tree, index, new_order);
157
+
clock_gettime(CLOCK_MONOTONIC, &finish);
158
+
nsec = (finish.tv_sec - start.tv_sec) * NSEC_PER_SEC +
159
+
(finish.tv_nsec - start.tv_nsec);
160
+
161
+
item_kill_tree(&tree);
162
+
163
+
return nsec;
164
+
165
+
}
166
+
167
+
static void benchmark_split(unsigned long size, unsigned long step)
168
+
{
169
+
int i, j, idx;
170
+
long long nsec = 0;
171
+
172
+
173
+
for (idx = 0; idx < size; idx += step) {
174
+
for (i = 3; i < 11; i++) {
175
+
for (j = 0; j < i; j++) {
176
+
nsec += __benchmark_split(idx, i, j);
177
+
}
178
+
}
179
+
}
180
+
181
+
printv(2, "Size %8ld, step %8ld, split time %10lld ns\n",
182
+
size, step, nsec);
183
+
184
+
}
185
+
186
+
static long long __benchmark_join(unsigned long index,
187
+
unsigned order1, unsigned order2)
188
+
{
189
+
unsigned long loc;
190
+
struct timespec start, finish;
191
+
long long nsec;
192
+
void *item, *item2 = item_create(index + 1, order1);
193
+
RADIX_TREE(tree, GFP_KERNEL);
194
+
195
+
item_insert_order(&tree, index, order2);
196
+
item = radix_tree_lookup(&tree, index);
197
+
198
+
clock_gettime(CLOCK_MONOTONIC, &start);
199
+
radix_tree_join(&tree, index + 1, order1, item2);
200
+
clock_gettime(CLOCK_MONOTONIC, &finish);
201
+
nsec = (finish.tv_sec - start.tv_sec) * NSEC_PER_SEC +
202
+
(finish.tv_nsec - start.tv_nsec);
203
+
204
+
loc = find_item(&tree, item);
205
+
if (loc == -1)
206
+
free(item);
207
+
208
+
item_kill_tree(&tree);
209
+
210
+
return nsec;
211
+
}
212
+
213
+
static void benchmark_join(unsigned long step)
214
+
{
215
+
int i, j, idx;
216
+
long long nsec = 0;
217
+
218
+
for (idx = 0; idx < 1 << 10; idx += step) {
219
+
for (i = 1; i < 15; i++) {
220
+
for (j = 0; j < i; j++) {
221
+
nsec += __benchmark_join(idx, i, j);
222
+
}
223
+
}
224
+
}
225
+
226
+
printv(2, "Size %8d, step %8ld, join time %10lld ns\n",
227
+
1 << 10, step, nsec);
82
228
}
83
229
84
230
void benchmark(void)
···
247
95
for (c = 0; size[c]; c++)
248
96
for (s = 0; step[s]; s++)
249
97
benchmark_size(size[c], step[s] << 9, 9);
98
+
99
+
for (c = 0; size[c]; c++)
100
+
for (s = 0; step[s]; s++)
101
+
benchmark_split(size[c], step[s]);
102
+
103
+
for (s = 0; step[s]; s++)
104
+
benchmark_join(step[s]);
250
105
}
+75
-3
tools/testing/radix-tree/idr-test.c
+75
-3
tools/testing/radix-tree/idr-test.c
···
153
153
idr_destroy(&idr);
154
154
}
155
155
156
+
void idr_get_next_test(void)
157
+
{
158
+
unsigned long i;
159
+
int nextid;
160
+
DEFINE_IDR(idr);
161
+
162
+
int indices[] = {4, 7, 9, 15, 65, 128, 1000, 99999, 0};
163
+
164
+
for(i = 0; indices[i]; i++) {
165
+
struct item *item = item_create(indices[i], 0);
166
+
assert(idr_alloc(&idr, item, indices[i], indices[i+1],
167
+
GFP_KERNEL) == indices[i]);
168
+
}
169
+
170
+
for(i = 0, nextid = 0; indices[i]; i++) {
171
+
idr_get_next(&idr, &nextid);
172
+
assert(nextid == indices[i]);
173
+
nextid++;
174
+
}
175
+
176
+
idr_for_each(&idr, item_idr_free, &idr);
177
+
idr_destroy(&idr);
178
+
}
179
+
156
180
void idr_checks(void)
157
181
{
158
182
unsigned long i;
···
226
202
idr_alloc_test();
227
203
idr_null_test();
228
204
idr_nowait_test();
205
+
idr_get_next_test();
229
206
}
230
207
231
208
/*
···
363
338
{
364
339
DEFINE_IDA(ida);
365
340
DECLARE_BITMAP(bitmap, 2048);
366
-
int id;
341
+
int id, err;
367
342
unsigned int i;
368
343
time_t s = time(NULL);
369
344
···
377
352
ida_remove(&ida, bit);
378
353
} else {
379
354
__set_bit(bit, bitmap);
380
-
ida_pre_get(&ida, GFP_KERNEL);
381
-
assert(!ida_get_new_above(&ida, bit, &id));
355
+
do {
356
+
ida_pre_get(&ida, GFP_KERNEL);
357
+
err = ida_get_new_above(&ida, bit, &id);
358
+
} while (err == -ENOMEM);
359
+
assert(!err);
382
360
assert(id == bit);
383
361
}
384
362
}
385
363
ida_destroy(&ida);
386
364
if (time(NULL) < s + 10)
387
365
goto repeat;
366
+
}
367
+
368
+
void ida_simple_get_remove_test(void)
369
+
{
370
+
DEFINE_IDA(ida);
371
+
unsigned long i;
372
+
373
+
for (i = 0; i < 10000; i++) {
374
+
assert(ida_simple_get(&ida, 0, 20000, GFP_KERNEL) == i);
375
+
}
376
+
assert(ida_simple_get(&ida, 5, 30, GFP_KERNEL) < 0);
377
+
378
+
for (i = 0; i < 10000; i++) {
379
+
ida_simple_remove(&ida, i);
380
+
}
381
+
assert(ida_is_empty(&ida));
382
+
383
+
ida_destroy(&ida);
388
384
}
389
385
390
386
void ida_checks(void)
···
474
428
ida_check_max();
475
429
ida_check_conv();
476
430
ida_check_random();
431
+
ida_simple_get_remove_test();
477
432
478
433
radix_tree_cpu_dead(1);
434
+
}
435
+
436
+
static void *ida_random_fn(void *arg)
437
+
{
438
+
rcu_register_thread();
439
+
ida_check_random();
440
+
rcu_unregister_thread();
441
+
return NULL;
442
+
}
443
+
444
+
void ida_thread_tests(void)
445
+
{
446
+
pthread_t threads[10];
447
+
int i;
448
+
449
+
for (i = 0; i < ARRAY_SIZE(threads); i++)
450
+
if (pthread_create(&threads[i], NULL, ida_random_fn, NULL)) {
451
+
perror("creating ida thread");
452
+
exit(1);
453
+
}
454
+
455
+
while (i--)
456
+
pthread_join(threads[i], NULL);
479
457
}
480
458
481
459
int __weak main(void)
···
507
437
radix_tree_init();
508
438
idr_checks();
509
439
ida_checks();
440
+
ida_thread_tests();
441
+
radix_tree_cpu_dead(1);
510
442
rcu_barrier();
511
443
if (nr_allocated)
512
444
printf("nr_allocated = %d\n", nr_allocated);
+1
tools/testing/radix-tree/main.c
+1
tools/testing/radix-tree/main.c
+29
tools/testing/radix-tree/tag_check.c
+29
tools/testing/radix-tree/tag_check.c
···
330
330
item_kill_tree(&tree);
331
331
}
332
332
333
+
void radix_tree_clear_tags_test(void)
334
+
{
335
+
unsigned long index;
336
+
struct radix_tree_node *node;
337
+
struct radix_tree_iter iter;
338
+
void **slot;
339
+
340
+
RADIX_TREE(tree, GFP_KERNEL);
341
+
342
+
item_insert(&tree, 0);
343
+
item_tag_set(&tree, 0, 0);
344
+
__radix_tree_lookup(&tree, 0, &node, &slot);
345
+
radix_tree_clear_tags(&tree, node, slot);
346
+
assert(item_tag_get(&tree, 0, 0) == 0);
347
+
348
+
for (index = 0; index < 1000; index++) {
349
+
item_insert(&tree, index);
350
+
item_tag_set(&tree, index, 0);
351
+
}
352
+
353
+
radix_tree_for_each_slot(slot, &tree, &iter, 0) {
354
+
radix_tree_clear_tags(&tree, iter.node, slot);
355
+
assert(item_tag_get(&tree, iter.index, 0) == 0);
356
+
}
357
+
358
+
item_kill_tree(&tree);
359
+
}
360
+
333
361
void tag_check(void)
334
362
{
335
363
single_check();
···
375
347
thrash_tags();
376
348
rcu_barrier();
377
349
printv(2, "after thrash_tags: %d allocated\n", nr_allocated);
350
+
radix_tree_clear_tags_test();
378
351
}
+1
tools/testing/radix-tree/test.h
+1
tools/testing/radix-tree/test.h
+4
-2
tools/testing/selftests/powerpc/harness.c
+4
-2
tools/testing/selftests/powerpc/harness.c
···
114
114
115
115
rc = run_test(test_function, name);
116
116
117
-
if (rc == MAGIC_SKIP_RETURN_VALUE)
117
+
if (rc == MAGIC_SKIP_RETURN_VALUE) {
118
118
test_skip(name);
119
-
else
119
+
/* so that skipped test is not marked as failed */
120
+
rc = 0;
121
+
} else
120
122
test_finish(name, rc);
121
123
122
124
return rc;
+1
-1
tools/testing/selftests/x86/fsgsbase.c
+1
-1
tools/testing/selftests/x86/fsgsbase.c
+11
-5
tools/testing/selftests/x86/ldt_gdt.c
+11
-5
tools/testing/selftests/x86/ldt_gdt.c
···
45
45
#define AR_DB (1 << 22)
46
46
#define AR_G (1 << 23)
47
47
48
+
#ifdef __x86_64__
49
+
# define INT80_CLOBBERS "r8", "r9", "r10", "r11"
50
+
#else
51
+
# define INT80_CLOBBERS
52
+
#endif
53
+
48
54
static int nerrs;
49
55
50
56
/* Points to an array of 1024 ints, each holding its own index. */
···
594
588
asm volatile ("int $0x80"
595
589
: "=a" (ret), "+m" (low_user_desc) :
596
590
"a" (243), "b" (low_user_desc)
597
-
: "flags");
591
+
: INT80_CLOBBERS);
598
592
return ret;
599
593
}
600
594
···
663
657
"+a" (eax)
664
658
: "m" (low_user_desc_clear),
665
659
[arg1] "r" ((unsigned int)(unsigned long)low_user_desc_clear)
666
-
: "flags");
660
+
: INT80_CLOBBERS);
667
661
668
662
if (sel != 0) {
669
663
result = "FAIL";
···
694
688
"+a" (eax)
695
689
: "m" (low_user_desc_clear),
696
690
[arg1] "r" ((unsigned int)(unsigned long)low_user_desc_clear)
697
-
: "flags");
691
+
: INT80_CLOBBERS);
698
692
699
693
if (sel != 0) {
700
694
result = "FAIL";
···
727
721
"+a" (eax)
728
722
: "m" (low_user_desc_clear),
729
723
[arg1] "r" ((unsigned int)(unsigned long)low_user_desc_clear)
730
-
: "flags");
724
+
: INT80_CLOBBERS);
731
725
732
726
#ifdef __x86_64__
733
727
syscall(SYS_arch_prctl, ARCH_GET_FS, &new_base);
···
780
774
"+a" (eax)
781
775
: "m" (low_user_desc_clear),
782
776
[arg1] "r" ((unsigned int)(unsigned long)low_user_desc_clear)
783
-
: "flags");
777
+
: INT80_CLOBBERS);
784
778
785
779
#ifdef __x86_64__
786
780
syscall(SYS_arch_prctl, ARCH_GET_GS, &new_base);
+2
-1
tools/testing/selftests/x86/ptrace_syscall.c
+2
-1
tools/testing/selftests/x86/ptrace_syscall.c
···
58
58
asm volatile ("int $0x80"
59
59
: "+a" (args->nr),
60
60
"+b" (args->arg0), "+c" (args->arg1), "+d" (args->arg2),
61
-
"+S" (args->arg3), "+D" (args->arg4), "+r" (bp));
61
+
"+S" (args->arg3), "+D" (args->arg4), "+r" (bp)
62
+
: : "r8", "r9", "r10", "r11");
62
63
args->arg5 = bp;
63
64
#else
64
65
sys32_helper(args, int80_and_ret);
+4
-1
tools/testing/selftests/x86/single_step_syscall.c
+4
-1
tools/testing/selftests/x86/single_step_syscall.c
···
56
56
#ifdef __x86_64__
57
57
# define REG_IP REG_RIP
58
58
# define WIDTH "q"
59
+
# define INT80_CLOBBERS "r8", "r9", "r10", "r11"
59
60
#else
60
61
# define REG_IP REG_EIP
61
62
# define WIDTH "l"
63
+
# define INT80_CLOBBERS
62
64
#endif
63
65
64
66
static unsigned long get_eflags(void)
···
142
140
143
141
printf("[RUN]\tSet TF and check int80\n");
144
142
set_eflags(get_eflags() | X86_EFLAGS_TF);
145
-
asm volatile ("int $0x80" : "=a" (tmp) : "a" (SYS_getpid));
143
+
asm volatile ("int $0x80" : "=a" (tmp) : "a" (SYS_getpid)
144
+
: INT80_CLOBBERS);
146
145
check_result();
147
146
148
147
/*