Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

ufs/phy: qcom: Refactor to use phy_init call

Refactor ufs_qcom_power_up_sequence() to get rid of ugly
exported phy APIs and use the phy_init() and phy_power_on()
to do the phy initialization.

Signed-off-by: Vivek Gautam <vivek.gautam@codeaurora.org>
Reviewed-by: Subhash Jadavani <subhashj@codeaurora.org>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>

authored by

Vivek Gautam and committed by
Kishon Vijay Abraham I
052553af e9dc42c7

+56 -60
+1 -2
drivers/phy/qualcomm/phy-qcom-ufs-i.h
··· 114 114 struct ufs_qcom_phy_calibration *cached_regs; 115 115 int cached_regs_table_size; 116 116 bool is_powered_on; 117 + bool is_started; 117 118 struct ufs_qcom_phy_specific_ops *phy_spec_ops; 118 119 119 120 enum phy_mode mode; ··· 124 123 * struct ufs_qcom_phy_specific_ops - set of pointers to functions which have a 125 124 * specific implementation per phy. Each UFS phy, should implement 126 125 * those functions according to its spec and requirements 127 - * @calibrate_phy: pointer to a function that calibrate the phy 128 126 * @start_serdes: pointer to a function that starts the serdes 129 127 * @is_physical_coding_sublayer_ready: pointer to a function that 130 128 * checks pcs readiness. returns 0 for success and non-zero for error. ··· 132 132 * and writes to QSERDES_RX_SIGDET_CNTRL attribute 133 133 */ 134 134 struct ufs_qcom_phy_specific_ops { 135 - int (*calibrate_phy)(struct ufs_qcom_phy *phy, bool is_rate_B); 136 135 void (*start_serdes)(struct ufs_qcom_phy *phy); 137 136 int (*is_physical_coding_sublayer_ready)(struct ufs_qcom_phy *phy); 138 137 void (*set_tx_lane_enable)(struct ufs_qcom_phy *phy, u32 val);
+13 -2
drivers/phy/qualcomm/phy-qcom-ufs-qmp-14nm.c
··· 44 44 45 45 static int ufs_qcom_phy_qmp_14nm_init(struct phy *generic_phy) 46 46 { 47 - return 0; 47 + struct ufs_qcom_phy *phy_common = get_ufs_qcom_phy(generic_phy); 48 + bool is_rate_B = false; 49 + int ret; 50 + 51 + if (phy_common->mode == PHY_MODE_UFS_HS_B) 52 + is_rate_B = true; 53 + 54 + ret = ufs_qcom_phy_qmp_14nm_phy_calibrate(phy_common, is_rate_B); 55 + if (!ret) 56 + /* phy calibrated, but yet to be started */ 57 + phy_common->is_started = false; 58 + 59 + return ret; 48 60 } 49 61 50 62 static int ufs_qcom_phy_qmp_14nm_exit(struct phy *generic_phy) ··· 132 120 }; 133 121 134 122 static struct ufs_qcom_phy_specific_ops phy_14nm_ops = { 135 - .calibrate_phy = ufs_qcom_phy_qmp_14nm_phy_calibrate, 136 123 .start_serdes = ufs_qcom_phy_qmp_14nm_start_serdes, 137 124 .is_physical_coding_sublayer_ready = ufs_qcom_phy_qmp_14nm_is_pcs_ready, 138 125 .set_tx_lane_enable = ufs_qcom_phy_qmp_14nm_set_tx_lane_enable,
+13 -2
drivers/phy/qualcomm/phy-qcom-ufs-qmp-20nm.c
··· 63 63 64 64 static int ufs_qcom_phy_qmp_20nm_init(struct phy *generic_phy) 65 65 { 66 - return 0; 66 + struct ufs_qcom_phy *phy_common = get_ufs_qcom_phy(generic_phy); 67 + bool is_rate_B = false; 68 + int ret; 69 + 70 + if (phy_common->mode == PHY_MODE_UFS_HS_B) 71 + is_rate_B = true; 72 + 73 + ret = ufs_qcom_phy_qmp_20nm_phy_calibrate(phy_common, is_rate_B); 74 + if (!ret) 75 + /* phy calibrated, but yet to be started */ 76 + phy_common->is_started = false; 77 + 78 + return ret; 67 79 } 68 80 69 81 static int ufs_qcom_phy_qmp_20nm_exit(struct phy *generic_phy) ··· 190 178 }; 191 179 192 180 static struct ufs_qcom_phy_specific_ops phy_20nm_ops = { 193 - .calibrate_phy = ufs_qcom_phy_qmp_20nm_phy_calibrate, 194 181 .start_serdes = ufs_qcom_phy_qmp_20nm_start_serdes, 195 182 .is_physical_coding_sublayer_ready = ufs_qcom_phy_qmp_20nm_is_pcs_ready, 196 183 .set_tx_lane_enable = ufs_qcom_phy_qmp_20nm_set_tx_lane_enable,
+14 -28
drivers/phy/qualcomm/phy-qcom-ufs.c
··· 518 518 } 519 519 } 520 520 521 - int ufs_qcom_phy_start_serdes(struct phy *generic_phy) 521 + static int ufs_qcom_phy_start_serdes(struct ufs_qcom_phy *ufs_qcom_phy) 522 522 { 523 - struct ufs_qcom_phy *ufs_qcom_phy = get_ufs_qcom_phy(generic_phy); 524 523 int ret = 0; 525 524 526 525 if (!ufs_qcom_phy->phy_spec_ops->start_serdes) { ··· 532 533 533 534 return ret; 534 535 } 535 - EXPORT_SYMBOL_GPL(ufs_qcom_phy_start_serdes); 536 536 537 537 int ufs_qcom_phy_set_tx_lane_enable(struct phy *generic_phy, u32 tx_lanes) 538 538 { ··· 562 564 } 563 565 EXPORT_SYMBOL_GPL(ufs_qcom_phy_save_controller_version); 564 566 565 - int ufs_qcom_phy_calibrate_phy(struct phy *generic_phy, bool is_rate_B) 567 + static int ufs_qcom_phy_is_pcs_ready(struct ufs_qcom_phy *ufs_qcom_phy) 566 568 { 567 - struct ufs_qcom_phy *ufs_qcom_phy = get_ufs_qcom_phy(generic_phy); 568 - int ret = 0; 569 - 570 - if (!ufs_qcom_phy->phy_spec_ops->calibrate_phy) { 571 - dev_err(ufs_qcom_phy->dev, "%s: calibrate_phy() callback is not supported\n", 572 - __func__); 573 - ret = -ENOTSUPP; 574 - } else { 575 - ret = ufs_qcom_phy->phy_spec_ops-> 576 - calibrate_phy(ufs_qcom_phy, is_rate_B); 577 - if (ret) 578 - dev_err(ufs_qcom_phy->dev, "%s: calibrate_phy() failed %d\n", 579 - __func__, ret); 580 - } 581 - 582 - return ret; 583 - } 584 - EXPORT_SYMBOL_GPL(ufs_qcom_phy_calibrate_phy); 585 - 586 - int ufs_qcom_phy_is_pcs_ready(struct phy *generic_phy) 587 - { 588 - struct ufs_qcom_phy *ufs_qcom_phy = get_ufs_qcom_phy(generic_phy); 589 - 590 569 if (!ufs_qcom_phy->phy_spec_ops->is_physical_coding_sublayer_ready) { 591 570 dev_err(ufs_qcom_phy->dev, "%s: is_physical_coding_sublayer_ready() callback is not supported\n", 592 571 __func__); ··· 573 598 return ufs_qcom_phy->phy_spec_ops-> 574 599 is_physical_coding_sublayer_ready(ufs_qcom_phy); 575 600 } 576 - EXPORT_SYMBOL_GPL(ufs_qcom_phy_is_pcs_ready); 577 601 578 602 int ufs_qcom_phy_power_on(struct phy *generic_phy) 579 603 { ··· 582 608 583 609 if (phy_common->is_powered_on) 584 610 return 0; 611 + 612 + if (!phy_common->is_started) { 613 + err = ufs_qcom_phy_start_serdes(phy_common); 614 + if (err) 615 + return err; 616 + 617 + err = ufs_qcom_phy_is_pcs_ready(phy_common); 618 + if (err) 619 + return err; 620 + 621 + phy_common->is_started = true; 622 + } 585 623 586 624 err = ufs_qcom_phy_enable_vreg(dev, &phy_common->vdda_phy); 587 625 if (err) {
+15 -23
drivers/scsi/ufs/ufs-qcom.c
··· 281 281 /* provide 1ms delay to let the reset pulse propagate */ 282 282 usleep_range(1000, 1100); 283 283 284 - ret = ufs_qcom_phy_calibrate_phy(phy, is_rate_B); 285 - 284 + /* phy initialization - calibrate the phy */ 285 + ret = phy_init(phy); 286 286 if (ret) { 287 - dev_err(hba->dev, "%s: ufs_qcom_phy_calibrate_phy() failed, ret = %d\n", 287 + dev_err(hba->dev, "%s: phy init failed, ret = %d\n", 288 288 __func__, ret); 289 289 goto out; 290 290 } ··· 297 297 * voltage, current to settle down before starting serdes. 298 298 */ 299 299 usleep_range(1000, 1100); 300 - ret = ufs_qcom_phy_start_serdes(phy); 301 - if (ret) { 302 - dev_err(hba->dev, "%s: ufs_qcom_phy_start_serdes() failed, ret = %d\n", 303 - __func__, ret); 304 - goto out; 305 - } 306 300 307 - ret = ufs_qcom_phy_is_pcs_ready(phy); 308 - if (ret) 309 - dev_err(hba->dev, 310 - "%s: is_physical_coding_sublayer_ready() failed, ret = %d\n", 301 + /* power on phy - start serdes and phy's power and clocks */ 302 + ret = phy_power_on(phy); 303 + if (ret) { 304 + dev_err(hba->dev, "%s: phy power on failed, ret = %d\n", 311 305 __func__, ret); 306 + goto out_disable_phy; 307 + } 312 308 313 309 ufs_qcom_select_unipro_mode(host); 314 310 311 + return 0; 312 + 313 + out_disable_phy: 314 + ufs_qcom_assert_reset(hba); 315 + phy_exit(phy); 315 316 out: 316 317 return ret; 317 318 } ··· 1277 1276 ufs_qcom_phy_save_controller_version(host->generic_phy, 1278 1277 host->hw_ver.major, host->hw_ver.minor, host->hw_ver.step); 1279 1278 1280 - phy_init(host->generic_phy); 1281 - err = phy_power_on(host->generic_phy); 1282 - if (err) 1283 - goto out_unregister_bus; 1284 - 1285 1279 err = ufs_qcom_init_lane_clks(host); 1286 1280 if (err) 1287 - goto out_disable_phy; 1281 + goto out_variant_clear; 1288 1282 1289 1283 ufs_qcom_set_caps(hba); 1290 1284 ufs_qcom_advertise_quirks(hba); ··· 1300 1304 1301 1305 goto out; 1302 1306 1303 - out_disable_phy: 1304 - phy_power_off(host->generic_phy); 1305 - out_unregister_bus: 1306 - phy_exit(host->generic_phy); 1307 1307 out_variant_clear: 1308 1308 ufshcd_set_variant(hba, NULL); 1309 1309 out:
-3
include/linux/phy/phy-qcom-ufs.h
··· 31 31 */ 32 32 void ufs_qcom_phy_disable_dev_ref_clk(struct phy *phy); 33 33 34 - int ufs_qcom_phy_start_serdes(struct phy *phy); 35 34 int ufs_qcom_phy_set_tx_lane_enable(struct phy *phy, u32 tx_lanes); 36 - int ufs_qcom_phy_calibrate_phy(struct phy *phy, bool is_rate_B); 37 - int ufs_qcom_phy_is_pcs_ready(struct phy *phy); 38 35 void ufs_qcom_phy_save_controller_version(struct phy *phy, 39 36 u8 major, u16 minor, u16 step); 40 37