Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

Merge tag 'renesas-pinctrl-for-v6.6-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into devel

pinctrl: renesas: Updates for v6.6

- Use the new devm_clk_get_enabled() helper.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

+50 -70
+25 -35
drivers/pinctrl/renesas/pinctrl-rzg2l.c
··· 145 145 const struct rzg2l_pinctrl_data *data; 146 146 void __iomem *base; 147 147 struct device *dev; 148 - struct clk *clk; 149 148 150 149 struct gpio_chip gpio_chip; 151 150 struct pinctrl_gpio_range gpio_range; ··· 249 250 250 251 static int rzg2l_dt_subnode_to_map(struct pinctrl_dev *pctldev, 251 252 struct device_node *np, 253 + struct device_node *parent, 252 254 struct pinctrl_map **map, 253 255 unsigned int *num_maps, 254 256 unsigned int *index) ··· 267 267 struct property *prop; 268 268 int ret, gsel, fsel; 269 269 const char **pin_fn; 270 + const char *name; 270 271 const char *pin; 271 272 272 273 pinmux = of_find_property(np, "pinmux", NULL); ··· 351 350 psel_val[i] = MUX_FUNC(value); 352 351 } 353 352 353 + if (parent) { 354 + name = devm_kasprintf(pctrl->dev, GFP_KERNEL, "%pOFn.%pOFn", 355 + parent, np); 356 + if (!name) { 357 + ret = -ENOMEM; 358 + goto done; 359 + } 360 + } else { 361 + name = np->name; 362 + } 363 + 354 364 /* Register a single pin group listing all the pins we read from DT */ 355 - gsel = pinctrl_generic_add_group(pctldev, np->name, pins, num_pinmux, NULL); 365 + gsel = pinctrl_generic_add_group(pctldev, name, pins, num_pinmux, NULL); 356 366 if (gsel < 0) { 357 367 ret = gsel; 358 368 goto done; ··· 373 361 * Register a single group function where the 'data' is an array PSEL 374 362 * register values read from DT. 375 363 */ 376 - pin_fn[0] = np->name; 377 - fsel = pinmux_generic_add_function(pctldev, np->name, pin_fn, 1, 378 - psel_val); 364 + pin_fn[0] = name; 365 + fsel = pinmux_generic_add_function(pctldev, name, pin_fn, 1, psel_val); 379 366 if (fsel < 0) { 380 367 ret = fsel; 381 368 goto remove_group; 382 369 } 383 370 384 371 maps[idx].type = PIN_MAP_TYPE_MUX_GROUP; 385 - maps[idx].data.mux.group = np->name; 386 - maps[idx].data.mux.function = np->name; 372 + maps[idx].data.mux.group = name; 373 + maps[idx].data.mux.function = name; 387 374 idx++; 388 375 389 376 dev_dbg(pctrl->dev, "Parsed %pOF with %d pins\n", np, num_pinmux); ··· 429 418 index = 0; 430 419 431 420 for_each_child_of_node(np, child) { 432 - ret = rzg2l_dt_subnode_to_map(pctldev, child, map, 421 + ret = rzg2l_dt_subnode_to_map(pctldev, child, np, map, 433 422 num_maps, &index); 434 423 if (ret < 0) { 435 424 of_node_put(child); ··· 438 427 } 439 428 440 429 if (*num_maps == 0) { 441 - ret = rzg2l_dt_subnode_to_map(pctldev, np, map, 430 + ret = rzg2l_dt_subnode_to_map(pctldev, np, NULL, map, 442 431 num_maps, &index); 443 432 if (ret < 0) 444 433 goto done; ··· 1470 1459 return 0; 1471 1460 } 1472 1461 1473 - static void rzg2l_pinctrl_clk_disable(void *data) 1474 - { 1475 - clk_disable_unprepare(data); 1476 - } 1477 - 1478 1462 static int rzg2l_pinctrl_probe(struct platform_device *pdev) 1479 1463 { 1480 1464 struct rzg2l_pinctrl *pctrl; 1465 + struct clk *clk; 1481 1466 int ret; 1482 1467 1483 1468 BUILD_BUG_ON(ARRAY_SIZE(rzg2l_gpio_configs) * RZG2L_PINS_PER_PORT > ··· 1496 1489 if (IS_ERR(pctrl->base)) 1497 1490 return PTR_ERR(pctrl->base); 1498 1491 1499 - pctrl->clk = devm_clk_get(pctrl->dev, NULL); 1500 - if (IS_ERR(pctrl->clk)) { 1501 - ret = PTR_ERR(pctrl->clk); 1502 - dev_err(pctrl->dev, "failed to get GPIO clk : %i\n", ret); 1503 - return ret; 1504 - } 1492 + clk = devm_clk_get_enabled(pctrl->dev, NULL); 1493 + if (IS_ERR(clk)) 1494 + return dev_err_probe(pctrl->dev, PTR_ERR(clk), 1495 + "failed to enable GPIO clk\n"); 1505 1496 1506 1497 spin_lock_init(&pctrl->lock); 1507 1498 spin_lock_init(&pctrl->bitmap_lock); 1508 1499 1509 1500 platform_set_drvdata(pdev, pctrl); 1510 - 1511 - ret = clk_prepare_enable(pctrl->clk); 1512 - if (ret) { 1513 - dev_err(pctrl->dev, "failed to enable GPIO clk: %i\n", ret); 1514 - return ret; 1515 - } 1516 - 1517 - ret = devm_add_action_or_reset(&pdev->dev, rzg2l_pinctrl_clk_disable, 1518 - pctrl->clk); 1519 - if (ret) { 1520 - dev_err(pctrl->dev, 1521 - "failed to register GPIO clk disable action, %i\n", 1522 - ret); 1523 - return ret; 1524 - } 1525 1501 1526 1502 ret = rzg2l_pinctrl_register(pctrl); 1527 1503 if (ret)
+25 -35
drivers/pinctrl/renesas/pinctrl-rzv2m.c
··· 119 119 const struct rzv2m_pinctrl_data *data; 120 120 void __iomem *base; 121 121 struct device *dev; 122 - struct clk *clk; 123 122 124 123 struct gpio_chip gpio_chip; 125 124 struct pinctrl_gpio_range gpio_range; ··· 209 210 210 211 static int rzv2m_dt_subnode_to_map(struct pinctrl_dev *pctldev, 211 212 struct device_node *np, 213 + struct device_node *parent, 212 214 struct pinctrl_map **map, 213 215 unsigned int *num_maps, 214 216 unsigned int *index) ··· 227 227 struct property *prop; 228 228 int ret, gsel, fsel; 229 229 const char **pin_fn; 230 + const char *name; 230 231 const char *pin; 231 232 232 233 pinmux = of_find_property(np, "pinmux", NULL); ··· 311 310 psel_val[i] = MUX_FUNC(value); 312 311 } 313 312 313 + if (parent) { 314 + name = devm_kasprintf(pctrl->dev, GFP_KERNEL, "%pOFn.%pOFn", 315 + parent, np); 316 + if (!name) { 317 + ret = -ENOMEM; 318 + goto done; 319 + } 320 + } else { 321 + name = np->name; 322 + } 323 + 314 324 /* Register a single pin group listing all the pins we read from DT */ 315 - gsel = pinctrl_generic_add_group(pctldev, np->name, pins, num_pinmux, NULL); 325 + gsel = pinctrl_generic_add_group(pctldev, name, pins, num_pinmux, NULL); 316 326 if (gsel < 0) { 317 327 ret = gsel; 318 328 goto done; ··· 333 321 * Register a single group function where the 'data' is an array PSEL 334 322 * register values read from DT. 335 323 */ 336 - pin_fn[0] = np->name; 337 - fsel = pinmux_generic_add_function(pctldev, np->name, pin_fn, 1, 338 - psel_val); 324 + pin_fn[0] = name; 325 + fsel = pinmux_generic_add_function(pctldev, name, pin_fn, 1, psel_val); 339 326 if (fsel < 0) { 340 327 ret = fsel; 341 328 goto remove_group; 342 329 } 343 330 344 331 maps[idx].type = PIN_MAP_TYPE_MUX_GROUP; 345 - maps[idx].data.mux.group = np->name; 346 - maps[idx].data.mux.function = np->name; 332 + maps[idx].data.mux.group = name; 333 + maps[idx].data.mux.function = name; 347 334 idx++; 348 335 349 336 dev_dbg(pctrl->dev, "Parsed %pOF with %d pins\n", np, num_pinmux); ··· 389 378 index = 0; 390 379 391 380 for_each_child_of_node(np, child) { 392 - ret = rzv2m_dt_subnode_to_map(pctldev, child, map, 381 + ret = rzv2m_dt_subnode_to_map(pctldev, child, np, map, 393 382 num_maps, &index); 394 383 if (ret < 0) { 395 384 of_node_put(child); ··· 398 387 } 399 388 400 389 if (*num_maps == 0) { 401 - ret = rzv2m_dt_subnode_to_map(pctldev, np, map, 390 + ret = rzv2m_dt_subnode_to_map(pctldev, np, NULL, map, 402 391 num_maps, &index); 403 392 if (ret < 0) 404 393 goto done; ··· 1039 1028 return 0; 1040 1029 } 1041 1030 1042 - static void rzv2m_pinctrl_clk_disable(void *data) 1043 - { 1044 - clk_disable_unprepare(data); 1045 - } 1046 - 1047 1031 static int rzv2m_pinctrl_probe(struct platform_device *pdev) 1048 1032 { 1049 1033 struct rzv2m_pinctrl *pctrl; 1034 + struct clk *clk; 1050 1035 int ret; 1051 1036 1052 1037 pctrl = devm_kzalloc(&pdev->dev, sizeof(*pctrl), GFP_KERNEL); ··· 1059 1052 if (IS_ERR(pctrl->base)) 1060 1053 return PTR_ERR(pctrl->base); 1061 1054 1062 - pctrl->clk = devm_clk_get(pctrl->dev, NULL); 1063 - if (IS_ERR(pctrl->clk)) { 1064 - ret = PTR_ERR(pctrl->clk); 1065 - dev_err(pctrl->dev, "failed to get GPIO clk : %i\n", ret); 1066 - return ret; 1067 - } 1055 + clk = devm_clk_get_enabled(pctrl->dev, NULL); 1056 + if (IS_ERR(clk)) 1057 + return dev_err_probe(pctrl->dev, PTR_ERR(clk), 1058 + "failed to enable GPIO clk\n"); 1068 1059 1069 1060 spin_lock_init(&pctrl->lock); 1070 1061 1071 1062 platform_set_drvdata(pdev, pctrl); 1072 - 1073 - ret = clk_prepare_enable(pctrl->clk); 1074 - if (ret) { 1075 - dev_err(pctrl->dev, "failed to enable GPIO clk: %i\n", ret); 1076 - return ret; 1077 - } 1078 - 1079 - ret = devm_add_action_or_reset(&pdev->dev, rzv2m_pinctrl_clk_disable, 1080 - pctrl->clk); 1081 - if (ret) { 1082 - dev_err(pctrl->dev, 1083 - "failed to register GPIO clk disable action, %i\n", 1084 - ret); 1085 - return ret; 1086 - } 1087 1063 1088 1064 ret = rzv2m_pinctrl_register(pctrl); 1089 1065 if (ret)