Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

irqchip: Bulk conversion to generic_handle_domain_irq()

Wherever possible, replace constructs that match either
generic_handle_irq(irq_find_mapping()) or
generic_handle_irq(irq_linear_revmap()) to a single call to
generic_handle_domain_irq().

Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Signed-off-by: Marc Zyngier <maz@kernel.org>

+111 -190
+4 -6
drivers/irqchip/exynos-combiner.c
··· 66 66 { 67 67 struct combiner_chip_data *chip_data = irq_desc_get_handler_data(desc); 68 68 struct irq_chip *chip = irq_desc_get_chip(desc); 69 - unsigned int cascade_irq, combiner_irq; 69 + unsigned int combiner_irq; 70 70 unsigned long status; 71 + int ret; 71 72 72 73 chained_irq_enter(chip, desc); 73 74 ··· 81 80 goto out; 82 81 83 82 combiner_irq = chip_data->hwirq_offset + __ffs(status); 84 - cascade_irq = irq_find_mapping(combiner_irq_domain, combiner_irq); 85 - 86 - if (unlikely(!cascade_irq)) 83 + ret = generic_handle_domain_irq(combiner_irq_domain, combiner_irq); 84 + if (unlikely(ret)) 87 85 handle_bad_irq(desc); 88 - else 89 - generic_handle_irq(cascade_irq); 90 86 91 87 out: 92 88 chained_irq_exit(chip, desc);
+2 -5
drivers/irqchip/irq-al-fic.c
··· 111 111 struct irq_chip *irqchip = irq_desc_get_chip(desc); 112 112 struct irq_chip_generic *gc = irq_get_domain_generic_chip(domain, 0); 113 113 unsigned long pending; 114 - unsigned int irq; 115 114 u32 hwirq; 116 115 117 116 chained_irq_enter(irqchip, desc); ··· 118 119 pending = readl_relaxed(fic->base + AL_FIC_CAUSE); 119 120 pending &= ~gc->mask_cache; 120 121 121 - for_each_set_bit(hwirq, &pending, NR_FIC_IRQS) { 122 - irq = irq_find_mapping(domain, hwirq); 123 - generic_handle_irq(irq); 124 - } 122 + for_each_set_bit(hwirq, &pending, NR_FIC_IRQS) 123 + generic_handle_domain_irq(domain, hwirq); 125 124 126 125 chained_irq_exit(irqchip, desc); 127 126 }
+8 -11
drivers/irqchip/irq-armada-370-xp.c
··· 582 582 583 583 for (msinr = PCI_MSI_DOORBELL_START; 584 584 msinr < PCI_MSI_DOORBELL_END; msinr++) { 585 - int irq; 585 + unsigned int irq; 586 586 587 587 if (!(msimask & BIT(msinr))) 588 588 continue; 589 589 590 - if (is_chained) { 591 - irq = irq_find_mapping(armada_370_xp_msi_inner_domain, 592 - msinr - PCI_MSI_DOORBELL_START); 593 - generic_handle_irq(irq); 594 - } else { 595 - irq = msinr - PCI_MSI_DOORBELL_START; 590 + irq = msinr - PCI_MSI_DOORBELL_START; 591 + 592 + if (is_chained) 593 + generic_handle_domain_irq(armada_370_xp_msi_inner_domain, 594 + irq); 595 + else 596 596 handle_domain_irq(armada_370_xp_msi_inner_domain, 597 597 irq, regs); 598 - } 599 598 } 600 599 } 601 600 #else ··· 605 606 { 606 607 struct irq_chip *chip = irq_desc_get_chip(desc); 607 608 unsigned long irqmap, irqn, irqsrc, cpuid; 608 - unsigned int cascade_irq; 609 609 610 610 chained_irq_enter(chip, desc); 611 611 ··· 626 628 continue; 627 629 } 628 630 629 - cascade_irq = irq_find_mapping(armada_370_xp_mpic_domain, irqn); 630 - generic_handle_irq(cascade_irq); 631 + generic_handle_domain_irq(armada_370_xp_mpic_domain, irqn); 631 632 } 632 633 633 634 chained_irq_exit(chip, desc);
+3 -5
drivers/irqchip/irq-aspeed-i2c-ic.c
··· 34 34 struct aspeed_i2c_ic *i2c_ic = irq_desc_get_handler_data(desc); 35 35 struct irq_chip *chip = irq_desc_get_chip(desc); 36 36 unsigned long bit, status; 37 - unsigned int bus_irq; 38 37 39 38 chained_irq_enter(chip, desc); 40 39 status = readl(i2c_ic->base); 41 - for_each_set_bit(bit, &status, ASPEED_I2C_IC_NUM_BUS) { 42 - bus_irq = irq_find_mapping(i2c_ic->irq_domain, bit); 43 - generic_handle_irq(bus_irq); 44 - } 40 + for_each_set_bit(bit, &status, ASPEED_I2C_IC_NUM_BUS) 41 + generic_handle_domain_irq(i2c_ic->irq_domain, bit); 42 + 45 43 chained_irq_exit(chip, desc); 46 44 } 47 45
+2 -4
drivers/irqchip/irq-aspeed-scu-ic.c
··· 44 44 45 45 static void aspeed_scu_ic_irq_handler(struct irq_desc *desc) 46 46 { 47 - unsigned int irq; 48 47 unsigned int sts; 49 48 unsigned long bit; 50 49 unsigned long enabled; ··· 73 74 max = scu_ic->num_irqs + bit; 74 75 75 76 for_each_set_bit_from(bit, &status, max) { 76 - irq = irq_find_mapping(scu_ic->irq_domain, 77 - bit - scu_ic->irq_shift); 78 - generic_handle_irq(irq); 77 + generic_handle_domain_irq(scu_ic->irq_domain, 78 + bit - scu_ic->irq_shift); 79 79 80 80 regmap_update_bits(scu_ic->scu, scu_ic->reg, mask, 81 81 BIT(bit + ASPEED_SCU_IC_STATUS_SHIFT));
+1 -1
drivers/irqchip/irq-ath79-misc.c
··· 50 50 while (pending) { 51 51 int bit = __ffs(pending); 52 52 53 - generic_handle_irq(irq_linear_revmap(domain, bit)); 53 + generic_handle_domain_irq(domain, bit); 54 54 pending &= ~BIT(bit); 55 55 } 56 56
+1 -1
drivers/irqchip/irq-bcm2835.c
··· 254 254 u32 hwirq; 255 255 256 256 while ((hwirq = get_next_armctrl_hwirq()) != ~0) 257 - generic_handle_irq(irq_linear_revmap(intc.domain, hwirq)); 257 + generic_handle_domain_irq(intc.domain, hwirq); 258 258 } 259 259 260 260 IRQCHIP_DECLARE(bcm2835_armctrl_ic, "brcm,bcm2835-armctrl-ic",
+1 -1
drivers/irqchip/irq-bcm2836.c
··· 161 161 mbox_val = readl_relaxed(intc.base + LOCAL_MAILBOX0_CLR0 + 16 * cpu); 162 162 if (mbox_val) { 163 163 int hwirq = ffs(mbox_val) - 1; 164 - generic_handle_irq(irq_find_mapping(ipi_domain, hwirq)); 164 + generic_handle_domain_irq(ipi_domain, hwirq); 165 165 } 166 166 167 167 chained_irq_exit(chip, desc);
+2 -4
drivers/irqchip/irq-bcm7038-l1.c
··· 145 145 ~cpu->mask_cache[idx]; 146 146 raw_spin_unlock_irqrestore(&intc->lock, flags); 147 147 148 - for_each_set_bit(hwirq, &pending, IRQS_PER_WORD) { 149 - generic_handle_irq(irq_find_mapping(intc->domain, 150 - base + hwirq)); 151 - } 148 + for_each_set_bit(hwirq, &pending, IRQS_PER_WORD) 149 + generic_handle_domain_irq(intc->domain, base + hwirq); 152 150 } 153 151 154 152 chained_irq_exit(chip, desc);
+2 -4
drivers/irqchip/irq-bcm7120-l2.c
··· 74 74 data->irq_map_mask[idx]; 75 75 irq_gc_unlock(gc); 76 76 77 - for_each_set_bit(hwirq, &pending, IRQS_PER_WORD) { 78 - generic_handle_irq(irq_find_mapping(b->domain, 79 - base + hwirq)); 80 - } 77 + for_each_set_bit(hwirq, &pending, IRQS_PER_WORD) 78 + generic_handle_domain_irq(b->domain, base + hwirq); 81 79 } 82 80 83 81 chained_irq_exit(chip, desc);
+1 -1
drivers/irqchip/irq-brcmstb-l2.c
··· 110 110 do { 111 111 irq = ffs(status) - 1; 112 112 status &= ~(1 << irq); 113 - generic_handle_irq(irq_linear_revmap(b->domain, irq)); 113 + generic_handle_domain_irq(b->domain, irq); 114 114 } while (status); 115 115 out: 116 116 chained_irq_exit(chip, desc);
+1 -2
drivers/irqchip/irq-dw-apb-ictl.c
··· 62 62 63 63 while (stat) { 64 64 u32 hwirq = ffs(stat) - 1; 65 - u32 virq = irq_find_mapping(d, gc->irq_base + hwirq); 65 + generic_handle_domain_irq(d, gc->irq_base + hwirq); 66 66 67 - generic_handle_irq(virq); 68 67 stat &= ~BIT(hwirq); 69 68 } 70 69 }
+5 -8
drivers/irqchip/irq-gic.c
··· 375 375 { 376 376 struct gic_chip_data *chip_data = irq_desc_get_handler_data(desc); 377 377 struct irq_chip *chip = irq_desc_get_chip(desc); 378 - unsigned int cascade_irq, gic_irq; 378 + unsigned int gic_irq; 379 379 unsigned long status; 380 + int ret; 380 381 381 382 chained_irq_enter(chip, desc); 382 383 ··· 387 386 if (gic_irq == GICC_INT_SPURIOUS) 388 387 goto out; 389 388 390 - cascade_irq = irq_find_mapping(chip_data->domain, gic_irq); 391 - if (unlikely(gic_irq < 32 || gic_irq > 1020)) { 389 + isb(); 390 + ret = generic_handle_domain_irq(chip_data->domain, gic_irq); 391 + if (unlikely(ret)) 392 392 handle_bad_irq(desc); 393 - } else { 394 - isb(); 395 - generic_handle_irq(cascade_irq); 396 - } 397 - 398 393 out: 399 394 chained_irq_exit(chip, desc); 400 395 }
+2 -3
drivers/irqchip/irq-goldfish-pic.c
··· 34 34 { 35 35 struct goldfish_pic_data *gfpic = irq_desc_get_handler_data(desc); 36 36 struct irq_chip *host_chip = irq_desc_get_chip(desc); 37 - u32 pending, hwirq, virq; 37 + u32 pending, hwirq; 38 38 39 39 chained_irq_enter(host_chip, desc); 40 40 41 41 pending = readl(gfpic->base + GFPIC_REG_IRQ_PENDING); 42 42 while (pending) { 43 43 hwirq = __fls(pending); 44 - virq = irq_linear_revmap(gfpic->irq_domain, hwirq); 45 - generic_handle_irq(virq); 44 + generic_handle_domain_irq(gfpic->irq_domain, hwirq); 46 45 pending &= ~(1 << hwirq); 47 46 } 48 47
+1 -3
drivers/irqchip/irq-i8259.c
··· 333 333 { 334 334 struct irq_domain *domain = irq_desc_get_handler_data(desc); 335 335 int hwirq = i8259_poll(); 336 - unsigned int irq; 337 336 338 337 if (hwirq < 0) 339 338 return; 340 339 341 - irq = irq_linear_revmap(domain, hwirq); 342 - generic_handle_irq(irq); 340 + generic_handle_domain_irq(domain, hwirq); 343 341 } 344 342 345 343 int __init i8259_of_init(struct device_node *node, struct device_node *parent)
+2 -4
drivers/irqchip/irq-idt3243x.c
··· 28 28 { 29 29 struct idt_pic_data *idtpic = irq_desc_get_handler_data(desc); 30 30 struct irq_chip *host_chip = irq_desc_get_chip(desc); 31 - u32 pending, hwirq, virq; 31 + u32 pending, hwirq; 32 32 33 33 chained_irq_enter(host_chip, desc); 34 34 ··· 36 36 pending &= ~idtpic->gc->mask_cache; 37 37 while (pending) { 38 38 hwirq = __fls(pending); 39 - virq = irq_linear_revmap(idtpic->irq_domain, hwirq); 40 - if (virq) 41 - generic_handle_irq(virq); 39 + generic_handle_domain_irq(idtpic->irq_domain, hwirq); 42 40 pending &= ~(1 << hwirq); 43 41 } 44 42
+4 -7
drivers/irqchip/irq-imgpdc.c
··· 223 223 { 224 224 unsigned int irq = irq_desc_get_irq(desc); 225 225 struct pdc_intc_priv *priv; 226 - unsigned int i, irq_no; 226 + unsigned int i; 227 227 228 228 priv = (struct pdc_intc_priv *)irq_desc_get_handler_data(desc); 229 229 ··· 237 237 found: 238 238 239 239 /* pass on the interrupt */ 240 - irq_no = irq_linear_revmap(priv->domain, i); 241 - generic_handle_irq(irq_no); 240 + generic_handle_domain_irq(priv->domain, i); 242 241 } 243 242 244 243 static void pdc_intc_syswake_isr(struct irq_desc *desc) 245 244 { 246 245 struct pdc_intc_priv *priv; 247 - unsigned int syswake, irq_no; 246 + unsigned int syswake; 248 247 unsigned int status; 249 248 250 249 priv = (struct pdc_intc_priv *)irq_desc_get_handler_data(desc); ··· 257 258 if (!(status & 1)) 258 259 continue; 259 260 260 - irq_no = irq_linear_revmap(priv->domain, 261 - syswake_to_hwirq(syswake)); 262 - generic_handle_irq(irq_no); 261 + generic_handle_domain_irq(priv->domain, syswake_to_hwirq(syswake)); 263 262 } 264 263 } 265 264
+3 -6
drivers/irqchip/irq-imx-intmux.c
··· 182 182 struct intmux_data *data = container_of(irqchip_data, struct intmux_data, 183 183 irqchip_data[idx]); 184 184 unsigned long irqstat; 185 - int pos, virq; 185 + int pos; 186 186 187 187 chained_irq_enter(irq_desc_get_chip(desc), desc); 188 188 189 189 /* read the interrupt source pending status of this channel */ 190 190 irqstat = readl_relaxed(data->regs + CHANIPR(idx)); 191 191 192 - for_each_set_bit(pos, &irqstat, 32) { 193 - virq = irq_find_mapping(irqchip_data->domain, pos); 194 - if (virq) 195 - generic_handle_irq(virq); 196 - } 192 + for_each_set_bit(pos, &irqstat, 32) 193 + generic_handle_domain_irq(irqchip_data->domain, pos); 197 194 198 195 chained_irq_exit(irq_desc_get_chip(desc), desc); 199 196 }
+3 -6
drivers/irqchip/irq-imx-irqsteer.c
··· 122 122 for (i = 0; i < 2; i++, hwirq += 32) { 123 123 int idx = imx_irqsteer_get_reg_index(data, hwirq); 124 124 unsigned long irqmap; 125 - int pos, virq; 125 + int pos; 126 126 127 127 if (hwirq >= data->reg_num * 32) 128 128 break; ··· 130 130 irqmap = readl_relaxed(data->regs + 131 131 CHANSTATUS(idx, data->reg_num)); 132 132 133 - for_each_set_bit(pos, &irqmap, 32) { 134 - virq = irq_find_mapping(data->domain, pos + hwirq); 135 - if (virq) 136 - generic_handle_irq(virq); 137 - } 133 + for_each_set_bit(pos, &irqmap, 32) 134 + generic_handle_domain_irq(data->domain, pos + hwirq); 138 135 } 139 136 140 137 chained_irq_exit(irq_desc_get_chip(desc), desc);
+1 -1
drivers/irqchip/irq-ingenic-tcu.c
··· 38 38 irq_reg &= ~irq_mask; 39 39 40 40 for_each_set_bit(i, (unsigned long *)&irq_reg, 32) 41 - generic_handle_irq(irq_linear_revmap(domain, i)); 41 + generic_handle_domain_irq(domain, i); 42 42 43 43 chained_irq_exit(irq_chip, desc); 44 44 }
+1 -2
drivers/irqchip/irq-ingenic.c
··· 49 49 while (pending) { 50 50 int bit = __fls(pending); 51 51 52 - irq = irq_linear_revmap(domain, bit + (i * 32)); 53 - generic_handle_irq(irq); 52 + generic_handle_domain_irq(domain, bit + (i * 32)); 54 53 pending &= ~BIT(bit); 55 54 } 56 55 }
+6 -8
drivers/irqchip/irq-keystone.c
··· 89 89 struct keystone_irq_device *kirq = keystone_irq; 90 90 unsigned long wa_lock_flags; 91 91 unsigned long pending; 92 - int src, virq; 92 + int src, err; 93 93 94 94 dev_dbg(kirq->dev, "start irq %d\n", irq); 95 95 ··· 104 104 105 105 for (src = 0; src < KEYSTONE_N_IRQ; src++) { 106 106 if (BIT(src) & pending) { 107 - virq = irq_find_mapping(kirq->irqd, src); 108 - dev_dbg(kirq->dev, "dispatch bit %d, virq %d\n", 109 - src, virq); 110 - if (!virq) 111 - dev_warn(kirq->dev, "spurious irq detected hwirq %d, virq %d\n", 112 - src, virq); 113 107 raw_spin_lock_irqsave(&kirq->wa_lock, wa_lock_flags); 114 - generic_handle_irq(virq); 108 + err = generic_handle_domain_irq(kirq->irqd, src); 115 109 raw_spin_unlock_irqrestore(&kirq->wa_lock, 116 110 wa_lock_flags); 111 + 112 + if (err) 113 + dev_warn_ratelimited(kirq->dev, "spurious irq detected hwirq %d\n", 114 + src); 117 115 } 118 116 } 119 117
+1 -1
drivers/irqchip/irq-loongson-htpic.c
··· 48 48 break; 49 49 } 50 50 51 - generic_handle_irq(irq_linear_revmap(priv->domain, bit)); 51 + generic_handle_domain_irq(priv->domain, bit); 52 52 pending &= ~BIT(bit); 53 53 } 54 54 chained_irq_exit(chip, desc);
+2 -2
drivers/irqchip/irq-loongson-htvec.c
··· 47 47 while (pending) { 48 48 int bit = __ffs(pending); 49 49 50 - generic_handle_irq(irq_linear_revmap(priv->htvec_domain, bit + 51 - VEC_COUNT_PER_REG * i)); 50 + generic_handle_domain_irq(priv->htvec_domain, 51 + bit + VEC_COUNT_PER_REG * i); 52 52 pending &= ~BIT(bit); 53 53 handled = true; 54 54 }
+1 -1
drivers/irqchip/irq-loongson-liointc.c
··· 73 73 while (pending) { 74 74 int bit = __ffs(pending); 75 75 76 - generic_handle_irq(irq_find_mapping(gc->domain, bit)); 76 + generic_handle_domain_irq(gc->domain, bit); 77 77 pending &= ~BIT(bit); 78 78 } 79 79
+1 -1
drivers/irqchip/irq-lpc32xx.c
··· 141 141 while (hwirq) { 142 142 irq = __ffs(hwirq); 143 143 hwirq &= ~BIT(irq); 144 - generic_handle_irq(irq_find_mapping(ic->domain, irq)); 144 + generic_handle_domain_irq(ic->domain, irq); 145 145 } 146 146 147 147 chained_irq_exit(chip, desc);
+2 -4
drivers/irqchip/irq-ls-scfg-msi.c
··· 194 194 struct ls_scfg_msir *msir = irq_desc_get_handler_data(desc); 195 195 struct ls_scfg_msi *msi_data = msir->msi_data; 196 196 unsigned long val; 197 - int pos, size, virq, hwirq; 197 + int pos, size, hwirq; 198 198 199 199 chained_irq_enter(irq_desc_get_chip(desc), desc); 200 200 ··· 206 206 for_each_set_bit_from(pos, &val, size) { 207 207 hwirq = ((msir->bit_end - pos) << msi_data->cfg->ibs_shift) | 208 208 msir->srs; 209 - virq = irq_find_mapping(msi_data->parent, hwirq); 210 - if (virq) 211 - generic_handle_irq(virq); 209 + generic_handle_domain_irq(msi_data->parent, hwirq); 212 210 } 213 211 214 212 chained_irq_exit(irq_desc_get_chip(desc), desc);
+1 -1
drivers/irqchip/irq-ls1x.c
··· 50 50 while (pending) { 51 51 int bit = __ffs(pending); 52 52 53 - generic_handle_irq(irq_find_mapping(priv->domain, bit)); 53 + generic_handle_domain_irq(priv->domain, bit); 54 54 pending &= ~BIT(bit); 55 55 } 56 56
+10 -10
drivers/irqchip/irq-mips-gic.c
··· 148 148 149 149 static void gic_handle_shared_int(bool chained) 150 150 { 151 - unsigned int intr, virq; 151 + unsigned int intr; 152 152 unsigned long *pcpu_mask; 153 153 DECLARE_BITMAP(pending, GIC_MAX_INTRS); 154 154 ··· 165 165 bitmap_and(pending, pending, pcpu_mask, gic_shared_intrs); 166 166 167 167 for_each_set_bit(intr, pending, gic_shared_intrs) { 168 - virq = irq_linear_revmap(gic_irq_domain, 169 - GIC_SHARED_TO_HWIRQ(intr)); 170 168 if (chained) 171 - generic_handle_irq(virq); 169 + generic_handle_domain_irq(gic_irq_domain, 170 + GIC_SHARED_TO_HWIRQ(intr)); 172 171 else 173 - do_IRQ(virq); 172 + do_IRQ(irq_find_mapping(gic_irq_domain, 173 + GIC_SHARED_TO_HWIRQ(intr))); 174 174 } 175 175 } 176 176 ··· 308 308 static void gic_handle_local_int(bool chained) 309 309 { 310 310 unsigned long pending, masked; 311 - unsigned int intr, virq; 311 + unsigned int intr; 312 312 313 313 pending = read_gic_vl_pend(); 314 314 masked = read_gic_vl_mask(); ··· 316 316 bitmap_and(&pending, &pending, &masked, GIC_NUM_LOCAL_INTRS); 317 317 318 318 for_each_set_bit(intr, &pending, GIC_NUM_LOCAL_INTRS) { 319 - virq = irq_linear_revmap(gic_irq_domain, 320 - GIC_LOCAL_TO_HWIRQ(intr)); 321 319 if (chained) 322 - generic_handle_irq(virq); 320 + generic_handle_domain_irq(gic_irq_domain, 321 + GIC_LOCAL_TO_HWIRQ(intr)); 323 322 else 324 - do_IRQ(virq); 323 + do_IRQ(irq_find_mapping(gic_irq_domain, 324 + GIC_LOCAL_TO_HWIRQ(intr))); 325 325 } 326 326 } 327 327
+1 -1
drivers/irqchip/irq-mscc-ocelot.c
··· 107 107 while (reg) { 108 108 u32 hwirq = __fls(reg); 109 109 110 - generic_handle_irq(irq_find_mapping(d, hwirq)); 110 + generic_handle_domain_irq(d, hwirq); 111 111 reg &= ~(BIT(hwirq)); 112 112 } 113 113
+2 -5
drivers/irqchip/irq-mvebu-pic.c
··· 91 91 struct mvebu_pic *pic = irq_desc_get_handler_data(desc); 92 92 struct irq_chip *chip = irq_desc_get_chip(desc); 93 93 unsigned long irqmap, irqn; 94 - unsigned int cascade_irq; 95 94 96 95 irqmap = readl_relaxed(pic->base + PIC_CAUSE); 97 96 chained_irq_enter(chip, desc); 98 97 99 - for_each_set_bit(irqn, &irqmap, BITS_PER_LONG) { 100 - cascade_irq = irq_find_mapping(pic->domain, irqn); 101 - generic_handle_irq(cascade_irq); 102 - } 98 + for_each_set_bit(irqn, &irqmap, BITS_PER_LONG) 99 + generic_handle_domain_irq(pic->domain, irqn); 103 100 104 101 chained_irq_exit(chip, desc); 105 102 }
+4 -9
drivers/irqchip/irq-mvebu-sei.c
··· 337 337 irqmap = readl_relaxed(sei->base + GICP_SECR(idx)); 338 338 for_each_set_bit(bit, &irqmap, SEI_IRQ_COUNT_PER_REG) { 339 339 unsigned long hwirq; 340 - unsigned int virq; 340 + int err; 341 341 342 342 hwirq = idx * SEI_IRQ_COUNT_PER_REG + bit; 343 - virq = irq_find_mapping(sei->sei_domain, hwirq); 344 - if (likely(virq)) { 345 - generic_handle_irq(virq); 346 - continue; 347 - } 348 - 349 - dev_warn(sei->dev, 350 - "Spurious IRQ detected (hwirq %lu)\n", hwirq); 343 + err = generic_handle_domain_irq(sei->sei_domain, hwirq); 344 + if (unlikely(err)) 345 + dev_warn(sei->dev, "Spurious IRQ detected (hwirq %lu)\n", hwirq); 351 346 } 352 347 } 353 348
+1 -1
drivers/irqchip/irq-orion.c
··· 117 117 while (stat) { 118 118 u32 hwirq = __fls(stat); 119 119 120 - generic_handle_irq(irq_find_mapping(d, gc->irq_base + hwirq)); 120 + generic_handle_domain_irq(d, gc->irq_base + hwirq); 121 121 stat &= ~(1 << hwirq); 122 122 } 123 123 }
+3 -6
drivers/irqchip/irq-partition-percpu.c
··· 124 124 break; 125 125 } 126 126 127 - if (unlikely(hwirq == part->nr_parts)) { 127 + if (unlikely(hwirq == part->nr_parts)) 128 128 handle_bad_irq(desc); 129 - } else { 130 - unsigned int irq; 131 - irq = irq_find_mapping(part->domain, hwirq); 132 - generic_handle_irq(irq); 133 - } 129 + else 130 + generic_handle_domain_irq(part->domain, hwirq); 134 131 135 132 chained_irq_exit(chip, desc); 136 133 }
+3 -6
drivers/irqchip/irq-pruss-intc.c
··· 488 488 489 489 while (true) { 490 490 u32 hipir; 491 - unsigned int virq; 492 - int hwirq; 491 + int hwirq, err; 493 492 494 493 /* get highest priority pending PRUSS system event */ 495 494 hipir = pruss_intc_read_reg(intc, PRU_INTC_HIPIR(host_irq)); ··· 496 497 break; 497 498 498 499 hwirq = hipir & GENMASK(9, 0); 499 - virq = irq_find_mapping(intc->domain, hwirq); 500 + err = generic_handle_domain_irq(intc->domain, hwirq); 500 501 501 502 /* 502 503 * NOTE: manually ACK any system events that do not have a 503 504 * handler mapped yet 504 505 */ 505 - if (WARN_ON_ONCE(!virq)) 506 + if (WARN_ON_ONCE(err)) 506 507 pruss_intc_write_reg(intc, PRU_INTC_SICR, hwirq); 507 - else 508 - generic_handle_irq(virq); 509 508 } 510 509 511 510 chained_irq_exit(chip, desc);
+1 -1
drivers/irqchip/irq-realtek-rtl.c
··· 85 85 goto out; 86 86 } 87 87 domain = irq_desc_get_handler_data(desc); 88 - generic_handle_irq(irq_find_mapping(domain, __ffs(pending))); 88 + generic_handle_domain_irq(domain, __ffs(pending)); 89 89 90 90 out: 91 91 chained_irq_exit(chip, desc);
+1 -1
drivers/irqchip/irq-renesas-irqc.c
··· 115 115 if (ioread32(p->iomem + DETECT_STATUS) & bit) { 116 116 iowrite32(bit, p->iomem + DETECT_STATUS); 117 117 irqc_dbg(i, "demux2"); 118 - generic_handle_irq(irq_find_mapping(p->irq_domain, i->hw_irq)); 118 + generic_handle_domain_irq(p->irq_domain, i->hw_irq); 119 119 return IRQ_HANDLED; 120 120 } 121 121 return IRQ_NONE;
+3 -5
drivers/irqchip/irq-sifive-plic.c
··· 233 233 chained_irq_enter(chip, desc); 234 234 235 235 while ((hwirq = readl(claim))) { 236 - int irq = irq_find_mapping(handler->priv->irqdomain, hwirq); 237 - 238 - if (unlikely(irq <= 0)) 236 + int err = generic_handle_domain_irq(handler->priv->irqdomain, 237 + hwirq); 238 + if (unlikely(err)) 239 239 pr_warn_ratelimited("can't find mapping for hwirq %lu\n", 240 240 hwirq); 241 - else 242 - generic_handle_irq(irq); 243 241 } 244 242 245 243 chained_irq_exit(chip, desc);
+4 -6
drivers/irqchip/irq-stm32-exti.c
··· 257 257 { 258 258 struct irq_domain *domain = irq_desc_get_handler_data(desc); 259 259 struct irq_chip *chip = irq_desc_get_chip(desc); 260 - unsigned int virq, nbanks = domain->gc->num_chips; 260 + unsigned int nbanks = domain->gc->num_chips; 261 261 struct irq_chip_generic *gc; 262 262 unsigned long pending; 263 263 int n, i, irq_base = 0; ··· 268 268 gc = irq_get_domain_generic_chip(domain, irq_base); 269 269 270 270 while ((pending = stm32_exti_pending(gc))) { 271 - for_each_set_bit(n, &pending, IRQS_PER_BANK) { 272 - virq = irq_find_mapping(domain, irq_base + n); 273 - generic_handle_irq(virq); 274 - } 275 - } 271 + for_each_set_bit(n, &pending, IRQS_PER_BANK) 272 + generic_handle_domain_irq(domain, irq_base + n); 273 + } 276 274 } 277 275 278 276 chained_irq_exit(chip, desc);
+1 -2
drivers/irqchip/irq-sunxi-nmi.c
··· 88 88 { 89 89 struct irq_domain *domain = irq_desc_get_handler_data(desc); 90 90 struct irq_chip *chip = irq_desc_get_chip(desc); 91 - unsigned int virq = irq_find_mapping(domain, 0); 92 91 93 92 chained_irq_enter(chip, desc); 94 - generic_handle_irq(virq); 93 + generic_handle_domain_irq(domain, 0); 95 94 chained_irq_exit(chip, desc); 96 95 } 97 96
+1 -1
drivers/irqchip/irq-tb10x.c
··· 91 91 struct irq_domain *domain = irq_desc_get_handler_data(desc); 92 92 unsigned int irq = irq_desc_get_irq(desc); 93 93 94 - generic_handle_irq(irq_find_mapping(domain, irq)); 94 + generic_handle_domain_irq(domain, irq); 95 95 } 96 96 97 97 static int __init of_tb10x_init_irq(struct device_node *ictl,
+3 -6
drivers/irqchip/irq-ti-sci-inta.c
··· 147 147 struct ti_sci_inta_vint_desc *vint_desc; 148 148 struct ti_sci_inta_irq_domain *inta; 149 149 struct irq_domain *domain; 150 - unsigned int virq, bit; 150 + unsigned int bit; 151 151 unsigned long val; 152 152 153 153 vint_desc = irq_desc_get_handler_data(desc); ··· 159 159 val = readq_relaxed(inta->base + vint_desc->vint_id * 0x1000 + 160 160 VINT_STATUS_MASKED_OFFSET); 161 161 162 - for_each_set_bit(bit, &val, MAX_EVENTS_PER_VINT) { 163 - virq = irq_find_mapping(domain, vint_desc->events[bit].hwirq); 164 - if (virq) 165 - generic_handle_irq(virq); 166 - } 162 + for_each_set_bit(bit, &val, MAX_EVENTS_PER_VINT) 163 + generic_handle_domain_irq(domain, vint_desc->events[bit].hwirq); 167 164 168 165 chained_irq_exit(irq_desc_get_chip(desc), desc); 169 166 }
+1 -2
drivers/irqchip/irq-ts4800.c
··· 79 79 80 80 do { 81 81 unsigned int bit = __ffs(status); 82 - int irq = irq_find_mapping(data->domain, bit); 83 82 83 + generic_handle_domain_irq(data->domain, bit); 84 84 status &= ~(1 << bit); 85 - generic_handle_irq(irq); 86 85 } while (status); 87 86 88 87 out:
+1 -1
drivers/irqchip/irq-versatile-fpga.c
··· 85 85 unsigned int irq = ffs(status) - 1; 86 86 87 87 status &= ~(1 << irq); 88 - generic_handle_irq(irq_find_mapping(f->domain, irq)); 88 + generic_handle_domain_irq(f->domain, irq); 89 89 } while (status); 90 90 91 91 out:
+1 -1
drivers/irqchip/irq-vic.c
··· 225 225 226 226 while ((stat = readl_relaxed(vic->base + VIC_IRQ_STATUS))) { 227 227 hwirq = ffs(stat) - 1; 228 - generic_handle_irq(irq_find_mapping(vic->domain, hwirq)); 228 + generic_handle_domain_irq(vic->domain, hwirq); 229 229 } 230 230 231 231 chained_irq_exit(host_chip, desc);
+5 -18
drivers/irqchip/irq-xilinx-intc.c
··· 110 110 .irq_mask_ack = intc_mask_ack, 111 111 }; 112 112 113 - static unsigned int xintc_get_irq_local(struct xintc_irq_chip *irqc) 114 - { 115 - unsigned int irq = 0; 116 - u32 hwirq; 117 - 118 - hwirq = xintc_read(irqc, IVR); 119 - if (hwirq != -1U) 120 - irq = irq_find_mapping(irqc->root_domain, hwirq); 121 - 122 - pr_debug("irq-xilinx: hwirq=%d, irq=%d\n", hwirq, irq); 123 - 124 - return irq; 125 - } 126 - 127 113 unsigned int xintc_get_irq(void) 128 114 { 129 115 unsigned int irq = -1; ··· 150 164 { 151 165 struct irq_chip *chip = irq_desc_get_chip(desc); 152 166 struct xintc_irq_chip *irqc; 153 - u32 pending; 154 167 155 168 irqc = irq_data_get_irq_handler_data(&desc->irq_data); 156 169 chained_irq_enter(chip, desc); 157 170 do { 158 - pending = xintc_get_irq_local(irqc); 159 - if (pending == 0) 171 + u32 hwirq = xintc_read(irqc, IVR); 172 + 173 + if (hwirq == -1U) 160 174 break; 161 - generic_handle_irq(pending); 175 + 176 + generic_handle_domain_irq(irqc->root_domain, hwirq); 162 177 } while (true); 163 178 chained_irq_exit(chip, desc); 164 179 }
+1 -5
drivers/irqchip/qcom-irq-combiner.c
··· 53 53 chained_irq_enter(chip, desc); 54 54 55 55 for (reg = 0; reg < combiner->nregs; reg++) { 56 - int virq; 57 56 int hwirq; 58 57 u32 bit; 59 58 u32 status; ··· 69 70 bit = __ffs(status); 70 71 status &= ~(1 << bit); 71 72 hwirq = irq_nr(reg, bit); 72 - virq = irq_find_mapping(combiner->domain, hwirq); 73 - if (virq > 0) 74 - generic_handle_irq(virq); 75 - 73 + generic_handle_domain_irq(combiner->domain, hwirq); 76 74 } 77 75 } 78 76