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kernel os linux

cpufreq: intel_pstate: ITMT support for overclocked system

On systems with overclocking enabled, CPPC Highest Performance can be
hard coded to 0xff. In this case even if we have cores with different
highest performance, ITMT can't be enabled as the current implementation
depends on CPPC Highest Performance.

On such systems we can use MSR_HWP_CAPABILITIES maximum performance field
when CPPC.Highest Performance is 0xff.

Due to legacy reasons, we can't solely depend on MSR_HWP_CAPABILITIES as
in some older systems CPPC Highest Performance is the only way to identify
different performing cores.

Reported-by: Michael Larabel <Michael@MichaelLarabel.com>
Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
Tested-by: Michael Larabel <Michael@MichaelLarabel.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>

authored by

Srinivas Pandruvada and committed by
Rafael J. Wysocki
03c83982 ed38eb49

+10
+10
drivers/cpufreq/intel_pstate.c
··· 338 338 339 339 static DECLARE_WORK(sched_itmt_work, intel_pstste_sched_itmt_work_fn); 340 340 341 + #define CPPC_MAX_PERF U8_MAX 342 + 341 343 static void intel_pstate_set_itmt_prio(int cpu) 342 344 { 343 345 struct cppc_perf_caps cppc_perf; ··· 349 347 ret = cppc_get_perf_caps(cpu, &cppc_perf); 350 348 if (ret) 351 349 return; 350 + 351 + /* 352 + * On some systems with overclocking enabled, CPPC.highest_perf is hardcoded to 0xff. 353 + * In this case we can't use CPPC.highest_perf to enable ITMT. 354 + * In this case we can look at MSR_HWP_CAPABILITIES bits [8:0] to decide. 355 + */ 356 + if (cppc_perf.highest_perf == CPPC_MAX_PERF) 357 + cppc_perf.highest_perf = HWP_HIGHEST_PERF(READ_ONCE(all_cpu_data[cpu]->hwp_cap_cached)); 352 358 353 359 /* 354 360 * The priorities can be set regardless of whether or not