···615615 case CDC_A_TX_2_EN:616616 snd_soc_update_bits(codec, CDC_A_MICB_1_CTL,617617 MICB_1_CTL_CFILT_REF_SEL_MASK, 0);618618+ /* fall through */618619 case CDC_A_TX_3_EN:619620 snd_soc_update_bits(codec, CDC_D_CDC_CONN_TX2_CTL,620621 CONN_TX2_SERIAL_TX2_MUX,
+1
sound/soc/codecs/tlv320aic23.c
···454454 break;455455 case SND_SOC_DAIFMT_DSP_A:456456 iface_reg |= TLV320AIC23_LRP_ON;457457+ /* fall through */457458 case SND_SOC_DAIFMT_DSP_B:458459 iface_reg |= TLV320AIC23_FOR_DSP;459460 break;
+1-1
sound/soc/codecs/tlv320aic31xx.c
···929929 case SND_SOC_DAIFMT_I2S:930930 break;931931 case SND_SOC_DAIFMT_DSP_A:932932- dsp_a_val = 0x1;932932+ dsp_a_val = 0x1; /* fall through */933933 case SND_SOC_DAIFMT_DSP_B:934934 /* NOTE: BCLKINV bit value 1 equas NB and 0 equals IB */935935 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
+1
sound/soc/codecs/tpa6130a2.c
···274274 default:275275 dev_warn(dev, "Unknown TPA model (%d). Assuming 6130A2\n",276276 data->id);277277+ /* fall through */277278 case TPA6130A2:278279 regulator = "Vdd";279280 break;
+2-2
sound/soc/codecs/wm8753.c
···971971 case SND_SOC_DAIFMT_CBS_CFS:972972 break;973973 case SND_SOC_DAIFMT_CBM_CFM:974974- ioctl |= 0x2;974974+ ioctl |= 0x2; /* fall through */975975 case SND_SOC_DAIFMT_CBM_CFS:976976 voice |= 0x0040;977977 break;···10961096 case SND_SOC_DAIFMT_CBS_CFS:10971097 break;10981098 case SND_SOC_DAIFMT_CBM_CFM:10991099- ioctl |= 0x1;10991099+ ioctl |= 0x1; /* fall through */11001100 case SND_SOC_DAIFMT_CBM_CFS:11011101 hifi |= 0x0040;11021102 break;
+2
sound/soc/codecs/wm8993.c
···10761076 switch (clk_id) {10771077 case WM8993_SYSCLK_MCLK:10781078 wm8993->mclk_rate = freq;10791079+ /* fall through */10791080 case WM8993_SYSCLK_FLL:10801081 wm8993->sysclk_source = clk_id;10811082 break;···11241123 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {11251124 case SND_SOC_DAIFMT_DSP_B:11261125 aif1 |= WM8993_AIF_LRCLK_INV;11261126+ /* fall through */11271127 case SND_SOC_DAIFMT_DSP_A:11281128 aif1 |= 0x18;11291129 break;
+2
sound/soc/codecs/wm8994.c
···860860 switch (wm8994->vmid_mode) {861861 default:862862 WARN_ON(NULL == "Invalid VMID mode");863863+ /* fall through */863864 case WM8994_VMID_NORMAL:864865 /* Startup bias, VMID ramp & buffer */865866 snd_soc_update_bits(codec, WM8994_ANTIPOP_2,···26552654 case SND_SOC_DAIFMT_DSP_B:26562655 aif1 |= WM8994_AIF1_LRCLK_INV;26572656 lrclk |= WM8958_AIF1_LRCLK_INV;26572657+ /* fall through */26582658 case SND_SOC_DAIFMT_DSP_A:26592659 aif1 |= 0x18;26602660 break;
+2-2
sound/soc/dwc/Kconfig
···44 select SND_SOC_GENERIC_DMAENGINE_PCM55 help66 Say Y or M if you want to add support for I2S driver for77- Synopsys desigwnware I2S device. The device supports upto88- maximum of 8 channels each for play and record.77+ Synopsys designware I2S device. The device supports up to88+ a maximum of 8 channels each for play and record.991010config SND_DESIGNWARE_PCM1111 bool "PCM PIO extension for I2S driver"
+9-5
sound/soc/fsl/fsl-asoc-card.c
···166166 ret = snd_soc_dai_set_sysclk(rtd->cpu_dai, cpu_priv->sysclk_id[tx],167167 cpu_priv->sysclk_freq[tx],168168 cpu_priv->sysclk_dir[tx]);169169- if (ret) {169169+ if (ret && ret != -ENOTSUPP) {170170 dev_err(dev, "failed to set sysclk for cpu dai\n");171171 return ret;172172 }···174174 if (cpu_priv->slot_width) {175175 ret = snd_soc_dai_set_tdm_slot(rtd->cpu_dai, 0x3, 0x3, 2,176176 cpu_priv->slot_width);177177- if (ret) {177177+ if (ret && ret != -ENOTSUPP) {178178 dev_err(dev, "failed to set TDM slot for cpu dai\n");179179 return ret;180180 }···270270271271 ret = snd_soc_dai_set_sysclk(codec_dai, codec_priv->fll_id,272272 pll_out, SND_SOC_CLOCK_IN);273273- if (ret) {273273+ if (ret && ret != -ENOTSUPP) {274274 dev_err(dev, "failed to set SYSCLK: %d\n", ret);275275 return ret;276276 }···283283 ret = snd_soc_dai_set_sysclk(codec_dai, codec_priv->mclk_id,284284 codec_priv->mclk_freq,285285 SND_SOC_CLOCK_IN);286286- if (ret) {286286+ if (ret && ret != -ENOTSUPP) {287287 dev_err(dev, "failed to switch away from FLL: %d\n", ret);288288 return ret;289289 }···459459460460 ret = snd_soc_dai_set_sysclk(codec_dai, codec_priv->mclk_id,461461 codec_priv->mclk_freq, SND_SOC_CLOCK_IN);462462- if (ret) {462462+ if (ret && ret != -ENOTSUPP) {463463 dev_err(dev, "failed to set sysclk in %s\n", __func__);464464 return ret;465465 }···639639 devm_kasprintf(&pdev->dev, GFP_KERNEL,640640 "ac97-codec.%u",641641 (unsigned int)idx);642642+ if (!priv->dai_link[0].codec_name) {643643+ ret = -ENOMEM;644644+ goto asrc_fail;645645+ }642646 }643647644648 priv->dai_link[0].platform_of_node = cpu_np;
···197197 * @use_dma: DMA is used or FIQ with stream filter198198 * @use_dual_fifo: DMA with support for both FIFOs used199199 * @fifo_deph: Depth of the SSI FIFOs200200+ * @slot_width: width of each DAI slot201201+ * @slots: number of slots200202 * @rxtx_reg_val: Specific register settings for receive/transmit configuration201203 *202204 * @clk: SSI clock203205 * @baudclk: SSI baud clock for master mode204206 * @baudclk_streams: Active streams that are using baudclk205205- * @bitclk_freq: bitclock frequency set by .set_dai_sysclk206207 *207208 * @dma_params_tx: DMA transmit parameters208209 * @dma_params_rx: DMA receive parameters···234233 bool use_dual_fifo;235234 bool has_ipg_clk_name;236235 unsigned int fifo_depth;236236+ unsigned int slot_width;237237+ unsigned int slots;237238 struct fsl_ssi_rxtx_reg_val rxtx_reg_val;238239239240 struct clk *clk;240241 struct clk *baudclk;241242 unsigned int baudclk_streams;242242- unsigned int bitclk_freq;243243244244 /* regcache for volatile regs */245245 u32 regcache_sfcsr;···702700 * Note: This function can be only called when using SSI as DAI master703701 *704702 * Quick instruction for parameters:705705- * freq: Output BCLK frequency = samplerate * 32 (fixed) * channels706706- * dir: SND_SOC_CLOCK_OUT -> TxBCLK, SND_SOC_CLOCK_IN -> RxBCLK.703703+ * freq: Output BCLK frequency = samplerate * slots * slot_width704704+ * (In 2-channel I2S Master mode, slot_width is fixed 32)707705 */708706static int fsl_ssi_set_bclk(struct snd_pcm_substream *substream,709707 struct snd_soc_dai *cpu_dai,···714712 int synchronous = ssi_private->cpu_dai_drv.symmetric_rates, ret;715713 u32 pm = 999, div2, psr, stccr, mask, afreq, factor, i;716714 unsigned long clkrate, baudrate, tmprate;715715+ unsigned int slots = params_channels(hw_params);716716+ unsigned int slot_width = 32;717717 u64 sub, savesub = 100000;718718 unsigned int freq;719719 bool baudclk_is_used;720720721721- /* Prefer the explicitly set bitclock frequency */722722- if (ssi_private->bitclk_freq)723723- freq = ssi_private->bitclk_freq;724724- else725725- freq = params_channels(hw_params) * 32 * params_rate(hw_params);721721+ /* Override slots and slot_width if being specifically set... */722722+ if (ssi_private->slots)723723+ slots = ssi_private->slots;724724+ /* ...but keep 32 bits if slots is 2 -- I2S Master mode */725725+ if (ssi_private->slot_width && slots != 2)726726+ slot_width = ssi_private->slot_width;727727+728728+ /* Generate bit clock based on the slot number and slot width */729729+ freq = slots * slot_width * params_rate(hw_params);726730727731 /* Don't apply it to any non-baudclk circumstance */728732 if (IS_ERR(ssi_private->baudclk))···809801 return -EINVAL;810802 }811803 }812812-813813- return 0;814814-}815815-816816-static int fsl_ssi_set_dai_sysclk(struct snd_soc_dai *cpu_dai,817817- int clk_id, unsigned int freq, int dir)818818-{819819- struct fsl_ssi_private *ssi_private = snd_soc_dai_get_drvdata(cpu_dai);820820-821821- ssi_private->bitclk_freq = freq;822804823805 return 0;824806}···10931095 struct regmap *regs = ssi_private->regs;10941096 u32 val;1095109710981098+ /* The word length should be 8, 10, 12, 16, 18, 20, 22 or 24 */10991099+ if (slot_width & 1 || slot_width < 8 || slot_width > 24) {11001100+ dev_err(cpu_dai->dev, "invalid slot width: %d\n", slot_width);11011101+ return -EINVAL;11021102+ }11031103+10961104 /* The slot number should be >= 2 if using Network mode or I2S mode */10971105 regmap_read(regs, CCSR_SSI_SCR, &val);10981106 val &= CCSR_SSI_SCR_I2S_MODE_MASK | CCSR_SSI_SCR_NET;···11241120 regmap_write(regs, CCSR_SSI_SRMSK, ~rx_mask);1125112111261122 regmap_update_bits(regs, CCSR_SSI_SCR, CCSR_SSI_SCR_SSIEN, val);11231123+11241124+ ssi_private->slot_width = slot_width;11251125+ ssi_private->slots = slots;1127112611281127 return 0;11291128}···11981191 .hw_params = fsl_ssi_hw_params,11991192 .hw_free = fsl_ssi_hw_free,12001193 .set_fmt = fsl_ssi_set_dai_fmt,12011201- .set_sysclk = fsl_ssi_set_dai_sysclk,12021194 .set_tdm_slot = fsl_ssi_set_dai_tdm_slot,12031195 .trigger = fsl_ssi_trigger,12041196};
+39-8
sound/soc/generic/audio-graph-card.c
···2929 struct graph_dai_props {3030 struct asoc_simple_dai cpu_dai;3131 struct asoc_simple_dai codec_dai;3232+ unsigned int mclk_fs;3233 } *dai_props;3434+ unsigned int mclk_fs;3335 struct snd_soc_dai_link *dai_link;3436 struct gpio_desc *pa_gpio;3537};···9795 asoc_simple_card_clk_disable(&dai_props->codec_dai);9896}99979898+static int asoc_graph_card_hw_params(struct snd_pcm_substream *substream,9999+ struct snd_pcm_hw_params *params)100100+{101101+ struct snd_soc_pcm_runtime *rtd = substream->private_data;102102+ struct snd_soc_dai *codec_dai = rtd->codec_dai;103103+ struct snd_soc_dai *cpu_dai = rtd->cpu_dai;104104+ struct graph_card_data *priv = snd_soc_card_get_drvdata(rtd->card);105105+ struct graph_dai_props *dai_props = graph_priv_to_props(priv, rtd->num);106106+ unsigned int mclk, mclk_fs = 0;107107+ int ret = 0;108108+109109+ if (priv->mclk_fs)110110+ mclk_fs = priv->mclk_fs;111111+ else if (dai_props->mclk_fs)112112+ mclk_fs = dai_props->mclk_fs;113113+114114+ if (mclk_fs) {115115+ mclk = params_rate(params) * mclk_fs;116116+ ret = snd_soc_dai_set_sysclk(codec_dai, 0, mclk,117117+ SND_SOC_CLOCK_IN);118118+ if (ret && ret != -ENOTSUPP)119119+ goto err;120120+121121+ ret = snd_soc_dai_set_sysclk(cpu_dai, 0, mclk,122122+ SND_SOC_CLOCK_OUT);123123+ if (ret && ret != -ENOTSUPP)124124+ goto err;125125+ }126126+ return 0;127127+err:128128+ return ret;129129+}130130+100131static const struct snd_soc_ops asoc_graph_card_ops = {101132 .startup = asoc_graph_card_startup,102133 .shutdown = asoc_graph_card_shutdown,134134+ .hw_params = asoc_graph_card_hw_params,103135};104136105137static int asoc_graph_card_dai_init(struct snd_soc_pcm_runtime *rtd)···182146 if (ret < 0)183147 goto dai_link_of_err;184148185185- /*186186- * we need to consider "mclk-fs" around here187187- * see simple-card188188- */149149+ of_property_read_u32(rcpu_ep, "mclk-fs", &dai_props->mclk_fs);189150190151 ret = asoc_simple_card_parse_graph_cpu(cpu_ep, dai_link);191152 if (ret < 0)···250217 if (ret < 0)251218 return ret;252219253253- /*254254- * we need to consider "mclk-fs" around here255255- * see simple-card256256- */220220+ /* Factor to mclk, used in hw_params() */221221+ of_property_read_u32(node, "mclk-fs", &priv->mclk_fs);257222258223 of_for_each_phandle(&it, rc, node, "dais", NULL, 0) {259224 ret = asoc_graph_card_dai_link_of(it.node, priv, idx++);