Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

drm/amd/display: Adjust functions prefix for some of the dcn301 fpu functions

Add dcn301_fpu prefix to some of the FPU function with the required
adjustments.

Acked-by: Wayne Lin <wayne.lin@amd.com>
Signed-off-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

authored by

Rodrigo Siqueira and committed by
Alex Deucher
033656af b9f5fcef

+18 -12
+2 -2
drivers/gpu/drm/amd/display/dc/dml/dcn301/dcn301_fpu.c
··· 320 320 321 321 } 322 322 323 - void dcn301_update_bw_bounding_box(struct dc *dc, struct clk_bw_params *bw_params) 323 + void dcn301_fpu_update_bw_bounding_box(struct dc *dc, struct clk_bw_params *bw_params) 324 324 { 325 325 struct _vcs_dpi_voltage_scaling_st *s = dc->scratch.update_bw_bounding_box.clock_limits; 326 326 struct dcn301_resource_pool *pool = TO_DCN301_RES_POOL(dc->res_pool); ··· 409 409 dcn3_01_soc.sr_exit_time_us = bb_info.dram_sr_exit_latency_100ns * 10; 410 410 } 411 411 412 - void dcn301_calculate_wm_and_dlg_fp(struct dc *dc, 412 + void dcn301_fpu_calculate_wm_and_dlg(struct dc *dc, 413 413 struct dc_state *context, 414 414 display_e2e_pipe_params_st *pipes, 415 415 int pipe_cnt,
+3 -4
drivers/gpu/drm/amd/display/dc/dml/dcn301/dcn301_fpu.h
··· 26 26 #ifndef __DCN301_FPU_H__ 27 27 #define __DCN301_FPU_H__ 28 28 29 - void dcn301_update_bw_bounding_box(struct dc *dc, struct clk_bw_params *bw_params); 29 + void dcn301_fpu_init_soc_bounding_box(struct bp_soc_bb_info bb_info); 30 + void dcn301_fpu_update_bw_bounding_box(struct dc *dc, struct clk_bw_params *bw_params); 30 31 31 32 void dcn301_fpu_set_wm_ranges(int i, 32 33 struct pp_smu_wm_range_sets *ranges, 33 34 struct _vcs_dpi_soc_bounding_box_st *loaded_bb); 34 35 35 - void dcn301_fpu_init_soc_bounding_box(struct bp_soc_bb_info bb_info); 36 - 37 - void dcn301_calculate_wm_and_dlg_fp(struct dc *dc, 36 + void dcn301_fpu_calculate_wm_and_dlg(struct dc *dc, 38 37 struct dc_state *context, 39 38 display_e2e_pipe_params_st *pipes, 40 39 int pipe_cnt,
+13 -6
drivers/gpu/drm/amd/display/dc/resource/dcn301/dcn301_resource.c
··· 1363 1363 pp_smu->nv_funcs.set_wm_ranges(&pp_smu->nv_funcs.pp_smu, &ranges); 1364 1364 } 1365 1365 1366 - static void dcn301_calculate_wm_and_dlg( 1367 - struct dc *dc, struct dc_state *context, 1368 - display_e2e_pipe_params_st *pipes, 1369 - int pipe_cnt, 1370 - int vlevel) 1366 + static void dcn301_update_bw_bounding_box(struct dc *dc, struct clk_bw_params *bw_params) 1371 1367 { 1372 1368 DC_FP_START(); 1373 - dcn301_calculate_wm_and_dlg_fp(dc, context, pipes, pipe_cnt, vlevel); 1369 + dcn301_fpu_update_bw_bounding_box(dc, bw_params); 1370 + DC_FP_END(); 1371 + } 1372 + 1373 + static void dcn301_calculate_wm_and_dlg(struct dc *dc, 1374 + struct dc_state *context, 1375 + display_e2e_pipe_params_st *pipes, 1376 + int pipe_cnt, 1377 + int vlevel_req) 1378 + { 1379 + DC_FP_START(); 1380 + dcn301_fpu_calculate_wm_and_dlg(dc, context, pipes, pipe_cnt, vlevel_req); 1374 1381 DC_FP_END(); 1375 1382 } 1376 1383