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dt-bindings: reset: Add PDC Global binding for SDM845 SoCs
Add PDC Global (Power Domain Controller) binding for SDM845 SoCs.
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
authored by
Sibi Sankar
and committed by
Philipp Zabel
032f1163
34845c93
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Documentation/devicetree/bindings/reset/qcom,pdc-global.txt
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Documentation/devicetree/bindings/reset/qcom,pdc-global.txt
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PDC Global
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======================================
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This binding describes a reset-controller found on PDC-Global (Power Domain
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Controller) block for Qualcomm Technologies Inc SDM845 SoCs.
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Required properties:
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- compatible:
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Usage: required
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Value type: <string>
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Definition: must be:
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"qcom,sdm845-pdc-global"
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- reg:
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Usage: required
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Value type: <prop-encoded-array>
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Definition: must specify the base address and size of the register
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space.
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- #reset-cells:
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Usage: required
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Value type: <uint>
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Definition: must be 1; cell entry represents the reset index.
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Example:
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pdc_reset: reset-controller@b2e0000 {
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compatible = "qcom,sdm845-pdc-global";
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reg = <0xb2e0000 0x20000>;
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#reset-cells = <1>;
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};
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PDC reset clients
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======================================
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Device nodes that need access to reset lines should
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specify them as a reset phandle in their corresponding node as
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specified in reset.txt.
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For a list of all valid reset indices see
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<dt-bindings/reset/qcom,sdm845-pdc.h>
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Example:
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modem-pil@4080000 {
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...
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resets = <&pdc_reset PDC_MODEM_SYNC_RESET>;
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reset-names = "pdc_reset";
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...
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};
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include/dt-bindings/reset/qcom,sdm845-pdc.h
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include/dt-bindings/reset/qcom,sdm845-pdc.h
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/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright (C) 2018 The Linux Foundation. All rights reserved.
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*/
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#ifndef _DT_BINDINGS_RESET_PDC_SDM_845_H
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#define _DT_BINDINGS_RESET_PDC_SDM_845_H
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#define PDC_APPS_SYNC_RESET 0
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#define PDC_SP_SYNC_RESET 1
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#define PDC_AUDIO_SYNC_RESET 2
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#define PDC_SENSORS_SYNC_RESET 3
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#define PDC_AOP_SYNC_RESET 4
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#define PDC_DEBUG_SYNC_RESET 5
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#define PDC_GPU_SYNC_RESET 6
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#define PDC_DISPLAY_SYNC_RESET 7
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#define PDC_COMPUTE_SYNC_RESET 8
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#define PDC_MODEM_SYNC_RESET 9
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#endif