Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

Merge branch 'pm-devfreq'

* pm-devfreq: (28 commits)
PM / devfreq: passive: fix compiler warning
PM / devfreq: passive: Use non-devm notifiers
PM / devfreq: exynos-bus: Convert to use dev_pm_opp_set_rate()
PM / devfreq: exynos-bus: Correct clock enable sequence
PM / devfreq: Correct devm_devfreq_remove_device() documentation
PM / devfreq: events: extend events by type of counted data
PM / devfreq: exynos-events: change matching code during probe
PM / devfreq: tegra20: add COMMON_CLK dependency
PM / devfreq: events: add Exynos PPMU new events
PM / devfreq: Fix kernel oops on governor module load
PM / devfreq: rk3399_dmc: Fix spelling typo
PM / devfreq: Fix spelling typo
PM / devfreq: Introduce driver for NVIDIA Tegra20
PM / devfreq: tegra: Rename tegra-devfreq.c to tegra30-devfreq.c
PM / devfreq: tegra: Enable COMPILE_TEST for the driver
PM / devfreq: tegra: Support Tegra30
PM / devfreq: tegra: Reconfigure hardware on governor's restart
PM / devfreq: tegra: Move governor registration to driver's probe
PM / devfreq: tegra: Mark ACTMON's governor as immutable
PM / devfreq: tegra: Avoid inconsistency of current frequency value
...

+500 -333
+16 -3
drivers/devfreq/Kconfig
··· 93 93 This does not yet operate with optimal voltages. 94 94 95 95 config ARM_TEGRA_DEVFREQ 96 - tristate "Tegra DEVFREQ Driver" 97 - depends on ARCH_TEGRA_124_SOC 98 - select DEVFREQ_GOV_SIMPLE_ONDEMAND 96 + tristate "NVIDIA Tegra30/114/124/210 DEVFREQ Driver" 97 + depends on ARCH_TEGRA_3x_SOC || ARCH_TEGRA_114_SOC || \ 98 + ARCH_TEGRA_132_SOC || ARCH_TEGRA_124_SOC || \ 99 + ARCH_TEGRA_210_SOC || \ 100 + COMPILE_TEST 99 101 select PM_OPP 100 102 help 101 103 This adds the DEVFREQ driver for the Tegra family of SoCs. 102 104 It reads ACTMON counters of memory controllers and adjusts the 103 105 operating frequencies and voltages with OPP support. 106 + 107 + config ARM_TEGRA20_DEVFREQ 108 + tristate "NVIDIA Tegra20 DEVFREQ Driver" 109 + depends on (TEGRA_MC && TEGRA20_EMC) || COMPILE_TEST 110 + depends on COMMON_CLK 111 + select DEVFREQ_GOV_SIMPLE_ONDEMAND 112 + select PM_OPP 113 + help 114 + This adds the DEVFREQ driver for the Tegra20 family of SoCs. 115 + It reads Memory Controller counters and adjusts the operating 116 + frequencies and voltages with OPP support. 104 117 105 118 config ARM_RK3399_DMC_DEVFREQ 106 119 tristate "ARM RK3399 DMC DEVFREQ Driver"
+2 -1
drivers/devfreq/Makefile
··· 10 10 # DEVFREQ Drivers 11 11 obj-$(CONFIG_ARM_EXYNOS_BUS_DEVFREQ) += exynos-bus.o 12 12 obj-$(CONFIG_ARM_RK3399_DMC_DEVFREQ) += rk3399_dmc.o 13 - obj-$(CONFIG_ARM_TEGRA_DEVFREQ) += tegra-devfreq.o 13 + obj-$(CONFIG_ARM_TEGRA_DEVFREQ) += tegra30-devfreq.o 14 + obj-$(CONFIG_ARM_TEGRA20_DEVFREQ) += tegra20-devfreq.o 14 15 15 16 # DEVFREQ Event Drivers 16 17 obj-$(CONFIG_PM_DEVFREQ_EVENT) += event/
+6 -6
drivers/devfreq/devfreq.c
··· 254 254 /* Restore previous state before return */ 255 255 mutex_lock(&devfreq_list_lock); 256 256 if (err) 257 - return ERR_PTR(err); 257 + return (err < 0) ? ERR_PTR(err) : ERR_PTR(-EINVAL); 258 258 259 259 governor = find_devfreq_governor(name); 260 260 } ··· 402 402 * devfreq_monitor_start() - Start load monitoring of devfreq instance 403 403 * @devfreq: the devfreq instance. 404 404 * 405 - * Helper function for starting devfreq device load monitoing. By 405 + * Helper function for starting devfreq device load monitoring. By 406 406 * default delayed work based monitoring is supported. Function 407 407 * to be called from governor in response to DEVFREQ_GOV_START 408 408 * event when device is added to devfreq framework. ··· 420 420 * devfreq_monitor_stop() - Stop load monitoring of a devfreq instance 421 421 * @devfreq: the devfreq instance. 422 422 * 423 - * Helper function to stop devfreq device load monitoing. Function 423 + * Helper function to stop devfreq device load monitoring. Function 424 424 * to be called from governor in response to DEVFREQ_GOV_STOP 425 425 * event when device is removed from devfreq framework. 426 426 */ ··· 434 434 * devfreq_monitor_suspend() - Suspend load monitoring of a devfreq instance 435 435 * @devfreq: the devfreq instance. 436 436 * 437 - * Helper function to suspend devfreq device load monitoing. Function 437 + * Helper function to suspend devfreq device load monitoring. Function 438 438 * to be called from governor in response to DEVFREQ_GOV_SUSPEND 439 439 * event or when polling interval is set to zero. 440 440 * ··· 461 461 * devfreq_monitor_resume() - Resume load monitoring of a devfreq instance 462 462 * @devfreq: the devfreq instance. 463 463 * 464 - * Helper function to resume devfreq device load monitoing. Function 464 + * Helper function to resume devfreq device load monitoring. Function 465 465 * to be called from governor in response to DEVFREQ_GOV_RESUME 466 466 * event or when polling interval is set to non-zero. 467 467 */ ··· 867 867 868 868 /** 869 869 * devm_devfreq_remove_device() - Resource-managed devfreq_remove_device() 870 - * @dev: the device to add devfreq feature. 870 + * @dev: the device from which to remove devfreq feature. 871 871 * @devfreq: the devfreq instance to be removed 872 872 */ 873 873 void devm_devfreq_remove_device(struct device *dev, struct devfreq *devfreq)
+72 -32
drivers/devfreq/event/exynos-ppmu.c
··· 13 13 #include <linux/kernel.h> 14 14 #include <linux/module.h> 15 15 #include <linux/of_address.h> 16 + #include <linux/of_device.h> 16 17 #include <linux/platform_device.h> 17 18 #include <linux/regmap.h> 18 19 #include <linux/suspend.h> 19 20 #include <linux/devfreq-event.h> 20 21 21 22 #include "exynos-ppmu.h" 23 + 24 + enum exynos_ppmu_type { 25 + EXYNOS_TYPE_PPMU, 26 + EXYNOS_TYPE_PPMU_V2, 27 + }; 22 28 23 29 struct exynos_ppmu_data { 24 30 struct clk *clk; ··· 39 33 struct regmap *regmap; 40 34 41 35 struct exynos_ppmu_data ppmu; 36 + enum exynos_ppmu_type ppmu_type; 42 37 }; 43 38 44 39 #define PPMU_EVENT(name) \ ··· 93 86 PPMU_EVENT(d1-cpu), 94 87 PPMU_EVENT(d1-general), 95 88 PPMU_EVENT(d1-rt), 89 + 90 + /* For Exynos5422 SoC */ 91 + PPMU_EVENT(dmc0_0), 92 + PPMU_EVENT(dmc0_1), 93 + PPMU_EVENT(dmc1_0), 94 + PPMU_EVENT(dmc1_1), 96 95 }; 97 96 98 97 static int exynos_ppmu_find_ppmu_id(struct devfreq_event_dev *edev) ··· 164 151 if (ret < 0) 165 152 return ret; 166 153 167 - /* Set the event of Read/Write data count */ 154 + /* Set the event of proper data type monitoring */ 168 155 ret = regmap_write(info->regmap, PPMU_BEVTxSEL(id), 169 - PPMU_RO_DATA_CNT | PPMU_WO_DATA_CNT); 156 + edev->desc->event_type); 170 157 if (ret < 0) 171 158 return ret; 172 159 ··· 378 365 if (ret < 0) 379 366 return ret; 380 367 381 - /* Set the event of Read/Write data count */ 382 - switch (id) { 383 - case PPMU_PMNCNT0: 384 - case PPMU_PMNCNT1: 385 - case PPMU_PMNCNT2: 386 - ret = regmap_write(info->regmap, PPMU_V2_CH_EVx_TYPE(id), 387 - PPMU_V2_RO_DATA_CNT | PPMU_V2_WO_DATA_CNT); 388 - if (ret < 0) 389 - return ret; 390 - break; 391 - case PPMU_PMNCNT3: 392 - ret = regmap_write(info->regmap, PPMU_V2_CH_EVx_TYPE(id), 393 - PPMU_V2_EVT3_RW_DATA_CNT); 394 - if (ret < 0) 395 - return ret; 396 - break; 397 - } 368 + /* Set the event of proper data type monitoring */ 369 + ret = regmap_write(info->regmap, PPMU_V2_CH_EVx_TYPE(id), 370 + edev->desc->event_type); 371 + if (ret < 0) 372 + return ret; 398 373 399 374 /* Reset cycle counter/performance counter and enable PPMU */ 400 375 ret = regmap_read(info->regmap, PPMU_V2_PMNC, &pmnc); ··· 481 480 static const struct of_device_id exynos_ppmu_id_match[] = { 482 481 { 483 482 .compatible = "samsung,exynos-ppmu", 484 - .data = (void *)&exynos_ppmu_ops, 483 + .data = (void *)EXYNOS_TYPE_PPMU, 485 484 }, { 486 485 .compatible = "samsung,exynos-ppmu-v2", 487 - .data = (void *)&exynos_ppmu_v2_ops, 486 + .data = (void *)EXYNOS_TYPE_PPMU_V2, 488 487 }, 489 488 { /* sentinel */ }, 490 489 }; 491 490 MODULE_DEVICE_TABLE(of, exynos_ppmu_id_match); 492 491 493 - static struct devfreq_event_ops *exynos_bus_get_ops(struct device_node *np) 494 - { 495 - const struct of_device_id *match; 496 - 497 - match = of_match_node(exynos_ppmu_id_match, np); 498 - return (struct devfreq_event_ops *)match->data; 499 - } 500 - 501 492 static int of_get_devfreq_events(struct device_node *np, 502 493 struct exynos_ppmu *info) 503 494 { 504 495 struct devfreq_event_desc *desc; 505 - struct devfreq_event_ops *event_ops; 506 496 struct device *dev = info->dev; 507 497 struct device_node *events_np, *node; 508 498 int i, j, count; 499 + const struct of_device_id *of_id; 500 + int ret; 509 501 510 502 events_np = of_get_child_by_name(np, "events"); 511 503 if (!events_np) { ··· 506 512 "failed to get child node of devfreq-event devices\n"); 507 513 return -EINVAL; 508 514 } 509 - event_ops = exynos_bus_get_ops(np); 510 515 511 516 count = of_get_child_count(events_np); 512 517 desc = devm_kcalloc(dev, count, sizeof(*desc), GFP_KERNEL); 513 518 if (!desc) 514 519 return -ENOMEM; 515 520 info->num_events = count; 521 + 522 + of_id = of_match_device(exynos_ppmu_id_match, dev); 523 + if (of_id) 524 + info->ppmu_type = (enum exynos_ppmu_type)of_id->data; 525 + else 526 + return -EINVAL; 516 527 517 528 j = 0; 518 529 for_each_child_of_node(events_np, node) { ··· 536 537 continue; 537 538 } 538 539 539 - desc[j].ops = event_ops; 540 + switch (info->ppmu_type) { 541 + case EXYNOS_TYPE_PPMU: 542 + desc[j].ops = &exynos_ppmu_ops; 543 + break; 544 + case EXYNOS_TYPE_PPMU_V2: 545 + desc[j].ops = &exynos_ppmu_v2_ops; 546 + break; 547 + } 548 + 540 549 desc[j].driver_data = info; 541 550 542 551 of_property_read_string(node, "event-name", &desc[j].name); 552 + ret = of_property_read_u32(node, "event-data-type", 553 + &desc[j].event_type); 554 + if (ret) { 555 + /* Set the event of proper data type counting. 556 + * Check if the data type has been defined in DT, 557 + * use default if not. 558 + */ 559 + if (info->ppmu_type == EXYNOS_TYPE_PPMU_V2) { 560 + struct devfreq_event_dev edev; 561 + int id; 562 + /* Not all registers take the same value for 563 + * read+write data count. 564 + */ 565 + edev.desc = &desc[j]; 566 + id = exynos_ppmu_find_ppmu_id(&edev); 567 + 568 + switch (id) { 569 + case PPMU_PMNCNT0: 570 + case PPMU_PMNCNT1: 571 + case PPMU_PMNCNT2: 572 + desc[j].event_type = PPMU_V2_RO_DATA_CNT 573 + | PPMU_V2_WO_DATA_CNT; 574 + break; 575 + case PPMU_PMNCNT3: 576 + desc[j].event_type = 577 + PPMU_V2_EVT3_RW_DATA_CNT; 578 + break; 579 + } 580 + } else { 581 + desc[j].event_type = PPMU_RO_DATA_CNT | 582 + PPMU_WO_DATA_CNT; 583 + } 584 + } 543 585 544 586 j++; 545 587 }
+37 -116
drivers/devfreq/exynos-bus.c
··· 22 22 #include <linux/slab.h> 23 23 24 24 #define DEFAULT_SATURATION_RATIO 40 25 - #define DEFAULT_VOLTAGE_TOLERANCE 2 26 25 27 26 struct exynos_bus { 28 27 struct device *dev; ··· 33 34 34 35 unsigned long curr_freq; 35 36 36 - struct regulator *regulator; 37 + struct opp_table *opp_table; 37 38 struct clk *clk; 38 - unsigned int voltage_tolerance; 39 39 unsigned int ratio; 40 40 }; 41 41 ··· 88 90 } 89 91 90 92 /* 91 - * Must necessary function for devfreq simple-ondemand governor 93 + * devfreq function for both simple-ondemand and passive governor 92 94 */ 93 95 static int exynos_bus_target(struct device *dev, unsigned long *freq, u32 flags) 94 96 { 95 97 struct exynos_bus *bus = dev_get_drvdata(dev); 96 98 struct dev_pm_opp *new_opp; 97 - unsigned long old_freq, new_freq, new_volt, tol; 98 99 int ret = 0; 99 100 100 - /* Get new opp-bus instance according to new bus clock */ 101 + /* Get correct frequency for bus. */ 101 102 new_opp = devfreq_recommended_opp(dev, freq, flags); 102 103 if (IS_ERR(new_opp)) { 103 104 dev_err(dev, "failed to get recommended opp instance\n"); 104 105 return PTR_ERR(new_opp); 105 106 } 106 107 107 - new_freq = dev_pm_opp_get_freq(new_opp); 108 - new_volt = dev_pm_opp_get_voltage(new_opp); 109 108 dev_pm_opp_put(new_opp); 110 - 111 - old_freq = bus->curr_freq; 112 - 113 - if (old_freq == new_freq) 114 - return 0; 115 - tol = new_volt * bus->voltage_tolerance / 100; 116 109 117 110 /* Change voltage and frequency according to new OPP level */ 118 111 mutex_lock(&bus->lock); 112 + ret = dev_pm_opp_set_rate(dev, *freq); 113 + if (!ret) 114 + bus->curr_freq = *freq; 119 115 120 - if (old_freq < new_freq) { 121 - ret = regulator_set_voltage_tol(bus->regulator, new_volt, tol); 122 - if (ret < 0) { 123 - dev_err(bus->dev, "failed to set voltage\n"); 124 - goto out; 125 - } 126 - } 127 - 128 - ret = clk_set_rate(bus->clk, new_freq); 129 - if (ret < 0) { 130 - dev_err(dev, "failed to change clock of bus\n"); 131 - clk_set_rate(bus->clk, old_freq); 132 - goto out; 133 - } 134 - 135 - if (old_freq > new_freq) { 136 - ret = regulator_set_voltage_tol(bus->regulator, new_volt, tol); 137 - if (ret < 0) { 138 - dev_err(bus->dev, "failed to set voltage\n"); 139 - goto out; 140 - } 141 - } 142 - bus->curr_freq = new_freq; 143 - 144 - dev_dbg(dev, "Set the frequency of bus (%luHz -> %luHz, %luHz)\n", 145 - old_freq, new_freq, clk_get_rate(bus->clk)); 146 - out: 147 116 mutex_unlock(&bus->lock); 148 117 149 118 return ret; ··· 156 191 if (ret < 0) 157 192 dev_warn(dev, "failed to disable the devfreq-event devices\n"); 158 193 159 - if (bus->regulator) 160 - regulator_disable(bus->regulator); 161 - 162 194 dev_pm_opp_of_remove_table(dev); 163 195 clk_disable_unprepare(bus->clk); 164 - } 165 - 166 - /* 167 - * Must necessary function for devfreq passive governor 168 - */ 169 - static int exynos_bus_passive_target(struct device *dev, unsigned long *freq, 170 - u32 flags) 171 - { 172 - struct exynos_bus *bus = dev_get_drvdata(dev); 173 - struct dev_pm_opp *new_opp; 174 - unsigned long old_freq, new_freq; 175 - int ret = 0; 176 - 177 - /* Get new opp-bus instance according to new bus clock */ 178 - new_opp = devfreq_recommended_opp(dev, freq, flags); 179 - if (IS_ERR(new_opp)) { 180 - dev_err(dev, "failed to get recommended opp instance\n"); 181 - return PTR_ERR(new_opp); 196 + if (bus->opp_table) { 197 + dev_pm_opp_put_regulators(bus->opp_table); 198 + bus->opp_table = NULL; 182 199 } 183 - 184 - new_freq = dev_pm_opp_get_freq(new_opp); 185 - dev_pm_opp_put(new_opp); 186 - 187 - old_freq = bus->curr_freq; 188 - 189 - if (old_freq == new_freq) 190 - return 0; 191 - 192 - /* Change the frequency according to new OPP level */ 193 - mutex_lock(&bus->lock); 194 - 195 - ret = clk_set_rate(bus->clk, new_freq); 196 - if (ret < 0) { 197 - dev_err(dev, "failed to set the clock of bus\n"); 198 - goto out; 199 - } 200 - 201 - *freq = new_freq; 202 - bus->curr_freq = new_freq; 203 - 204 - dev_dbg(dev, "Set the frequency of bus (%luHz -> %luHz, %luHz)\n", 205 - old_freq, new_freq, clk_get_rate(bus->clk)); 206 - out: 207 - mutex_unlock(&bus->lock); 208 - 209 - return ret; 210 200 } 211 201 212 202 static void exynos_bus_passive_exit(struct device *dev) ··· 176 256 struct exynos_bus *bus) 177 257 { 178 258 struct device *dev = bus->dev; 259 + struct opp_table *opp_table; 260 + const char *vdd = "vdd"; 179 261 int i, ret, count, size; 180 262 181 - /* Get the regulator to provide each bus with the power */ 182 - bus->regulator = devm_regulator_get(dev, "vdd"); 183 - if (IS_ERR(bus->regulator)) { 184 - dev_err(dev, "failed to get VDD regulator\n"); 185 - return PTR_ERR(bus->regulator); 186 - } 187 - 188 - ret = regulator_enable(bus->regulator); 189 - if (ret < 0) { 190 - dev_err(dev, "failed to enable VDD regulator\n"); 263 + opp_table = dev_pm_opp_set_regulators(dev, &vdd, 1); 264 + if (IS_ERR(opp_table)) { 265 + ret = PTR_ERR(opp_table); 266 + dev_err(dev, "failed to set regulators %d\n", ret); 191 267 return ret; 192 268 } 269 + 270 + bus->opp_table = opp_table; 193 271 194 272 /* 195 273 * Get the devfreq-event devices to get the current utilization of ··· 229 311 if (of_property_read_u32(np, "exynos,saturation-ratio", &bus->ratio)) 230 312 bus->ratio = DEFAULT_SATURATION_RATIO; 231 313 232 - if (of_property_read_u32(np, "exynos,voltage-tolerance", 233 - &bus->voltage_tolerance)) 234 - bus->voltage_tolerance = DEFAULT_VOLTAGE_TOLERANCE; 235 - 236 314 return 0; 237 315 238 316 err_regulator: 239 - regulator_disable(bus->regulator); 317 + dev_pm_opp_put_regulators(bus->opp_table); 318 + bus->opp_table = NULL; 240 319 241 320 return ret; 242 321 } ··· 298 383 struct exynos_bus *bus; 299 384 int ret, max_state; 300 385 unsigned long min_freq, max_freq; 386 + bool passive = false; 301 387 302 388 if (!np) { 303 389 dev_err(dev, "failed to find devicetree node\n"); ··· 312 396 bus->dev = &pdev->dev; 313 397 platform_set_drvdata(pdev, bus); 314 398 315 - /* Parse the device-tree to get the resource information */ 316 - ret = exynos_bus_parse_of(np, bus); 317 - if (ret < 0) 318 - return ret; 319 - 320 399 profile = devm_kzalloc(dev, sizeof(*profile), GFP_KERNEL); 321 - if (!profile) { 322 - ret = -ENOMEM; 323 - goto err; 324 - } 400 + if (!profile) 401 + return -ENOMEM; 325 402 326 403 node = of_parse_phandle(dev->of_node, "devfreq", 0); 327 404 if (node) { 328 405 of_node_put(node); 329 - goto passive; 406 + passive = true; 330 407 } else { 331 408 ret = exynos_bus_parent_parse_of(np, bus); 409 + if (ret < 0) 410 + return ret; 332 411 } 333 412 413 + /* Parse the device-tree to get the resource information */ 414 + ret = exynos_bus_parse_of(np, bus); 334 415 if (ret < 0) 335 - goto err; 416 + goto err_reg; 417 + 418 + if (passive) 419 + goto passive; 336 420 337 421 /* Initialize the struct profile and governor data for parent device */ 338 422 profile->polling_ms = 50; ··· 384 468 goto out; 385 469 passive: 386 470 /* Initialize the struct profile and governor data for passive device */ 387 - profile->target = exynos_bus_passive_target; 471 + profile->target = exynos_bus_target; 388 472 profile->exit = exynos_bus_passive_exit; 389 473 390 474 /* Get the instance of parent devfreq device */ ··· 423 507 err: 424 508 dev_pm_opp_of_remove_table(dev); 425 509 clk_disable_unprepare(bus->clk); 510 + err_reg: 511 + if (!passive) { 512 + dev_pm_opp_put_regulators(bus->opp_table); 513 + bus->opp_table = NULL; 514 + } 426 515 427 516 return ret; 428 517 }
+3 -4
drivers/devfreq/governor_passive.c
··· 149 149 static int devfreq_passive_event_handler(struct devfreq *devfreq, 150 150 unsigned int event, void *data) 151 151 { 152 - struct device *dev = devfreq->dev.parent; 153 152 struct devfreq_passive_data *p_data 154 153 = (struct devfreq_passive_data *)devfreq->data; 155 154 struct devfreq *parent = (struct devfreq *)p_data->parent; ··· 164 165 p_data->this = devfreq; 165 166 166 167 nb->notifier_call = devfreq_passive_notifier_call; 167 - ret = devm_devfreq_register_notifier(dev, parent, nb, 168 + ret = devfreq_register_notifier(parent, nb, 168 169 DEVFREQ_TRANSITION_NOTIFIER); 169 170 break; 170 171 case DEVFREQ_GOV_STOP: 171 - devm_devfreq_unregister_notifier(dev, parent, nb, 172 - DEVFREQ_TRANSITION_NOTIFIER); 172 + WARN_ON(devfreq_unregister_notifier(parent, nb, 173 + DEVFREQ_TRANSITION_NOTIFIER)); 173 174 break; 174 175 default: 175 176 break;
+1 -1
drivers/devfreq/rk3399_dmc.c
··· 351 351 352 352 /* 353 353 * Get dram timing and pass it to arm trust firmware, 354 - * the dram drvier in arm trust firmware will get these 354 + * the dram driver in arm trust firmware will get these 355 355 * timing and to do dram initial. 356 356 */ 357 357 if (!of_get_ddr_timings(&data->timing, np)) {
+145 -170
drivers/devfreq/tegra-devfreq.c drivers/devfreq/tegra30-devfreq.c
··· 132 132 struct tegra_devfreq_device { 133 133 const struct tegra_devfreq_device_config *config; 134 134 void __iomem *regs; 135 - spinlock_t lock; 136 135 137 136 /* Average event count sampled in the last interrupt */ 138 137 u32 avg_count; ··· 159 160 struct notifier_block rate_change_nb; 160 161 161 162 struct tegra_devfreq_device devices[ARRAY_SIZE(actmon_device_configs)]; 163 + 164 + int irq; 162 165 }; 163 166 164 167 struct tegra_actmon_emc_ratio { ··· 180 179 181 180 static u32 actmon_readl(struct tegra_devfreq *tegra, u32 offset) 182 181 { 183 - return readl(tegra->regs + offset); 182 + return readl_relaxed(tegra->regs + offset); 184 183 } 185 184 186 185 static void actmon_writel(struct tegra_devfreq *tegra, u32 val, u32 offset) 187 186 { 188 - writel(val, tegra->regs + offset); 187 + writel_relaxed(val, tegra->regs + offset); 189 188 } 190 189 191 190 static u32 device_readl(struct tegra_devfreq_device *dev, u32 offset) 192 191 { 193 - return readl(dev->regs + offset); 192 + return readl_relaxed(dev->regs + offset); 194 193 } 195 194 196 195 static void device_writel(struct tegra_devfreq_device *dev, u32 val, 197 196 u32 offset) 198 197 { 199 - writel(val, dev->regs + offset); 198 + writel_relaxed(val, dev->regs + offset); 200 199 } 201 200 202 201 static unsigned long do_percent(unsigned long val, unsigned int pct) ··· 232 231 static void actmon_write_barrier(struct tegra_devfreq *tegra) 233 232 { 234 233 /* ensure the update has reached the ACTMON */ 235 - wmb(); 236 - actmon_readl(tegra, ACTMON_GLB_STATUS); 234 + readl(tegra->regs + ACTMON_GLB_STATUS); 237 235 } 238 236 239 237 static void actmon_isr_device(struct tegra_devfreq *tegra, 240 238 struct tegra_devfreq_device *dev) 241 239 { 242 - unsigned long flags; 243 240 u32 intr_status, dev_ctrl; 244 - 245 - spin_lock_irqsave(&dev->lock, flags); 246 241 247 242 dev->avg_count = device_readl(dev, ACTMON_DEV_AVG_COUNT); 248 243 tegra_devfreq_update_avg_wmark(tegra, dev); ··· 288 291 device_writel(dev, ACTMON_INTR_STATUS_CLEAR, ACTMON_DEV_INTR_STATUS); 289 292 290 293 actmon_write_barrier(tegra); 291 - 292 - spin_unlock_irqrestore(&dev->lock, flags); 293 - } 294 - 295 - static irqreturn_t actmon_isr(int irq, void *data) 296 - { 297 - struct tegra_devfreq *tegra = data; 298 - bool handled = false; 299 - unsigned int i; 300 - u32 val; 301 - 302 - val = actmon_readl(tegra, ACTMON_GLB_STATUS); 303 - for (i = 0; i < ARRAY_SIZE(tegra->devices); i++) { 304 - if (val & tegra->devices[i].config->irq_mask) { 305 - actmon_isr_device(tegra, tegra->devices + i); 306 - handled = true; 307 - } 308 - } 309 - 310 - return handled ? IRQ_WAKE_THREAD : IRQ_NONE; 311 294 } 312 295 313 296 static unsigned long actmon_cpu_to_emc_rate(struct tegra_devfreq *tegra, ··· 314 337 unsigned long cpu_freq = 0; 315 338 unsigned long static_cpu_emc_freq = 0; 316 339 unsigned int avg_sustain_coef; 317 - unsigned long flags; 318 340 319 341 if (dev->config->avg_dependency_threshold) { 320 342 cpu_freq = cpufreq_get(0); 321 343 static_cpu_emc_freq = actmon_cpu_to_emc_rate(tegra, cpu_freq); 322 344 } 323 - 324 - spin_lock_irqsave(&dev->lock, flags); 325 345 326 346 dev->target_freq = dev->avg_count / ACTMON_SAMPLING_PERIOD; 327 347 avg_sustain_coef = 100 * 100 / dev->config->boost_up_threshold; ··· 327 353 328 354 if (dev->avg_count >= dev->config->avg_dependency_threshold) 329 355 dev->target_freq = max(dev->target_freq, static_cpu_emc_freq); 330 - 331 - spin_unlock_irqrestore(&dev->lock, flags); 332 356 } 333 357 334 358 static irqreturn_t actmon_thread_isr(int irq, void *data) 335 359 { 336 360 struct tegra_devfreq *tegra = data; 361 + bool handled = false; 362 + unsigned int i; 363 + u32 val; 337 364 338 365 mutex_lock(&tegra->devfreq->lock); 339 - update_devfreq(tegra->devfreq); 366 + 367 + val = actmon_readl(tegra, ACTMON_GLB_STATUS); 368 + for (i = 0; i < ARRAY_SIZE(tegra->devices); i++) { 369 + if (val & tegra->devices[i].config->irq_mask) { 370 + actmon_isr_device(tegra, tegra->devices + i); 371 + handled = true; 372 + } 373 + } 374 + 375 + if (handled) 376 + update_devfreq(tegra->devfreq); 377 + 340 378 mutex_unlock(&tegra->devfreq->lock); 341 379 342 - return IRQ_HANDLED; 380 + return handled ? IRQ_HANDLED : IRQ_NONE; 343 381 } 344 382 345 383 static int tegra_actmon_rate_notify_cb(struct notifier_block *nb, ··· 361 375 struct tegra_devfreq *tegra; 362 376 struct tegra_devfreq_device *dev; 363 377 unsigned int i; 364 - unsigned long flags; 365 378 366 379 if (action != POST_RATE_CHANGE) 367 380 return NOTIFY_OK; ··· 372 387 for (i = 0; i < ARRAY_SIZE(tegra->devices); i++) { 373 388 dev = &tegra->devices[i]; 374 389 375 - spin_lock_irqsave(&dev->lock, flags); 376 390 tegra_devfreq_update_wmark(tegra, dev); 377 - spin_unlock_irqrestore(&dev->lock, flags); 378 391 } 379 392 380 393 actmon_write_barrier(tegra); 381 394 382 395 return NOTIFY_OK; 383 - } 384 - 385 - static void tegra_actmon_enable_interrupts(struct tegra_devfreq *tegra) 386 - { 387 - struct tegra_devfreq_device *dev; 388 - u32 val; 389 - unsigned int i; 390 - 391 - for (i = 0; i < ARRAY_SIZE(tegra->devices); i++) { 392 - dev = &tegra->devices[i]; 393 - 394 - val = device_readl(dev, ACTMON_DEV_CTRL); 395 - val |= ACTMON_DEV_CTRL_AVG_ABOVE_WMARK_EN; 396 - val |= ACTMON_DEV_CTRL_AVG_BELOW_WMARK_EN; 397 - val |= ACTMON_DEV_CTRL_CONSECUTIVE_BELOW_WMARK_EN; 398 - val |= ACTMON_DEV_CTRL_CONSECUTIVE_ABOVE_WMARK_EN; 399 - 400 - device_writel(dev, val, ACTMON_DEV_CTRL); 401 - } 402 - 403 - actmon_write_barrier(tegra); 404 - } 405 - 406 - static void tegra_actmon_disable_interrupts(struct tegra_devfreq *tegra) 407 - { 408 - struct tegra_devfreq_device *dev; 409 - u32 val; 410 - unsigned int i; 411 - 412 - for (i = 0; i < ARRAY_SIZE(tegra->devices); i++) { 413 - dev = &tegra->devices[i]; 414 - 415 - val = device_readl(dev, ACTMON_DEV_CTRL); 416 - val &= ~ACTMON_DEV_CTRL_AVG_ABOVE_WMARK_EN; 417 - val &= ~ACTMON_DEV_CTRL_AVG_BELOW_WMARK_EN; 418 - val &= ~ACTMON_DEV_CTRL_CONSECUTIVE_BELOW_WMARK_EN; 419 - val &= ~ACTMON_DEV_CTRL_CONSECUTIVE_ABOVE_WMARK_EN; 420 - 421 - device_writel(dev, val, ACTMON_DEV_CTRL); 422 - } 423 - 424 - actmon_write_barrier(tegra); 425 396 } 426 397 427 398 static void tegra_actmon_configure_device(struct tegra_devfreq *tegra, ··· 403 462 << ACTMON_DEV_CTRL_CONSECUTIVE_BELOW_WMARK_NUM_SHIFT; 404 463 val |= (ACTMON_ABOVE_WMARK_WINDOW - 1) 405 464 << ACTMON_DEV_CTRL_CONSECUTIVE_ABOVE_WMARK_NUM_SHIFT; 465 + val |= ACTMON_DEV_CTRL_AVG_ABOVE_WMARK_EN; 466 + val |= ACTMON_DEV_CTRL_AVG_BELOW_WMARK_EN; 467 + val |= ACTMON_DEV_CTRL_CONSECUTIVE_BELOW_WMARK_EN; 468 + val |= ACTMON_DEV_CTRL_CONSECUTIVE_ABOVE_WMARK_EN; 406 469 val |= ACTMON_DEV_CTRL_ENB; 407 470 408 471 device_writel(dev, val, ACTMON_DEV_CTRL); 472 + } 473 + 474 + static void tegra_actmon_start(struct tegra_devfreq *tegra) 475 + { 476 + unsigned int i; 477 + 478 + disable_irq(tegra->irq); 479 + 480 + actmon_writel(tegra, ACTMON_SAMPLING_PERIOD - 1, 481 + ACTMON_GLB_PERIOD_CTRL); 482 + 483 + for (i = 0; i < ARRAY_SIZE(tegra->devices); i++) 484 + tegra_actmon_configure_device(tegra, &tegra->devices[i]); 409 485 410 486 actmon_write_barrier(tegra); 487 + 488 + enable_irq(tegra->irq); 489 + } 490 + 491 + static void tegra_actmon_stop(struct tegra_devfreq *tegra) 492 + { 493 + unsigned int i; 494 + 495 + disable_irq(tegra->irq); 496 + 497 + for (i = 0; i < ARRAY_SIZE(tegra->devices); i++) { 498 + device_writel(&tegra->devices[i], 0x00000000, ACTMON_DEV_CTRL); 499 + device_writel(&tegra->devices[i], ACTMON_INTR_STATUS_CLEAR, 500 + ACTMON_DEV_INTR_STATUS); 501 + } 502 + 503 + actmon_write_barrier(tegra); 504 + 505 + enable_irq(tegra->irq); 411 506 } 412 507 413 508 static int tegra_devfreq_target(struct device *dev, unsigned long *freq, 414 509 u32 flags) 415 510 { 416 511 struct tegra_devfreq *tegra = dev_get_drvdata(dev); 512 + struct devfreq *devfreq = tegra->devfreq; 417 513 struct dev_pm_opp *opp; 418 - unsigned long rate = *freq * KHZ; 514 + unsigned long rate; 515 + int err; 419 516 420 - opp = devfreq_recommended_opp(dev, &rate, flags); 517 + opp = devfreq_recommended_opp(dev, freq, flags); 421 518 if (IS_ERR(opp)) { 422 - dev_err(dev, "Failed to find opp for %lu KHz\n", *freq); 519 + dev_err(dev, "Failed to find opp for %lu Hz\n", *freq); 423 520 return PTR_ERR(opp); 424 521 } 425 522 rate = dev_pm_opp_get_freq(opp); 426 523 dev_pm_opp_put(opp); 427 524 428 - clk_set_min_rate(tegra->emc_clock, rate); 429 - clk_set_rate(tegra->emc_clock, 0); 525 + err = clk_set_min_rate(tegra->emc_clock, rate); 526 + if (err) 527 + return err; 430 528 431 - *freq = rate; 529 + err = clk_set_rate(tegra->emc_clock, 0); 530 + if (err) 531 + goto restore_min_rate; 432 532 433 533 return 0; 534 + 535 + restore_min_rate: 536 + clk_set_min_rate(tegra->emc_clock, devfreq->previous_freq); 537 + 538 + return err; 434 539 } 435 540 436 541 static int tegra_devfreq_get_dev_status(struct device *dev, ··· 484 497 { 485 498 struct tegra_devfreq *tegra = dev_get_drvdata(dev); 486 499 struct tegra_devfreq_device *actmon_dev; 500 + unsigned long cur_freq; 487 501 488 - stat->current_frequency = tegra->cur_freq; 502 + cur_freq = READ_ONCE(tegra->cur_freq); 489 503 490 504 /* To be used by the tegra governor */ 491 505 stat->private_data = tegra; 492 506 493 507 /* The below are to be used by the other governors */ 508 + stat->current_frequency = cur_freq * KHZ; 494 509 495 510 actmon_dev = &tegra->devices[MCALL]; 496 511 ··· 503 514 stat->busy_time *= 100 / BUS_SATURATION_RATIO; 504 515 505 516 /* Number of cycles in a sampling period */ 506 - stat->total_time = ACTMON_SAMPLING_PERIOD * tegra->cur_freq; 517 + stat->total_time = ACTMON_SAMPLING_PERIOD * cur_freq; 507 518 508 519 stat->busy_time = min(stat->busy_time, stat->total_time); 509 520 ··· 542 553 target_freq = max(target_freq, dev->target_freq); 543 554 } 544 555 545 - *freq = target_freq; 556 + *freq = target_freq * KHZ; 546 557 547 558 return 0; 548 559 } ··· 555 566 switch (event) { 556 567 case DEVFREQ_GOV_START: 557 568 devfreq_monitor_start(devfreq); 558 - tegra_actmon_enable_interrupts(tegra); 569 + tegra_actmon_start(tegra); 559 570 break; 560 571 561 572 case DEVFREQ_GOV_STOP: 562 - tegra_actmon_disable_interrupts(tegra); 573 + tegra_actmon_stop(tegra); 563 574 devfreq_monitor_stop(devfreq); 564 575 break; 565 576 566 577 case DEVFREQ_GOV_SUSPEND: 567 - tegra_actmon_disable_interrupts(tegra); 578 + tegra_actmon_stop(tegra); 568 579 devfreq_monitor_suspend(devfreq); 569 580 break; 570 581 571 582 case DEVFREQ_GOV_RESUME: 572 583 devfreq_monitor_resume(devfreq); 573 - tegra_actmon_enable_interrupts(tegra); 584 + tegra_actmon_start(tegra); 574 585 break; 575 586 } 576 587 ··· 581 592 .name = "tegra_actmon", 582 593 .get_target_freq = tegra_governor_get_target, 583 594 .event_handler = tegra_governor_event_handler, 595 + .immutable = true, 584 596 }; 585 597 586 598 static int tegra_devfreq_probe(struct platform_device *pdev) 587 599 { 588 600 struct tegra_devfreq *tegra; 589 601 struct tegra_devfreq_device *dev; 590 - struct resource *res; 591 602 unsigned int i; 592 603 unsigned long rate; 593 - int irq; 594 604 int err; 595 605 596 606 tegra = devm_kzalloc(&pdev->dev, sizeof(*tegra), GFP_KERNEL); 597 607 if (!tegra) 598 608 return -ENOMEM; 599 609 600 - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 601 - 602 - tegra->regs = devm_ioremap_resource(&pdev->dev, res); 610 + tegra->regs = devm_platform_ioremap_resource(pdev, 0); 603 611 if (IS_ERR(tegra->regs)) 604 612 return PTR_ERR(tegra->regs); 605 613 ··· 618 632 return PTR_ERR(tegra->emc_clock); 619 633 } 620 634 621 - clk_set_rate(tegra->emc_clock, ULONG_MAX); 622 - 623 - tegra->rate_change_nb.notifier_call = tegra_actmon_rate_notify_cb; 624 - err = clk_notifier_register(tegra->emc_clock, &tegra->rate_change_nb); 625 - if (err) { 626 - dev_err(&pdev->dev, 627 - "Failed to register rate change notifier\n"); 635 + tegra->irq = platform_get_irq(pdev, 0); 636 + if (tegra->irq < 0) { 637 + err = tegra->irq; 638 + dev_err(&pdev->dev, "Failed to get IRQ: %d\n", err); 628 639 return err; 629 640 } 630 641 ··· 639 656 tegra->max_freq = clk_round_rate(tegra->emc_clock, ULONG_MAX) / KHZ; 640 657 tegra->cur_freq = clk_get_rate(tegra->emc_clock) / KHZ; 641 658 642 - actmon_writel(tegra, ACTMON_SAMPLING_PERIOD - 1, 643 - ACTMON_GLB_PERIOD_CTRL); 644 - 645 659 for (i = 0; i < ARRAY_SIZE(actmon_device_configs); i++) { 646 660 dev = tegra->devices + i; 647 661 dev->config = actmon_device_configs + i; 648 662 dev->regs = tegra->regs + dev->config->offset; 649 - spin_lock_init(&dev->lock); 650 - 651 - tegra_actmon_configure_device(tegra, dev); 652 663 } 653 664 654 665 for (rate = 0; rate <= tegra->max_freq * KHZ; rate++) { 655 666 rate = clk_round_rate(tegra->emc_clock, rate); 656 - dev_pm_opp_add(&pdev->dev, rate, 0); 657 - } 658 667 659 - irq = platform_get_irq(pdev, 0); 660 - if (irq < 0) { 661 - dev_err(&pdev->dev, "Failed to get IRQ: %d\n", irq); 662 - return irq; 668 + err = dev_pm_opp_add(&pdev->dev, rate, 0); 669 + if (err) { 670 + dev_err(&pdev->dev, "Failed to add OPP: %d\n", err); 671 + goto remove_opps; 672 + } 663 673 } 664 674 665 675 platform_set_drvdata(pdev, tegra); 666 676 667 - err = devm_request_threaded_irq(&pdev->dev, irq, actmon_isr, 668 - actmon_thread_isr, IRQF_SHARED, 669 - "tegra-devfreq", tegra); 677 + tegra->rate_change_nb.notifier_call = tegra_actmon_rate_notify_cb; 678 + err = clk_notifier_register(tegra->emc_clock, &tegra->rate_change_nb); 670 679 if (err) { 671 - dev_err(&pdev->dev, "Interrupt request failed\n"); 672 - return err; 680 + dev_err(&pdev->dev, 681 + "Failed to register rate change notifier\n"); 682 + goto remove_opps; 683 + } 684 + 685 + err = devfreq_add_governor(&tegra_devfreq_governor); 686 + if (err) { 687 + dev_err(&pdev->dev, "Failed to add governor: %d\n", err); 688 + goto unreg_notifier; 673 689 } 674 690 675 691 tegra_devfreq_profile.initial_freq = clk_get_rate(tegra->emc_clock); 676 - tegra->devfreq = devm_devfreq_add_device(&pdev->dev, 677 - &tegra_devfreq_profile, 678 - "tegra_actmon", 679 - NULL); 692 + tegra->devfreq = devfreq_add_device(&pdev->dev, 693 + &tegra_devfreq_profile, 694 + "tegra_actmon", 695 + NULL); 696 + if (IS_ERR(tegra->devfreq)) { 697 + err = PTR_ERR(tegra->devfreq); 698 + goto remove_governor; 699 + } 700 + 701 + err = devm_request_threaded_irq(&pdev->dev, tegra->irq, NULL, 702 + actmon_thread_isr, IRQF_ONESHOT, 703 + "tegra-devfreq", tegra); 704 + if (err) { 705 + dev_err(&pdev->dev, "Interrupt request failed: %d\n", err); 706 + goto remove_devfreq; 707 + } 680 708 681 709 return 0; 710 + 711 + remove_devfreq: 712 + devfreq_remove_device(tegra->devfreq); 713 + 714 + remove_governor: 715 + devfreq_remove_governor(&tegra_devfreq_governor); 716 + 717 + unreg_notifier: 718 + clk_notifier_unregister(tegra->emc_clock, &tegra->rate_change_nb); 719 + 720 + remove_opps: 721 + dev_pm_opp_remove_all_dynamic(&pdev->dev); 722 + 723 + reset_control_reset(tegra->reset); 724 + clk_disable_unprepare(tegra->clock); 725 + 726 + return err; 682 727 } 683 728 684 729 static int tegra_devfreq_remove(struct platform_device *pdev) 685 730 { 686 731 struct tegra_devfreq *tegra = platform_get_drvdata(pdev); 687 - int irq = platform_get_irq(pdev, 0); 688 - u32 val; 689 - unsigned int i; 690 732 691 - for (i = 0; i < ARRAY_SIZE(actmon_device_configs); i++) { 692 - val = device_readl(&tegra->devices[i], ACTMON_DEV_CTRL); 693 - val &= ~ACTMON_DEV_CTRL_ENB; 694 - device_writel(&tegra->devices[i], val, ACTMON_DEV_CTRL); 695 - } 696 - 697 - actmon_write_barrier(tegra); 698 - 699 - devm_free_irq(&pdev->dev, irq, tegra); 733 + devfreq_remove_device(tegra->devfreq); 734 + devfreq_remove_governor(&tegra_devfreq_governor); 700 735 701 736 clk_notifier_unregister(tegra->emc_clock, &tegra->rate_change_nb); 737 + dev_pm_opp_remove_all_dynamic(&pdev->dev); 702 738 739 + reset_control_reset(tegra->reset); 703 740 clk_disable_unprepare(tegra->clock); 704 741 705 742 return 0; 706 743 } 707 744 708 745 static const struct of_device_id tegra_devfreq_of_match[] = { 746 + { .compatible = "nvidia,tegra30-actmon" }, 709 747 { .compatible = "nvidia,tegra124-actmon" }, 710 748 { }, 711 749 }; ··· 741 737 .of_match_table = tegra_devfreq_of_match, 742 738 }, 743 739 }; 744 - 745 - static int __init tegra_devfreq_init(void) 746 - { 747 - int ret = 0; 748 - 749 - ret = devfreq_add_governor(&tegra_devfreq_governor); 750 - if (ret) { 751 - pr_err("%s: failed to add governor: %d\n", __func__, ret); 752 - return ret; 753 - } 754 - 755 - ret = platform_driver_register(&tegra_devfreq_driver); 756 - if (ret) 757 - devfreq_remove_governor(&tegra_devfreq_governor); 758 - 759 - return ret; 760 - } 761 - module_init(tegra_devfreq_init) 762 - 763 - static void __exit tegra_devfreq_exit(void) 764 - { 765 - int ret = 0; 766 - 767 - platform_driver_unregister(&tegra_devfreq_driver); 768 - 769 - ret = devfreq_remove_governor(&tegra_devfreq_governor); 770 - if (ret) 771 - pr_err("%s: failed to remove governor: %d\n", __func__, ret); 772 - } 773 - module_exit(tegra_devfreq_exit) 740 + module_platform_driver(tegra_devfreq_driver); 774 741 775 742 MODULE_LICENSE("GPL v2"); 776 743 MODULE_DESCRIPTION("Tegra devfreq driver");
+212
drivers/devfreq/tegra20-devfreq.c
··· 1 + // SPDX-License-Identifier: GPL-2.0 2 + /* 3 + * NVIDIA Tegra20 devfreq driver 4 + * 5 + * Copyright (C) 2019 GRATE-DRIVER project 6 + */ 7 + 8 + #include <linux/clk.h> 9 + #include <linux/devfreq.h> 10 + #include <linux/io.h> 11 + #include <linux/kernel.h> 12 + #include <linux/module.h> 13 + #include <linux/of_device.h> 14 + #include <linux/platform_device.h> 15 + #include <linux/pm_opp.h> 16 + #include <linux/slab.h> 17 + 18 + #include <soc/tegra/mc.h> 19 + 20 + #include "governor.h" 21 + 22 + #define MC_STAT_CONTROL 0x90 23 + #define MC_STAT_EMC_CLOCK_LIMIT 0xa0 24 + #define MC_STAT_EMC_CLOCKS 0xa4 25 + #define MC_STAT_EMC_CONTROL 0xa8 26 + #define MC_STAT_EMC_COUNT 0xb8 27 + 28 + #define EMC_GATHER_CLEAR (1 << 8) 29 + #define EMC_GATHER_ENABLE (3 << 8) 30 + 31 + struct tegra_devfreq { 32 + struct devfreq *devfreq; 33 + struct clk *emc_clock; 34 + void __iomem *regs; 35 + }; 36 + 37 + static int tegra_devfreq_target(struct device *dev, unsigned long *freq, 38 + u32 flags) 39 + { 40 + struct tegra_devfreq *tegra = dev_get_drvdata(dev); 41 + struct devfreq *devfreq = tegra->devfreq; 42 + struct dev_pm_opp *opp; 43 + unsigned long rate; 44 + int err; 45 + 46 + opp = devfreq_recommended_opp(dev, freq, flags); 47 + if (IS_ERR(opp)) 48 + return PTR_ERR(opp); 49 + 50 + rate = dev_pm_opp_get_freq(opp); 51 + dev_pm_opp_put(opp); 52 + 53 + err = clk_set_min_rate(tegra->emc_clock, rate); 54 + if (err) 55 + return err; 56 + 57 + err = clk_set_rate(tegra->emc_clock, 0); 58 + if (err) 59 + goto restore_min_rate; 60 + 61 + return 0; 62 + 63 + restore_min_rate: 64 + clk_set_min_rate(tegra->emc_clock, devfreq->previous_freq); 65 + 66 + return err; 67 + } 68 + 69 + static int tegra_devfreq_get_dev_status(struct device *dev, 70 + struct devfreq_dev_status *stat) 71 + { 72 + struct tegra_devfreq *tegra = dev_get_drvdata(dev); 73 + 74 + /* 75 + * EMC_COUNT returns number of memory events, that number is lower 76 + * than the number of clocks. Conversion ratio of 1/8 results in a 77 + * bit higher bandwidth than actually needed, it is good enough for 78 + * the time being because drivers don't support requesting minimum 79 + * needed memory bandwidth yet. 80 + * 81 + * TODO: adjust the ratio value once relevant drivers will support 82 + * memory bandwidth management. 83 + */ 84 + stat->busy_time = readl_relaxed(tegra->regs + MC_STAT_EMC_COUNT); 85 + stat->total_time = readl_relaxed(tegra->regs + MC_STAT_EMC_CLOCKS) / 8; 86 + stat->current_frequency = clk_get_rate(tegra->emc_clock); 87 + 88 + writel_relaxed(EMC_GATHER_CLEAR, tegra->regs + MC_STAT_CONTROL); 89 + writel_relaxed(EMC_GATHER_ENABLE, tegra->regs + MC_STAT_CONTROL); 90 + 91 + return 0; 92 + } 93 + 94 + static struct devfreq_dev_profile tegra_devfreq_profile = { 95 + .polling_ms = 500, 96 + .target = tegra_devfreq_target, 97 + .get_dev_status = tegra_devfreq_get_dev_status, 98 + }; 99 + 100 + static struct tegra_mc *tegra_get_memory_controller(void) 101 + { 102 + struct platform_device *pdev; 103 + struct device_node *np; 104 + struct tegra_mc *mc; 105 + 106 + np = of_find_compatible_node(NULL, NULL, "nvidia,tegra20-mc-gart"); 107 + if (!np) 108 + return ERR_PTR(-ENOENT); 109 + 110 + pdev = of_find_device_by_node(np); 111 + of_node_put(np); 112 + if (!pdev) 113 + return ERR_PTR(-ENODEV); 114 + 115 + mc = platform_get_drvdata(pdev); 116 + if (!mc) 117 + return ERR_PTR(-EPROBE_DEFER); 118 + 119 + return mc; 120 + } 121 + 122 + static int tegra_devfreq_probe(struct platform_device *pdev) 123 + { 124 + struct tegra_devfreq *tegra; 125 + struct tegra_mc *mc; 126 + unsigned long max_rate; 127 + unsigned long rate; 128 + int err; 129 + 130 + mc = tegra_get_memory_controller(); 131 + if (IS_ERR(mc)) { 132 + err = PTR_ERR(mc); 133 + dev_err(&pdev->dev, "failed to get memory controller: %d\n", 134 + err); 135 + return err; 136 + } 137 + 138 + tegra = devm_kzalloc(&pdev->dev, sizeof(*tegra), GFP_KERNEL); 139 + if (!tegra) 140 + return -ENOMEM; 141 + 142 + /* EMC is a system-critical clock that is always enabled */ 143 + tegra->emc_clock = devm_clk_get(&pdev->dev, "emc"); 144 + if (IS_ERR(tegra->emc_clock)) { 145 + err = PTR_ERR(tegra->emc_clock); 146 + dev_err(&pdev->dev, "failed to get emc clock: %d\n", err); 147 + return err; 148 + } 149 + 150 + tegra->regs = mc->regs; 151 + 152 + max_rate = clk_round_rate(tegra->emc_clock, ULONG_MAX); 153 + 154 + for (rate = 0; rate <= max_rate; rate++) { 155 + rate = clk_round_rate(tegra->emc_clock, rate); 156 + 157 + err = dev_pm_opp_add(&pdev->dev, rate, 0); 158 + if (err) { 159 + dev_err(&pdev->dev, "failed to add opp: %d\n", err); 160 + goto remove_opps; 161 + } 162 + } 163 + 164 + /* 165 + * Reset statistic gathers state, select global bandwidth for the 166 + * statistics collection mode and set clocks counter saturation 167 + * limit to maximum. 168 + */ 169 + writel_relaxed(0x00000000, tegra->regs + MC_STAT_CONTROL); 170 + writel_relaxed(0x00000000, tegra->regs + MC_STAT_EMC_CONTROL); 171 + writel_relaxed(0xffffffff, tegra->regs + MC_STAT_EMC_CLOCK_LIMIT); 172 + 173 + platform_set_drvdata(pdev, tegra); 174 + 175 + tegra->devfreq = devfreq_add_device(&pdev->dev, &tegra_devfreq_profile, 176 + DEVFREQ_GOV_SIMPLE_ONDEMAND, NULL); 177 + if (IS_ERR(tegra->devfreq)) { 178 + err = PTR_ERR(tegra->devfreq); 179 + goto remove_opps; 180 + } 181 + 182 + return 0; 183 + 184 + remove_opps: 185 + dev_pm_opp_remove_all_dynamic(&pdev->dev); 186 + 187 + return err; 188 + } 189 + 190 + static int tegra_devfreq_remove(struct platform_device *pdev) 191 + { 192 + struct tegra_devfreq *tegra = platform_get_drvdata(pdev); 193 + 194 + devfreq_remove_device(tegra->devfreq); 195 + dev_pm_opp_remove_all_dynamic(&pdev->dev); 196 + 197 + return 0; 198 + } 199 + 200 + static struct platform_driver tegra_devfreq_driver = { 201 + .probe = tegra_devfreq_probe, 202 + .remove = tegra_devfreq_remove, 203 + .driver = { 204 + .name = "tegra20-devfreq", 205 + }, 206 + }; 207 + module_platform_driver(tegra_devfreq_driver); 208 + 209 + MODULE_ALIAS("platform:tegra20-devfreq"); 210 + MODULE_AUTHOR("Dmitry Osipenko <digetx@gmail.com>"); 211 + MODULE_DESCRIPTION("NVIDIA Tegra20 devfreq driver"); 212 + MODULE_LICENSE("GPL v2");
+6
include/linux/devfreq-event.h
··· 78 78 * struct devfreq_event_desc - the descriptor of devfreq-event device 79 79 * 80 80 * @name : the name of devfreq-event device. 81 + * @event_type : the type of the event determined and used by driver 81 82 * @driver_data : the private data for devfreq-event driver. 82 83 * @ops : the operation to control devfreq-event device. 83 84 * 84 85 * Each devfreq-event device is described with a this structure. 85 86 * This structure contains the various data for devfreq-event device. 87 + * The event_type describes what is going to be counted in the register. 88 + * It might choose to count e.g. read requests, write data in bytes, etc. 89 + * The full supported list of types is present in specyfic header in: 90 + * include/dt-bindings/pmu/. 86 91 */ 87 92 struct devfreq_event_desc { 88 93 const char *name; 94 + u32 event_type; 89 95 void *driver_data; 90 96 91 97 const struct devfreq_event_ops *ops;