tjh.dev
Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
lib: Add generic PIO mapping method
41f8bba7f555 ("of/pci: Add pci_register_io_range() and
pci_pio_to_address()") added support for PCI I/O space mapped into CPU
physical memory space. With that support, the I/O ranges configured for
PCI/PCIe hosts on some architectures can be mapped to logical PIO and
converted easily between CPU address and the corresponding logical PIO.
Based on this, PCI I/O port space can be accessed via in/out accessors that
use memory read/write.
But on some platforms, there are bus hosts that access I/O port space with
host-local I/O port addresses rather than memory addresses.
Add a more generic I/O mapping method to support those devices. With this
patch, both the CPU addresses and the host-local port can be mapped into
the logical PIO space with different logical/fake PIOs. After this, all
the I/O accesses to either PCI MMIO devices or host-local I/O peripherals
can be unified into the existing I/O accessors defined in asm-generic/io.h
and be redirected to the right device-specific hooks based on the input
logical PIO.
Tested-by: dann frazier <dann.frazier@canonical.com>
Signed-off-by: Zhichang Yuan <yuanzhichang@hisilicon.com>
Signed-off-by: Gabriele Paoloni <gabriele.paoloni@huawei.com>
Signed-off-by: John Garry <john.garry@huawei.com>
[bhelgaas: remove -EFAULT return from logic_pio_register_range() per
https://lkml.kernel.org/r/20180403143909.GA21171@ulmo, fix NULL pointer
checking per https://lkml.kernel.org/r/20180403211505.GA29612@embeddedor.com]
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
authored by
Zhichang Yuan
and committed by
Bjorn Helgaas
031e3601
7928b2cb
+423
+2
include/asm-generic/io.h
+2
include/asm-generic/io.h
+123
include/linux/logic_pio.h
+123
include/linux/logic_pio.h
···
1
+
// SPDX-License-Identifier: GPL-2.0+
2
+
/*
3
+
* Copyright (C) 2017 HiSilicon Limited, All Rights Reserved.
4
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* Author: Gabriele Paoloni <gabriele.paoloni@huawei.com>
5
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* Author: Zhichang Yuan <yuanzhichang@hisilicon.com>
6
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*/
7
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8
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#ifndef __LINUX_LOGIC_PIO_H
9
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#define __LINUX_LOGIC_PIO_H
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11
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#include <linux/fwnode.h>
12
+
13
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enum {
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LOGIC_PIO_INDIRECT, /* Indirect IO flag */
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LOGIC_PIO_CPU_MMIO, /* Memory-mapped IO flag */
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};
17
+
18
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struct logic_pio_hwaddr {
19
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struct list_head list;
20
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struct fwnode_handle *fwnode;
21
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resource_size_t hw_start;
22
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resource_size_t io_start;
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resource_size_t size; /* range size populated */
24
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unsigned long flags;
25
+
26
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void *hostdata;
27
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const struct logic_pio_host_ops *ops;
28
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};
29
+
30
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struct logic_pio_host_ops {
31
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u32 (*in)(void *hostdata, unsigned long addr, size_t dwidth);
32
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void (*out)(void *hostdata, unsigned long addr, u32 val,
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size_t dwidth);
34
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u32 (*ins)(void *hostdata, unsigned long addr, void *buffer,
35
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size_t dwidth, unsigned int count);
36
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void (*outs)(void *hostdata, unsigned long addr, const void *buffer,
37
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size_t dwidth, unsigned int count);
38
+
};
39
+
40
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#ifdef CONFIG_INDIRECT_PIO
41
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u8 logic_inb(unsigned long addr);
42
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void logic_outb(u8 value, unsigned long addr);
43
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void logic_outw(u16 value, unsigned long addr);
44
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void logic_outl(u32 value, unsigned long addr);
45
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u16 logic_inw(unsigned long addr);
46
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u32 logic_inl(unsigned long addr);
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void logic_outb(u8 value, unsigned long addr);
48
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void logic_outw(u16 value, unsigned long addr);
49
+
void logic_outl(u32 value, unsigned long addr);
50
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void logic_insb(unsigned long addr, void *buffer, unsigned int count);
51
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void logic_insl(unsigned long addr, void *buffer, unsigned int count);
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void logic_insw(unsigned long addr, void *buffer, unsigned int count);
53
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void logic_outsb(unsigned long addr, const void *buffer, unsigned int count);
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void logic_outsw(unsigned long addr, const void *buffer, unsigned int count);
55
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void logic_outsl(unsigned long addr, const void *buffer, unsigned int count);
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#ifndef inb
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#define inb logic_inb
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#endif
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61
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#ifndef inw
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#define inw logic_inw
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#endif
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65
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#ifndef inl
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#define inl logic_inl
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#endif
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#ifndef outb
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#define outb logic_outb
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#endif
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#ifndef outw
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#define outw logic_outw
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#endif
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+
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#ifndef outl
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#define outl logic_outl
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#endif
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+
81
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#ifndef insb
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#define insb logic_insb
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#endif
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#ifndef insw
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#define insw logic_insw
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#endif
88
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89
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#ifndef insl
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#define insl logic_insl
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#endif
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+
93
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#ifndef outsb
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#define outsb logic_outsb
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#endif
96
+
97
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#ifndef outsw
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#define outsw logic_outsw
99
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#endif
100
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101
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#ifndef outsl
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#define outsl logic_outsl
103
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#endif
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105
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/*
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* We reserve 0x4000 bytes for Indirect IO as so far this library is only
107
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* used by the HiSilicon LPC Host. If needed, we can reserve a wider IO
108
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* area by redefining the macro below.
109
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*/
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#define PIO_INDIRECT_SIZE 0x4000
111
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#define MMIO_UPPER_LIMIT (IO_SPACE_LIMIT - PIO_INDIRECT_SIZE)
112
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#else
113
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#define MMIO_UPPER_LIMIT IO_SPACE_LIMIT
114
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#endif /* CONFIG_INDIRECT_PIO */
115
+
116
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struct logic_pio_hwaddr *find_io_range_by_fwnode(struct fwnode_handle *fwnode);
117
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unsigned long logic_pio_trans_hwaddr(struct fwnode_handle *fwnode,
118
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resource_size_t hw_addr, resource_size_t size);
119
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int logic_pio_register_range(struct logic_pio_hwaddr *newrange);
120
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resource_size_t logic_pio_to_hwaddr(unsigned long pio);
121
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unsigned long logic_pio_trans_cpuaddr(resource_size_t hw_addr);
122
+
123
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#endif /* __LINUX_LOGIC_PIO_H */
+16
lib/Kconfig
+16
lib/Kconfig
···
55
55
config ARCH_HAS_FAST_MULTIPLIER
56
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bool
57
57
58
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config INDIRECT_PIO
59
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bool "Access I/O in non-MMIO mode"
60
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depends on ARM64
61
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help
62
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On some platforms where no separate I/O space exists, there are I/O
63
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hosts which can not be accessed in MMIO mode. Using the logical PIO
64
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mechanism, the host-local I/O resource can be mapped into system
65
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logic PIO space shared with MMIO hosts, such as PCI/PCIe, then the
66
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system can access the I/O devices with the mapped-logic PIO through
67
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I/O accessors.
68
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69
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This way has relatively little I/O performance cost. Please make
70
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sure your devices really need this configure item enabled.
71
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72
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When in doubt, say N.
73
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58
74
config CRC_CCITT
59
75
tristate "CRC-CCITT functions"
60
76
help
+2
lib/Makefile
+2
lib/Makefile
+280
lib/logic_pio.c
+280
lib/logic_pio.c
···
1
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// SPDX-License-Identifier: GPL-2.0+
2
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/*
3
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* Copyright (C) 2017 HiSilicon Limited, All Rights Reserved.
4
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* Author: Gabriele Paoloni <gabriele.paoloni@huawei.com>
5
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* Author: Zhichang Yuan <yuanzhichang@hisilicon.com>
6
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*/
7
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8
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#define pr_fmt(fmt) "LOGIC PIO: " fmt
9
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10
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#include <linux/of.h>
11
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#include <linux/io.h>
12
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#include <linux/logic_pio.h>
13
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#include <linux/mm.h>
14
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#include <linux/rculist.h>
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#include <linux/sizes.h>
16
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#include <linux/slab.h>
17
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18
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/* The unique hardware address list */
19
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static LIST_HEAD(io_range_list);
20
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static DEFINE_MUTEX(io_range_mutex);
21
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22
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/* Consider a kernel general helper for this */
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#define in_range(b, first, len) ((b) >= (first) && (b) < (first) + (len))
24
+
25
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/**
26
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* logic_pio_register_range - register logical PIO range for a host
27
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* @new_range: pointer to the IO range to be registered.
28
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*
29
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* Returns 0 on success, the error code in case of failure.
30
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*
31
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* Register a new IO range node in the IO range list.
32
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*/
33
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int logic_pio_register_range(struct logic_pio_hwaddr *new_range)
34
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{
35
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struct logic_pio_hwaddr *range;
36
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resource_size_t start;
37
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resource_size_t end;
38
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resource_size_t mmio_sz = 0;
39
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resource_size_t iio_sz = MMIO_UPPER_LIMIT;
40
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int ret = 0;
41
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42
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if (!new_range || !new_range->fwnode || !new_range->size)
43
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return -EINVAL;
44
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45
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start = new_range->hw_start;
46
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end = new_range->hw_start + new_range->size;
47
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48
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mutex_lock(&io_range_mutex);
49
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list_for_each_entry_rcu(range, &io_range_list, list) {
50
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if (range->fwnode == new_range->fwnode) {
51
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/* range already there */
52
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goto end_register;
53
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}
54
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if (range->flags == LOGIC_PIO_CPU_MMIO &&
55
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new_range->flags == LOGIC_PIO_CPU_MMIO) {
56
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/* for MMIO ranges we need to check for overlap */
57
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if (start >= range->hw_start + range->size ||
58
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end < range->hw_start) {
59
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mmio_sz += range->size;
60
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} else {
61
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ret = -EFAULT;
62
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goto end_register;
63
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}
64
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} else if (range->flags == LOGIC_PIO_INDIRECT &&
65
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new_range->flags == LOGIC_PIO_INDIRECT) {
66
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iio_sz += range->size;
67
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}
68
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}
69
+
70
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/* range not registered yet, check for available space */
71
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if (new_range->flags == LOGIC_PIO_CPU_MMIO) {
72
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if (mmio_sz + new_range->size - 1 > MMIO_UPPER_LIMIT) {
73
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/* if it's too big check if 64K space can be reserved */
74
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if (mmio_sz + SZ_64K - 1 > MMIO_UPPER_LIMIT) {
75
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ret = -E2BIG;
76
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goto end_register;
77
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}
78
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new_range->size = SZ_64K;
79
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pr_warn("Requested IO range too big, new size set to 64K\n");
80
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}
81
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new_range->io_start = mmio_sz;
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} else if (new_range->flags == LOGIC_PIO_INDIRECT) {
83
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if (iio_sz + new_range->size - 1 > IO_SPACE_LIMIT) {
84
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ret = -E2BIG;
85
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goto end_register;
86
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}
87
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new_range->io_start = iio_sz;
88
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} else {
89
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/* invalid flag */
90
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ret = -EINVAL;
91
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goto end_register;
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}
93
+
94
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list_add_tail_rcu(&new_range->list, &io_range_list);
95
+
96
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end_register:
97
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mutex_unlock(&io_range_mutex);
98
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return ret;
99
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}
100
+
101
+
/**
102
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* find_io_range_by_fwnode - find logical PIO range for given FW node
103
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* @fwnode: FW node handle associated with logical PIO range
104
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*
105
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* Returns pointer to node on success, NULL otherwise.
106
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*
107
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* Traverse the io_range_list to find the registered node for @fwnode.
108
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*/
109
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struct logic_pio_hwaddr *find_io_range_by_fwnode(struct fwnode_handle *fwnode)
110
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{
111
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struct logic_pio_hwaddr *range;
112
+
113
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list_for_each_entry_rcu(range, &io_range_list, list) {
114
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if (range->fwnode == fwnode)
115
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return range;
116
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}
117
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return NULL;
118
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}
119
+
120
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/* Return a registered range given an input PIO token */
121
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static struct logic_pio_hwaddr *find_io_range(unsigned long pio)
122
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{
123
+
struct logic_pio_hwaddr *range;
124
+
125
+
list_for_each_entry_rcu(range, &io_range_list, list) {
126
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if (in_range(pio, range->io_start, range->size))
127
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return range;
128
+
}
129
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pr_err("PIO entry token %lx invalid\n", pio);
130
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return NULL;
131
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}
132
+
133
+
/**
134
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* logic_pio_to_hwaddr - translate logical PIO to HW address
135
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* @pio: logical PIO value
136
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*
137
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* Returns HW address if valid, ~0 otherwise.
138
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*
139
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* Translate the input logical PIO to the corresponding hardware address.
140
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* The input PIO should be unique in the whole logical PIO space.
141
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*/
142
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resource_size_t logic_pio_to_hwaddr(unsigned long pio)
143
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{
144
+
struct logic_pio_hwaddr *range;
145
+
146
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range = find_io_range(pio);
147
+
if (range)
148
+
return range->hw_start + pio - range->io_start;
149
+
150
+
return (resource_size_t)~0;
151
+
}
152
+
153
+
/**
154
+
* logic_pio_trans_hwaddr - translate HW address to logical PIO
155
+
* @fwnode: FW node reference for the host
156
+
* @addr: Host-relative HW address
157
+
* @size: size to translate
158
+
*
159
+
* Returns Logical PIO value if successful, ~0UL otherwise
160
+
*/
161
+
unsigned long logic_pio_trans_hwaddr(struct fwnode_handle *fwnode,
162
+
resource_size_t addr, resource_size_t size)
163
+
{
164
+
struct logic_pio_hwaddr *range;
165
+
166
+
range = find_io_range_by_fwnode(fwnode);
167
+
if (!range || range->flags == LOGIC_PIO_CPU_MMIO) {
168
+
pr_err("IO range not found or invalid\n");
169
+
return ~0UL;
170
+
}
171
+
if (range->size < size) {
172
+
pr_err("resource size %pa cannot fit in IO range size %pa\n",
173
+
&size, &range->size);
174
+
return ~0UL;
175
+
}
176
+
return addr - range->hw_start + range->io_start;
177
+
}
178
+
179
+
unsigned long logic_pio_trans_cpuaddr(resource_size_t addr)
180
+
{
181
+
struct logic_pio_hwaddr *range;
182
+
183
+
list_for_each_entry_rcu(range, &io_range_list, list) {
184
+
if (range->flags != LOGIC_PIO_CPU_MMIO)
185
+
continue;
186
+
if (in_range(addr, range->hw_start, range->size))
187
+
return addr - range->hw_start + range->io_start;
188
+
}
189
+
pr_err("addr %llx not registered in io_range_list\n",
190
+
(unsigned long long) addr);
191
+
return ~0UL;
192
+
}
193
+
194
+
#if defined(CONFIG_INDIRECT_PIO) && defined(PCI_IOBASE)
195
+
#define BUILD_LOGIC_IO(bw, type) \
196
+
type logic_in##bw(unsigned long addr) \
197
+
{ \
198
+
type ret = (type)~0; \
199
+
\
200
+
if (addr < MMIO_UPPER_LIMIT) { \
201
+
ret = read##bw(PCI_IOBASE + addr); \
202
+
} else if (addr >= MMIO_UPPER_LIMIT && addr < IO_SPACE_LIMIT) { \
203
+
struct logic_pio_hwaddr *entry = find_io_range(addr); \
204
+
\
205
+
if (entry && entry->ops) \
206
+
ret = entry->ops->in(entry->hostdata, \
207
+
addr, sizeof(type)); \
208
+
else \
209
+
WARN_ON_ONCE(1); \
210
+
} \
211
+
return ret; \
212
+
} \
213
+
\
214
+
void logic_out##bw(type value, unsigned long addr) \
215
+
{ \
216
+
if (addr < MMIO_UPPER_LIMIT) { \
217
+
write##bw(value, PCI_IOBASE + addr); \
218
+
} else if (addr >= MMIO_UPPER_LIMIT && addr < IO_SPACE_LIMIT) { \
219
+
struct logic_pio_hwaddr *entry = find_io_range(addr); \
220
+
\
221
+
if (entry && entry->ops) \
222
+
entry->ops->out(entry->hostdata, \
223
+
addr, value, sizeof(type)); \
224
+
else \
225
+
WARN_ON_ONCE(1); \
226
+
} \
227
+
} \
228
+
\
229
+
void logic_ins##bw(unsigned long addr, void *buffer, \
230
+
unsigned int count) \
231
+
{ \
232
+
if (addr < MMIO_UPPER_LIMIT) { \
233
+
reads##bw(PCI_IOBASE + addr, buffer, count); \
234
+
} else if (addr >= MMIO_UPPER_LIMIT && addr < IO_SPACE_LIMIT) { \
235
+
struct logic_pio_hwaddr *entry = find_io_range(addr); \
236
+
\
237
+
if (entry && entry->ops) \
238
+
entry->ops->ins(entry->hostdata, \
239
+
addr, buffer, sizeof(type), count); \
240
+
else \
241
+
WARN_ON_ONCE(1); \
242
+
} \
243
+
\
244
+
} \
245
+
\
246
+
void logic_outs##bw(unsigned long addr, const void *buffer, \
247
+
unsigned int count) \
248
+
{ \
249
+
if (addr < MMIO_UPPER_LIMIT) { \
250
+
writes##bw(PCI_IOBASE + addr, buffer, count); \
251
+
} else if (addr >= MMIO_UPPER_LIMIT && addr < IO_SPACE_LIMIT) { \
252
+
struct logic_pio_hwaddr *entry = find_io_range(addr); \
253
+
\
254
+
if (entry && entry->ops) \
255
+
entry->ops->outs(entry->hostdata, \
256
+
addr, buffer, sizeof(type), count); \
257
+
else \
258
+
WARN_ON_ONCE(1); \
259
+
} \
260
+
}
261
+
262
+
BUILD_LOGIC_IO(b, u8)
263
+
EXPORT_SYMBOL(logic_inb);
264
+
EXPORT_SYMBOL(logic_insb);
265
+
EXPORT_SYMBOL(logic_outb);
266
+
EXPORT_SYMBOL(logic_outsb);
267
+
268
+
BUILD_LOGIC_IO(w, u16)
269
+
EXPORT_SYMBOL(logic_inw);
270
+
EXPORT_SYMBOL(logic_insw);
271
+
EXPORT_SYMBOL(logic_outw);
272
+
EXPORT_SYMBOL(logic_outsw);
273
+
274
+
BUILD_LOGIC_IO(l, u32)
275
+
EXPORT_SYMBOL(logic_inl);
276
+
EXPORT_SYMBOL(logic_insl);
277
+
EXPORT_SYMBOL(logic_outl);
278
+
EXPORT_SYMBOL(logic_outsl);
279
+
280
+
#endif /* CONFIG_INDIRECT_PIO && PCI_IOBASE */