Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

usb: isp1760: Add device controller support

The ISP1761 is a dual-mode host and device controller backward
compatible on the host side with the ISP1760. Add support for the device
controller.

Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>

authored by

Laurent Pinchart and committed by
Felipe Balbi
0316ca63 9a66e132

+1768 -5
+7
drivers/usb/gadget/udc/Kconfig
··· 109 109 Select this to support Aeroflex Gaisler GRUSBDC cores from the GRLIB 110 110 VHDL IP core library. 111 111 112 + config USB_ISP1761_UDC 113 + boolean "NXP ISP1761 USB Device Controller" 114 + depends on USB_ISP1760_HCD 115 + help 116 + The NXP ISP1761 is a dual-role high-speed USB host and device 117 + controller. 118 + 112 119 config USB_OMAP 113 120 tristate "OMAP USB Device Controller" 114 121 depends on ARCH_OMAP1
+1
drivers/usb/host/Makefile
··· 6 6 CFLAGS_xhci-trace.o := -I$(src) 7 7 8 8 isp1760-y := isp1760-core.o isp1760-hcd.o isp1760-if.o 9 + isp1760-$(CONFIG_USB_ISP1761_UDC) += isp1760-udc.o 9 10 10 11 fhci-y := fhci-hcd.o fhci-hub.o fhci-q.o 11 12 fhci-y += fhci-mem.o fhci-tds.o fhci-sched.o
+45 -5
drivers/usb/host/isp1760-core.c
··· 24 24 #include "isp1760-core.h" 25 25 #include "isp1760-hcd.h" 26 26 #include "isp1760-regs.h" 27 + #include "isp1760-udc.h" 27 28 28 29 static void isp1760_init_core(struct isp1760_device *isp) 29 30 { 31 + u32 otgctrl; 30 32 u32 hwmode; 31 33 32 34 /* Low-level chip reset */ ··· 62 60 hwmode |= HW_INTR_EDGE_TRIG; 63 61 64 62 /* 63 + * The ISP1761 has a dedicated DC IRQ line but supports sharing the HC 64 + * IRQ line for both the host and device controllers. Hardcode IRQ 65 + * sharing for now and disable the DC interrupts globally to avoid 66 + * spurious interrupts during HCD registration. 67 + */ 68 + if (isp->devflags & ISP1760_FLAG_ISP1761) { 69 + isp1760_write32(isp->regs, DC_MODE, 0); 70 + hwmode |= HW_COMN_IRQ; 71 + } 72 + 73 + /* 65 74 * We have to set this first in case we're in 16-bit mode. 66 75 * Write it twice to ensure correct upper bits if switching 67 76 * to 16-bit mode. ··· 81 68 isp1760_write32(isp->regs, HC_HW_MODE_CTRL, hwmode); 82 69 83 70 /* 84 - * PORT 1 Control register of the ISP1760 is the OTG control register on 85 - * ISP1761. Since there is no OTG or device controller support in this 86 - * driver, we use port 1 as a "normal" USB host port on both chips. 71 + * PORT 1 Control register of the ISP1760 is the OTG control register 72 + * on ISP1761. 73 + * 74 + * TODO: Really support OTG. For now we configure port 1 in device mode 75 + * when OTG is requested. 87 76 */ 88 - isp1760_write32(isp->regs, HC_PORT1_CTRL, PORT1_POWER | PORT1_INIT2); 89 - usleep_range(10000, 11000); 77 + if ((isp->devflags & ISP1760_FLAG_ISP1761) && 78 + (isp->devflags & ISP1760_FLAG_OTG_EN)) 79 + otgctrl = ((HW_DM_PULLDOWN | HW_DP_PULLDOWN) << 16) 80 + | HW_OTG_DISABLE; 81 + else 82 + otgctrl = (HW_SW_SEL_HC_DC << 16) 83 + | (HW_VBUS_DRV | HW_SEL_CP_EXT); 84 + 85 + isp1760_write32(isp->regs, HC_PORT1_CTRL, otgctrl); 90 86 91 87 dev_info(isp->dev, "bus width: %u, oc: %s\n", 92 88 isp->devflags & ISP1760_FLAG_BUS_WIDTH_16 ? 16 : 32, 93 89 isp->devflags & ISP1760_FLAG_ANALOG_OC ? "analog" : "digital"); 90 + } 91 + 92 + void isp1760_set_pullup(struct isp1760_device *isp, bool enable) 93 + { 94 + isp1760_write32(isp->regs, HW_OTG_CTRL_SET, 95 + enable ? HW_DP_PULLUP : HW_DP_PULLUP << 16); 94 96 } 95 97 96 98 int isp1760_register(struct resource *mem, int irq, unsigned long irqflags, ··· 142 114 if (ret < 0) 143 115 return ret; 144 116 117 + if (devflags & ISP1760_FLAG_ISP1761) { 118 + ret = isp1760_udc_register(isp, irq, irqflags | IRQF_SHARED | 119 + IRQF_DISABLED); 120 + if (ret < 0) { 121 + isp1760_hcd_unregister(&isp->hcd); 122 + return ret; 123 + } 124 + } 125 + 145 126 dev_set_drvdata(dev, isp); 146 127 147 128 return 0; ··· 159 122 void isp1760_unregister(struct device *dev) 160 123 { 161 124 struct isp1760_device *isp = dev_get_drvdata(dev); 125 + 126 + if (isp->devflags & ISP1760_FLAG_ISP1761) 127 + isp1760_udc_unregister(isp); 162 128 163 129 isp1760_hcd_unregister(&isp->hcd); 164 130 }
+4
drivers/usb/host/isp1760-core.h
··· 19 19 #include <linux/ioport.h> 20 20 21 21 #include "isp1760-hcd.h" 22 + #include "isp1760-udc.h" 22 23 23 24 struct device; 24 25 struct gpio_desc; ··· 46 45 struct gpio_desc *rst_gpio; 47 46 48 47 struct isp1760_hcd hcd; 48 + struct isp1760_udc udc; 49 49 }; 50 50 51 51 int isp1760_register(struct resource *mem, int irq, unsigned long irqflags, 52 52 struct device *dev, unsigned int devflags); 53 53 void isp1760_unregister(struct device *dev); 54 + 55 + void isp1760_set_pullup(struct isp1760_device *isp, bool enable); 54 56 55 57 static inline u32 isp1760_read32(void __iomem *base, u32 reg) 56 58 {
+110
drivers/usb/host/isp1760-regs.h
··· 16 16 #ifndef _ISP1760_REGS_H_ 17 17 #define _ISP1760_REGS_H_ 18 18 19 + /* ----------------------------------------------------------------------------- 20 + * Host Controller 21 + */ 22 + 19 23 /* EHCI capability registers */ 20 24 #define HC_CAPLENGTH 0x000 21 25 #define HC_LENGTH(p) (((p) >> 00) & 0x00ff) /* bits 7:0 */ ··· 74 70 #define HC_HW_MODE_CTRL 0x300 75 71 #define ALL_ATX_RESET (1 << 31) 76 72 #define HW_ANA_DIGI_OC (1 << 15) 73 + #define HW_DEV_DMA (1 << 11) 74 + #define HW_COMN_IRQ (1 << 10) 75 + #define HW_COMN_DMA (1 << 9) 77 76 #define HW_DATA_BUS_32BIT (1 << 8) 78 77 #define HW_DACK_POL_HIGH (1 << 6) 79 78 #define HW_DREQ_POL_HIGH (1 << 5) ··· 105 98 #define PORT1_INIT2 (1 << 23) 106 99 #define HW_OTG_CTRL_SET 0x374 107 100 #define HW_OTG_CTRL_CLR 0x376 101 + #define HW_OTG_DISABLE (1 << 10) 102 + #define HW_OTG_SE0_EN (1 << 9) 103 + #define HW_BDIS_ACON_EN (1 << 8) 104 + #define HW_SW_SEL_HC_DC (1 << 7) 105 + #define HW_VBUS_CHRG (1 << 6) 106 + #define HW_VBUS_DISCHRG (1 << 5) 107 + #define HW_VBUS_DRV (1 << 4) 108 + #define HW_SEL_CP_EXT (1 << 3) 109 + #define HW_DM_PULLDOWN (1 << 2) 110 + #define HW_DP_PULLDOWN (1 << 1) 111 + #define HW_DP_PULLUP (1 << 0) 108 112 109 113 /* Interrupt Register */ 110 114 #define HC_INTERRUPT_REG 0x310 ··· 134 116 #define HC_ISO_IRQ_MASK_AND_REG 0x324 135 117 #define HC_INT_IRQ_MASK_AND_REG 0x328 136 118 #define HC_ATL_IRQ_MASK_AND_REG 0x32c 119 + 120 + /* ----------------------------------------------------------------------------- 121 + * Peripheral Controller 122 + */ 123 + 124 + /* Initialization Registers */ 125 + #define DC_ADDRESS 0x0200 126 + #define DC_DEVEN (1 << 7) 127 + 128 + #define DC_MODE 0x020c 129 + #define DC_DMACLKON (1 << 9) 130 + #define DC_VBUSSTAT (1 << 8) 131 + #define DC_CLKAON (1 << 7) 132 + #define DC_SNDRSU (1 << 6) 133 + #define DC_GOSUSP (1 << 5) 134 + #define DC_SFRESET (1 << 4) 135 + #define DC_GLINTENA (1 << 3) 136 + #define DC_WKUPCS (1 << 2) 137 + 138 + #define DC_INTCONF 0x0210 139 + #define DC_CDBGMOD_ACK_NAK (0 << 6) 140 + #define DC_CDBGMOD_ACK (1 << 6) 141 + #define DC_CDBGMOD_ACK_1NAK (2 << 6) 142 + #define DC_DDBGMODIN_ACK_NAK (0 << 4) 143 + #define DC_DDBGMODIN_ACK (1 << 4) 144 + #define DC_DDBGMODIN_ACK_1NAK (2 << 4) 145 + #define DC_DDBGMODOUT_ACK_NYET_NAK (0 << 2) 146 + #define DC_DDBGMODOUT_ACK_NYET (1 << 2) 147 + #define DC_DDBGMODOUT_ACK_NYET_1NAK (2 << 2) 148 + #define DC_INTLVL (1 << 1) 149 + #define DC_INTPOL (1 << 0) 150 + 151 + #define DC_DEBUG 0x0212 152 + #define DC_INTENABLE 0x0214 153 + #define DC_IEPTX(n) (1 << (11 + 2 * (n))) 154 + #define DC_IEPRX(n) (1 << (10 + 2 * (n))) 155 + #define DC_IEPRXTX(n) (3 << (10 + 2 * (n))) 156 + #define DC_IEP0SETUP (1 << 8) 157 + #define DC_IEVBUS (1 << 7) 158 + #define DC_IEDMA (1 << 6) 159 + #define DC_IEHS_STA (1 << 5) 160 + #define DC_IERESM (1 << 4) 161 + #define DC_IESUSP (1 << 3) 162 + #define DC_IEPSOF (1 << 2) 163 + #define DC_IESOF (1 << 1) 164 + #define DC_IEBRST (1 << 0) 165 + 166 + /* Data Flow Registers */ 167 + #define DC_EPINDEX 0x022c 168 + #define DC_EP0SETUP (1 << 5) 169 + #define DC_ENDPIDX(n) ((n) << 1) 170 + #define DC_EPDIR (1 << 0) 171 + 172 + #define DC_CTRLFUNC 0x0228 173 + #define DC_CLBUF (1 << 4) 174 + #define DC_VENDP (1 << 3) 175 + #define DC_DSEN (1 << 2) 176 + #define DC_STATUS (1 << 1) 177 + #define DC_STALL (1 << 0) 178 + 179 + #define DC_DATAPORT 0x0220 180 + #define DC_BUFLEN 0x021c 181 + #define DC_DATACOUNT_MASK 0xffff 182 + #define DC_BUFSTAT 0x021e 183 + #define DC_EPMAXPKTSZ 0x0204 184 + 185 + #define DC_EPTYPE 0x0208 186 + #define DC_NOEMPKT (1 << 4) 187 + #define DC_EPENABLE (1 << 3) 188 + #define DC_DBLBUF (1 << 2) 189 + #define DC_ENDPTYP_ISOC (1 << 0) 190 + #define DC_ENDPTYP_BULK (2 << 0) 191 + #define DC_ENDPTYP_INTERRUPT (3 << 0) 192 + 193 + /* DMA Registers */ 194 + #define DC_DMACMD 0x0230 195 + #define DC_DMATXCOUNT 0x0234 196 + #define DC_DMACONF 0x0238 197 + #define DC_DMAHW 0x023c 198 + #define DC_DMAINTREASON 0x0250 199 + #define DC_DMAINTEN 0x0254 200 + #define DC_DMAEP 0x0258 201 + #define DC_DMABURSTCOUNT 0x0264 202 + 203 + /* General Registers */ 204 + #define DC_INTERRUPT 0x0218 205 + #define DC_CHIPID 0x0270 206 + #define DC_FRAMENUM 0x0274 207 + #define DC_SCRATCH 0x0278 208 + #define DC_UNLOCKDEV 0x027c 209 + #define DC_INTPULSEWIDTH 0x0280 210 + #define DC_TESTMODE 0x0284 137 211 138 212 #endif
+1495
drivers/usb/host/isp1760-udc.c
··· 1 + /* 2 + * Driver for the NXP ISP1761 device controller 3 + * 4 + * Copyright 2014 Ideas on Board Oy 5 + * 6 + * Contacts: 7 + * Laurent Pinchart <laurent.pinchart@ideasonboard.com> 8 + * 9 + * This program is free software; you can redistribute it and/or 10 + * modify it under the terms of the GNU General Public License 11 + * version 2 as published by the Free Software Foundation. 12 + */ 13 + 14 + #include <linux/interrupt.h> 15 + #include <linux/io.h> 16 + #include <linux/kernel.h> 17 + #include <linux/list.h> 18 + #include <linux/module.h> 19 + #include <linux/slab.h> 20 + #include <linux/timer.h> 21 + #include <linux/usb.h> 22 + 23 + #include "isp1760-core.h" 24 + #include "isp1760-regs.h" 25 + #include "isp1760-udc.h" 26 + 27 + #define ISP1760_VBUS_POLL_INTERVAL msecs_to_jiffies(500) 28 + 29 + struct isp1760_request { 30 + struct usb_request req; 31 + struct list_head queue; 32 + struct isp1760_ep *ep; 33 + unsigned int packet_size; 34 + }; 35 + 36 + static inline struct isp1760_udc *gadget_to_udc(struct usb_gadget *gadget) 37 + { 38 + return container_of(gadget, struct isp1760_udc, gadget); 39 + } 40 + 41 + static inline struct isp1760_ep *ep_to_udc_ep(struct usb_ep *ep) 42 + { 43 + return container_of(ep, struct isp1760_ep, ep); 44 + } 45 + 46 + static inline struct isp1760_request *req_to_udc_req(struct usb_request *req) 47 + { 48 + return container_of(req, struct isp1760_request, req); 49 + } 50 + 51 + static inline u32 isp1760_udc_read(struct isp1760_udc *udc, u16 reg) 52 + { 53 + return isp1760_read32(udc->regs, reg); 54 + } 55 + 56 + static inline void isp1760_udc_write(struct isp1760_udc *udc, u16 reg, u32 val) 57 + { 58 + isp1760_write32(udc->regs, reg, val); 59 + } 60 + 61 + /* ----------------------------------------------------------------------------- 62 + * Endpoint Management 63 + */ 64 + 65 + static struct isp1760_ep *isp1760_udc_find_ep(struct isp1760_udc *udc, 66 + u16 index) 67 + { 68 + unsigned int i; 69 + 70 + if (index == 0) 71 + return &udc->ep[0]; 72 + 73 + for (i = 1; i < ARRAY_SIZE(udc->ep); ++i) { 74 + if (udc->ep[i].addr == index) 75 + return udc->ep[i].desc ? &udc->ep[i] : NULL; 76 + } 77 + 78 + return NULL; 79 + } 80 + 81 + static void __isp1760_udc_select_ep(struct isp1760_ep *ep, int dir) 82 + { 83 + isp1760_udc_write(ep->udc, DC_EPINDEX, 84 + DC_ENDPIDX(ep->addr & USB_ENDPOINT_NUMBER_MASK) | 85 + (dir == USB_DIR_IN ? DC_EPDIR : 0)); 86 + } 87 + 88 + /** 89 + * isp1760_udc_select_ep - Select an endpoint for register access 90 + * @ep: The endpoint 91 + * 92 + * The ISP1761 endpoint registers are banked. This function selects the target 93 + * endpoint for banked register access. The selection remains valid until the 94 + * next call to this function, the next direct access to the EPINDEX register 95 + * or the next reset, whichever comes first. 96 + * 97 + * Called with the UDC spinlock held. 98 + */ 99 + static void isp1760_udc_select_ep(struct isp1760_ep *ep) 100 + { 101 + __isp1760_udc_select_ep(ep, ep->addr & USB_ENDPOINT_DIR_MASK); 102 + } 103 + 104 + /* Called with the UDC spinlock held. */ 105 + static void isp1760_udc_ctrl_send_status(struct isp1760_ep *ep, int dir) 106 + { 107 + struct isp1760_udc *udc = ep->udc; 108 + 109 + /* 110 + * Proceed to the status stage. The status stage data packet flows in 111 + * the direction opposite to the data stage data packets, we thus need 112 + * to select the OUT/IN endpoint for IN/OUT transfers. 113 + */ 114 + isp1760_udc_write(udc, DC_EPINDEX, DC_ENDPIDX(0) | 115 + (dir == USB_DIR_IN ? 0 : DC_EPDIR)); 116 + isp1760_udc_write(udc, DC_CTRLFUNC, DC_STATUS); 117 + 118 + /* 119 + * The hardware will terminate the request automatically and go back to 120 + * the setup stage without notifying us. 121 + */ 122 + udc->ep0_state = ISP1760_CTRL_SETUP; 123 + } 124 + 125 + /* Called without the UDC spinlock held. */ 126 + static void isp1760_udc_request_complete(struct isp1760_ep *ep, 127 + struct isp1760_request *req, 128 + int status) 129 + { 130 + struct isp1760_udc *udc = ep->udc; 131 + unsigned long flags; 132 + 133 + dev_dbg(ep->udc->isp->dev, "completing request %p with status %d\n", 134 + req, status); 135 + 136 + req->ep = NULL; 137 + req->req.status = status; 138 + req->req.complete(&ep->ep, &req->req); 139 + 140 + spin_lock_irqsave(&udc->lock, flags); 141 + 142 + /* 143 + * When completing control OUT requests, move to the status stage after 144 + * calling the request complete callback. This gives the gadget an 145 + * opportunity to stall the control transfer if needed. 146 + */ 147 + if (status == 0 && ep->addr == 0 && udc->ep0_dir == USB_DIR_OUT) 148 + isp1760_udc_ctrl_send_status(ep, USB_DIR_OUT); 149 + 150 + spin_unlock_irqrestore(&udc->lock, flags); 151 + } 152 + 153 + static void isp1760_udc_ctrl_send_stall(struct isp1760_ep *ep) 154 + { 155 + struct isp1760_udc *udc = ep->udc; 156 + unsigned long flags; 157 + 158 + dev_dbg(ep->udc->isp->dev, "%s(ep%02x)\n", __func__, ep->addr); 159 + 160 + spin_lock_irqsave(&udc->lock, flags); 161 + 162 + /* Stall both the IN and OUT endpoints. */ 163 + __isp1760_udc_select_ep(ep, USB_DIR_OUT); 164 + isp1760_udc_write(udc, DC_CTRLFUNC, DC_STALL); 165 + __isp1760_udc_select_ep(ep, USB_DIR_IN); 166 + isp1760_udc_write(udc, DC_CTRLFUNC, DC_STALL); 167 + 168 + /* A protocol stall completes the control transaction. */ 169 + udc->ep0_state = ISP1760_CTRL_SETUP; 170 + 171 + spin_unlock_irqrestore(&udc->lock, flags); 172 + } 173 + 174 + /* ----------------------------------------------------------------------------- 175 + * Data Endpoints 176 + */ 177 + 178 + /* Called with the UDC spinlock held. */ 179 + static bool isp1760_udc_receive(struct isp1760_ep *ep, 180 + struct isp1760_request *req) 181 + { 182 + struct isp1760_udc *udc = ep->udc; 183 + unsigned int len; 184 + u32 *buf; 185 + int i; 186 + 187 + isp1760_udc_select_ep(ep); 188 + len = isp1760_udc_read(udc, DC_BUFLEN) & DC_DATACOUNT_MASK; 189 + 190 + dev_dbg(udc->isp->dev, "%s: received %u bytes (%u/%u done)\n", 191 + __func__, len, req->req.actual, req->req.length); 192 + 193 + len = min(len, req->req.length - req->req.actual); 194 + 195 + if (!len) { 196 + /* 197 + * There's no data to be read from the FIFO, acknowledge the RX 198 + * interrupt by clearing the buffer. 199 + * 200 + * TODO: What if another packet arrives in the meantime ? The 201 + * datasheet doesn't clearly document how this should be 202 + * handled. 203 + */ 204 + isp1760_udc_write(udc, DC_CTRLFUNC, DC_CLBUF); 205 + return false; 206 + } 207 + 208 + buf = req->req.buf + req->req.actual; 209 + 210 + /* 211 + * Make sure not to read more than one extra byte, otherwise data from 212 + * the next packet might be removed from the FIFO. 213 + */ 214 + for (i = len; i > 2; i -= 4, ++buf) 215 + *buf = le32_to_cpu(isp1760_udc_read(udc, DC_DATAPORT)); 216 + if (i > 0) 217 + *(u16 *)buf = le16_to_cpu(readw(udc->regs + DC_DATAPORT)); 218 + 219 + req->req.actual += len; 220 + 221 + /* 222 + * TODO: The short_not_ok flag isn't supported yet, but isn't used by 223 + * any gadget driver either. 224 + */ 225 + 226 + dev_dbg(udc->isp->dev, 227 + "%s: req %p actual/length %u/%u maxpacket %u packet size %u\n", 228 + __func__, req, req->req.actual, req->req.length, ep->maxpacket, 229 + len); 230 + 231 + ep->rx_pending = false; 232 + 233 + /* 234 + * Complete the request if all data has been received or if a short 235 + * packet has been received. 236 + */ 237 + if (req->req.actual == req->req.length || len < ep->maxpacket) { 238 + list_del(&req->queue); 239 + return true; 240 + } 241 + 242 + return false; 243 + } 244 + 245 + static void isp1760_udc_transmit(struct isp1760_ep *ep, 246 + struct isp1760_request *req) 247 + { 248 + struct isp1760_udc *udc = ep->udc; 249 + u32 *buf = req->req.buf + req->req.actual; 250 + int i; 251 + 252 + req->packet_size = min(req->req.length - req->req.actual, 253 + ep->maxpacket); 254 + 255 + dev_dbg(udc->isp->dev, "%s: transferring %u bytes (%u/%u done)\n", 256 + __func__, req->packet_size, req->req.actual, 257 + req->req.length); 258 + 259 + __isp1760_udc_select_ep(ep, USB_DIR_IN); 260 + 261 + if (req->packet_size) 262 + isp1760_udc_write(udc, DC_BUFLEN, req->packet_size); 263 + 264 + /* 265 + * Make sure not to write more than one extra byte, otherwise extra data 266 + * will stay in the FIFO and will be transmitted during the next control 267 + * request. The endpoint control CLBUF bit is supposed to allow flushing 268 + * the FIFO for this kind of conditions, but doesn't seem to work. 269 + */ 270 + for (i = req->packet_size; i > 2; i -= 4, ++buf) 271 + isp1760_udc_write(udc, DC_DATAPORT, cpu_to_le32(*buf)); 272 + if (i > 0) 273 + writew(cpu_to_le16(*(u16 *)buf), udc->regs + DC_DATAPORT); 274 + 275 + if (ep->addr == 0) 276 + isp1760_udc_write(udc, DC_CTRLFUNC, DC_DSEN); 277 + if (!req->packet_size) 278 + isp1760_udc_write(udc, DC_CTRLFUNC, DC_VENDP); 279 + } 280 + 281 + static void isp1760_ep_rx_ready(struct isp1760_ep *ep) 282 + { 283 + struct isp1760_udc *udc = ep->udc; 284 + struct isp1760_request *req; 285 + bool complete; 286 + 287 + spin_lock(&udc->lock); 288 + 289 + if (ep->addr == 0 && udc->ep0_state != ISP1760_CTRL_DATA_OUT) { 290 + spin_unlock(&udc->lock); 291 + dev_dbg(udc->isp->dev, "%s: invalid ep0 state %u\n", __func__, 292 + udc->ep0_state); 293 + return; 294 + } 295 + 296 + if (ep->addr != 0 && !ep->desc) { 297 + spin_unlock(&udc->lock); 298 + dev_dbg(udc->isp->dev, "%s: ep%02x is disabled\n", __func__, 299 + ep->addr); 300 + return; 301 + } 302 + 303 + if (list_empty(&ep->queue)) { 304 + ep->rx_pending = true; 305 + spin_unlock(&udc->lock); 306 + dev_dbg(udc->isp->dev, "%s: ep%02x (%p) has no request queued\n", 307 + __func__, ep->addr, ep); 308 + return; 309 + } 310 + 311 + req = list_first_entry(&ep->queue, struct isp1760_request, 312 + queue); 313 + complete = isp1760_udc_receive(ep, req); 314 + 315 + spin_unlock(&udc->lock); 316 + 317 + if (complete) 318 + isp1760_udc_request_complete(ep, req, 0); 319 + } 320 + 321 + static void isp1760_ep_tx_complete(struct isp1760_ep *ep) 322 + { 323 + struct isp1760_udc *udc = ep->udc; 324 + struct isp1760_request *complete = NULL; 325 + struct isp1760_request *req; 326 + bool need_zlp; 327 + 328 + spin_lock(&udc->lock); 329 + 330 + if (ep->addr == 0 && udc->ep0_state != ISP1760_CTRL_DATA_IN) { 331 + spin_unlock(&udc->lock); 332 + dev_dbg(udc->isp->dev, "TX IRQ: invalid endpoint state %u\n", 333 + udc->ep0_state); 334 + return; 335 + } 336 + 337 + if (list_empty(&ep->queue)) { 338 + /* 339 + * This can happen for the control endpoint when the reply to 340 + * the GET_STATUS IN control request is sent directly by the 341 + * setup IRQ handler. Just proceed to the status stage. 342 + */ 343 + if (ep->addr == 0) { 344 + isp1760_udc_ctrl_send_status(ep, USB_DIR_IN); 345 + spin_unlock(&udc->lock); 346 + return; 347 + } 348 + 349 + spin_unlock(&udc->lock); 350 + dev_dbg(udc->isp->dev, "%s: ep%02x has no request queued\n", 351 + __func__, ep->addr); 352 + return; 353 + } 354 + 355 + req = list_first_entry(&ep->queue, struct isp1760_request, 356 + queue); 357 + req->req.actual += req->packet_size; 358 + 359 + need_zlp = req->req.actual == req->req.length && 360 + !(req->req.length % ep->maxpacket) && 361 + req->packet_size && req->req.zero; 362 + 363 + dev_dbg(udc->isp->dev, 364 + "TX IRQ: req %p actual/length %u/%u maxpacket %u packet size %u zero %u need zlp %u\n", 365 + req, req->req.actual, req->req.length, ep->maxpacket, 366 + req->packet_size, req->req.zero, need_zlp); 367 + 368 + /* 369 + * Complete the request if all data has been sent and we don't need to 370 + * transmit a zero length packet. 371 + */ 372 + if (req->req.actual == req->req.length && !need_zlp) { 373 + complete = req; 374 + list_del(&req->queue); 375 + 376 + if (ep->addr == 0) 377 + isp1760_udc_ctrl_send_status(ep, USB_DIR_IN); 378 + 379 + if (!list_empty(&ep->queue)) 380 + req = list_first_entry(&ep->queue, 381 + struct isp1760_request, queue); 382 + else 383 + req = NULL; 384 + } 385 + 386 + /* 387 + * Transmit the next packet or start the next request, if any. 388 + * 389 + * TODO: If the endpoint is stalled the next request shouldn't be 390 + * started, but what about the next packet ? 391 + */ 392 + if (req) 393 + isp1760_udc_transmit(ep, req); 394 + 395 + spin_unlock(&udc->lock); 396 + 397 + if (complete) 398 + isp1760_udc_request_complete(ep, complete, 0); 399 + } 400 + 401 + static int __isp1760_udc_set_halt(struct isp1760_ep *ep, bool halt) 402 + { 403 + struct isp1760_udc *udc = ep->udc; 404 + 405 + dev_dbg(udc->isp->dev, "%s: %s halt on ep%02x\n", __func__, 406 + halt ? "set" : "clear", ep->addr); 407 + 408 + if (ep->desc && usb_endpoint_xfer_isoc(ep->desc)) { 409 + dev_dbg(udc->isp->dev, "%s: ep%02x is isochronous\n", __func__, 410 + ep->addr); 411 + return -EINVAL; 412 + } 413 + 414 + isp1760_udc_select_ep(ep); 415 + isp1760_udc_write(udc, DC_CTRLFUNC, halt ? DC_STALL : 0); 416 + 417 + if (ep->addr == 0) { 418 + /* When halting the control endpoint, stall both IN and OUT. */ 419 + __isp1760_udc_select_ep(ep, USB_DIR_IN); 420 + isp1760_udc_write(udc, DC_CTRLFUNC, halt ? DC_STALL : 0); 421 + } else if (!halt) { 422 + /* Reset the data PID by cycling the endpoint enable bit. */ 423 + u16 eptype = isp1760_udc_read(udc, DC_EPTYPE); 424 + 425 + isp1760_udc_write(udc, DC_EPTYPE, eptype & ~DC_EPENABLE); 426 + isp1760_udc_write(udc, DC_EPTYPE, eptype); 427 + 428 + /* 429 + * Disabling the endpoint emptied the transmit FIFO, fill it 430 + * again if a request is pending. 431 + * 432 + * TODO: Does the gadget framework require synchronizatino with 433 + * the TX IRQ handler ? 434 + */ 435 + if ((ep->addr & USB_DIR_IN) && !list_empty(&ep->queue)) { 436 + struct isp1760_request *req; 437 + 438 + req = list_first_entry(&ep->queue, 439 + struct isp1760_request, queue); 440 + isp1760_udc_transmit(ep, req); 441 + } 442 + } 443 + 444 + ep->halted = halt; 445 + 446 + return 0; 447 + } 448 + 449 + /* ----------------------------------------------------------------------------- 450 + * Control Endpoint 451 + */ 452 + 453 + static int isp1760_udc_get_status(struct isp1760_udc *udc, 454 + const struct usb_ctrlrequest *req) 455 + { 456 + struct isp1760_ep *ep; 457 + u16 status; 458 + 459 + if (req->wLength != cpu_to_le16(2) || req->wValue != cpu_to_le16(0)) 460 + return -EINVAL; 461 + 462 + switch (req->bRequestType) { 463 + case USB_DIR_IN | USB_RECIP_DEVICE: 464 + status = udc->devstatus; 465 + break; 466 + 467 + case USB_DIR_IN | USB_RECIP_INTERFACE: 468 + status = 0; 469 + break; 470 + 471 + case USB_DIR_IN | USB_RECIP_ENDPOINT: 472 + ep = isp1760_udc_find_ep(udc, le16_to_cpu(req->wIndex)); 473 + if (!ep) 474 + return -EINVAL; 475 + 476 + status = 0; 477 + if (ep->halted) 478 + status |= 1 << USB_ENDPOINT_HALT; 479 + break; 480 + 481 + default: 482 + return -EINVAL; 483 + } 484 + 485 + isp1760_udc_write(udc, DC_EPINDEX, DC_ENDPIDX(0) | DC_EPDIR); 486 + isp1760_udc_write(udc, DC_BUFLEN, 2); 487 + 488 + writew(cpu_to_le16(status), udc->regs + DC_DATAPORT); 489 + 490 + isp1760_udc_write(udc, DC_CTRLFUNC, DC_DSEN); 491 + 492 + dev_dbg(udc->isp->dev, "%s: status 0x%04x\n", __func__, status); 493 + 494 + return 0; 495 + } 496 + 497 + static int isp1760_udc_set_address(struct isp1760_udc *udc, u16 addr) 498 + { 499 + if (addr > 127) { 500 + dev_dbg(udc->isp->dev, "invalid device address %u\n", addr); 501 + return -EINVAL; 502 + } 503 + 504 + if (udc->gadget.state != USB_STATE_DEFAULT && 505 + udc->gadget.state != USB_STATE_ADDRESS) { 506 + dev_dbg(udc->isp->dev, "can't set address in state %u\n", 507 + udc->gadget.state); 508 + return -EINVAL; 509 + } 510 + 511 + usb_gadget_set_state(&udc->gadget, addr ? USB_STATE_ADDRESS : 512 + USB_STATE_DEFAULT); 513 + 514 + isp1760_udc_write(udc, DC_ADDRESS, DC_DEVEN | addr); 515 + 516 + spin_lock(&udc->lock); 517 + isp1760_udc_ctrl_send_status(&udc->ep[0], USB_DIR_OUT); 518 + spin_unlock(&udc->lock); 519 + 520 + return 0; 521 + } 522 + 523 + static bool isp1760_ep0_setup_standard(struct isp1760_udc *udc, 524 + struct usb_ctrlrequest *req) 525 + { 526 + bool stall; 527 + 528 + switch (req->bRequest) { 529 + case USB_REQ_GET_STATUS: 530 + return isp1760_udc_get_status(udc, req); 531 + 532 + case USB_REQ_CLEAR_FEATURE: 533 + switch (req->bRequestType) { 534 + case USB_DIR_OUT | USB_RECIP_DEVICE: { 535 + /* TODO: Handle remote wakeup feature. */ 536 + return true; 537 + } 538 + 539 + case USB_DIR_OUT | USB_RECIP_ENDPOINT: { 540 + u16 index = le16_to_cpu(req->wIndex); 541 + struct isp1760_ep *ep; 542 + 543 + if (req->wLength != cpu_to_le16(0) || 544 + req->wValue != cpu_to_le16(USB_ENDPOINT_HALT)) 545 + return true; 546 + 547 + ep = isp1760_udc_find_ep(udc, index); 548 + if (!ep) 549 + return true; 550 + 551 + spin_lock(&udc->lock); 552 + 553 + /* 554 + * If the endpoint is wedged only the gadget can clear 555 + * the halt feature. Pretend success in that case, but 556 + * keep the endpoint halted. 557 + */ 558 + if (!ep->wedged) 559 + stall = __isp1760_udc_set_halt(ep, false); 560 + else 561 + stall = false; 562 + 563 + if (!stall) 564 + isp1760_udc_ctrl_send_status(&udc->ep[0], 565 + USB_DIR_OUT); 566 + 567 + spin_unlock(&udc->lock); 568 + return stall; 569 + } 570 + 571 + default: 572 + return true; 573 + } 574 + break; 575 + 576 + case USB_REQ_SET_FEATURE: 577 + switch (req->bRequestType) { 578 + case USB_DIR_OUT | USB_RECIP_DEVICE: { 579 + /* TODO: Handle remote wakeup and test mode features */ 580 + return true; 581 + } 582 + 583 + case USB_DIR_OUT | USB_RECIP_ENDPOINT: { 584 + u16 index = le16_to_cpu(req->wIndex); 585 + struct isp1760_ep *ep; 586 + 587 + if (req->wLength != cpu_to_le16(0) || 588 + req->wValue != cpu_to_le16(USB_ENDPOINT_HALT)) 589 + return true; 590 + 591 + ep = isp1760_udc_find_ep(udc, index); 592 + if (!ep) 593 + return true; 594 + 595 + spin_lock(&udc->lock); 596 + 597 + stall = __isp1760_udc_set_halt(ep, true); 598 + if (!stall) 599 + isp1760_udc_ctrl_send_status(&udc->ep[0], 600 + USB_DIR_OUT); 601 + 602 + spin_unlock(&udc->lock); 603 + return stall; 604 + } 605 + 606 + default: 607 + return true; 608 + } 609 + break; 610 + 611 + case USB_REQ_SET_ADDRESS: 612 + if (req->bRequestType != (USB_DIR_OUT | USB_RECIP_DEVICE)) 613 + return true; 614 + 615 + return isp1760_udc_set_address(udc, le16_to_cpu(req->wValue)); 616 + 617 + case USB_REQ_SET_CONFIGURATION: 618 + if (req->bRequestType != (USB_DIR_OUT | USB_RECIP_DEVICE)) 619 + return true; 620 + 621 + if (udc->gadget.state != USB_STATE_ADDRESS && 622 + udc->gadget.state != USB_STATE_CONFIGURED) 623 + return true; 624 + 625 + stall = udc->driver->setup(&udc->gadget, req) < 0; 626 + if (stall) 627 + return true; 628 + 629 + usb_gadget_set_state(&udc->gadget, req->wValue ? 630 + USB_STATE_CONFIGURED : USB_STATE_ADDRESS); 631 + 632 + /* 633 + * SET_CONFIGURATION (and SET_INTERFACE) must reset the halt 634 + * feature on all endpoints. There is however no need to do so 635 + * explicitly here as the gadget driver will disable and 636 + * reenable endpoints, clearing the halt feature. 637 + */ 638 + return false; 639 + 640 + default: 641 + return udc->driver->setup(&udc->gadget, req) < 0; 642 + } 643 + } 644 + 645 + static void isp1760_ep0_setup(struct isp1760_udc *udc) 646 + { 647 + union { 648 + struct usb_ctrlrequest r; 649 + u32 data[2]; 650 + } req; 651 + unsigned int count; 652 + bool stall = false; 653 + 654 + spin_lock(&udc->lock); 655 + 656 + isp1760_udc_write(udc, DC_EPINDEX, DC_EP0SETUP); 657 + 658 + count = isp1760_udc_read(udc, DC_BUFLEN) & DC_DATACOUNT_MASK; 659 + if (count != sizeof(req)) { 660 + spin_unlock(&udc->lock); 661 + 662 + dev_err(udc->isp->dev, "invalid length %u for setup packet\n", 663 + count); 664 + 665 + isp1760_udc_ctrl_send_stall(&udc->ep[0]); 666 + return; 667 + } 668 + 669 + req.data[0] = isp1760_udc_read(udc, DC_DATAPORT); 670 + req.data[1] = isp1760_udc_read(udc, DC_DATAPORT); 671 + 672 + if (udc->ep0_state != ISP1760_CTRL_SETUP) { 673 + spin_unlock(&udc->lock); 674 + dev_dbg(udc->isp->dev, "unexpected SETUP packet\n"); 675 + return; 676 + } 677 + 678 + /* Move to the data stage. */ 679 + if (!req.r.wLength) 680 + udc->ep0_state = ISP1760_CTRL_STATUS; 681 + else if (req.r.bRequestType & USB_DIR_IN) 682 + udc->ep0_state = ISP1760_CTRL_DATA_IN; 683 + else 684 + udc->ep0_state = ISP1760_CTRL_DATA_OUT; 685 + 686 + udc->ep0_dir = req.r.bRequestType & USB_DIR_IN; 687 + udc->ep0_length = le16_to_cpu(req.r.wLength); 688 + 689 + spin_unlock(&udc->lock); 690 + 691 + dev_dbg(udc->isp->dev, 692 + "%s: bRequestType 0x%02x bRequest 0x%02x wValue 0x%04x wIndex 0x%04x wLength 0x%04x\n", 693 + __func__, req.r.bRequestType, req.r.bRequest, 694 + le16_to_cpu(req.r.wValue), le16_to_cpu(req.r.wIndex), 695 + le16_to_cpu(req.r.wLength)); 696 + 697 + if ((req.r.bRequestType & USB_TYPE_MASK) == USB_TYPE_STANDARD) 698 + stall = isp1760_ep0_setup_standard(udc, &req.r); 699 + else 700 + stall = udc->driver->setup(&udc->gadget, &req.r) < 0; 701 + 702 + if (stall) 703 + isp1760_udc_ctrl_send_stall(&udc->ep[0]); 704 + } 705 + 706 + /* ----------------------------------------------------------------------------- 707 + * Gadget Endpoint Operations 708 + */ 709 + 710 + static int isp1760_ep_enable(struct usb_ep *ep, 711 + const struct usb_endpoint_descriptor *desc) 712 + { 713 + struct isp1760_ep *uep = ep_to_udc_ep(ep); 714 + struct isp1760_udc *udc = uep->udc; 715 + unsigned long flags; 716 + unsigned int type; 717 + 718 + dev_dbg(uep->udc->isp->dev, "%s\n", __func__); 719 + 720 + /* 721 + * Validate the descriptor. The control endpoint can't be enabled 722 + * manually. 723 + */ 724 + if (desc->bDescriptorType != USB_DT_ENDPOINT || 725 + desc->bEndpointAddress == 0 || 726 + desc->bEndpointAddress != uep->addr || 727 + le16_to_cpu(desc->wMaxPacketSize) > ep->maxpacket) { 728 + dev_dbg(udc->isp->dev, 729 + "%s: invalid descriptor type %u addr %02x ep addr %02x max packet size %u/%u\n", 730 + __func__, desc->bDescriptorType, 731 + desc->bEndpointAddress, uep->addr, 732 + le16_to_cpu(desc->wMaxPacketSize), ep->maxpacket); 733 + return -EINVAL; 734 + } 735 + 736 + switch (usb_endpoint_type(desc)) { 737 + case USB_ENDPOINT_XFER_ISOC: 738 + type = DC_ENDPTYP_ISOC; 739 + break; 740 + case USB_ENDPOINT_XFER_BULK: 741 + type = DC_ENDPTYP_BULK; 742 + break; 743 + case USB_ENDPOINT_XFER_INT: 744 + type = DC_ENDPTYP_INTERRUPT; 745 + break; 746 + case USB_ENDPOINT_XFER_CONTROL: 747 + default: 748 + dev_dbg(udc->isp->dev, "%s: control endpoints unsupported\n", 749 + __func__); 750 + return -EINVAL; 751 + } 752 + 753 + spin_lock_irqsave(&udc->lock, flags); 754 + 755 + uep->desc = desc; 756 + uep->maxpacket = le16_to_cpu(desc->wMaxPacketSize); 757 + uep->rx_pending = false; 758 + uep->halted = false; 759 + uep->wedged = false; 760 + 761 + isp1760_udc_select_ep(uep); 762 + isp1760_udc_write(udc, DC_EPMAXPKTSZ, uep->maxpacket); 763 + isp1760_udc_write(udc, DC_BUFLEN, uep->maxpacket); 764 + isp1760_udc_write(udc, DC_EPTYPE, DC_EPENABLE | type); 765 + 766 + spin_unlock_irqrestore(&udc->lock, flags); 767 + 768 + return 0; 769 + } 770 + 771 + static int isp1760_ep_disable(struct usb_ep *ep) 772 + { 773 + struct isp1760_ep *uep = ep_to_udc_ep(ep); 774 + struct isp1760_udc *udc = uep->udc; 775 + struct isp1760_request *req, *nreq; 776 + LIST_HEAD(req_list); 777 + unsigned long flags; 778 + 779 + dev_dbg(udc->isp->dev, "%s\n", __func__); 780 + 781 + spin_lock_irqsave(&udc->lock, flags); 782 + 783 + if (!uep->desc) { 784 + dev_dbg(udc->isp->dev, "%s: endpoint not enabled\n", __func__); 785 + spin_unlock_irqrestore(&udc->lock, flags); 786 + return -EINVAL; 787 + } 788 + 789 + uep->desc = NULL; 790 + uep->maxpacket = 0; 791 + 792 + isp1760_udc_select_ep(uep); 793 + isp1760_udc_write(udc, DC_EPTYPE, 0); 794 + 795 + /* TODO Synchronize with the IRQ handler */ 796 + 797 + list_splice_init(&uep->queue, &req_list); 798 + 799 + spin_unlock_irqrestore(&udc->lock, flags); 800 + 801 + list_for_each_entry_safe(req, nreq, &req_list, queue) { 802 + list_del(&req->queue); 803 + isp1760_udc_request_complete(uep, req, -ESHUTDOWN); 804 + } 805 + 806 + return 0; 807 + } 808 + 809 + static struct usb_request *isp1760_ep_alloc_request(struct usb_ep *ep, 810 + gfp_t gfp_flags) 811 + { 812 + struct isp1760_request *req; 813 + 814 + req = kzalloc(sizeof(*req), gfp_flags); 815 + 816 + return &req->req; 817 + } 818 + 819 + static void isp1760_ep_free_request(struct usb_ep *ep, struct usb_request *_req) 820 + { 821 + struct isp1760_request *req = req_to_udc_req(_req); 822 + 823 + kfree(req); 824 + } 825 + 826 + static int isp1760_ep_queue(struct usb_ep *ep, struct usb_request *_req, 827 + gfp_t gfp_flags) 828 + { 829 + struct isp1760_request *req = req_to_udc_req(_req); 830 + struct isp1760_ep *uep = ep_to_udc_ep(ep); 831 + struct isp1760_udc *udc = uep->udc; 832 + bool complete = false; 833 + unsigned long flags; 834 + int ret = 0; 835 + 836 + _req->status = -EINPROGRESS; 837 + _req->actual = 0; 838 + 839 + spin_lock_irqsave(&udc->lock, flags); 840 + 841 + dev_dbg(udc->isp->dev, 842 + "%s: req %p (%u bytes%s) ep %p(0x%02x)\n", __func__, _req, 843 + _req->length, _req->zero ? " (zlp)" : "", uep, uep->addr); 844 + 845 + req->ep = uep; 846 + 847 + if (uep->addr == 0) { 848 + if (_req->length != udc->ep0_length && 849 + udc->ep0_state != ISP1760_CTRL_DATA_IN) { 850 + dev_dbg(udc->isp->dev, 851 + "%s: invalid length %u for req %p\n", 852 + __func__, _req->length, req); 853 + ret = -EINVAL; 854 + goto done; 855 + } 856 + 857 + switch (udc->ep0_state) { 858 + case ISP1760_CTRL_DATA_IN: 859 + dev_dbg(udc->isp->dev, "%s: transmitting req %p\n", 860 + __func__, req); 861 + 862 + list_add_tail(&req->queue, &uep->queue); 863 + isp1760_udc_transmit(uep, req); 864 + break; 865 + 866 + case ISP1760_CTRL_DATA_OUT: 867 + list_add_tail(&req->queue, &uep->queue); 868 + __isp1760_udc_select_ep(uep, USB_DIR_OUT); 869 + isp1760_udc_write(udc, DC_CTRLFUNC, DC_DSEN); 870 + break; 871 + 872 + case ISP1760_CTRL_STATUS: 873 + complete = true; 874 + break; 875 + 876 + default: 877 + dev_dbg(udc->isp->dev, "%s: invalid ep0 state\n", 878 + __func__); 879 + ret = -EINVAL; 880 + break; 881 + } 882 + } else if (uep->desc) { 883 + bool empty = list_empty(&uep->queue); 884 + 885 + list_add_tail(&req->queue, &uep->queue); 886 + if ((uep->addr & USB_DIR_IN) && !uep->halted && empty) 887 + isp1760_udc_transmit(uep, req); 888 + else if (!(uep->addr & USB_DIR_IN) && uep->rx_pending) 889 + complete = isp1760_udc_receive(uep, req); 890 + } else { 891 + dev_dbg(udc->isp->dev, 892 + "%s: can't queue request to disabled ep%02x\n", 893 + __func__, uep->addr); 894 + ret = -ESHUTDOWN; 895 + } 896 + 897 + done: 898 + if (ret < 0) 899 + req->ep = NULL; 900 + 901 + spin_unlock_irqrestore(&udc->lock, flags); 902 + 903 + if (complete) 904 + isp1760_udc_request_complete(uep, req, 0); 905 + 906 + return ret; 907 + } 908 + 909 + static int isp1760_ep_dequeue(struct usb_ep *ep, struct usb_request *_req) 910 + { 911 + struct isp1760_request *req = req_to_udc_req(_req); 912 + struct isp1760_ep *uep = ep_to_udc_ep(ep); 913 + struct isp1760_udc *udc = uep->udc; 914 + unsigned long flags; 915 + 916 + dev_dbg(uep->udc->isp->dev, "%s(ep%02x)\n", __func__, uep->addr); 917 + 918 + spin_lock_irqsave(&udc->lock, flags); 919 + 920 + if (req->ep != uep) 921 + req = NULL; 922 + else 923 + list_del(&req->queue); 924 + 925 + spin_unlock_irqrestore(&udc->lock, flags); 926 + 927 + if (!req) 928 + return -EINVAL; 929 + 930 + isp1760_udc_request_complete(uep, req, -ECONNRESET); 931 + return 0; 932 + } 933 + 934 + static int __isp1760_ep_set_halt(struct isp1760_ep *uep, bool stall, bool wedge) 935 + { 936 + struct isp1760_udc *udc = uep->udc; 937 + int ret; 938 + 939 + if (!uep->addr) { 940 + /* 941 + * Halting the control endpoint is only valid as a delayed error 942 + * response to a SETUP packet. Make sure EP0 is in the right 943 + * stage and that the gadget isn't trying to clear the halt 944 + * condition. 945 + */ 946 + if (WARN_ON(udc->ep0_state == ISP1760_CTRL_SETUP || !stall || 947 + wedge)) { 948 + return -EINVAL; 949 + } 950 + } 951 + 952 + if (uep->addr && !uep->desc) { 953 + dev_dbg(udc->isp->dev, "%s: ep%02x is disabled\n", __func__, 954 + uep->addr); 955 + return -EINVAL; 956 + } 957 + 958 + if (uep->addr & USB_DIR_IN) { 959 + /* Refuse to halt IN endpoints with active transfers. */ 960 + if (!list_empty(&uep->queue)) { 961 + dev_dbg(udc->isp->dev, 962 + "%s: ep%02x has request pending\n", __func__, 963 + uep->addr); 964 + return -EAGAIN; 965 + } 966 + } 967 + 968 + ret = __isp1760_udc_set_halt(uep, stall); 969 + if (ret < 0) 970 + return ret; 971 + 972 + if (!uep->addr) { 973 + /* 974 + * Stalling EP0 completes the control transaction, move back to 975 + * the SETUP state. 976 + */ 977 + udc->ep0_state = ISP1760_CTRL_SETUP; 978 + return 0; 979 + } 980 + 981 + if (wedge) 982 + uep->wedged = true; 983 + else if (!stall) 984 + uep->wedged = false; 985 + 986 + return 0; 987 + } 988 + 989 + static int isp1760_ep_set_halt(struct usb_ep *ep, int value) 990 + { 991 + struct isp1760_ep *uep = ep_to_udc_ep(ep); 992 + unsigned long flags; 993 + int ret; 994 + 995 + dev_dbg(uep->udc->isp->dev, "%s: %s halt on ep%02x\n", __func__, 996 + value ? "set" : "clear", uep->addr); 997 + 998 + spin_lock_irqsave(&uep->udc->lock, flags); 999 + ret = __isp1760_ep_set_halt(uep, value, false); 1000 + spin_unlock_irqrestore(&uep->udc->lock, flags); 1001 + 1002 + return ret; 1003 + } 1004 + 1005 + static int isp1760_ep_set_wedge(struct usb_ep *ep) 1006 + { 1007 + struct isp1760_ep *uep = ep_to_udc_ep(ep); 1008 + unsigned long flags; 1009 + int ret; 1010 + 1011 + dev_dbg(uep->udc->isp->dev, "%s: set wedge on ep%02x)\n", __func__, 1012 + uep->addr); 1013 + 1014 + spin_lock_irqsave(&uep->udc->lock, flags); 1015 + ret = __isp1760_ep_set_halt(uep, true, true); 1016 + spin_unlock_irqrestore(&uep->udc->lock, flags); 1017 + 1018 + return ret; 1019 + } 1020 + 1021 + static void isp1760_ep_fifo_flush(struct usb_ep *ep) 1022 + { 1023 + struct isp1760_ep *uep = ep_to_udc_ep(ep); 1024 + struct isp1760_udc *udc = uep->udc; 1025 + unsigned long flags; 1026 + 1027 + spin_lock_irqsave(&udc->lock, flags); 1028 + 1029 + isp1760_udc_select_ep(uep); 1030 + 1031 + /* 1032 + * Set the CLBUF bit twice to flush both buffers in case double 1033 + * buffering is enabled. 1034 + */ 1035 + isp1760_udc_write(udc, DC_CTRLFUNC, DC_CLBUF); 1036 + isp1760_udc_write(udc, DC_CTRLFUNC, DC_CLBUF); 1037 + 1038 + spin_unlock_irqrestore(&udc->lock, flags); 1039 + } 1040 + 1041 + static const struct usb_ep_ops isp1760_ep_ops = { 1042 + .enable = isp1760_ep_enable, 1043 + .disable = isp1760_ep_disable, 1044 + .alloc_request = isp1760_ep_alloc_request, 1045 + .free_request = isp1760_ep_free_request, 1046 + .queue = isp1760_ep_queue, 1047 + .dequeue = isp1760_ep_dequeue, 1048 + .set_halt = isp1760_ep_set_halt, 1049 + .set_wedge = isp1760_ep_set_wedge, 1050 + .fifo_flush = isp1760_ep_fifo_flush, 1051 + }; 1052 + 1053 + /* ----------------------------------------------------------------------------- 1054 + * Device States 1055 + */ 1056 + 1057 + /* Called with the UDC spinlock held. */ 1058 + static void isp1760_udc_connect(struct isp1760_udc *udc) 1059 + { 1060 + usb_gadget_set_state(&udc->gadget, USB_STATE_POWERED); 1061 + mod_timer(&udc->vbus_timer, jiffies + ISP1760_VBUS_POLL_INTERVAL); 1062 + } 1063 + 1064 + /* Called with the UDC spinlock held. */ 1065 + static void isp1760_udc_disconnect(struct isp1760_udc *udc) 1066 + { 1067 + if (udc->gadget.state < USB_STATE_POWERED) 1068 + return; 1069 + 1070 + dev_dbg(udc->isp->dev, "Device disconnected in state %u\n", 1071 + udc->gadget.state); 1072 + 1073 + udc->gadget.speed = USB_SPEED_UNKNOWN; 1074 + usb_gadget_set_state(&udc->gadget, USB_STATE_ATTACHED); 1075 + 1076 + if (udc->driver->disconnect) 1077 + udc->driver->disconnect(&udc->gadget); 1078 + 1079 + del_timer(&udc->vbus_timer); 1080 + 1081 + /* TODO Reset all endpoints ? */ 1082 + } 1083 + 1084 + static void isp1760_udc_init_hw(struct isp1760_udc *udc) 1085 + { 1086 + /* 1087 + * The device controller currently shares its interrupt with the host 1088 + * controller, the DC_IRQ polarity and signaling mode are ignored. Set 1089 + * the to active-low level-triggered. 1090 + * 1091 + * Configure the control, in and out pipes to generate interrupts on 1092 + * ACK tokens only (and NYET for the out pipe). The default 1093 + * configuration also generates an interrupt on the first NACK token. 1094 + */ 1095 + isp1760_udc_write(udc, DC_INTCONF, DC_CDBGMOD_ACK | DC_DDBGMODIN_ACK | 1096 + DC_DDBGMODOUT_ACK_NYET); 1097 + 1098 + isp1760_udc_write(udc, DC_INTENABLE, DC_IEPRXTX(7) | DC_IEPRXTX(6) | 1099 + DC_IEPRXTX(5) | DC_IEPRXTX(4) | DC_IEPRXTX(3) | 1100 + DC_IEPRXTX(2) | DC_IEPRXTX(1) | DC_IEPRXTX(0) | 1101 + DC_IEP0SETUP | DC_IEVBUS | DC_IERESM | DC_IESUSP | 1102 + DC_IEHS_STA | DC_IEBRST); 1103 + 1104 + if (udc->connected) 1105 + isp1760_set_pullup(udc->isp, true); 1106 + 1107 + isp1760_udc_write(udc, DC_ADDRESS, DC_DEVEN); 1108 + } 1109 + 1110 + static void isp1760_udc_reset(struct isp1760_udc *udc) 1111 + { 1112 + unsigned long flags; 1113 + 1114 + spin_lock_irqsave(&udc->lock, flags); 1115 + 1116 + /* 1117 + * The bus reset has reset most registers to their default value, 1118 + * reinitialize the UDC hardware. 1119 + */ 1120 + isp1760_udc_init_hw(udc); 1121 + 1122 + udc->ep0_state = ISP1760_CTRL_SETUP; 1123 + udc->gadget.speed = USB_SPEED_FULL; 1124 + 1125 + usb_gadget_udc_reset(&udc->gadget, udc->driver); 1126 + 1127 + spin_unlock_irqrestore(&udc->lock, flags); 1128 + } 1129 + 1130 + static void isp1760_udc_suspend(struct isp1760_udc *udc) 1131 + { 1132 + if (udc->gadget.state < USB_STATE_DEFAULT) 1133 + return; 1134 + 1135 + if (udc->driver->suspend) 1136 + udc->driver->suspend(&udc->gadget); 1137 + } 1138 + 1139 + static void isp1760_udc_resume(struct isp1760_udc *udc) 1140 + { 1141 + if (udc->gadget.state < USB_STATE_DEFAULT) 1142 + return; 1143 + 1144 + if (udc->driver->resume) 1145 + udc->driver->resume(&udc->gadget); 1146 + } 1147 + 1148 + /* ----------------------------------------------------------------------------- 1149 + * Gadget Operations 1150 + */ 1151 + 1152 + static int isp1760_udc_get_frame(struct usb_gadget *gadget) 1153 + { 1154 + struct isp1760_udc *udc = gadget_to_udc(gadget); 1155 + 1156 + return isp1760_udc_read(udc, DC_FRAMENUM) & ((1 << 11) - 1); 1157 + } 1158 + 1159 + static int isp1760_udc_wakeup(struct usb_gadget *gadget) 1160 + { 1161 + struct isp1760_udc *udc = gadget_to_udc(gadget); 1162 + 1163 + dev_dbg(udc->isp->dev, "%s\n", __func__); 1164 + return -ENOTSUPP; 1165 + } 1166 + 1167 + static int isp1760_udc_set_selfpowered(struct usb_gadget *gadget, 1168 + int is_selfpowered) 1169 + { 1170 + struct isp1760_udc *udc = gadget_to_udc(gadget); 1171 + 1172 + if (is_selfpowered) 1173 + udc->devstatus |= 1 << USB_DEVICE_SELF_POWERED; 1174 + else 1175 + udc->devstatus &= ~(1 << USB_DEVICE_SELF_POWERED); 1176 + 1177 + return 0; 1178 + } 1179 + 1180 + static int isp1760_udc_pullup(struct usb_gadget *gadget, int is_on) 1181 + { 1182 + struct isp1760_udc *udc = gadget_to_udc(gadget); 1183 + 1184 + isp1760_set_pullup(udc->isp, is_on); 1185 + udc->connected = is_on; 1186 + 1187 + return 0; 1188 + } 1189 + 1190 + static int isp1760_udc_start(struct usb_gadget *gadget, 1191 + struct usb_gadget_driver *driver) 1192 + { 1193 + struct isp1760_udc *udc = gadget_to_udc(gadget); 1194 + 1195 + /* The hardware doesn't support low speed. */ 1196 + if (driver->max_speed < USB_SPEED_FULL) { 1197 + dev_err(udc->isp->dev, "Invalid gadget driver\n"); 1198 + return -EINVAL; 1199 + } 1200 + 1201 + spin_lock(&udc->lock); 1202 + 1203 + if (udc->driver) { 1204 + dev_err(udc->isp->dev, "UDC already has a gadget driver\n"); 1205 + spin_unlock(&udc->lock); 1206 + return -EBUSY; 1207 + } 1208 + 1209 + udc->driver = driver; 1210 + 1211 + spin_unlock(&udc->lock); 1212 + 1213 + dev_dbg(udc->isp->dev, "starting UDC with driver %s\n", 1214 + driver->function); 1215 + 1216 + udc->devstatus = 0; 1217 + udc->connected = true; 1218 + 1219 + usb_gadget_set_state(&udc->gadget, USB_STATE_ATTACHED); 1220 + 1221 + /* DMA isn't supported yet, don't enable the DMA clock. */ 1222 + isp1760_udc_write(udc, DC_MODE, DC_GLINTENA); 1223 + 1224 + isp1760_udc_init_hw(udc); 1225 + 1226 + dev_dbg(udc->isp->dev, "UDC started with driver %s\n", 1227 + driver->function); 1228 + 1229 + return 0; 1230 + } 1231 + 1232 + static int isp1760_udc_stop(struct usb_gadget *gadget) 1233 + { 1234 + struct isp1760_udc *udc = gadget_to_udc(gadget); 1235 + 1236 + dev_dbg(udc->isp->dev, "%s\n", __func__); 1237 + 1238 + del_timer_sync(&udc->vbus_timer); 1239 + 1240 + isp1760_udc_write(udc, DC_MODE, 0); 1241 + 1242 + spin_lock(&udc->lock); 1243 + udc->driver = NULL; 1244 + spin_unlock(&udc->lock); 1245 + 1246 + return 0; 1247 + } 1248 + 1249 + static struct usb_gadget_ops isp1760_udc_ops = { 1250 + .get_frame = isp1760_udc_get_frame, 1251 + .wakeup = isp1760_udc_wakeup, 1252 + .set_selfpowered = isp1760_udc_set_selfpowered, 1253 + .pullup = isp1760_udc_pullup, 1254 + .udc_start = isp1760_udc_start, 1255 + .udc_stop = isp1760_udc_stop, 1256 + }; 1257 + 1258 + /* ----------------------------------------------------------------------------- 1259 + * Interrupt Handling 1260 + */ 1261 + 1262 + static irqreturn_t isp1760_udc_irq(int irq, void *dev) 1263 + { 1264 + struct isp1760_udc *udc = dev; 1265 + unsigned int i; 1266 + u32 status; 1267 + 1268 + status = isp1760_udc_read(udc, DC_INTERRUPT) 1269 + & isp1760_udc_read(udc, DC_INTENABLE); 1270 + isp1760_udc_write(udc, DC_INTERRUPT, status); 1271 + 1272 + if (status & DC_IEVBUS) { 1273 + dev_dbg(udc->isp->dev, "%s(VBUS)\n", __func__); 1274 + /* The VBUS interrupt is only triggered when VBUS appears. */ 1275 + spin_lock(&udc->lock); 1276 + isp1760_udc_connect(udc); 1277 + spin_unlock(&udc->lock); 1278 + } 1279 + 1280 + if (status & DC_IEBRST) { 1281 + dev_dbg(udc->isp->dev, "%s(BRST)\n", __func__); 1282 + 1283 + isp1760_udc_reset(udc); 1284 + } 1285 + 1286 + for (i = 0; i <= 7; ++i) { 1287 + struct isp1760_ep *ep = &udc->ep[i*2]; 1288 + 1289 + if (status & DC_IEPTX(i)) { 1290 + dev_dbg(udc->isp->dev, "%s(EPTX%u)\n", __func__, i); 1291 + isp1760_ep_tx_complete(ep); 1292 + } 1293 + 1294 + if (status & DC_IEPRX(i)) { 1295 + dev_dbg(udc->isp->dev, "%s(EPRX%u)\n", __func__, i); 1296 + isp1760_ep_rx_ready(i ? ep - 1 : ep); 1297 + } 1298 + } 1299 + 1300 + if (status & DC_IEP0SETUP) { 1301 + dev_dbg(udc->isp->dev, "%s(EP0SETUP)\n", __func__); 1302 + 1303 + isp1760_ep0_setup(udc); 1304 + } 1305 + 1306 + if (status & DC_IERESM) { 1307 + dev_dbg(udc->isp->dev, "%s(RESM)\n", __func__); 1308 + isp1760_udc_resume(udc); 1309 + } 1310 + 1311 + if (status & DC_IESUSP) { 1312 + dev_dbg(udc->isp->dev, "%s(SUSP)\n", __func__); 1313 + 1314 + spin_lock(&udc->lock); 1315 + if (!(isp1760_udc_read(udc, DC_MODE) & DC_VBUSSTAT)) 1316 + isp1760_udc_disconnect(udc); 1317 + else 1318 + isp1760_udc_suspend(udc); 1319 + spin_unlock(&udc->lock); 1320 + } 1321 + 1322 + if (status & DC_IEHS_STA) { 1323 + dev_dbg(udc->isp->dev, "%s(HS_STA)\n", __func__); 1324 + udc->gadget.speed = USB_SPEED_HIGH; 1325 + } 1326 + 1327 + return status ? IRQ_HANDLED : IRQ_NONE; 1328 + } 1329 + 1330 + static void isp1760_udc_vbus_poll(unsigned long data) 1331 + { 1332 + struct isp1760_udc *udc = (struct isp1760_udc *)data; 1333 + unsigned long flags; 1334 + 1335 + spin_lock_irqsave(&udc->lock, flags); 1336 + 1337 + if (!(isp1760_udc_read(udc, DC_MODE) & DC_VBUSSTAT)) 1338 + isp1760_udc_disconnect(udc); 1339 + else if (udc->gadget.state >= USB_STATE_POWERED) 1340 + mod_timer(&udc->vbus_timer, 1341 + jiffies + ISP1760_VBUS_POLL_INTERVAL); 1342 + 1343 + spin_unlock_irqrestore(&udc->lock, flags); 1344 + } 1345 + 1346 + /* ----------------------------------------------------------------------------- 1347 + * Registration 1348 + */ 1349 + 1350 + static void isp1760_udc_init_eps(struct isp1760_udc *udc) 1351 + { 1352 + unsigned int i; 1353 + 1354 + INIT_LIST_HEAD(&udc->gadget.ep_list); 1355 + 1356 + for (i = 0; i < ARRAY_SIZE(udc->ep); ++i) { 1357 + struct isp1760_ep *ep = &udc->ep[i]; 1358 + unsigned int ep_num = (i + 1) / 2; 1359 + bool is_in = !(i & 1); 1360 + 1361 + ep->udc = udc; 1362 + 1363 + INIT_LIST_HEAD(&ep->queue); 1364 + 1365 + ep->addr = (ep_num && is_in ? USB_DIR_IN : USB_DIR_OUT) 1366 + | ep_num; 1367 + ep->desc = NULL; 1368 + 1369 + sprintf(ep->name, "ep%u%s", ep_num, 1370 + ep_num ? (is_in ? "in" : "out") : ""); 1371 + 1372 + ep->ep.ops = &isp1760_ep_ops; 1373 + ep->ep.name = ep->name; 1374 + 1375 + /* 1376 + * Hardcode the maximum packet sizes for now, to 64 bytes for 1377 + * the control endpoint and 512 bytes for all other endpoints. 1378 + * This fits in the 8kB FIFO without double-buffering. 1379 + */ 1380 + if (ep_num == 0) { 1381 + ep->ep.maxpacket = 64; 1382 + ep->maxpacket = 64; 1383 + udc->gadget.ep0 = &ep->ep; 1384 + } else { 1385 + ep->ep.maxpacket = 512; 1386 + ep->maxpacket = 0; 1387 + list_add_tail(&ep->ep.ep_list, &udc->gadget.ep_list); 1388 + } 1389 + } 1390 + } 1391 + 1392 + static int isp1760_udc_init(struct isp1760_udc *udc) 1393 + { 1394 + u16 scratch; 1395 + u32 chipid; 1396 + 1397 + /* 1398 + * Check that the controller is present by writing to the scratch 1399 + * register, modifying the bus pattern by reading from the chip ID 1400 + * register, and reading the scratch register value back. The chip ID 1401 + * and scratch register contents must match the expected values. 1402 + */ 1403 + isp1760_udc_write(udc, DC_SCRATCH, 0xbabe); 1404 + chipid = isp1760_udc_read(udc, DC_CHIPID); 1405 + scratch = isp1760_udc_read(udc, DC_SCRATCH); 1406 + 1407 + if (scratch != 0xbabe) { 1408 + dev_err(udc->isp->dev, 1409 + "udc: scratch test failed (0x%04x/0x%08x)\n", 1410 + scratch, chipid); 1411 + return -ENODEV; 1412 + } 1413 + 1414 + if (chipid != 0x00011582) { 1415 + dev_err(udc->isp->dev, "udc: invalid chip ID 0x%08x\n", chipid); 1416 + return -ENODEV; 1417 + } 1418 + 1419 + /* Reset the device controller. */ 1420 + isp1760_udc_write(udc, DC_MODE, DC_SFRESET); 1421 + usleep_range(10000, 11000); 1422 + isp1760_udc_write(udc, DC_MODE, 0); 1423 + usleep_range(10000, 11000); 1424 + 1425 + return 0; 1426 + } 1427 + 1428 + int isp1760_udc_register(struct isp1760_device *isp, int irq, 1429 + unsigned long irqflags) 1430 + { 1431 + struct isp1760_udc *udc = &isp->udc; 1432 + const char *devname; 1433 + int ret; 1434 + 1435 + udc->irq = -1; 1436 + udc->isp = isp; 1437 + udc->regs = isp->regs; 1438 + 1439 + spin_lock_init(&udc->lock); 1440 + setup_timer(&udc->vbus_timer, isp1760_udc_vbus_poll, 1441 + (unsigned long)udc); 1442 + 1443 + ret = isp1760_udc_init(udc); 1444 + if (ret < 0) 1445 + return ret; 1446 + 1447 + devname = dev_name(isp->dev); 1448 + udc->irqname = kmalloc(strlen(devname) + 7, GFP_KERNEL); 1449 + if (!udc->irqname) 1450 + return -ENOMEM; 1451 + 1452 + sprintf(udc->irqname, "%s (udc)", devname); 1453 + 1454 + ret = request_irq(irq, isp1760_udc_irq, IRQF_SHARED | IRQF_DISABLED | 1455 + irqflags, udc->irqname, udc); 1456 + if (ret < 0) 1457 + goto error; 1458 + 1459 + udc->irq = irq; 1460 + 1461 + /* 1462 + * Initialize the gadget static fields and register its device. Gadget 1463 + * fields that vary during the life time of the gadget are initialized 1464 + * by the UDC core. 1465 + */ 1466 + udc->gadget.ops = &isp1760_udc_ops; 1467 + udc->gadget.speed = USB_SPEED_UNKNOWN; 1468 + udc->gadget.max_speed = USB_SPEED_HIGH; 1469 + udc->gadget.name = "isp1761_udc"; 1470 + 1471 + isp1760_udc_init_eps(udc); 1472 + 1473 + ret = usb_add_gadget_udc(isp->dev, &udc->gadget); 1474 + if (ret < 0) 1475 + goto error; 1476 + 1477 + return 0; 1478 + 1479 + error: 1480 + if (udc->irq >= 0) 1481 + free_irq(udc->irq, udc); 1482 + kfree(udc->irqname); 1483 + 1484 + return ret; 1485 + } 1486 + 1487 + void isp1760_udc_unregister(struct isp1760_device *isp) 1488 + { 1489 + struct isp1760_udc *udc = &isp->udc; 1490 + 1491 + usb_del_gadget_udc(&udc->gadget); 1492 + 1493 + free_irq(udc->irq, udc); 1494 + kfree(udc->irqname); 1495 + }
+106
drivers/usb/host/isp1760-udc.h
··· 1 + /* 2 + * Driver for the NXP ISP1761 device controller 3 + * 4 + * Copyright 2014 Ideas on Board Oy 5 + * 6 + * Contacts: 7 + * Laurent Pinchart <laurent.pinchart@ideasonboard.com> 8 + * 9 + * This program is free software; you can redistribute it and/or 10 + * modify it under the terms of the GNU General Public License 11 + * version 2 as published by the Free Software Foundation. 12 + */ 13 + 14 + #ifndef _ISP1760_UDC_H_ 15 + #define _ISP1760_UDC_H_ 16 + 17 + #include <linux/ioport.h> 18 + #include <linux/list.h> 19 + #include <linux/spinlock.h> 20 + #include <linux/timer.h> 21 + #include <linux/usb/gadget.h> 22 + 23 + struct isp1760_device; 24 + struct isp1760_udc; 25 + 26 + enum isp1760_ctrl_state { 27 + ISP1760_CTRL_SETUP, /* Waiting for a SETUP transaction */ 28 + ISP1760_CTRL_DATA_IN, /* Setup received, data IN stage */ 29 + ISP1760_CTRL_DATA_OUT, /* Setup received, data OUT stage */ 30 + ISP1760_CTRL_STATUS, /* 0-length request in status stage */ 31 + }; 32 + 33 + struct isp1760_ep { 34 + struct isp1760_udc *udc; 35 + struct usb_ep ep; 36 + 37 + struct list_head queue; 38 + 39 + unsigned int addr; 40 + unsigned int maxpacket; 41 + char name[7]; 42 + 43 + const struct usb_endpoint_descriptor *desc; 44 + 45 + bool rx_pending; 46 + bool halted; 47 + bool wedged; 48 + }; 49 + 50 + /** 51 + * struct isp1760_udc - UDC state information 52 + * irq: IRQ number 53 + * irqname: IRQ name (as passed to request_irq) 54 + * regs: Base address of the UDC registers 55 + * driver: Gadget driver 56 + * gadget: Gadget device 57 + * lock: Protects driver, vbus_timer, ep, ep0_*, DC_EPINDEX register 58 + * ep: Array of endpoints 59 + * ep0_state: Control request state for endpoint 0 60 + * ep0_dir: Direction of the current control request 61 + * ep0_length: Length of the current control request 62 + * connected: Tracks gadget driver bus connection state 63 + */ 64 + struct isp1760_udc { 65 + #if CONFIG_USB_ISP1761_UDC 66 + struct isp1760_device *isp; 67 + 68 + int irq; 69 + char *irqname; 70 + void __iomem *regs; 71 + 72 + struct usb_gadget_driver *driver; 73 + struct usb_gadget gadget; 74 + 75 + spinlock_t lock; 76 + struct timer_list vbus_timer; 77 + 78 + struct isp1760_ep ep[15]; 79 + 80 + enum isp1760_ctrl_state ep0_state; 81 + u8 ep0_dir; 82 + u16 ep0_length; 83 + 84 + bool connected; 85 + 86 + unsigned int devstatus; 87 + #endif 88 + }; 89 + 90 + #if CONFIG_USB_ISP1761_UDC 91 + int isp1760_udc_register(struct isp1760_device *isp, int irq, 92 + unsigned long irqflags); 93 + void isp1760_udc_unregister(struct isp1760_device *isp); 94 + #else 95 + static inline int isp1760_udc_register(struct isp1760_device *isp, int irq, 96 + unsigned long irqflags) 97 + { 98 + return 0; 99 + } 100 + 101 + static inline void isp1760_udc_unregister(struct isp1760_device *isp) 102 + { 103 + } 104 + #endif 105 + 106 + #endif