Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

clocksource/drivers/timer-ti-dm: Enable autoreload in set_pwm

dm timer ops set_load() api allows to configure the load value and to
set the auto reload feature. But auto reload feature is independent of
load value and should be part of configuring pwm. This way pwm can be
disabled by disabling auto reload feature using set_pwm() so that the
current pwm cycle will be completed. Else pwm disabling causes the
cycle to be stopped abruptly.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Link: https://lore.kernel.org/r/20200305082715.15861-7-lokeshvutla@ti.com

authored by

Lokesh Vutla and committed by
Daniel Lezcano
02e6d546 92fd8686

+12 -17
+5 -11
drivers/clocksource/timer-ti-dm.c
··· 562 562 return 0; 563 563 } 564 564 565 - static int omap_dm_timer_set_load(struct omap_dm_timer *timer, int autoreload, 565 + static int omap_dm_timer_set_load(struct omap_dm_timer *timer, 566 566 unsigned int load) 567 567 { 568 - u32 l; 569 - 570 568 if (unlikely(!timer)) 571 569 return -EINVAL; 572 570 573 571 omap_dm_timer_enable(timer); 574 - l = omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG); 575 - if (autoreload) 576 - l |= OMAP_TIMER_CTRL_AR; 577 - else 578 - l &= ~OMAP_TIMER_CTRL_AR; 579 - omap_dm_timer_write_reg(timer, OMAP_TIMER_CTRL_REG, l); 580 572 omap_dm_timer_write_reg(timer, OMAP_TIMER_LOAD_REG, load); 581 573 582 574 omap_dm_timer_disable(timer); ··· 597 605 } 598 606 599 607 static int omap_dm_timer_set_pwm(struct omap_dm_timer *timer, int def_on, 600 - int toggle, int trigger) 608 + int toggle, int trigger, int autoreload) 601 609 { 602 610 u32 l; 603 611 ··· 607 615 omap_dm_timer_enable(timer); 608 616 l = omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG); 609 617 l &= ~(OMAP_TIMER_CTRL_GPOCFG | OMAP_TIMER_CTRL_SCPWM | 610 - OMAP_TIMER_CTRL_PT | (0x03 << 10)); 618 + OMAP_TIMER_CTRL_PT | (0x03 << 10) | OMAP_TIMER_CTRL_AR); 611 619 if (def_on) 612 620 l |= OMAP_TIMER_CTRL_SCPWM; 613 621 if (toggle) 614 622 l |= OMAP_TIMER_CTRL_PT; 615 623 l |= trigger << 10; 624 + if (autoreload) 625 + l |= OMAP_TIMER_CTRL_AR; 616 626 omap_dm_timer_write_reg(timer, OMAP_TIMER_CTRL_REG, l); 617 627 618 628 omap_dm_timer_disable(timer);
+5 -3
drivers/pwm/pwm-omap-dmtimer.c
··· 183 183 if (timer_active) 184 184 omap->pdata->stop(omap->dm_timer); 185 185 186 - omap->pdata->set_load(omap->dm_timer, true, load_value); 186 + omap->pdata->set_load(omap->dm_timer, load_value); 187 187 omap->pdata->set_match(omap->dm_timer, true, match_value); 188 188 189 189 dev_dbg(chip->dev, "load value: %#08x (%d), match value: %#08x (%d)\n", ··· 192 192 omap->pdata->set_pwm(omap->dm_timer, 193 193 pwm_get_polarity(pwm) == PWM_POLARITY_INVERSED, 194 194 true, 195 - PWM_OMAP_DMTIMER_TRIGGER_OVERFLOW_AND_COMPARE); 195 + PWM_OMAP_DMTIMER_TRIGGER_OVERFLOW_AND_COMPARE, 196 + true); 196 197 197 198 /* If config was called while timer was running it must be reenabled. */ 198 199 if (timer_active) ··· 223 222 omap->pdata->set_pwm(omap->dm_timer, 224 223 polarity == PWM_POLARITY_INVERSED, 225 224 true, 226 - PWM_OMAP_DMTIMER_TRIGGER_OVERFLOW_AND_COMPARE); 225 + PWM_OMAP_DMTIMER_TRIGGER_OVERFLOW_AND_COMPARE, 226 + true); 227 227 mutex_unlock(&omap->mutex); 228 228 229 229 return 0;
+2 -3
include/linux/platform_data/dmtimer-omap.h
··· 30 30 int (*stop)(struct omap_dm_timer *timer); 31 31 int (*set_source)(struct omap_dm_timer *timer, int source); 32 32 33 - int (*set_load)(struct omap_dm_timer *timer, int autoreload, 34 - unsigned int value); 33 + int (*set_load)(struct omap_dm_timer *timer, unsigned int value); 35 34 int (*set_match)(struct omap_dm_timer *timer, int enable, 36 35 unsigned int match); 37 36 int (*set_pwm)(struct omap_dm_timer *timer, int def_on, 38 - int toggle, int trigger); 37 + int toggle, int trigger, int autoreload); 39 38 int (*get_pwm_status)(struct omap_dm_timer *timer); 40 39 int (*set_prescaler)(struct omap_dm_timer *timer, int prescaler); 41 40