Merge tag 'usb-3.12-rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb

tjh.dev / kernel

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Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git

kernel os linux

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Merge tag 'usb-3.12-rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb

Pull USB fixes from Greg KH:
"Here are some USB fixes and new device ids for 3.12-rc6

The largest change here is a bunch of new device ids for the option
USB serial driver for new Huawei devices. Other than that, just some
small bug fixes for issues that people have reported (run-time and
build-time), nothing major"

* tag 'usb-3.12-rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb:
usb: usb_phy_gen: refine conditional declaration of usb_nop_xceiv_register
usb: misc: usb3503: Fix compile error due to incorrect regmap depedency
usb/chipidea: fix oops on memory allocation failure
usb-storage: add quirk for mandatory READ_CAPACITY_16
usb: serial: option: blacklist Olivetti Olicard200
USB: quirks: add touchscreen that is dazzeled by remote wakeup
Revert "usb: musb: gadget: fix otg active status flag"
USB: quirks.c: add one device that cannot deal with suspension
USB: serial: option: add support for Inovia SEW858 device
USB: serial: ti_usb_3410_5052: add Abbott strip port ID to combined table as well.
USB: support new huawei devices in option.c
usb: musb: start musb on the udc side, too
xhci: Fix spurious wakeups after S5 on Haswell
xhci: fix write to USB3_PSSEN and XUSB2PRM pci config registers
xhci: quirk for extra long delay for S4
xhci: Don't enable/disable RWE on bus suspend/resume.

Linus Torvalds 12 years ago 02a3250f 7b4a5155

+343 -82

18 changed files

expand all collapse all

drivers

usb

chipidea

host.c

core

quirks.c

host

pci-quirks.c

xhci-hub.c

xhci-pci.c

xhci.c

xhci.h

misc

Kconfig

musb

musb_core.c

musb_core.h

musb_gadget.c

musb_virthub.c

serial

option.c

ti_usb_3410_5052.c

storage

scsiglue.c

unusual_devs.h

include

linux

usb

usb_phy_gen_xceiv.h

usb_usual.h

+4 -2

drivers/usb/chipidea/host.c

reviewed

··· 100 100 { 101 101 struct usb_hcd *hcd = ci->hcd; 102 102 103 103 - usb_remove_hcd(hcd); 104 104 - usb_put_hcd(hcd); 103 103 + if (hcd) { 104 104 + usb_remove_hcd(hcd); 105 105 + usb_put_hcd(hcd); 106 106 + } 105 107 if (ci->platdata->reg_vbus) 106 108 regulator_disable(ci->platdata->reg_vbus); 107 109 }

drivers/usb/core/quirks.c

reviewed

··· 97 97 /* Alcor Micro Corp. Hub */ 98 98 { USB_DEVICE(0x058f, 0x9254), .driver_info = USB_QUIRK_RESET_RESUME }, 99 99 100 100 + /* MicroTouch Systems touchscreen */ 101 101 + { USB_DEVICE(0x0596, 0x051e), .driver_info = USB_QUIRK_RESET_RESUME }, 102 102 + 100 103 /* appletouch */ 101 104 { USB_DEVICE(0x05ac, 0x021a), .driver_info = USB_QUIRK_RESET_RESUME }, 102 105 ··· 132 129 133 130 /* Broadcom BCM92035DGROM BT dongle */ 134 131 { USB_DEVICE(0x0a5c, 0x2021), .driver_info = USB_QUIRK_RESET_RESUME }, 132 132 + 133 133 + /* MAYA44USB sound device */ 134 134 + { USB_DEVICE(0x0a92, 0x0091), .driver_info = USB_QUIRK_RESET_RESUME }, 135 135 136 136 /* Action Semiconductor flash disk */ 137 137 { USB_DEVICE(0x10d6, 0x2200), .driver_info =

+2 -2

drivers/usb/host/pci-quirks.c

reviewed

··· 799 799 * switchable ports. 800 800 */ 801 801 pci_write_config_dword(xhci_pdev, USB_INTEL_USB3_PSSEN, 802 802 - cpu_to_le32(ports_available)); 802 802 + ports_available); 803 803 804 804 pci_read_config_dword(xhci_pdev, USB_INTEL_USB3_PSSEN, 805 805 &ports_available); ··· 821 821 * host. 822 822 */ 823 823 pci_write_config_dword(xhci_pdev, USB_INTEL_XUSB2PR, 824 824 - cpu_to_le32(ports_available)); 824 824 + ports_available); 825 825 826 826 pci_read_config_dword(xhci_pdev, USB_INTEL_XUSB2PR, 827 827 &ports_available);

-26

drivers/usb/host/xhci-hub.c

reviewed

··· 1157 1157 t1 = xhci_port_state_to_neutral(t1); 1158 1158 if (t1 != t2) 1159 1159 xhci_writel(xhci, t2, port_array[port_index]); 1160 1160 - 1161 1161 - if (hcd->speed != HCD_USB3) { 1162 1162 - /* enable remote wake up for USB 2.0 */ 1163 1163 - __le32 __iomem *addr; 1164 1164 - u32 tmp; 1165 1165 - 1166 1166 - /* Get the port power control register address. */ 1167 1167 - addr = port_array[port_index] + PORTPMSC; 1168 1168 - tmp = xhci_readl(xhci, addr); 1169 1169 - tmp |= PORT_RWE; 1170 1170 - xhci_writel(xhci, tmp, addr); 1171 1171 - } 1172 1160 } 1173 1161 hcd->state = HC_STATE_SUSPENDED; 1174 1162 bus_state->next_statechange = jiffies + msecs_to_jiffies(10); ··· 1235 1247 xhci_ring_device(xhci, slot_id); 1236 1248 } else 1237 1249 xhci_writel(xhci, temp, port_array[port_index]); 1238 1238 - 1239 1239 - if (hcd->speed != HCD_USB3) { 1240 1240 - /* disable remote wake up for USB 2.0 */ 1241 1241 - __le32 __iomem *addr; 1242 1242 - u32 tmp; 1243 1243 - 1244 1244 - /* Add one to the port status register address to get 1245 1245 - * the port power control register address. 1246 1246 - */ 1247 1247 - addr = port_array[port_index] + PORTPMSC; 1248 1248 - tmp = xhci_readl(xhci, addr); 1249 1249 - tmp &= ~PORT_RWE; 1250 1250 - xhci_writel(xhci, tmp, addr); 1251 1251 - } 1252 1250 } 1253 1251 1254 1252 (void) xhci_readl(xhci, &xhci->op_regs->command);

+25

drivers/usb/host/xhci-pci.c

reviewed

··· 35 35 #define PCI_VENDOR_ID_ETRON 0x1b6f 36 36 #define PCI_DEVICE_ID_ASROCK_P67 0x7023 37 37 38 38 + #define PCI_DEVICE_ID_INTEL_LYNXPOINT_XHCI 0x8c31 39 39 + #define PCI_DEVICE_ID_INTEL_LYNXPOINT_LP_XHCI 0x9c31 40 40 + 38 41 static const char hcd_name[] = "xhci_hcd"; 39 42 40 43 /* called after powerup, by probe or system-pm "wakeup" */ ··· 71 68 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks, 72 69 "QUIRK: Fresco Logic xHC needs configure" 73 70 " endpoint cmd after reset endpoint"); 71 71 + } 72 72 + if (pdev->device == PCI_DEVICE_ID_FRESCO_LOGIC_PDK && 73 73 + pdev->revision == 0x4) { 74 74 + xhci->quirks |= XHCI_SLOW_SUSPEND; 75 75 + xhci_dbg_trace(xhci, trace_xhci_dbg_quirks, 76 76 + "QUIRK: Fresco Logic xHC revision %u" 77 77 + "must be suspended extra slowly", 78 78 + pdev->revision); 74 79 } 75 80 /* Fresco Logic confirms: all revisions of this chip do not 76 81 * support MSI, even though some of them claim to in their PCI ··· 120 109 */ 121 110 xhci->quirks |= XHCI_SPURIOUS_REBOOT; 122 111 xhci->quirks |= XHCI_AVOID_BEI; 112 112 + } 113 113 + if (pdev->vendor == PCI_VENDOR_ID_INTEL && 114 114 + (pdev->device == PCI_DEVICE_ID_INTEL_LYNXPOINT_XHCI || 115 115 + pdev->device == PCI_DEVICE_ID_INTEL_LYNXPOINT_LP_XHCI)) { 116 116 + /* Workaround for occasional spurious wakeups from S5 (or 117 117 + * any other sleep) on Haswell machines with LPT and LPT-LP 118 118 + * with the new Intel BIOS 119 119 + */ 120 120 + xhci->quirks |= XHCI_SPURIOUS_WAKEUP; 123 121 } 124 122 if (pdev->vendor == PCI_VENDOR_ID_ETRON && 125 123 pdev->device == PCI_DEVICE_ID_ASROCK_P67) { ··· 237 217 usb_put_hcd(xhci->shared_hcd); 238 218 } 239 219 usb_hcd_pci_remove(dev); 220 220 + 221 221 + /* Workaround for spurious wakeups at shutdown with HSW */ 222 222 + if (xhci->quirks & XHCI_SPURIOUS_WAKEUP) 223 223 + pci_set_power_state(dev, PCI_D3hot); 224 224 + 240 225 kfree(xhci); 241 226 } 242 227

+13 -1

drivers/usb/host/xhci.c

reviewed

··· 730 730 731 731 spin_lock_irq(&xhci->lock); 732 732 xhci_halt(xhci); 733 733 + /* Workaround for spurious wakeups at shutdown with HSW */ 734 734 + if (xhci->quirks & XHCI_SPURIOUS_WAKEUP) 735 735 + xhci_reset(xhci); 733 736 spin_unlock_irq(&xhci->lock); 734 737 735 738 xhci_cleanup_msix(xhci); ··· 740 737 xhci_dbg_trace(xhci, trace_xhci_dbg_init, 741 738 "xhci_shutdown completed - status = %x", 742 739 xhci_readl(xhci, &xhci->op_regs->status)); 740 740 + 741 741 + /* Yet another workaround for spurious wakeups at shutdown with HSW */ 742 742 + if (xhci->quirks & XHCI_SPURIOUS_WAKEUP) 743 743 + pci_set_power_state(to_pci_dev(hcd->self.controller), PCI_D3hot); 743 744 } 744 745 745 746 #ifdef CONFIG_PM ··· 846 839 int xhci_suspend(struct xhci_hcd *xhci) 847 840 { 848 841 int rc = 0; 842 842 + unsigned int delay = XHCI_MAX_HALT_USEC; 849 843 struct usb_hcd *hcd = xhci_to_hcd(xhci); 850 844 u32 command; 851 845 ··· 869 861 command = xhci_readl(xhci, &xhci->op_regs->command); 870 862 command &= ~CMD_RUN; 871 863 xhci_writel(xhci, command, &xhci->op_regs->command); 864 864 + 865 865 + /* Some chips from Fresco Logic need an extraordinary delay */ 866 866 + delay *= (xhci->quirks & XHCI_SLOW_SUSPEND) ? 10 : 1; 867 867 + 872 868 if (xhci_handshake(xhci, &xhci->op_regs->status, 873 873 - STS_HALT, STS_HALT, XHCI_MAX_HALT_USEC)) { 869 869 + STS_HALT, STS_HALT, delay)) { 874 870 xhci_warn(xhci, "WARN: xHC CMD_RUN timeout\n"); 875 871 spin_unlock_irq(&xhci->lock); 876 872 return -ETIMEDOUT;

drivers/usb/host/xhci.h

reviewed

··· 1548 1548 #define XHCI_COMP_MODE_QUIRK (1 << 14) 1549 1549 #define XHCI_AVOID_BEI (1 << 15) 1550 1550 #define XHCI_PLAT (1 << 16) 1551 1551 + #define XHCI_SLOW_SUSPEND (1 << 17) 1552 1552 + #define XHCI_SPURIOUS_WAKEUP (1 << 18) 1551 1553 unsigned int num_active_eps; 1552 1554 unsigned int limit_active_eps; 1553 1555 /* There are two roothubs to keep track of bus suspend info for */

+1 -1

drivers/usb/misc/Kconfig

reviewed

··· 246 246 config USB_HSIC_USB3503 247 247 tristate "USB3503 HSIC to USB20 Driver" 248 248 depends on I2C 249 249 - select REGMAP 249 249 + select REGMAP_I2C 250 250 help 251 251 This option enables support for SMSC USB3503 HSIC to USB 2.0 Driver.

+46

drivers/usb/musb/musb_core.c

reviewed

··· 922 922 } 923 923 924 924 /* 925 925 + * Program the HDRC to start (enable interrupts, dma, etc.). 926 926 + */ 927 927 + void musb_start(struct musb *musb) 928 928 + { 929 929 + void __iomem *regs = musb->mregs; 930 930 + u8 devctl = musb_readb(regs, MUSB_DEVCTL); 931 931 + 932 932 + dev_dbg(musb->controller, "<== devctl %02x\n", devctl); 933 933 + 934 934 + /* Set INT enable registers, enable interrupts */ 935 935 + musb->intrtxe = musb->epmask; 936 936 + musb_writew(regs, MUSB_INTRTXE, musb->intrtxe); 937 937 + musb->intrrxe = musb->epmask & 0xfffe; 938 938 + musb_writew(regs, MUSB_INTRRXE, musb->intrrxe); 939 939 + musb_writeb(regs, MUSB_INTRUSBE, 0xf7); 940 940 + 941 941 + musb_writeb(regs, MUSB_TESTMODE, 0); 942 942 + 943 943 + /* put into basic highspeed mode and start session */ 944 944 + musb_writeb(regs, MUSB_POWER, MUSB_POWER_ISOUPDATE 945 945 + | MUSB_POWER_HSENAB 946 946 + /* ENSUSPEND wedges tusb */ 947 947 + /* | MUSB_POWER_ENSUSPEND */ 948 948 + ); 949 949 + 950 950 + musb->is_active = 0; 951 951 + devctl = musb_readb(regs, MUSB_DEVCTL); 952 952 + devctl &= ~MUSB_DEVCTL_SESSION; 953 953 + 954 954 + /* session started after: 955 955 + * (a) ID-grounded irq, host mode; 956 956 + * (b) vbus present/connect IRQ, peripheral mode; 957 957 + * (c) peripheral initiates, using SRP 958 958 + */ 959 959 + if (musb->port_mode != MUSB_PORT_MODE_HOST && 960 960 + (devctl & MUSB_DEVCTL_VBUS) == MUSB_DEVCTL_VBUS) { 961 961 + musb->is_active = 1; 962 962 + } else { 963 963 + devctl |= MUSB_DEVCTL_SESSION; 964 964 + } 965 965 + 966 966 + musb_platform_enable(musb); 967 967 + musb_writeb(regs, MUSB_DEVCTL, devctl); 968 968 + } 969 969 + 970 970 + /* 925 971 * Make the HDRC stop (disable interrupts, etc.); 926 972 * reversible by musb_start 927 973 * called on gadget driver unregister

drivers/usb/musb/musb_core.h

reviewed

··· 503 503 extern const char musb_driver_name[]; 504 504 505 505 extern void musb_stop(struct musb *musb); 506 506 + extern void musb_start(struct musb *musb); 506 507 507 508 extern void musb_write_fifo(struct musb_hw_ep *ep, u16 len, const u8 *src); 508 509 extern void musb_read_fifo(struct musb_hw_ep *ep, u16 len, u8 *dst);

drivers/usb/musb/musb_gadget.c

reviewed

··· 1853 1853 musb->gadget_driver = driver; 1854 1854 1855 1855 spin_lock_irqsave(&musb->lock, flags); 1856 1856 + musb->is_active = 1; 1856 1857 1857 1858 otg_set_peripheral(otg, &musb->g); 1858 1859 musb->xceiv->state = OTG_STATE_B_IDLE; 1859 1860 spin_unlock_irqrestore(&musb->lock, flags); 1861 1861 + 1862 1862 + musb_start(musb); 1860 1863 1861 1864 /* REVISIT: funcall to other code, which also 1862 1865 * handles power budgeting ... this way also

-46

drivers/usb/musb/musb_virthub.c

reviewed

··· 44 44 45 45 #include "musb_core.h" 46 46 47 47 - /* 48 48 - * Program the HDRC to start (enable interrupts, dma, etc.). 49 49 - */ 50 50 - static void musb_start(struct musb *musb) 51 51 - { 52 52 - void __iomem *regs = musb->mregs; 53 53 - u8 devctl = musb_readb(regs, MUSB_DEVCTL); 54 54 - 55 55 - dev_dbg(musb->controller, "<== devctl %02x\n", devctl); 56 56 - 57 57 - /* Set INT enable registers, enable interrupts */ 58 58 - musb->intrtxe = musb->epmask; 59 59 - musb_writew(regs, MUSB_INTRTXE, musb->intrtxe); 60 60 - musb->intrrxe = musb->epmask & 0xfffe; 61 61 - musb_writew(regs, MUSB_INTRRXE, musb->intrrxe); 62 62 - musb_writeb(regs, MUSB_INTRUSBE, 0xf7); 63 63 - 64 64 - musb_writeb(regs, MUSB_TESTMODE, 0); 65 65 - 66 66 - /* put into basic highspeed mode and start session */ 67 67 - musb_writeb(regs, MUSB_POWER, MUSB_POWER_ISOUPDATE 68 68 - | MUSB_POWER_HSENAB 69 69 - /* ENSUSPEND wedges tusb */ 70 70 - /* | MUSB_POWER_ENSUSPEND */ 71 71 - ); 72 72 - 73 73 - musb->is_active = 0; 74 74 - devctl = musb_readb(regs, MUSB_DEVCTL); 75 75 - devctl &= ~MUSB_DEVCTL_SESSION; 76 76 - 77 77 - /* session started after: 78 78 - * (a) ID-grounded irq, host mode; 79 79 - * (b) vbus present/connect IRQ, peripheral mode; 80 80 - * (c) peripheral initiates, using SRP 81 81 - */ 82 82 - if (musb->port_mode != MUSB_PORT_MODE_HOST && 83 83 - (devctl & MUSB_DEVCTL_VBUS) == MUSB_DEVCTL_VBUS) { 84 84 - musb->is_active = 1; 85 85 - } else { 86 86 - devctl |= MUSB_DEVCTL_SESSION; 87 87 - } 88 88 - 89 89 - musb_platform_enable(musb); 90 90 - musb_writeb(regs, MUSB_DEVCTL, devctl); 91 91 - } 92 92 - 93 47 static void musb_port_suspend(struct musb *musb, bool do_suspend) 94 48 { 95 49 struct usb_otg *otg = musb->xceiv->otg;

+224 -1

drivers/usb/serial/option.c

reviewed

··· 451 451 #define CHANGHONG_VENDOR_ID 0x2077 452 452 #define CHANGHONG_PRODUCT_CH690 0x7001 453 453 454 454 + /* Inovia */ 455 455 + #define INOVIA_VENDOR_ID 0x20a6 456 456 + #define INOVIA_SEW858 0x1105 457 457 + 454 458 /* some devices interfaces need special handling due to a number of reasons */ 455 459 enum option_blacklist_reason { 456 460 OPTION_BLACKLIST_NONE = 0, ··· 693 689 { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x02, 0x7A) }, 694 690 { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x02, 0x7B) }, 695 691 { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x02, 0x7C) }, 692 692 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x03, 0x01) }, 693 693 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x03, 0x02) }, 694 694 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x03, 0x03) }, 695 695 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x03, 0x04) }, 696 696 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x03, 0x05) }, 697 697 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x03, 0x06) }, 698 698 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x03, 0x0A) }, 699 699 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x03, 0x0B) }, 700 700 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x03, 0x0D) }, 701 701 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x03, 0x0E) }, 702 702 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x03, 0x0F) }, 703 703 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x03, 0x10) }, 704 704 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x03, 0x12) }, 705 705 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x03, 0x13) }, 706 706 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x03, 0x14) }, 707 707 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x03, 0x15) }, 708 708 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x03, 0x17) }, 709 709 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x03, 0x18) }, 710 710 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x03, 0x19) }, 711 711 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x03, 0x1A) }, 712 712 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x03, 0x1B) }, 713 713 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x03, 0x1C) }, 714 714 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x03, 0x31) }, 715 715 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x03, 0x32) }, 716 716 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x03, 0x33) }, 717 717 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x03, 0x34) }, 718 718 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x03, 0x35) }, 719 719 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x03, 0x36) }, 720 720 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x03, 0x3A) }, 721 721 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x03, 0x3B) }, 722 722 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x03, 0x3D) }, 723 723 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x03, 0x3E) }, 724 724 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x03, 0x3F) }, 725 725 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x03, 0x48) }, 726 726 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x03, 0x49) }, 727 727 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x03, 0x4A) }, 728 728 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x03, 0x4B) }, 729 729 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x03, 0x4C) }, 730 730 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x03, 0x61) }, 731 731 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x03, 0x62) }, 732 732 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x03, 0x63) }, 733 733 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x03, 0x64) }, 734 734 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x03, 0x65) }, 735 735 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x03, 0x66) }, 736 736 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x03, 0x6A) }, 737 737 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x03, 0x6B) }, 738 738 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x03, 0x6D) }, 739 739 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x03, 0x6E) }, 740 740 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x03, 0x6F) }, 741 741 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x03, 0x78) }, 742 742 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x03, 0x79) }, 743 743 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x03, 0x7A) }, 744 744 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x03, 0x7B) }, 745 745 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x03, 0x7C) }, 746 746 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x04, 0x01) }, 747 747 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x04, 0x02) }, 748 748 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x04, 0x03) }, 749 749 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x04, 0x04) }, 750 750 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x04, 0x05) }, 751 751 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x04, 0x06) }, 752 752 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x04, 0x0A) }, 753 753 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x04, 0x0B) }, 754 754 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x04, 0x0D) }, 755 755 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x04, 0x0E) }, 756 756 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x04, 0x0F) }, 757 757 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x04, 0x10) }, 758 758 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x04, 0x12) }, 759 759 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x04, 0x13) }, 760 760 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x04, 0x14) }, 761 761 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x04, 0x15) }, 762 762 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x04, 0x17) }, 763 763 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x04, 0x18) }, 764 764 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x04, 0x19) }, 765 765 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x04, 0x1A) }, 766 766 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x04, 0x1B) }, 767 767 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x04, 0x1C) }, 768 768 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x04, 0x31) }, 769 769 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x04, 0x32) }, 770 770 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x04, 0x33) }, 771 771 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x04, 0x34) }, 772 772 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x04, 0x35) }, 773 773 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x04, 0x36) }, 774 774 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x04, 0x3A) }, 775 775 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x04, 0x3B) }, 776 776 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x04, 0x3D) }, 777 777 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x04, 0x3E) }, 778 778 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x04, 0x3F) }, 779 779 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x04, 0x48) }, 780 780 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x04, 0x49) }, 781 781 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x04, 0x4A) }, 782 782 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x04, 0x4B) }, 783 783 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x04, 0x4C) }, 784 784 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x04, 0x61) }, 785 785 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x04, 0x62) }, 786 786 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x04, 0x63) }, 787 787 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x04, 0x64) }, 788 788 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x04, 0x65) }, 789 789 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x04, 0x66) }, 790 790 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x04, 0x6A) }, 791 791 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x04, 0x6B) }, 792 792 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x04, 0x6D) }, 793 793 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x04, 0x6E) }, 794 794 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x04, 0x6F) }, 795 795 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x04, 0x78) }, 796 796 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x04, 0x79) }, 797 797 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x04, 0x7A) }, 798 798 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x04, 0x7B) }, 799 799 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x04, 0x7C) }, 800 800 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x05, 0x01) }, 801 801 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x05, 0x02) }, 802 802 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x05, 0x03) }, 803 803 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x05, 0x04) }, 804 804 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x05, 0x05) }, 805 805 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x05, 0x06) }, 806 806 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x05, 0x0A) }, 807 807 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x05, 0x0B) }, 808 808 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x05, 0x0D) }, 809 809 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x05, 0x0E) }, 810 810 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x05, 0x0F) }, 811 811 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x05, 0x10) }, 812 812 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x05, 0x12) }, 813 813 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x05, 0x13) }, 814 814 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x05, 0x14) }, 815 815 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x05, 0x15) }, 816 816 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x05, 0x17) }, 817 817 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x05, 0x18) }, 818 818 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x05, 0x19) }, 819 819 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x05, 0x1A) }, 820 820 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x05, 0x1B) }, 821 821 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x05, 0x1C) }, 822 822 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x05, 0x31) }, 823 823 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x05, 0x32) }, 824 824 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x05, 0x33) }, 825 825 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x05, 0x34) }, 826 826 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x05, 0x35) }, 827 827 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x05, 0x36) }, 828 828 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x05, 0x3A) }, 829 829 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x05, 0x3B) }, 830 830 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x05, 0x3D) }, 831 831 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x05, 0x3E) }, 832 832 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x05, 0x3F) }, 833 833 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x05, 0x48) }, 834 834 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x05, 0x49) }, 835 835 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x05, 0x4A) }, 836 836 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x05, 0x4B) }, 837 837 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x05, 0x4C) }, 838 838 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x05, 0x61) }, 839 839 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x05, 0x62) }, 840 840 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x05, 0x63) }, 841 841 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x05, 0x64) }, 842 842 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x05, 0x65) }, 843 843 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x05, 0x66) }, 844 844 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x05, 0x6A) }, 845 845 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x05, 0x6B) }, 846 846 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x05, 0x6D) }, 847 847 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x05, 0x6E) }, 848 848 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x05, 0x6F) }, 849 849 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x05, 0x78) }, 850 850 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x05, 0x79) }, 851 851 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x05, 0x7A) }, 852 852 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x05, 0x7B) }, 853 853 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x05, 0x7C) }, 854 854 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x06, 0x01) }, 855 855 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x06, 0x02) }, 856 856 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x06, 0x03) }, 857 857 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x06, 0x04) }, 858 858 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x06, 0x05) }, 859 859 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x06, 0x06) }, 860 860 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x06, 0x0A) }, 861 861 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x06, 0x0B) }, 862 862 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x06, 0x0D) }, 863 863 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x06, 0x0E) }, 864 864 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x06, 0x0F) }, 865 865 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x06, 0x10) }, 866 866 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x06, 0x12) }, 867 867 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x06, 0x13) }, 868 868 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x06, 0x14) }, 869 869 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x06, 0x15) }, 870 870 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x06, 0x17) }, 871 871 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x06, 0x18) }, 872 872 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x06, 0x19) }, 873 873 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x06, 0x1A) }, 874 874 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x06, 0x1B) }, 875 875 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x06, 0x1C) }, 876 876 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x06, 0x31) }, 877 877 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x06, 0x32) }, 878 878 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x06, 0x33) }, 879 879 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x06, 0x34) }, 880 880 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x06, 0x35) }, 881 881 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x06, 0x36) }, 882 882 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x06, 0x3A) }, 883 883 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x06, 0x3B) }, 884 884 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x06, 0x3D) }, 885 885 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x06, 0x3E) }, 886 886 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x06, 0x3F) }, 887 887 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x06, 0x48) }, 888 888 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x06, 0x49) }, 889 889 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x06, 0x4A) }, 890 890 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x06, 0x4B) }, 891 891 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x06, 0x4C) }, 892 892 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x06, 0x61) }, 893 893 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x06, 0x62) }, 894 894 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x06, 0x63) }, 895 895 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x06, 0x64) }, 896 896 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x06, 0x65) }, 897 897 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x06, 0x66) }, 898 898 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x06, 0x6A) }, 899 899 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x06, 0x6B) }, 900 900 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x06, 0x6D) }, 901 901 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x06, 0x6E) }, 902 902 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x06, 0x6F) }, 903 903 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x06, 0x78) }, 904 904 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x06, 0x79) }, 905 905 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x06, 0x7A) }, 906 906 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x06, 0x7B) }, 907 907 + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x06, 0x7C) }, 696 908 697 909 698 910 { USB_DEVICE(NOVATELWIRELESS_VENDOR_ID, NOVATELWIRELESS_PRODUCT_V640) }, ··· 1477 1257 1478 1258 { USB_DEVICE(OLIVETTI_VENDOR_ID, OLIVETTI_PRODUCT_OLICARD100) }, 1479 1259 { USB_DEVICE(OLIVETTI_VENDOR_ID, OLIVETTI_PRODUCT_OLICARD145) }, 1480 1480 - { USB_DEVICE(OLIVETTI_VENDOR_ID, OLIVETTI_PRODUCT_OLICARD200) }, 1260 1260 + { USB_DEVICE(OLIVETTI_VENDOR_ID, OLIVETTI_PRODUCT_OLICARD200), 1261 1261 + .driver_info = (kernel_ulong_t)&net_intf6_blacklist 1262 1262 + }, 1481 1263 { USB_DEVICE(CELOT_VENDOR_ID, CELOT_PRODUCT_CT680M) }, /* CT-650 CDMA 450 1xEVDO modem */ 1482 1264 { USB_DEVICE_AND_INTERFACE_INFO(SAMSUNG_VENDOR_ID, SAMSUNG_PRODUCT_GT_B3730, USB_CLASS_CDC_DATA, 0x00, 0x00) }, /* Samsung GT-B3730 LTE USB modem.*/ 1483 1265 { USB_DEVICE(YUGA_VENDOR_ID, YUGA_PRODUCT_CEM600) }, ··· 1567 1345 { USB_DEVICE_AND_INTERFACE_INFO(0x2001, 0x7d03, 0xff, 0x00, 0x00) }, 1568 1346 { USB_DEVICE_AND_INTERFACE_INFO(0x07d1, 0x3e01, 0xff, 0xff, 0xff) }, /* D-Link DWM-152/C1 */ 1569 1347 { USB_DEVICE_AND_INTERFACE_INFO(0x07d1, 0x3e02, 0xff, 0xff, 0xff) }, /* D-Link DWM-156/C1 */ 1348 1348 + { USB_DEVICE(INOVIA_VENDOR_ID, INOVIA_SEW858) }, 1570 1349 { } /* Terminating entry */ 1571 1350 }; 1572 1351 MODULE_DEVICE_TABLE(usb, option_ids);

drivers/usb/serial/ti_usb_3410_5052.c

reviewed

··· 190 190 { USB_DEVICE(IBM_VENDOR_ID, IBM_454B_PRODUCT_ID) }, 191 191 { USB_DEVICE(IBM_VENDOR_ID, IBM_454C_PRODUCT_ID) }, 192 192 { USB_DEVICE(ABBOTT_VENDOR_ID, ABBOTT_PRODUCT_ID) }, 193 193 + { USB_DEVICE(ABBOTT_VENDOR_ID, ABBOTT_STRIP_PORT_ID) }, 193 194 { USB_DEVICE(TI_VENDOR_ID, FRI2_PRODUCT_ID) }, 194 195 { } /* terminator */ 195 196 };

+4 -1

drivers/usb/storage/scsiglue.c

reviewed

··· 211 211 /* 212 212 * Many devices do not respond properly to READ_CAPACITY_16. 213 213 * Tell the SCSI layer to try READ_CAPACITY_10 first. 214 214 + * However some USB 3.0 drive enclosures return capacity 215 215 + * modulo 2TB. Those must use READ_CAPACITY_16 214 216 */ 215 215 - sdev->try_rc_10_first = 1; 217 217 + if (!(us->fflags & US_FL_NEEDS_CAP16)) 218 218 + sdev->try_rc_10_first = 1; 216 219 217 220 /* assume SPC3 or latter devices support sense size > 18 */ 218 221 if (sdev->scsi_level > SCSI_SPC_2)

drivers/usb/storage/unusual_devs.h

reviewed

··· 1925 1925 USB_SC_DEVICE, USB_PR_DEVICE, NULL, 1926 1926 US_FL_IGNORE_RESIDUE ), 1927 1927 1928 1928 + /* Reported by Oliver Neukum <oneukum@suse.com> */ 1929 1929 + UNUSUAL_DEV( 0x174c, 0x55aa, 0x0100, 0x0100, 1930 1930 + "ASMedia", 1931 1931 + "AS2105", 1932 1932 + USB_SC_DEVICE, USB_PR_DEVICE, NULL, 1933 1933 + US_FL_NEEDS_CAP16), 1934 1934 + 1928 1935 /* Reported by Jesse Feddema <jdfeddema@gmail.com> */ 1929 1936 UNUSUAL_DEV( 0x177f, 0x0400, 0x0000, 0x0000, 1930 1937 "Yarvik",

+1 -1

include/linux/usb/usb_phy_gen_xceiv.h

reviewed

··· 12 12 unsigned int needs_reset:1; 13 13 }; 14 14 15 15 - #if IS_ENABLED(CONFIG_NOP_USB_XCEIV) 15 15 + #if defined(CONFIG_NOP_USB_XCEIV) || (defined(CONFIG_NOP_USB_XCEIV_MODULE) && defined(MODULE)) 16 16 /* sometimes transceivers are accessed only through e.g. ULPI */ 17 17 extern void usb_nop_xceiv_register(void); 18 18 extern void usb_nop_xceiv_unregister(void);

+3 -1

include/linux/usb_usual.h

reviewed

··· 66 66 US_FLAG(INITIAL_READ10, 0x00100000) \ 67 67 /* Initial READ(10) (and others) must be retried */ \ 68 68 US_FLAG(WRITE_CACHE, 0x00200000) \ 69 69 - /* Write Cache status is not available */ 69 69 + /* Write Cache status is not available */ \ 70 70 + US_FLAG(NEEDS_CAP16, 0x00400000) 71 71 + /* cannot handle READ_CAPACITY_10 */ 70 72 71 73 #define US_FLAG(name, value) US_FL_##name = value , 72 74 enum { US_DO_ALL_FLAGS };