Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

cpupower: Do detect IDA (opportunistic processor performance) via cpuid

IA32-Intel Devel guide Volume 3A - 14.3.2.1
-------------------------------------------
...
Opportunistic processor performance operation can be disabled by setting bit 38 of
IA32_MISC_ENABLES. This mechanism is intended for BIOS only. If
IA32_MISC_ENABLES[38] is set, CPUID.06H:EAX[1] will return 0.

Better detect things via cpuid, this cleans up the code a bit
and the MSR parts were not working correctly anyway.

Signed-off-by: Thomas Renninger <trenn@suse.de>
CC: lenb@kernel.org
CC: linux@dominikbrodowski.net
CC: cpufreq@vger.kernel.org
Signed-off-by: Dominik Brodowski <linux@dominikbrodowski.net>

authored by

Thomas Renninger and committed by
Dominik Brodowski
029e9f73 8fb2e440

+9 -41
+6
tools/power/cpupower/utils/helpers/cpuid.c
··· 131 131 } 132 132 133 133 if (cpu_info->vendor == X86_VENDOR_INTEL) { 134 + if (cpuid_level >= 6 && 135 + (cpuid_eax(6) & (1 << 1))) 136 + cpu_info->caps |= CPUPOWER_CAP_INTEL_IDA; 137 + } 138 + 139 + if (cpu_info->vendor == X86_VENDOR_INTEL) { 134 140 /* Intel's perf-bias MSR support */ 135 141 if (cpuid_level >= 6 && (cpuid_ecx(6) & (1 << 3))) 136 142 cpu_info->caps |= CPUPOWER_CAP_PERF_BIAS;
+1 -8
tools/power/cpupower/utils/helpers/helpers.h
··· 58 58 #define CPUPOWER_CAP_PERF_BIAS 0x00000008 59 59 #define CPUPOWER_CAP_HAS_TURBO_RATIO 0x00000010 60 60 #define CPUPOWER_CAP_IS_SNB 0x00000011 61 + #define CPUPOWER_CAP_INTEL_IDA 0x00000012 61 62 62 63 #define MAX_HW_PSTATES 10 63 64 ··· 116 115 extern int msr_intel_get_perf_bias(unsigned int cpu); 117 116 extern unsigned long long msr_intel_get_turbo_ratio(unsigned int cpu); 118 117 119 - extern int msr_intel_has_boost_support(unsigned int cpu); 120 - extern int msr_intel_boost_is_active(unsigned int cpu); 121 - 122 118 /* Read/Write msr ****************************/ 123 119 124 120 /* PCI stuff ****************************/ ··· 160 162 { return -1; }; 161 163 static inline unsigned long long msr_intel_get_turbo_ratio(unsigned int cpu) 162 164 { return 0; }; 163 - 164 - static inline int msr_intel_has_boost_support(unsigned int cpu) 165 - { return -1; }; 166 - static inline int msr_intel_boost_is_active(unsigned int cpu) 167 - { return -1; }; 168 165 169 166 /* Read/Write msr ****************************/ 170 167
+2 -10
tools/power/cpupower/utils/helpers/misc.c
··· 20 20 if (ret <= 0) 21 21 return ret; 22 22 *support = 1; 23 - } else if (cpupower_cpu_info.vendor == X86_VENDOR_INTEL) { 24 - ret = msr_intel_has_boost_support(cpu); 25 - if (ret <= 0) 26 - return ret; 27 - *support = ret; 28 - ret = msr_intel_boost_is_active(cpu); 29 - if (ret <= 0) 30 - return ret; 31 - *active = ret; 32 - } 23 + } else if (cpupower_cpu_info.caps & CPUPOWER_CAP_INTEL_IDA) 24 + *support = *active = 1; 33 25 return 0; 34 26 } 35 27 #endif /* #if defined(__i386__) || defined(__x86_64__) */
-23
tools/power/cpupower/utils/helpers/msr.c
··· 72 72 return -1; 73 73 } 74 74 75 - int msr_intel_has_boost_support(unsigned int cpu) 76 - { 77 - unsigned long long misc_enables; 78 - int ret; 79 - 80 - ret = read_msr(cpu, MSR_IA32_MISC_ENABLES, &misc_enables); 81 - if (ret) 82 - return ret; 83 - 84 - return (misc_enables >> 38) & 0x1; 85 - } 86 - 87 - int msr_intel_boost_is_active(unsigned int cpu) 88 - { 89 - unsigned long long perf_status; 90 - int ret; 91 - 92 - ret = read_msr(cpu, MSR_IA32_PERF_STATUS, &perf_status); 93 - if (ret) 94 - return ret; 95 - return (perf_status >> 32) & 0x1; 96 - } 97 - 98 75 int msr_intel_get_perf_bias(unsigned int cpu) 99 76 { 100 77 unsigned long long val;