Merge branch 'cris_move' of git://www.jni.nu/cris

* 'cris_move' of git://www.jni.nu/cris:
[CRIS] Move header files from include to arch/cris/include.
[CRISv32] Remove warning in io.h

arch/cris/Makefile

···
 
 ifneq ($(arch-y),)
 SARCH := arch-$(arch-y)
+inc := -Iarch/cris/include/arch-$(arch-y) -Iarch/cris/include/arch-$(arch-y)/arch
 else
 SARCH :=
+inc :=
 endif
 
 ifneq ($(mach-y),)
 MACH := mach-$(mach-y)
+inc += -Iarch/cris/include/$(SARCH)/$(MACH)/
+inc += -Iarch/cris/include/$(SARCH)/$(MACH)/mach
 else
 MACH :=
 endif
···
 
 CPPFLAGS_vmlinux.lds = -DDRAM_VIRTUAL_BASE=0x$(CONFIG_ETRAX_DRAM_VIRTUAL_BASE)
 
-KBUILD_AFLAGS += -mlinux -march=$(arch-y) -Iinclude/asm/arch/mach -Iinclude/asm/arch
-
-KBUILD_CFLAGS += -mlinux -march=$(arch-y) -pipe -Iinclude/asm/arch/mach -Iinclude/asm/arch
+KBUILD_AFLAGS += -mlinux -march=$(arch-y) $(inc)
+KBUILD_CFLAGS += -mlinux -march=$(arch-y) -pipe $(inc)
+KBUILD_CPPFLAGS += $(inc)
 
 ifdef CONFIG_FRAME_POINTER
 KBUILD_CFLAGS := $(subst -fomit-frame-pointer,,$(KBUILD_CFLAGS)) -g
···
 zImage Image: vmlinux
 	$(Q)$(MAKE) $(build)=$(boot) MACHINE=$(MACHINE) $(boot)/$@
 
-archprepare: $(SRC_ARCH)/.links $(srctree)/include/asm-$(ARCH)/.arch FORCE
+archprepare: $(SRC_ARCH)/.links FORCE
 
 # Create some links to make all tools happy
 $(SRC_ARCH)/.links:
···
 	@ln -sfn ../$(SARCH)/kernel/asm-offsets.c $(SRC_ARCH)/kernel/asm-offsets.c
 	@touch $@
 
-# Create link to sub arch includes
-$(srctree)/include/asm-$(ARCH)/.arch: $(wildcard include/config/arch/*.h)
-	@echo '  SYMLINK include/asm-$(ARCH)/arch -> include/asm-$(ARCH)/$(SARCH)'
-	@rm -f $(srctree)/include/asm-$(ARCH)/arch/mach
-	@rm -f $(srctree)/include/asm-$(ARCH)/arch
-	@ln -sf $(SARCH) $(srctree)/include/asm-$(ARCH)/arch
-ifdef CONFIG_ETRAX_ARCH_V32
-	@ln -sf $(MACH) $(srctree)/include/asm-$(ARCH)/arch/mach
-endif
-	@touch $@
-
 archclean:
 	$(Q)if [ -e arch/$(ARCH)/boot ]; then \
 		$(MAKE) $(clean)=arch/$(ARCH)/boot; \
···
 	$(MACHINE)/boot/compressed/decompress.bin \
 	$(MACHINE)/boot/compressed/piggy.gz \
 	$(MACHINE)/boot/rescue/rescue.bin \
-	$(SRC_ARCH)/.links \
-	$(srctree)/include/asm-$(ARCH)/.arch
+	$(SRC_ARCH)/.links
 
 MRPROPER_FILES += \
 	$(SRC_ARCH)/drivers \

arch/cris/arch-v10/boot/.gitignore

···
+Image
+zImage

arch/cris/arch-v10/boot/compressed/head.S

···
  */
 
 #define ASSEMBLER_MACROS_ONLY
-#include <asm/arch/sv_addr_ag.h>
+#include <arch/sv_addr_ag.h>
 
 #define RAM_INIT_MAGIC 0x56902387
 #define COMMAND_LINE_MAGIC 0x87109563

arch/cris/arch-v10/boot/compressed/misc.c

···
 
 
 #include <linux/types.h>
-#include <asm/arch/svinto.h>
+#include <arch/svinto.h>
 
 /*
  * gzip declarations

arch/cris/arch-v10/boot/rescue/head.S

···
 #ifdef CONFIG_ETRAX_AXISFLASHMAP
 
 #define ASSEMBLER_MACROS_ONLY
-#include <asm/arch/sv_addr_ag.h>
+#include <arch/sv_addr_ag.h>
 
 	;; The partitiontable is looked for at the first sector after the boot
 	;; sector. Sector size is 65536 bytes in all flashes we use.

arch/cris/arch-v10/boot/rescue/kimagerescue.S

···
  */
 
 #define ASSEMBLER_MACROS_ONLY
-#include <asm/arch/sv_addr_ag.h>
+#include <arch/sv_addr_ag.h>
 
 #define CODE_START 0x40004000
 #define CODE_LENGTH 784

arch/cris/arch-v10/boot/rescue/testrescue.S

···
  */
 
 #define ASSEMBLER_MACROS_ONLY
-#include <asm/arch/sv_addr_ag.h>
+#include <arch/sv_addr_ag.h>
 
 	.text
 

arch/cris/arch-v10/drivers/axisflashmap.c

···
 
 #include <asm/axisflashmap.h>
 #include <asm/mmu.h>
-#include <asm/arch/sv_addr_ag.h>
+#include <arch/sv_addr_ag.h>
 
 #ifdef CONFIG_CRIS_LOW_MAP
 #define FLASH_UNCACHED_ADDR  KSEG_8

arch/cris/arch-v10/drivers/ds1302.c

···
 
 #include <asm/uaccess.h>
 #include <asm/system.h>
-#include <asm/arch/svinto.h>
+#include <arch/svinto.h>
 #include <asm/io.h>
 #include <asm/rtc.h>
-#include <asm/arch/io_interface_mux.h>
+#include <arch/io_interface_mux.h>
 
 #include "i2c.h"
 

arch/cris/arch-v10/drivers/gpio.c

···
 #include <linux/interrupt.h>
 
 #include <asm/etraxgpio.h>
-#include <asm/arch/svinto.h>
+#include <arch/svinto.h>
 #include <asm/io.h>
 #include <asm/system.h>
 #include <asm/irq.h>
-#include <asm/arch/io_interface_mux.h>
+#include <arch/io_interface_mux.h>
 
 #define GPIO_MAJOR 120  /* experimental MAJOR number */
 

arch/cris/arch-v10/drivers/i2c.c

···
 #include <asm/etraxi2c.h>
 
 #include <asm/system.h>
-#include <asm/arch/svinto.h>
+#include <arch/svinto.h>
 #include <asm/io.h>
 #include <asm/delay.h>
-#include <asm/arch/io_interface_mux.h>
+#include <arch/io_interface_mux.h>
 
 #include "i2c.h"
 

arch/cris/arch-v10/drivers/sync_serial.c

···
 #include <asm/irq.h>
 #include <asm/dma.h>
 #include <asm/io.h>
-#include <asm/arch/svinto.h>
+#include <arch/svinto.h>
 #include <asm/uaccess.h>
 #include <asm/system.h>
 #include <asm/sync_serial.h>
-#include <asm/arch/io_interface_mux.h>
+#include <arch/io_interface_mux.h>
 
 /* The receiver is a bit tricky beacuse of the continuous stream of data.*/
 /*                                                                       */

arch/cris/arch-v10/kernel/crisksyms.c

···
 #include <linux/module.h>
 #include <asm/io.h>
-#include <asm/arch/svinto.h>
+#include <arch/svinto.h>
 
 /* Export shadow registers for the CPU I/O pins */
 EXPORT_SYMBOL(genconfig_shadow);

arch/cris/arch-v10/kernel/debugport.c

···
 #include <linux/delay.h>
 #include <linux/tty.h>
 #include <asm/system.h>
-#include <asm/arch/svinto.h>
+#include <arch/svinto.h>
 #include <asm/io.h>             /* Get SIMCOUT. */
 
 extern void reset_watchdog(void);

arch/cris/arch-v10/kernel/dma.c

···
 #include <linux/errno.h>
 
 #include <asm/dma.h>
-#include <asm/arch/svinto.h>
+#include <arch/svinto.h>
 
 /* Macro to access ETRAX 100 registers */
 #define SETS(var, reg, field, val) var = (var & ~IO_MASK_(reg##_, field##_)) | \

arch/cris/arch-v10/kernel/entry.S

···
 #include <linux/linkage.h>
 #include <linux/sys.h>
 #include <asm/unistd.h>
-#include <asm/arch/sv_addr_ag.h>
+#include <arch/sv_addr_ag.h>
 #include <asm/errno.h>
 #include <asm/thread_info.h>
 #include <asm/asm-offsets.h>

arch/cris/arch-v10/kernel/fasttimer.c

···
 #include <asm/rtc.h>
 
 
-#include <asm/arch/svinto.h>
+#include <arch/svinto.h>
 #include <asm/fasttimer.h>
 #include <linux/proc_fs.h>
 

arch/cris/arch-v10/kernel/head.S

···
 #define ASSEMBLER_MACROS_ONLY
 /* The IO_* macros use the ## token concatenation operator, so
    -traditional must not be used when assembling this file.  */
-#include <asm/arch/sv_addr_ag.h>
+#include <arch/sv_addr_ag.h>
 
 #define CRAMFS_MAGIC 0x28cd3d45
 #define RAM_INIT_MAGIC 0x56902387

arch/cris/arch-v10/kernel/io_interface_mux.c

···
 #include <linux/module.h>
 #include <linux/init.h>
 
-#include <asm/arch/svinto.h>
+#include <arch/svinto.h>
 #include <asm/io.h>
-#include <asm/arch/io_interface_mux.h>
+#include <arch/io_interface_mux.h>
 
 
 #define DBG(s)

arch/cris/arch-v10/kernel/kgdb.c

···
 #include <asm/setup.h>
 #include <asm/ptrace.h>
 
-#include <asm/arch/svinto.h>
+#include <arch/svinto.h>
 #include <asm/irq.h>
 
 static int kgdb_started = 0;

arch/cris/arch-v10/kernel/process.c

···
 #include <linux/err.h>
 #include <linux/fs.h>
 #include <linux/slab.h>
-#include <asm/arch/svinto.h>
+#include <arch/svinto.h>
 #include <linux/init.h>
 
 #ifdef CONFIG_ETRAX_GPIO

arch/cris/arch-v10/kernel/time.c

···
 #include <linux/sched.h>
 #include <linux/init.h>
 #include <linux/mm.h>
-#include <asm/arch/svinto.h>
+#include <arch/svinto.h>
 #include <asm/types.h>
 #include <asm/signal.h>
 #include <asm/io.h>

arch/cris/arch-v10/kernel/traps.c

···
 
 #include <linux/ptrace.h>
 #include <asm/uaccess.h>
-#include <asm/arch/sv_addr_ag.h>
+#include <arch/sv_addr_ag.h>
 
 void
 show_registers(struct pt_regs *regs)

arch/cris/arch-v10/mm/fault.c

···
 #include <linux/mm.h>
 #include <asm/uaccess.h>
 #include <asm/pgtable.h>
-#include <asm/arch/svinto.h>
+#include <arch/svinto.h>
 #include <asm/mmu_context.h>
 
 /* debug of low-level TLB reload */

arch/cris/arch-v10/mm/init.c

···
 #include <asm/mmu.h>
 #include <asm/io.h>
 #include <asm/mmu_context.h>
-#include <asm/arch/svinto.h>
+#include <arch/svinto.h>
 
 extern void tlb_init(void);
 

arch/cris/arch-v10/mm/tlb.c

···
 
 #include <asm/tlb.h>
 #include <asm/mmu_context.h>
-#include <asm/arch/svinto.h>
+#include <arch/svinto.h>
 
 #define D(x)
 

arch/cris/arch-v32/boot/compressed/head.S

···
 
 #define ASSEMBLER_MACROS_ONLY
 #include <hwregs/asm/reg_map_asm.h>
-#include <asm/arch/mach/startup.inc>
+#include <mach/startup.inc>
 
 #define RAM_INIT_MAGIC 0x56902387
 #define COMMAND_LINE_MAGIC 0x87109563
···
 	.globl	input_data
 
 	.text
-start:
+_start:
 	di
 
 	;; Start clocks for used blocks.

arch/cris/arch-v32/drivers/mach-a3/gpio.c

···
 #include <asm/io.h>
 #include <asm/system.h>
 #include <asm/irq.h>
-#include <asm/arch/mach/pinmux.h>
+#include <mach/pinmux.h>
 
 #ifdef CONFIG_ETRAX_VIRTUAL_GPIO
 #include "../i2c.h"

arch/cris/arch-v32/drivers/mach-a3/nandflash.c

···
 #include <linux/mtd/mtd.h>
 #include <linux/mtd/nand.h>
 #include <linux/mtd/partitions.h>
-#include <asm/arch/memmap.h>
+#include <arch/memmap.h>
 #include <hwregs/reg_map.h>
 #include <hwregs/reg_rdwr.h>
 #include <hwregs/pio_defs.h>

arch/cris/arch-v32/drivers/mach-fs/nandflash.c

···
 #include <linux/mtd/mtd.h>
 #include <linux/mtd/nand.h>
 #include <linux/mtd/partitions.h>
-#include <asm/arch/memmap.h>
+#include <arch/memmap.h>
 #include <hwregs/reg_map.h>
 #include <hwregs/reg_rdwr.h>
 #include <hwregs/gio_defs.h>

arch/cris/arch-v32/drivers/pci/bios.c

···
 #include <linux/pci.h>
 #include <linux/kernel.h>
-#include <asm/arch/hwregs/intr_vect.h>
+#include <arch/hwregs/intr_vect.h>
 
 void __devinit  pcibios_fixup_bus(struct pci_bus *b)
 {

arch/cris/arch-v32/kernel/cache.c

···
 #include <linux/module.h>
 #include <asm/io.h>
-#include <asm/arch/cache.h>
-#include <asm/arch/hwregs/dma.h>
+#include <arch/cache.h>
+#include <arch/hwregs/dma.h>
 
 /* This file is used to workaround a cache bug, Guinness TR 106. */
 

arch/cris/arch-v32/kernel/crisksyms.c

···
 #include <linux/module.h>
 #include <linux/irq.h>
-#include <asm/arch/dma.h>
-#include <asm/arch/intmem.h>
-#include <asm/arch/mach/pinmux.h>
-#include <asm/arch/io.h>
+#include <arch/dma.h>
+#include <arch/intmem.h>
+#include <mach/pinmux.h>
+#include <arch/io.h>
 
 /* Functions for allocating DMA channels */
 EXPORT_SYMBOL(crisv32_request_dma);

arch/cris/arch-v32/kernel/debugport.c

···
 #include <hwregs/reg_map.h>
 #include <hwregs/ser_defs.h>
 #include <hwregs/dma_defs.h>
-#include <asm/arch/mach/pinmux.h>
+#include <mach/pinmux.h>
 
 struct dbg_port
 {

arch/cris/arch-v32/kernel/entry.S

···
 #include <asm/thread_info.h>
 #include <asm/asm-offsets.h>
 
-#include <asm/arch/hwregs/asm/reg_map_asm.h>
-#include <asm/arch/hwregs/asm/intr_vect_defs_asm.h>
+#include <hwregs/asm/reg_map_asm.h>
+#include <hwregs/asm/intr_vect_defs_asm.h>
 
 	;; Exported functions.
 	.globl system_call

arch/cris/arch-v32/kernel/head.S

···
  * -traditional must not be used when assembling this file.
  */
 #include <hwregs/reg_rdwr.h>
-#include <asm/arch/memmap.h>
+#include <arch/memmap.h>
 #include <hwregs/intr_vect.h>
 #include <hwregs/asm/mmu_defs_asm.h>
 #include <hwregs/asm/reg_map_asm.h>
-#include <asm/arch/mach/startup.inc>
+#include <mach/startup.inc>
 
 #define CRAMFS_MAGIC 0x28cd3d45
 #define JHEAD_MAGIC 0x1FF528A6

arch/cris/arch-v32/kernel/kgdb.c

···
 #include <asm/ptrace.h>
 
 #include <asm/irq.h>
-#include <asm/arch/hwregs/reg_map.h>
-#include <asm/arch/hwregs/reg_rdwr.h>
-#include <asm/arch/hwregs/intr_vect_defs.h>
-#include <asm/arch/hwregs/ser_defs.h>
+#include <arch/hwregs/reg_map.h>
+#include <arch/hwregs/reg_rdwr.h>
+#include <arch/hwregs/intr_vect_defs.h>
+#include <arch/hwregs/ser_defs.h>
 
 /* From entry.S. */
 extern void gdb_handle_exception(void);

arch/cris/arch-v32/kernel/kgdb_asm.S

···
  * port exceptions for kernel debugging purposes.
  */
 
-#include <asm/arch/hwregs/intr_vect.h>
+#include <arch/hwregs/intr_vect.h>
 
 	;; Exported functions.
 	.globl kgdb_handle_exception

arch/cris/arch-v32/kernel/pinmux.c

···
 #include <linux/kernel.h>
 #include <linux/string.h>
 #include <linux/spinlock.h>
-#include <asm/arch/hwregs/reg_map.h>
-#include <asm/arch/hwregs/reg_rdwr.h>
-#include <asm/arch/pinmux.h>
-#include <asm/arch/hwregs/pinmux_defs.h>
+#include <arch/hwregs/reg_map.h>
+#include <arch/hwregs/reg_rdwr.h>
+#include <arch/pinmux.h>
+#include <arch/hwregs/pinmux_defs.h>
 
 #undef DEBUG
 

arch/cris/arch-v32/kernel/ptrace.c

···
 #include <asm/pgtable.h>
 #include <asm/system.h>
 #include <asm/processor.h>
-#include <asm/arch/hwregs/supp_reg.h>
+#include <arch/hwregs/supp_reg.h>
 
 /*
  * Determines which bits in CCS the user has access to.

arch/cris/arch-v32/kernel/signal.c

···
 #include <asm/processor.h>
 #include <asm/ucontext.h>
 #include <asm/uaccess.h>
-#include <asm/arch/ptrace.h>
-#include <asm/arch/hwregs/cpu_vect.h>
+#include <arch/ptrace.h>
+#include <arch/hwregs/cpu_vect.h>
 
 extern unsigned long cris_signal_return_page;
 

arch/cris/arch-v32/lib/nand_init.S

···
 ##
 ##=============================================================================
 
-#include <asm/arch/hwregs/asm/reg_map_asm.h>
-#include <asm/arch/hwregs/asm/gio_defs_asm.h>
-#include <asm/arch/hwregs/asm/pinmux_defs_asm.h>
-#include <asm/arch/hwregs/asm/bif_core_defs_asm.h>
-#include <asm/arch/hwregs/asm/config_defs_asm.h>
+#include <arch/hwregs/asm/reg_map_asm.h>
+#include <arch/hwregs/asm/gio_defs_asm.h>
+#include <arch/hwregs/asm/pinmux_defs_asm.h>
+#include <arch/hwregs/asm/bif_core_defs_asm.h>
+#include <arch/hwregs/asm/config_defs_asm.h>
 
 ;; There are 8-bit NAND flashes and 16-bit NAND flashes.
 ;; We need to treat them slightly different.

arch/cris/arch-v32/mach-a3/dma.c

···
 
 #include <linux/kernel.h>
 #include <linux/spinlock.h>
-#include <asm/arch/mach/dma.h>
+#include <mach/dma.h>
 #include <hwregs/reg_map.h>
 #include <hwregs/reg_rdwr.h>
 #include <hwregs/marb_defs.h>

arch/cris/arch-v32/mach-a3/io.c

···
 #include <linux/kernel.h>
 #include <linux/module.h>
 #include <asm/io.h>
-#include <asm/arch/mach/pinmux.h>
+#include <mach/pinmux.h>
 #include <hwregs/gio_defs.h>
 
 struct crisv32_ioport crisv32_ioports[] = {

arch/cris/arch-v32/mach-fs/cpufreq.c

···
 #include <linux/module.h>
 #include <linux/cpufreq.h>
 #include <hwregs/reg_map.h>
-#include <asm/arch/hwregs/reg_rdwr.h>
-#include <asm/arch/hwregs/config_defs.h>
-#include <asm/arch/hwregs/bif_core_defs.h>
+#include <arch/hwregs/reg_rdwr.h>
+#include <arch/hwregs/config_defs.h>
+#include <arch/hwregs/bif_core_defs.h>
 
 static int
 cris_sdram_freq_notifier(struct notifier_block *nb, unsigned long val,

arch/cris/arch-v32/mach-fs/dma.c

···
 #include <hwregs/strmux_defs.h>
 #include <linux/errno.h>
 #include <asm/system.h>
-#include <asm/arch/mach/arbiter.h>
+#include <mach/arbiter.h>
 
 static char used_dma_channels[MAX_DMA_CHANNELS];
 static const char *used_dma_channels_users[MAX_DMA_CHANNELS];

arch/cris/arch-v32/mach-fs/io.c

···
 #include <linux/kernel.h>
 #include <linux/module.h>
 #include <asm/io.h>
-#include <asm/arch/pinmux.h>
-#include <asm/arch/hwregs/gio_defs.h>
+#include <mach/pinmux.h>
+#include <hwregs/gio_defs.h>
 
 #ifndef DEBUG
 #define DEBUG(x)

arch/cris/arch-v32/mach-fs/vcs_hook.c

···
 
 #include "vcs_hook.h"
 #include <stdarg.h>
-#include <asm/arch-v32/hwregs/reg_map.h>
-#include <asm/arch-v32/hwregs/intr_vect_defs.h>
+#include <arch-v32/hwregs/reg_map.h>
+#include <arch-v32/hwregs/intr_vect_defs.h>
 
 #define HOOK_TRIG_ADDR     0xb7000000	/* hook cvlog model reg address */
 #define HOOK_MEM_BASE_ADDR 0xa0000000	/* csp4 (shared mem) base addr */

arch/cris/arch-v32/mm/init.c

···
 #include <asm/mmu.h>
 #include <asm/io.h>
 #include <asm/mmu_context.h>
-#include <asm/arch/hwregs/asm/mmu_defs_asm.h>
-#include <asm/arch/hwregs/supp_reg.h>
+#include <arch/hwregs/asm/mmu_defs_asm.h>
+#include <arch/hwregs/supp_reg.h>
 
 extern void tlb_init(void);
 

arch/cris/arch-v32/mm/tlb.c

···
 
 #include <asm/tlb.h>
 #include <asm/mmu_context.h>
-#include <asm/arch/hwregs/asm/mmu_defs_asm.h>
-#include <asm/arch/hwregs/supp_reg.h>
+#include <arch/hwregs/asm/mmu_defs_asm.h>
+#include <arch/hwregs/supp_reg.h>
 
 #define UPDATE_TLB_SEL_IDX(val)					\
 do {								\

arch/cris/include/arch-v10/arch/io.h

···
+#ifndef _ASM_ARCH_CRIS_IO_H
+#define _ASM_ARCH_CRIS_IO_H
+
+#include <arch/svinto.h>
+
+/* Etrax shadow registers - which live in arch/cris/kernel/shadows.c */
+
+extern unsigned long gen_config_ii_shadow;
+extern unsigned long port_g_data_shadow;
+extern unsigned char port_pa_dir_shadow;
+extern unsigned char port_pa_data_shadow;
+extern unsigned char port_pb_i2c_shadow;
+extern unsigned char port_pb_config_shadow;
+extern unsigned char port_pb_dir_shadow;
+extern unsigned char port_pb_data_shadow;
+extern unsigned long r_timer_ctrl_shadow;
+
+extern unsigned long port_cse1_shadow;
+extern unsigned long port_csp0_shadow;
+extern unsigned long port_csp4_shadow;
+
+extern volatile unsigned long *port_cse1_addr;
+extern volatile unsigned long *port_csp0_addr;
+extern volatile unsigned long *port_csp4_addr;
+
+/* macro for setting regs through a shadow -
+ * r = register name (like R_PORT_PA_DATA)
+ * s = shadow name (like port_pa_data_shadow)
+ * b = bit number
+ * v = value (0 or 1)
+ */
+
+#define REG_SHADOW_SET(r,s,b,v) *r = s = (s & ~(1 << (b))) | ((v) << (b))
+
+/* The LED's on various Etrax-based products are set differently. */
+
+#if defined(CONFIG_ETRAX_NO_LEDS) || defined(CONFIG_SVINTO_SIM)
+#undef CONFIG_ETRAX_PA_LEDS
+#undef CONFIG_ETRAX_PB_LEDS
+#undef CONFIG_ETRAX_CSP0_LEDS
+#define CRIS_LED_NETWORK_SET_G(x)
+#define CRIS_LED_NETWORK_SET_R(x)
+#define CRIS_LED_ACTIVE_SET_G(x)
+#define CRIS_LED_ACTIVE_SET_R(x)
+#define CRIS_LED_DISK_WRITE(x)
+#define CRIS_LED_DISK_READ(x)
+#endif
+
+#if !defined(CONFIG_ETRAX_CSP0_LEDS)
+#define CRIS_LED_BIT_SET(x)
+#define CRIS_LED_BIT_CLR(x)
+#endif
+
+#define CRIS_LED_OFF    0x00
+#define CRIS_LED_GREEN  0x01
+#define CRIS_LED_RED    0x02
+#define CRIS_LED_ORANGE (CRIS_LED_GREEN | CRIS_LED_RED)
+
+#if defined(CONFIG_ETRAX_NO_LEDS)
+#define CRIS_LED_NETWORK_SET(x)
+#else
+#if CONFIG_ETRAX_LED1G == CONFIG_ETRAX_LED1R
+#define CRIS_LED_NETWORK_SET(x)                          \
+	do {                                        \
+		CRIS_LED_NETWORK_SET_G((x) & CRIS_LED_GREEN); \
+	} while (0)
+#else
+#define CRIS_LED_NETWORK_SET(x)                          \
+	do {                                        \
+		CRIS_LED_NETWORK_SET_G((x) & CRIS_LED_GREEN); \
+		CRIS_LED_NETWORK_SET_R((x) & CRIS_LED_RED);   \
+	} while (0)
+#endif
+#if CONFIG_ETRAX_LED2G == CONFIG_ETRAX_LED2R
+#define CRIS_LED_ACTIVE_SET(x)                           \
+	do {                                        \
+		CRIS_LED_ACTIVE_SET_G((x) & CRIS_LED_GREEN);  \
+	} while (0)
+#else
+#define CRIS_LED_ACTIVE_SET(x)                           \
+	do {                                        \
+		CRIS_LED_ACTIVE_SET_G((x) & CRIS_LED_GREEN);  \
+		CRIS_LED_ACTIVE_SET_R((x) & CRIS_LED_RED);    \
+	} while (0)
+#endif
+#endif
+
+#ifdef CONFIG_ETRAX_PA_LEDS
+#define CRIS_LED_NETWORK_SET_G(x) \
+         REG_SHADOW_SET(R_PORT_PA_DATA, port_pa_data_shadow, CONFIG_ETRAX_LED1G, !(x))
+#define CRIS_LED_NETWORK_SET_R(x) \
+         REG_SHADOW_SET(R_PORT_PA_DATA, port_pa_data_shadow, CONFIG_ETRAX_LED1R, !(x))
+#define CRIS_LED_ACTIVE_SET_G(x) \
+         REG_SHADOW_SET(R_PORT_PA_DATA, port_pa_data_shadow, CONFIG_ETRAX_LED2G, !(x))
+#define CRIS_LED_ACTIVE_SET_R(x) \
+         REG_SHADOW_SET(R_PORT_PA_DATA, port_pa_data_shadow, CONFIG_ETRAX_LED2R, !(x))
+#define CRIS_LED_DISK_WRITE(x) \
+         do{\
+                REG_SHADOW_SET(R_PORT_PA_DATA, port_pa_data_shadow, CONFIG_ETRAX_LED3G, !(x));\
+                REG_SHADOW_SET(R_PORT_PA_DATA, port_pa_data_shadow, CONFIG_ETRAX_LED3R, !(x));\
+        }while(0)
+#define CRIS_LED_DISK_READ(x) \
+	REG_SHADOW_SET(R_PORT_PA_DATA, port_pa_data_shadow, \
+		CONFIG_ETRAX_LED3G, !(x))
+#endif
+
+#ifdef CONFIG_ETRAX_PB_LEDS
+#define CRIS_LED_NETWORK_SET_G(x) \
+         REG_SHADOW_SET(R_PORT_PB_DATA, port_pb_data_shadow, CONFIG_ETRAX_LED1G, !(x))
+#define CRIS_LED_NETWORK_SET_R(x) \
+         REG_SHADOW_SET(R_PORT_PB_DATA, port_pb_data_shadow, CONFIG_ETRAX_LED1R, !(x))
+#define CRIS_LED_ACTIVE_SET_G(x) \
+         REG_SHADOW_SET(R_PORT_PB_DATA, port_pb_data_shadow, CONFIG_ETRAX_LED2G, !(x))
+#define CRIS_LED_ACTIVE_SET_R(x) \
+         REG_SHADOW_SET(R_PORT_PB_DATA, port_pb_data_shadow, CONFIG_ETRAX_LED2R, !(x))
+#define CRIS_LED_DISK_WRITE(x) \
+        do{\
+                REG_SHADOW_SET(R_PORT_PB_DATA, port_pb_data_shadow, CONFIG_ETRAX_LED3G, !(x));\
+                REG_SHADOW_SET(R_PORT_PB_DATA, port_pb_data_shadow, CONFIG_ETRAX_LED3R, !(x));\
+        }while(0)
+#define CRIS_LED_DISK_READ(x) \
+	REG_SHADOW_SET(R_PORT_PB_DATA, port_pb_data_shadow, \
+		CONFIG_ETRAX_LED3G, !(x))
+#endif
+
+#ifdef CONFIG_ETRAX_CSP0_LEDS
+#define CONFIGURABLE_LEDS\
+        ((1 << CONFIG_ETRAX_LED1G ) | (1 << CONFIG_ETRAX_LED1R ) |\
+         (1 << CONFIG_ETRAX_LED2G ) | (1 << CONFIG_ETRAX_LED2R ) |\
+         (1 << CONFIG_ETRAX_LED3G ) | (1 << CONFIG_ETRAX_LED3R ) |\
+         (1 << CONFIG_ETRAX_LED4G ) | (1 << CONFIG_ETRAX_LED4R ) |\
+         (1 << CONFIG_ETRAX_LED5G ) | (1 << CONFIG_ETRAX_LED5R ) |\
+         (1 << CONFIG_ETRAX_LED6G ) | (1 << CONFIG_ETRAX_LED6R ) |\
+         (1 << CONFIG_ETRAX_LED7G ) | (1 << CONFIG_ETRAX_LED7R ) |\
+         (1 << CONFIG_ETRAX_LED8Y ) | (1 << CONFIG_ETRAX_LED9Y ) |\
+         (1 << CONFIG_ETRAX_LED10Y ) |(1 << CONFIG_ETRAX_LED11Y )|\
+         (1 << CONFIG_ETRAX_LED12R ))
+
+#define CRIS_LED_NETWORK_SET_G(x) \
+         REG_SHADOW_SET(port_csp0_addr, port_csp0_shadow, CONFIG_ETRAX_LED1G, !(x))
+#define CRIS_LED_NETWORK_SET_R(x) \
+         REG_SHADOW_SET(port_csp0_addr, port_csp0_shadow, CONFIG_ETRAX_LED1R, !(x))
+#define CRIS_LED_ACTIVE_SET_G(x) \
+         REG_SHADOW_SET(port_csp0_addr, port_csp0_shadow, CONFIG_ETRAX_LED2G, !(x))
+#define CRIS_LED_ACTIVE_SET_R(x) \
+         REG_SHADOW_SET(port_csp0_addr, port_csp0_shadow, CONFIG_ETRAX_LED2R, !(x))
+#define CRIS_LED_DISK_WRITE(x) \
+        do{\
+                REG_SHADOW_SET(port_csp0_addr, port_csp0_shadow, CONFIG_ETRAX_LED3G, !(x));\
+                REG_SHADOW_SET(port_csp0_addr, port_csp0_shadow, CONFIG_ETRAX_LED3R, !(x));\
+        }while(0)
+#define CRIS_LED_DISK_READ(x) \
+         REG_SHADOW_SET(port_csp0_addr, port_csp0_shadow, CONFIG_ETRAX_LED3G, !(x))
+#define CRIS_LED_BIT_SET(x)\
+        do{\
+                if((( 1 << x) & CONFIGURABLE_LEDS)  != 0)\
+                       REG_SHADOW_SET(port_csp0_addr, port_csp0_shadow, x, 1);\
+        }while(0)
+#define CRIS_LED_BIT_CLR(x)\
+        do{\
+                if((( 1 << x) & CONFIGURABLE_LEDS)  != 0)\
+                       REG_SHADOW_SET(port_csp0_addr, port_csp0_shadow, x, 0);\
+        }while(0)
+#endif
+
+#
+#ifdef CONFIG_ETRAX_SOFT_SHUTDOWN
+#define SOFT_SHUTDOWN() \
+          REG_SHADOW_SET(port_csp0_addr, port_csp0_shadow, CONFIG_ETRAX_SHUTDOWN_BIT, 1)
+#else
+#define SOFT_SHUTDOWN()
+#endif
+
+/* Console I/O for simulated etrax100.  Use #ifdef so erroneous
+   use will be evident. */
+#ifdef CONFIG_SVINTO_SIM
+  /* Let's use the ucsim interface since it lets us do write(2, ...) */
+#define SIMCOUT(s,len)							\
+  asm ("moveq 4,$r9	\n\t"						\
+       "moveq 2,$r10	\n\t"						\
+       "move.d %0,$r11	\n\t"						\
+       "move.d %1,$r12	\n\t"						\
+       "push $irp	\n\t"						\
+       "move 0f,$irp	\n\t"						\
+       "jump -6809	\n"						\
+       "0:		\n\t"						\
+       "pop $irp"							\
+       : : "rm" (s), "rm" (len) : "r9","r10","r11","r12","memory")
+#define TRACE_ON() __extension__ \
+ ({ int _Foofoo; __asm__ volatile ("bmod [%0],%0" : "=r" (_Foofoo) : "0" \
+			       (255)); _Foofoo; })
+
+#define TRACE_OFF() do { __asm__ volatile ("bmod [%0],%0" :: "r" (254)); } while (0)
+#define SIM_END() do { __asm__ volatile ("bmod [%0],%0" :: "r" (28)); } while (0)
+#define CRIS_CYCLES() __extension__ \
+ ({ unsigned long c; asm ("bmod [%1],%0" : "=r" (c) : "r" (27)); c;})
+#endif /* ! defined CONFIG_SVINTO_SIM */
+
+#endif

arch/cris/include/arch-v10/arch/irq.h

···
+/*
+ * Interrupt handling assembler and defines for Linux/CRISv10
+ */
+
+#ifndef _ASM_ARCH_IRQ_H
+#define _ASM_ARCH_IRQ_H
+
+#include <arch/sv_addr_ag.h>
+
+#define NR_IRQS 32
+
+/* The first vector number used for IRQs in v10 is really 0x20 */
+/* but all the code and constants are offseted to make 0 the first */
+#define FIRST_IRQ 0
+
+#define SOME_IRQ_NBR        IO_BITNR(R_VECT_MASK_RD, some)   /* 0 ? */
+#define NMI_IRQ_NBR         IO_BITNR(R_VECT_MASK_RD, nmi)    /* 1 */
+#define TIMER0_IRQ_NBR      IO_BITNR(R_VECT_MASK_RD, timer0) /* 2 */
+#define TIMER1_IRQ_NBR      IO_BITNR(R_VECT_MASK_RD, timer1) /* 3 */
+/* mio, ata, par0, scsi0 on 4 */
+/* par1, scsi1 on 5 */
+#define NETWORK_STATUS_IRQ_NBR IO_BITNR(R_VECT_MASK_RD, network) /* 6 */
+
+#define SERIAL_IRQ_NBR IO_BITNR(R_VECT_MASK_RD, serial) /* 8 */
+#define PA_IRQ_NBR IO_BITNR(R_VECT_MASK_RD, pa) /* 11 */
+/* extdma0 and extdma1 is at irq 12 and 13 and/or same as dma5 and dma6 ? */
+#define EXTDMA0_IRQ_NBR IO_BITNR(R_VECT_MASK_RD, ext_dma0)
+#define EXTDMA1_IRQ_NBR IO_BITNR(R_VECT_MASK_RD, ext_dma1)
+
+/* dma0-9 is irq 16..25 */
+/* 16,17: network */
+#define DMA0_TX_IRQ_NBR IO_BITNR(R_VECT_MASK_RD, dma0)
+#define DMA1_RX_IRQ_NBR IO_BITNR(R_VECT_MASK_RD, dma1)
+#define NETWORK_DMA_TX_IRQ_NBR DMA0_TX_IRQ_NBR
+#define NETWORK_DMA_RX_IRQ_NBR DMA1_RX_IRQ_NBR
+
+/* 18,19: dma2 and dma3 shared by par0, scsi0, ser2 and ata */
+#define DMA2_TX_IRQ_NBR IO_BITNR(R_VECT_MASK_RD, dma2)
+#define DMA3_RX_IRQ_NBR IO_BITNR(R_VECT_MASK_RD, dma3)
+#define SER2_DMA_TX_IRQ_NBR DMA2_TX_IRQ_NBR
+#define SER2_DMA_RX_IRQ_NBR DMA3_RX_IRQ_NBR
+
+/* 20,21: dma4 and dma5 shared by par1, scsi1, ser3 and extdma0 */
+#define DMA4_TX_IRQ_NBR IO_BITNR(R_VECT_MASK_RD, dma4)
+#define DMA5_RX_IRQ_NBR IO_BITNR(R_VECT_MASK_RD, dma5)
+#define SER3_DMA_TX_IRQ_NBR DMA4_TX_IRQ_NBR
+#define SER3_DMA_RX_IRQ_NBR DMA5_RX_IRQ_NBR
+
+/* 22,23: dma6 and dma7 shared by ser0, extdma1 and mem2mem */
+#define DMA6_TX_IRQ_NBR IO_BITNR(R_VECT_MASK_RD, dma6)
+#define DMA7_RX_IRQ_NBR IO_BITNR(R_VECT_MASK_RD, dma7)
+#define SER0_DMA_TX_IRQ_NBR DMA6_TX_IRQ_NBR
+#define SER0_DMA_RX_IRQ_NBR DMA7_RX_IRQ_NBR
+#define MEM2MEM_DMA_TX_IRQ_NBR DMA6_TX_IRQ_NBR
+#define MEM2MEM_DMA_RX_IRQ_NBR DMA7_RX_IRQ_NBR
+
+/* 24,25: dma8 and dma9 shared by ser1 and usb */
+#define DMA8_TX_IRQ_NBR IO_BITNR(R_VECT_MASK_RD, dma8)
+#define DMA9_RX_IRQ_NBR IO_BITNR(R_VECT_MASK_RD, dma9)
+#define SER1_DMA_TX_IRQ_NBR DMA8_TX_IRQ_NBR
+#define SER1_DMA_RX_IRQ_NBR DMA9_RX_IRQ_NBR
+#define USB_DMA_TX_IRQ_NBR DMA8_TX_IRQ_NBR
+#define USB_DMA_RX_IRQ_NBR DMA9_RX_IRQ_NBR
+
+/* usb: controller at irq 31 + uses DMA8 and DMA9 */
+#define USB_HC_IRQ_NBR IO_BITNR(R_VECT_MASK_RD, usb)
+
+/* our fine, global, etrax irq vector! the pointer lives in the head.S file. */
+
+typedef void (*irqvectptr)(void);
+
+struct etrax_interrupt_vector {
+	irqvectptr v[256];
+};
+
+extern struct etrax_interrupt_vector *etrax_irv;
+void set_int_vector(int n, irqvectptr addr);
+void set_break_vector(int n, irqvectptr addr);
+
+#define __STR(x) #x
+#define STR(x) __STR(x)
+ 
+/* SAVE_ALL saves registers so they match pt_regs */
+
+#define SAVE_ALL \
+  "move $irp,[$sp=$sp-16]\n\t" /* push instruction pointer and fake SBFS struct */ \
+  "push $srp\n\t"       /* push subroutine return pointer */ \
+  "push $dccr\n\t"      /* push condition codes */ \
+  "push $mof\n\t"       /* push multiply overflow reg */ \
+  "di\n\t"             /* need to disable irq's at this point */\
+  "subq 14*4,$sp\n\t"   /* make room for r0-r13 */ \
+  "movem $r13,[$sp]\n\t" /* push the r0-r13 registers */ \
+  "push $r10\n\t"       /* push orig_r10 */ \
+  "clear.d [$sp=$sp-4]\n\t"  /* frametype - this is a normal stackframe */
+
+  /* BLOCK_IRQ and UNBLOCK_IRQ do the same as mask_irq and unmask_irq */
+
+#define BLOCK_IRQ(mask,nr) \
+  "move.d " #mask ",$r0\n\t" \
+  "move.d $r0,[0xb00000d8]\n\t" 
+  
+#define UNBLOCK_IRQ(mask) \
+  "move.d " #mask ",$r0\n\t" \
+  "move.d $r0,[0xb00000dc]\n\t" 
+
+#define IRQ_NAME2(nr) nr##_interrupt(void)
+#define IRQ_NAME(nr) IRQ_NAME2(IRQ##nr)
+#define sIRQ_NAME(nr) IRQ_NAME2(sIRQ##nr)
+#define BAD_IRQ_NAME(nr) IRQ_NAME2(bad_IRQ##nr)
+
+  /* the asm IRQ handler makes sure the causing IRQ is blocked, then it calls
+   * do_IRQ (with irq disabled still). after that it unblocks and jumps to
+   * ret_from_intr (entry.S)
+   *
+   * The reason the IRQ is blocked is to allow an sti() before the handler which
+   * will acknowledge the interrupt is run.
+   */
+
+#define BUILD_IRQ(nr,mask) \
+void IRQ_NAME(nr); \
+__asm__ ( \
+          ".text\n\t" \
+          "IRQ" #nr "_interrupt:\n\t" \
+	  SAVE_ALL \
+	  BLOCK_IRQ(mask,nr) /* this must be done to prevent irq loops when we ei later */ \
+	  "moveq "#nr",$r10\n\t" \
+	  "move.d $sp,$r11\n\t" \
+	  "jsr do_IRQ\n\t" /* irq.c, r10 and r11 are arguments */ \
+	  UNBLOCK_IRQ(mask) \
+	  "moveq 0,$r9\n\t" /* make ret_from_intr realise we came from an irq */ \
+	  "jump ret_from_intr\n\t");
+
+/* This is subtle. The timer interrupt is crucial and it should not be disabled for 
+ * too long. However, if it had been a normal interrupt as per BUILD_IRQ, it would
+ * have been BLOCK'ed, and then softirq's are run before we return here to UNBLOCK.
+ * If the softirq's take too much time to run, the timer irq won't run and the 
+ * watchdog will kill us.
+ *
+ * Furthermore, if a lot of other irq's occur before we return here, the multiple_irq
+ * handler is run and it prioritizes the timer interrupt. However if we had BLOCK'ed
+ * it here, we would not get the multiple_irq at all.
+ *
+ * The non-blocking here is based on the knowledge that the timer interrupt is 
+ * registred as a fast interrupt (IRQF_DISABLED) so that we _know_ there will not
+ * be an sti() before the timer irq handler is run to acknowledge the interrupt.
+ */
+
+#define BUILD_TIMER_IRQ(nr,mask) \
+void IRQ_NAME(nr); \
+__asm__ ( \
+          ".text\n\t" \
+          "IRQ" #nr "_interrupt:\n\t" \
+	  SAVE_ALL \
+	  "moveq "#nr",$r10\n\t" \
+	  "move.d $sp,$r11\n\t" \
+	  "jsr do_IRQ\n\t" /* irq.c, r10 and r11 are arguments */ \
+	  "moveq 0,$r9\n\t" /* make ret_from_intr realise we came from an irq */ \
+	  "jump ret_from_intr\n\t");
+
+#endif

arch/cris/include/arch-v32/arch/cache.h

···
+#ifndef _ASM_CRIS_ARCH_CACHE_H
+#define _ASM_CRIS_ARCH_CACHE_H
+
+#include <arch/hwregs/dma.h>
+
+/* A cache-line is 32 bytes. */
+#define L1_CACHE_BYTES 32
+#define L1_CACHE_SHIFT 5
+
+void flush_dma_list(dma_descr_data *descr);
+void flush_dma_descr(dma_descr_data *descr, int flush_buf);
+
+#define flush_dma_context(c) \
+  flush_dma_list(phys_to_virt((c)->saved_data));
+
+void cris_flush_cache_range(void *buf, unsigned long len);
+void cris_flush_cache(void);
+
+#endif /* _ASM_CRIS_ARCH_CACHE_H */

arch/cris/include/arch-v32/arch/cryptocop.h

···
+/*
+ * The device /dev/cryptocop is accessible using this driver using
+ * CRYPTOCOP_MAJOR (254) and minor number 0.
+ */
+
+#ifndef CRYPTOCOP_H
+#define CRYPTOCOP_H
+
+#include <linux/uio.h>
+
+
+#define CRYPTOCOP_SESSION_ID_NONE (0)
+
+typedef unsigned long long int cryptocop_session_id;
+
+/* cryptocop ioctls */
+#define ETRAXCRYPTOCOP_IOCTYPE         (250)
+
+#define CRYPTOCOP_IO_CREATE_SESSION    _IOWR(ETRAXCRYPTOCOP_IOCTYPE, 1, struct strcop_session_op)
+#define CRYPTOCOP_IO_CLOSE_SESSION     _IOW(ETRAXCRYPTOCOP_IOCTYPE, 2, struct strcop_session_op)
+#define CRYPTOCOP_IO_PROCESS_OP        _IOWR(ETRAXCRYPTOCOP_IOCTYPE, 3, struct strcop_crypto_op)
+#define CRYPTOCOP_IO_MAXNR             (3)
+
+typedef enum {
+	cryptocop_cipher_des = 0,
+	cryptocop_cipher_3des = 1,
+	cryptocop_cipher_aes = 2,
+	cryptocop_cipher_m2m = 3, /* mem2mem is essentially a NULL cipher with blocklength=1 */
+	cryptocop_cipher_none
+} cryptocop_cipher_type;
+
+typedef enum {
+	cryptocop_digest_sha1 = 0,
+	cryptocop_digest_md5 = 1,
+	cryptocop_digest_none
+} cryptocop_digest_type;
+
+typedef enum {
+	cryptocop_csum_le = 0,
+	cryptocop_csum_be = 1,
+	cryptocop_csum_none
+} cryptocop_csum_type;
+
+typedef enum {
+	cryptocop_cipher_mode_ecb = 0,
+	cryptocop_cipher_mode_cbc,
+	cryptocop_cipher_mode_none
+} cryptocop_cipher_mode;
+
+typedef enum {
+	cryptocop_3des_eee = 0,
+	cryptocop_3des_eed = 1,
+	cryptocop_3des_ede = 2,
+	cryptocop_3des_edd = 3,
+	cryptocop_3des_dee = 4,
+	cryptocop_3des_ded = 5,
+	cryptocop_3des_dde = 6,
+	cryptocop_3des_ddd = 7
+} cryptocop_3des_mode;
+
+/* Usermode accessible (ioctl) operations. */
+struct strcop_session_op{
+	cryptocop_session_id    ses_id;
+
+	cryptocop_cipher_type   cipher; /* AES, DES, 3DES, m2m, none */
+
+	cryptocop_cipher_mode   cmode; /* ECB, CBC, none */
+	cryptocop_3des_mode     des3_mode;
+
+	cryptocop_digest_type   digest; /* MD5, SHA1, none */
+
+	cryptocop_csum_type     csum;   /* BE, LE, none */
+
+	unsigned char           *key;
+	size_t                  keylen;
+};
+
+#define CRYPTOCOP_CSUM_LENGTH         (2)
+#define CRYPTOCOP_MAX_DIGEST_LENGTH   (20)  /* SHA-1 20, MD5 16 */
+#define CRYPTOCOP_MAX_IV_LENGTH       (16)  /* (3)DES==8, AES == 16 */
+#define CRYPTOCOP_MAX_KEY_LENGTH      (32)
+
+struct strcop_crypto_op{
+	cryptocop_session_id ses_id;
+
+	/* Indata. */
+	unsigned char            *indata;
+	size_t                   inlen; /* Total indata length. */
+
+	/* Cipher configuration. */
+	unsigned char            do_cipher:1;
+	unsigned char            decrypt:1; /* 1 == decrypt, 0 == encrypt */
+	unsigned char            cipher_explicit:1;
+	size_t                   cipher_start;
+	size_t                   cipher_len;
+	/* cipher_iv is used if do_cipher and cipher_explicit and the cipher
+	   mode is CBC.  The length is controlled by the type of cipher,
+	   e.g. DES/3DES 8 octets and AES 16 octets. */
+	unsigned char            cipher_iv[CRYPTOCOP_MAX_IV_LENGTH];
+	/* Outdata. */
+	unsigned char            *cipher_outdata;
+	size_t                   cipher_outlen;
+
+	/* digest configuration. */
+	unsigned char            do_digest:1;
+	size_t                   digest_start;
+	size_t                   digest_len;
+	/* Outdata.  The actual length is determined by the type of the digest. */
+	unsigned char            digest[CRYPTOCOP_MAX_DIGEST_LENGTH];
+
+	/* Checksum configuration. */
+	unsigned char            do_csum:1;
+	size_t                   csum_start;
+	size_t                   csum_len;
+	/* Outdata. */
+	unsigned char            csum[CRYPTOCOP_CSUM_LENGTH];
+};
+
+
+
+#ifdef __KERNEL__
+
+/********** The API to use from inside the kernel. ************/
+
+#include <arch/hwregs/dma.h>
+
+typedef enum {
+	cryptocop_alg_csum = 0,
+	cryptocop_alg_mem2mem,
+	cryptocop_alg_md5,
+	cryptocop_alg_sha1,
+	cryptocop_alg_des,
+	cryptocop_alg_3des,
+	cryptocop_alg_aes,
+	cryptocop_no_alg,
+} cryptocop_algorithm;
+
+typedef u8 cryptocop_tfrm_id;
+
+
+struct cryptocop_operation;
+
+typedef void (cryptocop_callback)(struct cryptocop_operation*, void*);
+
+struct cryptocop_transform_init {
+	cryptocop_algorithm    alg;
+	/* Keydata for ciphers. */
+	unsigned char          key[CRYPTOCOP_MAX_KEY_LENGTH];
+	unsigned int           keylen;
+	cryptocop_cipher_mode  cipher_mode;
+	cryptocop_3des_mode    tdes_mode;
+	cryptocop_csum_type    csum_mode; /* cryptocop_csum_none is not allowed when alg==cryptocop_alg_csum */
+
+	cryptocop_tfrm_id tid; /* Locally unique in session; assigned by user, checked by driver. */
+	struct cryptocop_transform_init *next;
+};
+
+
+typedef enum {
+	cryptocop_source_dma = 0,
+	cryptocop_source_des,
+	cryptocop_source_3des,
+	cryptocop_source_aes,
+	cryptocop_source_md5,
+	cryptocop_source_sha1,
+	cryptocop_source_csum,
+	cryptocop_source_none,
+} cryptocop_source;
+
+
+struct cryptocop_desc_cfg {
+	cryptocop_tfrm_id tid;
+	cryptocop_source src;
+	unsigned int last:1; /* Last use of this transform in the operation.  Will push outdata when encountered. */
+	struct cryptocop_desc_cfg *next;
+};
+
+struct cryptocop_desc {
+	size_t length;
+	struct cryptocop_desc_cfg *cfg;
+	struct cryptocop_desc *next;
+};
+
+
+/* Flags for cryptocop_tfrm_cfg */
+#define CRYPTOCOP_NO_FLAG     (0x00)
+#define CRYPTOCOP_ENCRYPT     (0x01)
+#define CRYPTOCOP_DECRYPT     (0x02)
+#define CRYPTOCOP_EXPLICIT_IV (0x04)
+
+struct cryptocop_tfrm_cfg {
+	cryptocop_tfrm_id tid;
+
+	unsigned int flags; /* DECRYPT, ENCRYPT, EXPLICIT_IV */
+
+	/* CBC initialisation vector for cihers. */
+	u8 iv[CRYPTOCOP_MAX_IV_LENGTH];
+
+	/* The position in output where to write the transform output.  The order
+	   in which the driver writes the output is unspecified, hence if several
+	   transforms write on the same positions in the output the result is
+	   unspecified. */
+	size_t inject_ix;
+
+	struct cryptocop_tfrm_cfg *next;
+};
+
+
+
+struct cryptocop_dma_list_operation{
+	/* The consumer can provide DMA lists to send to the co-processor.  'use_dmalists' in
+	   struct cryptocop_operation must be set for the driver to use them.  outlist,
+	   out_data_buf, inlist and in_data_buf must all be physical addresses since they will
+	   be loaded to DMA . */
+	dma_descr_data *outlist; /* Out from memory to the co-processor. */
+	char           *out_data_buf;
+	dma_descr_data *inlist; /* In from the co-processor to memory. */
+	char           *in_data_buf;
+
+	cryptocop_3des_mode tdes_mode;
+	cryptocop_csum_type csum_mode;
+};
+
+
+struct cryptocop_tfrm_operation{
+	/* Operation configuration, if not 'use_dmalists' is set. */
+	struct cryptocop_tfrm_cfg *tfrm_cfg;
+	struct cryptocop_desc *desc;
+
+	struct iovec *indata;
+	size_t incount;
+	size_t inlen; /* Total inlength. */
+
+	struct iovec *outdata;
+	size_t outcount;
+	size_t outlen; /* Total outlength. */
+};
+
+
+struct cryptocop_operation {
+	cryptocop_callback *cb;
+	void *cb_data;
+
+	cryptocop_session_id sid;
+
+	/* The status of the operation when returned to consumer. */
+	int operation_status; /* 0, -EAGAIN */
+
+	/* Flags */
+	unsigned int use_dmalists:1;  /* Use outlist and inlist instead of the desc/tfrm_cfg configuration. */
+	unsigned int in_interrupt:1;  /* Set if inserting job from interrupt context. */
+	unsigned int fast_callback:1; /* Set if fast callback wanted, i.e. from interrupt context. */
+
+	union{
+		struct cryptocop_dma_list_operation list_op;
+		struct cryptocop_tfrm_operation tfrm_op;
+	};
+};
+
+
+int cryptocop_new_session(cryptocop_session_id *sid, struct cryptocop_transform_init *tinit, int alloc_flag);
+int cryptocop_free_session(cryptocop_session_id sid);
+
+int cryptocop_job_queue_insert_csum(struct cryptocop_operation *operation);
+
+int cryptocop_job_queue_insert_crypto(struct cryptocop_operation *operation);
+
+int cryptocop_job_queue_insert_user_job(struct cryptocop_operation *operation);
+
+#endif /* __KERNEL__ */
+
+#endif /* CRYPTOCOP_H */

arch/cris/include/arch-v32/arch/io.h

···
+#ifndef _ASM_ARCH_CRIS_IO_H
+#define _ASM_ARCH_CRIS_IO_H
+
+#include <linux/spinlock.h>
+#include <hwregs/reg_map.h>
+#include <hwregs/reg_rdwr.h>
+#include <hwregs/gio_defs.h>
+
+enum crisv32_io_dir
+{
+  crisv32_io_dir_in = 0,
+  crisv32_io_dir_out = 1
+};
+
+struct crisv32_ioport
+{
+  volatile unsigned long *oe;
+  volatile unsigned long *data;
+  volatile unsigned long *data_in;
+  unsigned int pin_count;
+  spinlock_t lock;
+};
+
+struct crisv32_iopin
+{
+  struct crisv32_ioport* port;
+  int bit;
+};
+
+extern struct crisv32_ioport crisv32_ioports[];
+
+extern struct crisv32_iopin crisv32_led1_green;
+extern struct crisv32_iopin crisv32_led1_red;
+extern struct crisv32_iopin crisv32_led2_green;
+extern struct crisv32_iopin crisv32_led2_red;
+extern struct crisv32_iopin crisv32_led3_green;
+extern struct crisv32_iopin crisv32_led3_red;
+
+extern struct crisv32_iopin crisv32_led_net0_green;
+extern struct crisv32_iopin crisv32_led_net0_red;
+extern struct crisv32_iopin crisv32_led_net1_green;
+extern struct crisv32_iopin crisv32_led_net1_red;
+
+static inline void crisv32_io_set(struct crisv32_iopin *iopin, int val)
+{
+	unsigned long flags;
+	spin_lock_irqsave(&iopin->port->lock, flags);
+
+	if (val)
+		*iopin->port->data |= iopin->bit;
+	else
+		*iopin->port->data &= ~iopin->bit;
+
+	spin_unlock_irqrestore(&iopin->port->lock, flags);
+}
+
+static inline void crisv32_io_set_dir(struct crisv32_iopin* iopin,
+			       enum crisv32_io_dir dir)
+{
+	unsigned long flags;
+	spin_lock_irqsave(&iopin->port->lock, flags);
+
+	if (dir == crisv32_io_dir_in)
+		*iopin->port->oe &= ~iopin->bit;
+	else
+		*iopin->port->oe |= iopin->bit;
+
+	spin_unlock_irqrestore(&iopin->port->lock, flags);
+}
+
+static inline int crisv32_io_rd(struct crisv32_iopin* iopin)
+{
+	return ((*iopin->port->data_in & iopin->bit) ? 1 : 0);
+}
+
+int crisv32_io_get(struct crisv32_iopin* iopin,
+                   unsigned int port, unsigned int pin);
+int crisv32_io_get_name(struct crisv32_iopin* iopin,
+			const char *name);
+
+#define CRIS_LED_OFF    0x00
+#define CRIS_LED_GREEN  0x01
+#define CRIS_LED_RED    0x02
+#define CRIS_LED_ORANGE (CRIS_LED_GREEN | CRIS_LED_RED)
+
+#if (defined(CONFIG_ETRAX_NBR_LED_GRP_ONE) || defined(CONFIG_ETRAX_NBR_LED_GRP_TWO))
+#define CRIS_LED_NETWORK_GRP0_SET(x)                          \
+	do {                                             \
+		CRIS_LED_NETWORK_GRP0_SET_G((x) & CRIS_LED_GREEN); \
+		CRIS_LED_NETWORK_GRP0_SET_R((x) & CRIS_LED_RED);   \
+	} while (0)
+#else
+#define CRIS_LED_NETWORK_GRP0_SET(x) while (0) {}
+#endif
+
+#define CRIS_LED_NETWORK_GRP0_SET_G(x) \
+	crisv32_io_set(&crisv32_led_net0_green, !(x));
+
+#define CRIS_LED_NETWORK_GRP0_SET_R(x) \
+	crisv32_io_set(&crisv32_led_net0_red, !(x));
+
+#if defined(CONFIG_ETRAX_NBR_LED_GRP_TWO)
+#define CRIS_LED_NETWORK_GRP1_SET(x)                          \
+	do {                                             \
+		CRIS_LED_NETWORK_GRP1_SET_G((x) & CRIS_LED_GREEN); \
+		CRIS_LED_NETWORK_GRP1_SET_R((x) & CRIS_LED_RED);   \
+	} while (0)
+#else
+#define CRIS_LED_NETWORK_GRP1_SET(x) while (0) {}
+#endif
+
+#define CRIS_LED_NETWORK_GRP1_SET_G(x) \
+	crisv32_io_set(&crisv32_led_net1_green, !(x));
+
+#define CRIS_LED_NETWORK_GRP1_SET_R(x) \
+	crisv32_io_set(&crisv32_led_net1_red, !(x));
+
+#define CRIS_LED_ACTIVE_SET(x)                           \
+	do {                                        \
+		CRIS_LED_ACTIVE_SET_G((x) & CRIS_LED_GREEN);  \
+		CRIS_LED_ACTIVE_SET_R((x) & CRIS_LED_RED);    \
+	} while (0)
+
+#define CRIS_LED_ACTIVE_SET_G(x) \
+	crisv32_io_set(&crisv32_led2_green, !(x));
+#define CRIS_LED_ACTIVE_SET_R(x) \
+	crisv32_io_set(&crisv32_led2_red, !(x));
+#define CRIS_LED_DISK_WRITE(x) \
+         do{\
+		crisv32_io_set(&crisv32_led3_green, !(x)); \
+		crisv32_io_set(&crisv32_led3_red, !(x));   \
+        }while(0)
+#define CRIS_LED_DISK_READ(x) \
+	crisv32_io_set(&crisv32_led3_green, !(x));
+
+#endif

arch/cris/include/asm/atomic.h

···
+/* $Id: atomic.h,v 1.3 2001/07/25 16:15:19 bjornw Exp $ */
+
+#ifndef __ASM_CRIS_ATOMIC__
+#define __ASM_CRIS_ATOMIC__
+
+#include <linux/compiler.h>
+
+#include <asm/system.h>
+#include <arch/atomic.h>
+
+/*
+ * Atomic operations that C can't guarantee us.  Useful for
+ * resource counting etc..
+ */
+
+typedef struct { volatile int counter; } atomic_t;
+
+#define ATOMIC_INIT(i)  { (i) }
+
+#define atomic_read(v) ((v)->counter)
+#define atomic_set(v,i) (((v)->counter) = (i))
+
+/* These should be written in asm but we do it in C for now. */
+
+static inline void atomic_add(int i, volatile atomic_t *v)
+{
+	unsigned long flags;
+	cris_atomic_save(v, flags);
+	v->counter += i;
+	cris_atomic_restore(v, flags);
+}
+
+static inline void atomic_sub(int i, volatile atomic_t *v)
+{
+	unsigned long flags;
+	cris_atomic_save(v, flags);
+	v->counter -= i;
+	cris_atomic_restore(v, flags);
+}
+
+static inline int atomic_add_return(int i, volatile atomic_t *v)
+{
+	unsigned long flags;
+	int retval;
+	cris_atomic_save(v, flags);
+	retval = (v->counter += i);
+	cris_atomic_restore(v, flags);
+	return retval;
+}
+
+#define atomic_add_negative(a, v)	(atomic_add_return((a), (v)) < 0)
+
+static inline int atomic_sub_return(int i, volatile atomic_t *v)
+{
+	unsigned long flags;
+	int retval;
+	cris_atomic_save(v, flags);
+	retval = (v->counter -= i);
+	cris_atomic_restore(v, flags);
+	return retval;
+}
+
+static inline int atomic_sub_and_test(int i, volatile atomic_t *v)
+{
+	int retval;
+	unsigned long flags;
+	cris_atomic_save(v, flags);
+	retval = (v->counter -= i) == 0;
+	cris_atomic_restore(v, flags);
+	return retval;
+}
+
+static inline void atomic_inc(volatile atomic_t *v)
+{
+	unsigned long flags;
+	cris_atomic_save(v, flags);
+	(v->counter)++;
+	cris_atomic_restore(v, flags);
+}
+
+static inline void atomic_dec(volatile atomic_t *v)
+{
+	unsigned long flags;
+	cris_atomic_save(v, flags);
+	(v->counter)--;
+	cris_atomic_restore(v, flags);
+}
+
+static inline int atomic_inc_return(volatile atomic_t *v)
+{
+	unsigned long flags;
+	int retval;
+	cris_atomic_save(v, flags);
+	retval = ++(v->counter);
+	cris_atomic_restore(v, flags);
+	return retval;
+}
+
+static inline int atomic_dec_return(volatile atomic_t *v)
+{
+	unsigned long flags;
+	int retval;
+	cris_atomic_save(v, flags);
+	retval = --(v->counter);
+	cris_atomic_restore(v, flags);
+	return retval;
+}
+static inline int atomic_dec_and_test(volatile atomic_t *v)
+{
+	int retval;
+	unsigned long flags;
+	cris_atomic_save(v, flags);
+	retval = --(v->counter) == 0;
+	cris_atomic_restore(v, flags);
+	return retval;
+}
+
+static inline int atomic_inc_and_test(volatile atomic_t *v)
+{
+	int retval;
+	unsigned long flags;
+	cris_atomic_save(v, flags);
+	retval = ++(v->counter) == 0;
+	cris_atomic_restore(v, flags);
+	return retval;
+}
+
+static inline int atomic_cmpxchg(atomic_t *v, int old, int new)
+{
+	int ret;
+	unsigned long flags;
+
+	cris_atomic_save(v, flags);
+	ret = v->counter;
+	if (likely(ret == old))
+		v->counter = new;
+	cris_atomic_restore(v, flags);
+	return ret;
+}
+
+#define atomic_xchg(v, new) (xchg(&((v)->counter), new))
+
+static inline int atomic_add_unless(atomic_t *v, int a, int u)
+{
+	int ret;
+	unsigned long flags;
+
+	cris_atomic_save(v, flags);
+	ret = v->counter;
+	if (ret != u)
+		v->counter += a;
+	cris_atomic_restore(v, flags);
+	return ret != u;
+}
+#define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0)
+
+/* Atomic operations are already serializing */
+#define smp_mb__before_atomic_dec()    barrier()
+#define smp_mb__after_atomic_dec()     barrier()
+#define smp_mb__before_atomic_inc()    barrier()
+#define smp_mb__after_atomic_inc()     barrier()
+
+#include <asm-generic/atomic.h>
+#endif

arch/cris/include/asm/bitops.h

···
+/* asm/bitops.h for Linux/CRIS
+ *
+ * TODO: asm versions if speed is needed
+ *
+ * All bit operations return 0 if the bit was cleared before the
+ * operation and != 0 if it was not.
+ *
+ * bit 0 is the LSB of addr; bit 32 is the LSB of (addr+1).
+ */
+
+#ifndef _CRIS_BITOPS_H
+#define _CRIS_BITOPS_H
+
+/* Currently this is unsuitable for consumption outside the kernel.  */
+#ifdef __KERNEL__ 
+
+#ifndef _LINUX_BITOPS_H
+#error only <linux/bitops.h> can be included directly
+#endif
+
+#include <arch/bitops.h>
+#include <asm/system.h>
+#include <asm/atomic.h>
+#include <linux/compiler.h>
+
+/*
+ * set_bit - Atomically set a bit in memory
+ * @nr: the bit to set
+ * @addr: the address to start counting from
+ *
+ * This function is atomic and may not be reordered.  See __set_bit()
+ * if you do not require the atomic guarantees.
+ * Note that @nr may be almost arbitrarily large; this function is not
+ * restricted to acting on a single-word quantity.
+ */
+
+#define set_bit(nr, addr)    (void)test_and_set_bit(nr, addr)
+
+/*
+ * clear_bit - Clears a bit in memory
+ * @nr: Bit to clear
+ * @addr: Address to start counting from
+ *
+ * clear_bit() is atomic and may not be reordered.  However, it does
+ * not contain a memory barrier, so if it is used for locking purposes,
+ * you should call smp_mb__before_clear_bit() and/or smp_mb__after_clear_bit()
+ * in order to ensure changes are visible on other processors.
+ */
+
+#define clear_bit(nr, addr)  (void)test_and_clear_bit(nr, addr)
+
+/*
+ * change_bit - Toggle a bit in memory
+ * @nr: Bit to change
+ * @addr: Address to start counting from
+ *
+ * change_bit() is atomic and may not be reordered.
+ * Note that @nr may be almost arbitrarily large; this function is not
+ * restricted to acting on a single-word quantity.
+ */
+
+#define change_bit(nr, addr) (void)test_and_change_bit(nr, addr)
+
+/**
+ * test_and_set_bit - Set a bit and return its old value
+ * @nr: Bit to set
+ * @addr: Address to count from
+ *
+ * This operation is atomic and cannot be reordered.  
+ * It also implies a memory barrier.
+ */
+
+static inline int test_and_set_bit(int nr, volatile unsigned long *addr)
+{
+	unsigned int mask, retval;
+	unsigned long flags;
+	unsigned int *adr = (unsigned int *)addr;
+	
+	adr += nr >> 5;
+	mask = 1 << (nr & 0x1f);
+	cris_atomic_save(addr, flags);
+	retval = (mask & *adr) != 0;
+	*adr |= mask;
+	cris_atomic_restore(addr, flags);
+	return retval;
+}
+
+/*
+ * clear_bit() doesn't provide any barrier for the compiler.
+ */
+#define smp_mb__before_clear_bit()      barrier()
+#define smp_mb__after_clear_bit()       barrier()
+
+/**
+ * test_and_clear_bit - Clear a bit and return its old value
+ * @nr: Bit to clear
+ * @addr: Address to count from
+ *
+ * This operation is atomic and cannot be reordered.  
+ * It also implies a memory barrier.
+ */
+
+static inline int test_and_clear_bit(int nr, volatile unsigned long *addr)
+{
+	unsigned int mask, retval;
+	unsigned long flags;
+	unsigned int *adr = (unsigned int *)addr;
+	
+	adr += nr >> 5;
+	mask = 1 << (nr & 0x1f);
+	cris_atomic_save(addr, flags);
+	retval = (mask & *adr) != 0;
+	*adr &= ~mask;
+	cris_atomic_restore(addr, flags);
+	return retval;
+}
+
+/**
+ * test_and_change_bit - Change a bit and return its old value
+ * @nr: Bit to change
+ * @addr: Address to count from
+ *
+ * This operation is atomic and cannot be reordered.  
+ * It also implies a memory barrier.
+ */
+
+static inline int test_and_change_bit(int nr, volatile unsigned long *addr)
+{
+	unsigned int mask, retval;
+	unsigned long flags;
+	unsigned int *adr = (unsigned int *)addr;
+	adr += nr >> 5;
+	mask = 1 << (nr & 0x1f);
+	cris_atomic_save(addr, flags);
+	retval = (mask & *adr) != 0;
+	*adr ^= mask;
+	cris_atomic_restore(addr, flags);
+	return retval;
+}
+
+#include <asm-generic/bitops/non-atomic.h>
+
+/*
+ * Since we define it "external", it collides with the built-in
+ * definition, which doesn't have the same semantics.  We don't want to
+ * use -fno-builtin, so just hide the name ffs.
+ */
+#define ffs kernel_ffs
+
+#include <asm-generic/bitops/fls.h>
+#include <asm-generic/bitops/fls64.h>
+#include <asm-generic/bitops/hweight.h>
+#include <asm-generic/bitops/find.h>
+#include <asm-generic/bitops/lock.h>
+
+#include <asm-generic/bitops/ext2-non-atomic.h>
+
+#define ext2_set_bit_atomic(l,n,a)   test_and_set_bit(n,a)
+#define ext2_clear_bit_atomic(l,n,a) test_and_clear_bit(n,a)
+
+#include <asm-generic/bitops/minix.h>
+#include <asm-generic/bitops/sched.h>
+
+#endif /* __KERNEL__ */
+
+#endif /* _CRIS_BITOPS_H */

arch/cris/include/asm/bug.h

···
+#ifndef _CRIS_BUG_H
+#define _CRIS_BUG_H
+#include <arch/bug.h>
+#endif

arch/cris/include/asm/byteorder.h

···
+#ifndef _CRIS_BYTEORDER_H
+#define _CRIS_BYTEORDER_H
+
+#ifdef __GNUC__
+
+#ifdef __KERNEL__
+#include <arch/byteorder.h>
+
+/* defines are necessary because the other files detect the presence
+ * of a defined __arch_swab32, not an inline
+ */
+#define __arch__swab32(x) ___arch__swab32(x)
+#define __arch__swab16(x) ___arch__swab16(x)
+#endif /* __KERNEL__ */
+
+#if !defined(__STRICT_ANSI__) || defined(__KERNEL__)
+#  define __BYTEORDER_HAS_U64__
+#  define __SWAB_64_THRU_32__
+#endif
+
+#endif /* __GNUC__ */
+
+#include <linux/byteorder/little_endian.h>
+
+#endif
+
+

arch/cris/include/asm/cache.h

···
+#ifndef _ASM_CACHE_H
+#define _ASM_CACHE_H
+
+#include <arch/cache.h>
+
+#endif /* _ASM_CACHE_H */

arch/cris/include/asm/checksum.h

···
+/* TODO: csum_tcpudp_magic could be speeded up, and csum_fold as well */
+
+#ifndef _CRIS_CHECKSUM_H
+#define _CRIS_CHECKSUM_H
+
+#include <arch/checksum.h>
+
+/*
+ * computes the checksum of a memory block at buff, length len,
+ * and adds in "sum" (32-bit)
+ *
+ * returns a 32-bit number suitable for feeding into itself
+ * or csum_tcpudp_magic
+ *
+ * this function must be called with even lengths, except
+ * for the last fragment, which may be odd
+ *
+ * it's best to have buff aligned on a 32-bit boundary
+ */
+__wsum csum_partial(const void *buff, int len, __wsum sum);
+
+/*
+ * the same as csum_partial, but copies from src while it
+ * checksums
+ *
+ * here even more important to align src and dst on a 32-bit (or even
+ * better 64-bit) boundary
+ */
+
+__wsum csum_partial_copy_nocheck(const void *src, void *dst,
+				       int len, __wsum sum);
+
+/*
+ *	Fold a partial checksum into a word
+ */
+
+static inline __sum16 csum_fold(__wsum csum)
+{
+	u32 sum = (__force u32)csum;
+	sum = (sum & 0xffff) + (sum >> 16); /* add in end-around carry */
+	sum = (sum & 0xffff) + (sum >> 16); /* add in end-around carry */
+	return (__force __sum16)~sum;
+}
+
+extern __wsum csum_partial_copy_from_user(const void __user *src, void *dst,
+						int len, __wsum sum,
+						int *errptr);
+
+/*
+ *	This is a version of ip_compute_csum() optimized for IP headers,
+ *	which always checksum on 4 octet boundaries.
+ *
+ */
+
+static inline __sum16 ip_fast_csum(const void *iph, unsigned int ihl)
+{
+	return csum_fold(csum_partial(iph, ihl * 4, 0));
+}
+ 
+/*
+ * computes the checksum of the TCP/UDP pseudo-header
+ * returns a 16-bit checksum, already complemented
+ */
+
+static inline __sum16 csum_tcpudp_magic(__be32 saddr, __be32 daddr,
+						   unsigned short len,
+						   unsigned short proto,
+						   __wsum sum)
+{
+	return csum_fold(csum_tcpudp_nofold(saddr,daddr,len,proto,sum));
+}
+
+/*
+ * this routine is used for miscellaneous IP-like checksums, mainly
+ * in icmp.c
+ */
+
+static inline __sum16 ip_compute_csum(const void *buff, int len)
+{
+	return csum_fold (csum_partial(buff, len, 0));
+}
+
+#endif

arch/cris/include/asm/delay.h

···
+#ifndef _CRIS_DELAY_H
+#define _CRIS_DELAY_H
+
+/*
+ * Copyright (C) 1998-2002 Axis Communications AB
+ *
+ * Delay routines, using a pre-computed "loops_per_second" value.
+ */
+
+#include <arch/delay.h>
+
+/* Use only for very small delays ( < 1 msec).  */
+
+extern unsigned long loops_per_usec; /* arch/cris/mm/init.c */
+
+/* May be defined by arch/delay.h. */
+#ifndef udelay
+static inline void udelay(unsigned long usecs)
+{
+	__delay(usecs * loops_per_usec);
+}
+#endif
+
+#endif /* defined(_CRIS_DELAY_H) */
+
+
+

arch/cris/include/asm/dma.h

···
+/* $Id: dma.h,v 1.2 2001/05/09 12:17:42 johana Exp $ */
+
+#ifndef _ASM_DMA_H
+#define _ASM_DMA_H
+
+#include <arch/dma.h>
+
+/* it's useless on the Etrax, but unfortunately needed by the new
+   bootmem allocator (but this should do it for this) */
+
+#define MAX_DMA_ADDRESS PAGE_OFFSET
+
+/* From PCI */
+
+#ifdef CONFIG_PCI
+extern int isa_dma_bridge_buggy;
+#else
+#define isa_dma_bridge_buggy 	(0)
+#endif
+
+#endif /* _ASM_DMA_H */

arch/cris/include/asm/elf.h

···
+#ifndef __ASMCRIS_ELF_H
+#define __ASMCRIS_ELF_H
+
+/*
+ * ELF register definitions..
+ */
+
+#include <asm/user.h>
+
+#define R_CRIS_NONE             0
+#define R_CRIS_8                1
+#define R_CRIS_16               2
+#define R_CRIS_32               3
+#define R_CRIS_8_PCREL          4
+#define R_CRIS_16_PCREL         5
+#define R_CRIS_32_PCREL         6
+#define R_CRIS_GNU_VTINHERIT    7
+#define R_CRIS_GNU_VTENTRY      8
+#define R_CRIS_COPY             9
+#define R_CRIS_GLOB_DAT         10
+#define R_CRIS_JUMP_SLOT        11
+#define R_CRIS_RELATIVE         12
+#define R_CRIS_16_GOT           13
+#define R_CRIS_32_GOT           14
+#define R_CRIS_16_GOTPLT        15
+#define R_CRIS_32_GOTPLT        16
+#define R_CRIS_32_GOTREL        17
+#define R_CRIS_32_PLT_GOTREL    18
+#define R_CRIS_32_PLT_PCREL     19
+
+typedef unsigned long elf_greg_t;
+
+/* Note that NGREG is defined to ELF_NGREG in include/linux/elfcore.h, and is
+   thus exposed to user-space. */
+#define ELF_NGREG (sizeof (struct user_regs_struct) / sizeof(elf_greg_t))
+typedef elf_greg_t elf_gregset_t[ELF_NGREG];
+
+/* A placeholder; CRIS does not have any fp regs.  */
+typedef unsigned long elf_fpregset_t;
+
+/*
+ * These are used to set parameters in the core dumps.
+ */
+#define ELF_CLASS	ELFCLASS32
+#define ELF_DATA	ELFDATA2LSB
+#define ELF_ARCH	EM_CRIS
+
+#include <arch/elf.h>
+
+/* The master for these definitions is {binutils}/include/elf/cris.h:  */
+/* User symbols in this file have a leading underscore.  */
+#define EF_CRIS_UNDERSCORE		0x00000001
+
+/* This is a mask for different incompatible machine variants.  */
+#define EF_CRIS_VARIANT_MASK		0x0000000e
+
+/* Variant 0; may contain v0..10 object.  */
+#define EF_CRIS_VARIANT_ANY_V0_V10	0x00000000
+
+/* Variant 1; contains v32 object.  */
+#define EF_CRIS_VARIANT_V32		0x00000002
+
+/* Variant 2; contains object compatible with v32 and v10.  */
+#define EF_CRIS_VARIANT_COMMON_V10_V32	0x00000004
+/* End of excerpt from {binutils}/include/elf/cris.h.  */
+
+#define USE_ELF_CORE_DUMP
+
+#define ELF_EXEC_PAGESIZE	8192
+
+/* This is the location that an ET_DYN program is loaded if exec'ed.  Typical
+   use of this is to invoke "./ld.so someprog" to test out a new version of
+   the loader.  We need to make sure that it is out of the way of the program
+   that it will "exec", and that there is sufficient room for the brk.  */
+
+#define ELF_ET_DYN_BASE         (2 * TASK_SIZE / 3)
+
+/* This yields a mask that user programs can use to figure out what
+   instruction set this CPU supports.  This could be done in user space,
+   but it's not easy, and we've already done it here.  */
+
+#define ELF_HWCAP       (0)
+
+/* This yields a string that ld.so will use to load implementation
+   specific libraries for optimization.  This is more specific in
+   intent than poking at uname or /proc/cpuinfo.
+*/
+
+#define ELF_PLATFORM  (NULL)
+
+#define SET_PERSONALITY(ex) set_personality(PER_LINUX)
+
+#endif

arch/cris/include/asm/io.h

···
+#ifndef _ASM_CRIS_IO_H
+#define _ASM_CRIS_IO_H
+
+#include <asm/page.h>   /* for __va, __pa */
+#include <arch/io.h>
+#include <linux/kernel.h>
+
+struct cris_io_operations
+{
+	u32 (*read_mem)(void *addr, int size);
+	void (*write_mem)(u32 val, int size, void *addr);
+	u32 (*read_io)(u32 port, void *addr, int size, int count);
+	void (*write_io)(u32 port, void *addr, int size, int count);
+};
+
+#ifdef CONFIG_PCI
+extern struct cris_io_operations *cris_iops;
+#else
+#define cris_iops ((struct cris_io_operations*)NULL)
+#endif
+
+/*
+ * Change virtual addresses to physical addresses and vv.
+ */
+
+static inline unsigned long virt_to_phys(volatile void * address)
+{
+	return __pa(address);
+}
+
+static inline void * phys_to_virt(unsigned long address)
+{
+	return __va(address);
+}
+
+extern void __iomem * __ioremap(unsigned long offset, unsigned long size, unsigned long flags);
+extern void __iomem * __ioremap_prot(unsigned long phys_addr, unsigned long size, pgprot_t prot);
+
+static inline void __iomem * ioremap (unsigned long offset, unsigned long size)
+{
+	return __ioremap(offset, size, 0);
+}
+
+extern void iounmap(volatile void * __iomem addr);
+
+extern void __iomem * ioremap_nocache(unsigned long offset, unsigned long size);
+
+/*
+ * IO bus memory addresses are also 1:1 with the physical address
+ */
+#define virt_to_bus virt_to_phys
+#define bus_to_virt phys_to_virt
+
+/*
+ * readX/writeX() are used to access memory mapped devices. On some
+ * architectures the memory mapped IO stuff needs to be accessed
+ * differently. On the CRIS architecture, we just read/write the
+ * memory location directly.
+ */
+#ifdef CONFIG_PCI
+#define PCI_SPACE(x) ((((unsigned)(x)) & 0x10000000) == 0x10000000)
+#else
+#define PCI_SPACE(x) 0
+#endif
+static inline unsigned char readb(const volatile void __iomem *addr)
+{
+	if (PCI_SPACE(addr) && cris_iops)
+		return cris_iops->read_mem((void*)addr, 1);
+	else
+		return *(volatile unsigned char __force *) addr;
+}
+static inline unsigned short readw(const volatile void __iomem *addr)
+{
+	if (PCI_SPACE(addr) && cris_iops)
+		return cris_iops->read_mem((void*)addr, 2);
+	else
+		return *(volatile unsigned short __force *) addr;
+}
+static inline unsigned int readl(const volatile void __iomem *addr)
+{
+	if (PCI_SPACE(addr) && cris_iops)
+		return cris_iops->read_mem((void*)addr, 4);
+	else
+		return *(volatile unsigned int __force *) addr;
+}
+#define readb_relaxed(addr) readb(addr)
+#define readw_relaxed(addr) readw(addr)
+#define readl_relaxed(addr) readl(addr)
+#define __raw_readb readb
+#define __raw_readw readw
+#define __raw_readl readl
+
+static inline void writeb(unsigned char b, volatile void __iomem *addr)
+{
+	if (PCI_SPACE(addr) && cris_iops)
+		cris_iops->write_mem(b, 1, (void*)addr);
+	else
+		*(volatile unsigned char __force *) addr = b;
+}
+static inline void writew(unsigned short b, volatile void __iomem *addr)
+{
+	if (PCI_SPACE(addr) && cris_iops)
+		cris_iops->write_mem(b, 2, (void*)addr);
+	else
+		*(volatile unsigned short __force *) addr = b;
+}
+static inline void writel(unsigned int b, volatile void __iomem *addr)
+{
+	if (PCI_SPACE(addr) && cris_iops)
+		cris_iops->write_mem(b, 4, (void*)addr);
+	else
+		*(volatile unsigned int __force *) addr = b;
+}
+#define __raw_writeb writeb
+#define __raw_writew writew
+#define __raw_writel writel
+
+#define mmiowb()
+
+#define memset_io(a,b,c)	memset((void *)(a),(b),(c))
+#define memcpy_fromio(a,b,c)	memcpy((a),(void *)(b),(c))
+#define memcpy_toio(a,b,c)	memcpy((void *)(a),(b),(c))
+
+
+/* I/O port access. Normally there is no I/O space on CRIS but when
+ * Cardbus/PCI is enabled the request is passed through the bridge.
+ */
+
+#define IO_SPACE_LIMIT 0xffff
+#define inb(port) (cris_iops ? cris_iops->read_io(port,NULL,1,1) : 0)
+#define inw(port) (cris_iops ? cris_iops->read_io(port,NULL,2,1) : 0)
+#define inl(port) (cris_iops ? cris_iops->read_io(port,NULL,4,1) : 0)
+#define insb(port,addr,count) (cris_iops ? cris_iops->read_io(port,addr,1,count) : 0)
+#define insw(port,addr,count) (cris_iops ? cris_iops->read_io(port,addr,2,count) : 0)
+#define insl(port,addr,count) (cris_iops ? cris_iops->read_io(port,addr,4,count) : 0)
+#define outb(data,port) if (cris_iops) cris_iops->write_io(port,(void*)(unsigned)data,1,1)
+#define outw(data,port) if (cris_iops) cris_iops->write_io(port,(void*)(unsigned)data,2,1)
+#define outl(data,port) if (cris_iops) cris_iops->write_io(port,(void*)(unsigned)data,4,1)
+#define outsb(port,addr,count) if(cris_iops) cris_iops->write_io(port,(void*)addr,1,count)
+#define outsw(port,addr,count) if(cris_iops) cris_iops->write_io(port,(void*)addr,2,count)
+#define outsl(port,addr,count) if(cris_iops) cris_iops->write_io(port,(void*)addr,3,count)
+
+/*
+ * Convert a physical pointer to a virtual kernel pointer for /dev/mem
+ * access
+ */
+#define xlate_dev_mem_ptr(p)	__va(p)
+
+/*
+ * Convert a virtual cached pointer to an uncached pointer
+ */
+#define xlate_dev_kmem_ptr(p)	p
+
+#endif

arch/cris/include/asm/irq.h

···
+#ifndef _ASM_IRQ_H
+#define _ASM_IRQ_H
+
+#include <arch/irq.h>
+
+static inline int irq_canonicalize(int irq)
+{  
+  return irq; 
+}
+
+#endif  /* _ASM_IRQ_H */
+
+

arch/cris/include/asm/mmu.h

···
+/*
+ * CRIS MMU constants and PTE layout
+ */
+
+#ifndef _CRIS_MMU_H
+#define _CRIS_MMU_H
+
+#include <arch/mmu.h>
+
+#endif

arch/cris/include/asm/page.h

···
+#ifndef _CRIS_PAGE_H
+#define _CRIS_PAGE_H
+
+#include <arch/page.h>
+#include <linux/const.h>
+
+/* PAGE_SHIFT determines the page size */
+#define PAGE_SHIFT	13
+#define PAGE_SIZE	(_AC(1, UL) << PAGE_SHIFT)
+#define PAGE_MASK	(~(PAGE_SIZE-1))
+
+#define clear_page(page)        memset((void *)(page), 0, PAGE_SIZE)
+#define copy_page(to,from)      memcpy((void *)(to), (void *)(from), PAGE_SIZE)
+
+#define clear_user_page(page, vaddr, pg)    clear_page(page)
+#define copy_user_page(to, from, vaddr, pg) copy_page(to, from)
+
+#define __alloc_zeroed_user_highpage(movableflags, vma, vaddr) \
+	alloc_page_vma(GFP_HIGHUSER | __GFP_ZERO | movableflags, vma, vaddr)
+#define __HAVE_ARCH_ALLOC_ZEROED_USER_HIGHPAGE
+
+/*
+ * These are used to make use of C type-checking..
+ */
+#ifndef __ASSEMBLY__
+typedef struct { unsigned long pte; } pte_t;
+typedef struct { unsigned long pgd; } pgd_t;
+typedef struct { unsigned long pgprot; } pgprot_t;
+typedef struct page *pgtable_t;
+#endif
+
+#define pte_val(x)	((x).pte)
+#define pgd_val(x)	((x).pgd)
+#define pgprot_val(x)	((x).pgprot)
+
+#define __pte(x)	((pte_t) { (x) } )
+#define __pgd(x)	((pgd_t) { (x) } )
+#define __pgprot(x)	((pgprot_t) { (x) } )
+
+/* On CRIS the PFN numbers doesn't start at 0 so we have to compensate */
+/* for that before indexing into the page table starting at mem_map    */
+#define ARCH_PFN_OFFSET		(PAGE_OFFSET >> PAGE_SHIFT)
+#define pfn_valid(pfn)		(((pfn) - (PAGE_OFFSET >> PAGE_SHIFT)) < max_mapnr)
+
+/* to index into the page map. our pages all start at physical addr PAGE_OFFSET so
+ * we can let the map start there. notice that we subtract PAGE_OFFSET because
+ * we start our mem_map there - in other ports they map mem_map physically and
+ * use __pa instead. in our system both the physical and virtual address of DRAM
+ * is too high to let mem_map start at 0, so we do it this way instead (similar
+ * to arm and m68k I think)
+ */ 
+
+#define virt_to_page(kaddr)    (mem_map + (((unsigned long)(kaddr) - PAGE_OFFSET) >> PAGE_SHIFT))
+#define VALID_PAGE(page)       (((page) - mem_map) < max_mapnr)
+#define virt_addr_valid(kaddr)	pfn_valid((unsigned)(kaddr) >> PAGE_SHIFT)
+
+/* convert a page (based on mem_map and forward) to a physical address
+ * do this by figuring out the virtual address and then use __pa
+ */
+
+#define page_to_phys(page)     __pa((((page) - mem_map) << PAGE_SHIFT) + PAGE_OFFSET)
+
+#ifndef __ASSEMBLY__
+
+#endif /* __ASSEMBLY__ */
+
+#define VM_DATA_DEFAULT_FLAGS	(VM_READ | VM_WRITE | VM_EXEC | \
+				 VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC)
+
+#include <asm-generic/memory_model.h>
+#include <asm-generic/page.h>
+
+#endif /* _CRIS_PAGE_H */
+

arch/cris/include/asm/pgtable.h

···
+/*
+ * CRIS pgtable.h - macros and functions to manipulate page tables.
+ */
+
+#ifndef _CRIS_PGTABLE_H
+#define _CRIS_PGTABLE_H
+
+#include <asm/page.h>
+#include <asm-generic/pgtable-nopmd.h>
+
+#ifndef __ASSEMBLY__
+#include <linux/sched.h>
+#include <asm/mmu.h>
+#endif
+#include <arch/pgtable.h>
+
+/*
+ * The Linux memory management assumes a three-level page table setup. On
+ * CRIS, we use that, but "fold" the mid level into the top-level page
+ * table. Since the MMU TLB is software loaded through an interrupt, it
+ * supports any page table structure, so we could have used a three-level
+ * setup, but for the amounts of memory we normally use, a two-level is
+ * probably more efficient.
+ *
+ * This file contains the functions and defines necessary to modify and use
+ * the CRIS page table tree.
+ */
+#ifndef __ASSEMBLY__
+extern void paging_init(void);
+#endif
+
+/* Certain architectures need to do special things when pte's
+ * within a page table are directly modified.  Thus, the following
+ * hook is made available.
+ */
+#define set_pte(pteptr, pteval) ((*(pteptr)) = (pteval))
+#define set_pte_at(mm,addr,ptep,pteval) set_pte(ptep,pteval)
+
+/*
+ * (pmds are folded into pgds so this doesn't get actually called,
+ * but the define is needed for a generic inline function.)
+ */
+#define set_pmd(pmdptr, pmdval) (*(pmdptr) = pmdval)
+#define set_pgu(pudptr, pudval) (*(pudptr) = pudval)
+
+/* PGDIR_SHIFT determines the size of the area a second-level page table can
+ * map. It is equal to the page size times the number of PTE's that fit in
+ * a PMD page. A PTE is 4-bytes in CRIS. Hence the following number.
+ */
+
+#define PGDIR_SHIFT	(PAGE_SHIFT + (PAGE_SHIFT-2))
+#define PGDIR_SIZE	(1UL << PGDIR_SHIFT)
+#define PGDIR_MASK	(~(PGDIR_SIZE-1))
+
+/*
+ * entries per page directory level: we use a two-level, so
+ * we don't really have any PMD directory physically.
+ * pointers are 4 bytes so we can use the page size and 
+ * divide it by 4 (shift by 2).
+ */
+#define PTRS_PER_PTE	(1UL << (PAGE_SHIFT-2))
+#define PTRS_PER_PGD	(1UL << (PAGE_SHIFT-2))
+
+/* calculate how many PGD entries a user-level program can use
+ * the first mappable virtual address is 0
+ * (TASK_SIZE is the maximum virtual address space)
+ */
+
+#define USER_PTRS_PER_PGD       (TASK_SIZE/PGDIR_SIZE)
+#define FIRST_USER_ADDRESS      0
+
+/* zero page used for uninitialized stuff */
+#ifndef __ASSEMBLY__
+extern unsigned long empty_zero_page;
+#define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page))
+#endif
+
+/* number of bits that fit into a memory pointer */
+#define BITS_PER_PTR			(8*sizeof(unsigned long))
+
+/* to align the pointer to a pointer address */
+#define PTR_MASK			(~(sizeof(void*)-1))
+
+/* sizeof(void*)==1<<SIZEOF_PTR_LOG2 */
+/* 64-bit machines, beware!  SRB. */
+#define SIZEOF_PTR_LOG2			2
+
+/* to find an entry in a page-table */
+#define PAGE_PTR(address) \
+((unsigned long)(address)>>(PAGE_SHIFT-SIZEOF_PTR_LOG2)&PTR_MASK&~PAGE_MASK)
+
+/* to set the page-dir */
+#define SET_PAGE_DIR(tsk,pgdir)
+
+#define pte_none(x)	(!pte_val(x))
+#define pte_present(x)	(pte_val(x) & _PAGE_PRESENT)
+#define pte_clear(mm,addr,xp)	do { pte_val(*(xp)) = 0; } while (0)
+
+#define pmd_none(x)     (!pmd_val(x))
+/* by removing the _PAGE_KERNEL bit from the comparision, the same pmd_bad
+ * works for both _PAGE_TABLE and _KERNPG_TABLE pmd entries.
+ */
+#define	pmd_bad(x)	((pmd_val(x) & (~PAGE_MASK & ~_PAGE_KERNEL)) != _PAGE_TABLE)
+#define pmd_present(x)	(pmd_val(x) & _PAGE_PRESENT)
+#define pmd_clear(xp)	do { pmd_val(*(xp)) = 0; } while (0)
+
+#ifndef __ASSEMBLY__
+
+/*
+ * The following only work if pte_present() is true.
+ * Undefined behaviour if not..
+ */
+
+static inline int pte_write(pte_t pte)          { return pte_val(pte) & _PAGE_WRITE; }
+static inline int pte_dirty(pte_t pte)          { return pte_val(pte) & _PAGE_MODIFIED; }
+static inline int pte_young(pte_t pte)          { return pte_val(pte) & _PAGE_ACCESSED; }
+static inline int pte_file(pte_t pte)           { return pte_val(pte) & _PAGE_FILE; }
+static inline int pte_special(pte_t pte)	{ return 0; }
+
+static inline pte_t pte_wrprotect(pte_t pte)
+{
+        pte_val(pte) &= ~(_PAGE_WRITE | _PAGE_SILENT_WRITE);
+        return pte;
+}
+
+static inline pte_t pte_mkclean(pte_t pte)
+{
+	pte_val(pte) &= ~(_PAGE_MODIFIED | _PAGE_SILENT_WRITE); 
+	return pte; 
+}
+
+static inline pte_t pte_mkold(pte_t pte)
+{
+	pte_val(pte) &= ~(_PAGE_ACCESSED | _PAGE_SILENT_READ);
+	return pte;
+}
+
+static inline pte_t pte_mkwrite(pte_t pte)
+{
+        pte_val(pte) |= _PAGE_WRITE;
+        if (pte_val(pte) & _PAGE_MODIFIED)
+                pte_val(pte) |= _PAGE_SILENT_WRITE;
+        return pte;
+}
+
+static inline pte_t pte_mkdirty(pte_t pte)
+{
+        pte_val(pte) |= _PAGE_MODIFIED;
+        if (pte_val(pte) & _PAGE_WRITE)
+                pte_val(pte) |= _PAGE_SILENT_WRITE;
+        return pte;
+}
+
+static inline pte_t pte_mkyoung(pte_t pte)
+{
+        pte_val(pte) |= _PAGE_ACCESSED;
+        if (pte_val(pte) & _PAGE_READ)
+        {
+                pte_val(pte) |= _PAGE_SILENT_READ;
+                if ((pte_val(pte) & (_PAGE_WRITE | _PAGE_MODIFIED)) ==
+		    (_PAGE_WRITE | _PAGE_MODIFIED))
+                        pte_val(pte) |= _PAGE_SILENT_WRITE;
+        }
+        return pte;
+}
+static inline pte_t pte_mkspecial(pte_t pte)	{ return pte; }
+
+/*
+ * Conversion functions: convert a page and protection to a page entry,
+ * and a page entry and page directory to the page they refer to.
+ */
+
+/* What actually goes as arguments to the various functions is less than
+ * obvious, but a rule of thumb is that struct page's goes as struct page *,
+ * really physical DRAM addresses are unsigned long's, and DRAM "virtual"
+ * addresses (the 0xc0xxxxxx's) goes as void *'s.
+ */
+
+static inline pte_t __mk_pte(void * page, pgprot_t pgprot)
+{
+	pte_t pte;
+	/* the PTE needs a physical address */
+	pte_val(pte) = __pa(page) | pgprot_val(pgprot);
+	return pte;
+}
+
+#define mk_pte(page, pgprot) __mk_pte(page_address(page), (pgprot))
+
+#define mk_pte_phys(physpage, pgprot) \
+({                                                                      \
+        pte_t __pte;                                                    \
+                                                                        \
+        pte_val(__pte) = (physpage) + pgprot_val(pgprot);               \
+        __pte;                                                          \
+})
+
+static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
+{ pte_val(pte) = (pte_val(pte) & _PAGE_CHG_MASK) | pgprot_val(newprot); return pte; }
+
+
+/* pte_val refers to a page in the 0x4xxxxxxx physical DRAM interval
+ * __pte_page(pte_val) refers to the "virtual" DRAM interval
+ * pte_pagenr refers to the page-number counted starting from the virtual DRAM start
+ */
+
+static inline unsigned long __pte_page(pte_t pte)
+{
+	/* the PTE contains a physical address */
+	return (unsigned long)__va(pte_val(pte) & PAGE_MASK);
+}
+
+#define pte_pagenr(pte)         ((__pte_page(pte) - PAGE_OFFSET) >> PAGE_SHIFT)
+
+/* permanent address of a page */
+
+#define __page_address(page)    (PAGE_OFFSET + (((page) - mem_map) << PAGE_SHIFT))
+#define pte_page(pte)           (mem_map+pte_pagenr(pte))
+
+/* only the pte's themselves need to point to physical DRAM (see above)
+ * the pagetable links are purely handled within the kernel SW and thus
+ * don't need the __pa and __va transformations.
+ */
+
+static inline void pmd_set(pmd_t * pmdp, pte_t * ptep)
+{ pmd_val(*pmdp) = _PAGE_TABLE | (unsigned long) ptep; }
+
+#define pmd_page(pmd)		(pfn_to_page(pmd_val(pmd) >> PAGE_SHIFT))
+#define pmd_page_vaddr(pmd)	((unsigned long) __va(pmd_val(pmd) & PAGE_MASK))
+
+/* to find an entry in a page-table-directory. */
+#define pgd_index(address) (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD-1))
+
+/* to find an entry in a page-table-directory */
+static inline pgd_t * pgd_offset(const struct mm_struct *mm, unsigned long address)
+{
+	return mm->pgd + pgd_index(address);
+}
+
+/* to find an entry in a kernel page-table-directory */
+#define pgd_offset_k(address) pgd_offset(&init_mm, address)
+
+/* Find an entry in the third-level page table.. */
+#define __pte_offset(address) \
+	(((address) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1))
+#define pte_offset_kernel(dir, address) \
+	((pte_t *) pmd_page_vaddr(*(dir)) +  __pte_offset(address))
+#define pte_offset_map(dir, address) \
+	((pte_t *)page_address(pmd_page(*(dir))) + __pte_offset(address))
+#define pte_offset_map_nested(dir, address) pte_offset_map(dir, address)
+
+#define pte_unmap(pte) do { } while (0)
+#define pte_unmap_nested(pte) do { } while (0)
+#define pte_pfn(x)		((unsigned long)(__va((x).pte)) >> PAGE_SHIFT)
+#define pfn_pte(pfn, prot)	__pte(((pfn) << PAGE_SHIFT) | pgprot_val(prot))
+
+#define pte_ERROR(e) \
+        printk("%s:%d: bad pte %p(%08lx).\n", __FILE__, __LINE__, &(e), pte_val(e))
+#define pgd_ERROR(e) \
+        printk("%s:%d: bad pgd %p(%08lx).\n", __FILE__, __LINE__, &(e), pgd_val(e))
+
+
+extern pgd_t swapper_pg_dir[PTRS_PER_PGD]; /* defined in head.S */
+
+/*
+ * CRIS doesn't have any external MMU info: the kernel page
+ * tables contain all the necessary information.
+ * 
+ * Actually I am not sure on what this could be used for.
+ */
+static inline void update_mmu_cache(struct vm_area_struct * vma,
+	unsigned long address, pte_t pte)
+{
+}
+
+/* Encode and de-code a swap entry (must be !pte_none(e) && !pte_present(e)) */
+/* Since the PAGE_PRESENT bit is bit 4, we can use the bits above */
+
+#define __swp_type(x)			(((x).val >> 5) & 0x7f)
+#define __swp_offset(x)			((x).val >> 12)
+#define __swp_entry(type, offset)	((swp_entry_t) { ((type) << 5) | ((offset) << 12) })
+#define __pte_to_swp_entry(pte)		((swp_entry_t) { pte_val(pte) })
+#define __swp_entry_to_pte(x)		((pte_t) { (x).val })
+
+#define kern_addr_valid(addr)   (1)
+
+#include <asm-generic/pgtable.h>
+
+/*
+ * No page table caches to initialise
+ */
+#define pgtable_cache_init()   do { } while (0)
+
+#define pte_to_pgoff(x)	(pte_val(x) >> 6)
+#define pgoff_to_pte(x)	__pte(((x) << 6) | _PAGE_FILE)
+
+typedef pte_t *pte_addr_t;
+
+#endif /* __ASSEMBLY__ */
+#endif /* _CRIS_PGTABLE_H */

arch/cris/include/asm/processor.h

···
+/*
+ * include/asm-cris/processor.h
+ *
+ * Copyright (C) 2000, 2001 Axis Communications AB
+ *
+ * Authors:         Bjorn Wesen        Initial version
+ *
+ */
+
+#ifndef __ASM_CRIS_PROCESSOR_H
+#define __ASM_CRIS_PROCESSOR_H
+
+#include <asm/system.h>
+#include <asm/page.h>
+#include <asm/ptrace.h>
+#include <arch/processor.h>
+
+struct task_struct;
+
+#define STACK_TOP	TASK_SIZE
+#define STACK_TOP_MAX	STACK_TOP
+
+/* This decides where the kernel will search for a free chunk of vm
+ * space during mmap's.
+ */
+#define TASK_UNMAPPED_BASE      (PAGE_ALIGN(TASK_SIZE / 3))
+
+/* THREAD_SIZE is the size of the task_struct/kernel_stack combo.
+ * normally, the stack is found by doing something like p + THREAD_SIZE
+ * in CRIS, a page is 8192 bytes, which seems like a sane size
+ */
+
+#define THREAD_SIZE       PAGE_SIZE
+#define KERNEL_STACK_SIZE PAGE_SIZE
+
+/*
+ * At user->kernel entry, the pt_regs struct is stacked on the top of the kernel-stack.
+ * This macro allows us to find those regs for a task.
+ * Notice that subsequent pt_regs stackings, like recursive interrupts occurring while
+ * we're in the kernel, won't affect this - only the first user->kernel transition
+ * registers are reached by this.
+ */
+
+#define user_regs(thread_info) (((struct pt_regs *)((unsigned long)(thread_info) + THREAD_SIZE)) - 1)
+
+/*
+ * Dito but for the currently running task
+ */
+
+#define task_pt_regs(task) user_regs(task_thread_info(task))
+#define current_regs() task_pt_regs(current)
+
+static inline void prepare_to_copy(struct task_struct *tsk)
+{
+}
+
+extern int kernel_thread(int (*fn)(void *), void * arg, unsigned long flags);
+
+unsigned long get_wchan(struct task_struct *p);
+
+#define KSTK_ESP(tsk)   ((tsk) == current ? rdusp() : (tsk)->thread.usp)
+
+extern unsigned long thread_saved_pc(struct task_struct *tsk);
+
+/* Free all resources held by a thread. */
+static inline void release_thread(struct task_struct *dead_task)
+{
+        /* Nothing needs to be done.  */
+}
+
+#define init_stack      (init_thread_union.stack)
+
+#define cpu_relax()     barrier()
+
+#endif /* __ASM_CRIS_PROCESSOR_H */

arch/cris/include/asm/ptrace.h

···
+#ifndef _CRIS_PTRACE_H
+#define _CRIS_PTRACE_H
+
+#include <arch/ptrace.h>
+
+#ifdef __KERNEL__
+
+/* Arbitrarily choose the same ptrace numbers as used by the Sparc code. */
+#define PTRACE_GETREGS            12
+#define PTRACE_SETREGS            13
+
+#define profile_pc(regs) instruction_pointer(regs)
+
+#endif /* __KERNEL__ */
+
+#endif /* _CRIS_PTRACE_H */

arch/cris/include/asm/spinlock.h

···
+#include <arch/spinlock.h>

arch/cris/include/asm/system.h

···
+#ifndef __ASM_CRIS_SYSTEM_H
+#define __ASM_CRIS_SYSTEM_H
+
+#include <arch/system.h>
+
+/* the switch_to macro calls resume, an asm function in entry.S which does the actual
+ * task switching.
+ */
+
+extern struct task_struct *resume(struct task_struct *prev, struct task_struct *next, int);
+#define switch_to(prev,next,last) last = resume(prev,next, \
+					 (int)&((struct task_struct *)0)->thread)
+
+#define barrier() __asm__ __volatile__("": : :"memory")
+#define mb() barrier()
+#define rmb() mb()
+#define wmb() mb()
+#define read_barrier_depends() do { } while(0)
+#define set_mb(var, value)  do { var = value; mb(); } while (0)
+
+#ifdef CONFIG_SMP
+#define smp_mb()        mb()
+#define smp_rmb()       rmb()
+#define smp_wmb()       wmb()
+#define smp_read_barrier_depends()     read_barrier_depends()
+#else
+#define smp_mb()        barrier()
+#define smp_rmb()       barrier()
+#define smp_wmb()       barrier()
+#define smp_read_barrier_depends()     do { } while(0)
+#endif
+
+#define iret()
+
+/*
+ * disable hlt during certain critical i/o operations
+ */
+#define HAVE_DISABLE_HLT
+void disable_hlt(void);
+void enable_hlt(void);
+
+static inline unsigned long __xchg(unsigned long x, volatile void * ptr, int size)
+{
+  /* since Etrax doesn't have any atomic xchg instructions, we need to disable
+     irq's (if enabled) and do it with move.d's */
+  unsigned long flags,temp;
+  local_irq_save(flags); /* save flags, including irq enable bit and shut off irqs */
+  switch (size) {
+  case 1:
+    *((unsigned char *)&temp) = x;
+    x = *(unsigned char *)ptr;
+    *(unsigned char *)ptr = *((unsigned char *)&temp);
+    break;
+  case 2:
+    *((unsigned short *)&temp) = x;
+    x = *(unsigned short *)ptr;
+    *(unsigned short *)ptr = *((unsigned short *)&temp);
+    break;
+  case 4:
+    temp = x;
+    x = *(unsigned long *)ptr;
+    *(unsigned long *)ptr = temp;
+    break;
+  }
+  local_irq_restore(flags); /* restore irq enable bit */
+  return x;
+}
+
+#include <asm-generic/cmpxchg-local.h>
+
+/*
+ * cmpxchg_local and cmpxchg64_local are atomic wrt current CPU. Always make
+ * them available.
+ */
+#define cmpxchg_local(ptr, o, n)				 	       \
+	((__typeof__(*(ptr)))__cmpxchg_local_generic((ptr), (unsigned long)(o),\
+			(unsigned long)(n), sizeof(*(ptr))))
+#define cmpxchg64_local(ptr, o, n) __cmpxchg64_local_generic((ptr), (o), (n))
+
+#ifndef CONFIG_SMP
+#include <asm-generic/cmpxchg.h>
+#endif
+
+#define arch_align_stack(x) (x)
+
+void default_idle(void);
+
+#endif

arch/cris/include/asm/thread_info.h

···
+/* thread_info.h: CRIS low-level thread information
+ *
+ * Copyright (C) 2002  David Howells ([e-mail])
+ * - Incorporating suggestions made by Linus Torvalds and Dave Miller
+ * 
+ * CRIS port by Axis Communications
+ */
+
+#ifndef _ASM_THREAD_INFO_H
+#define _ASM_THREAD_INFO_H
+
+#ifdef __KERNEL__
+
+#define __HAVE_ARCH_THREAD_INFO_ALLOCATOR
+
+#ifndef __ASSEMBLY__
+#include <asm/types.h>
+#include <asm/processor.h>
+#include <arch/thread_info.h>
+#include <asm/segment.h>
+#endif
+
+
+/*
+ * low level task data that entry.S needs immediate access to
+ * - this struct should fit entirely inside of one cache line
+ * - this struct shares the supervisor stack pages
+ * - if the contents of this structure are changed, the assembly constants must also be changed
+ */
+#ifndef __ASSEMBLY__
+struct thread_info {
+	struct task_struct	*task;		/* main task structure */
+	struct exec_domain	*exec_domain;	/* execution domain */
+	unsigned long		flags;		/* low level flags */
+	__u32			cpu;		/* current CPU */
+	int			preempt_count;	/* 0 => preemptable, <0 => BUG */
+	__u32			tls;		/* TLS for this thread */
+
+	mm_segment_t		addr_limit;	/* thread address space:
+					 	   0-0xBFFFFFFF for user-thead
+						   0-0xFFFFFFFF for kernel-thread
+						*/
+	struct restart_block    restart_block;
+	__u8			supervisor_stack[0];
+};
+
+#endif
+
+#define PREEMPT_ACTIVE		0x10000000
+
+/*
+ * macros/functions for gaining access to the thread information structure
+ *
+ * preempt_count needs to be 1 initially, until the scheduler is functional.
+ */
+#ifndef __ASSEMBLY__
+#define INIT_THREAD_INFO(tsk)				\
+{							\
+	.task		= &tsk,				\
+	.exec_domain	= &default_exec_domain,		\
+	.flags		= 0,				\
+	.cpu		= 0,				\
+	.preempt_count	= 1,				\
+	.addr_limit	= KERNEL_DS,			\
+	.restart_block = {				\
+		       .fn = do_no_restart_syscall,	\
+	},						\
+}
+
+#define init_thread_info	(init_thread_union.thread_info)
+
+/* thread information allocation */
+#define alloc_thread_info(tsk) ((struct thread_info *) __get_free_pages(GFP_KERNEL,1))
+#define free_thread_info(ti) free_pages((unsigned long) (ti), 1)
+
+#endif /* !__ASSEMBLY__ */
+
+/*
+ * thread information flags
+ * - these are process state flags that various assembly files may need to access
+ * - pending work-to-be-done flags are in LSW
+ * - other flags in MSW
+ */
+#define TIF_SYSCALL_TRACE	0	/* syscall trace active */
+#define TIF_NOTIFY_RESUME	1	/* resumption notification requested */
+#define TIF_SIGPENDING		2	/* signal pending */
+#define TIF_NEED_RESCHED	3	/* rescheduling necessary */
+#define TIF_RESTORE_SIGMASK	9	/* restore signal mask in do_signal() */
+#define TIF_POLLING_NRFLAG	16	/* true if poll_idle() is polling TIF_NEED_RESCHED */
+#define TIF_MEMDIE		17
+#define TIF_FREEZE		18	/* is freezing for suspend */
+
+#define _TIF_SYSCALL_TRACE	(1<<TIF_SYSCALL_TRACE)
+#define _TIF_NOTIFY_RESUME	(1<<TIF_NOTIFY_RESUME)
+#define _TIF_SIGPENDING		(1<<TIF_SIGPENDING)
+#define _TIF_NEED_RESCHED	(1<<TIF_NEED_RESCHED)
+#define _TIF_RESTORE_SIGMASK	(1<<TIF_RESTORE_SIGMASK)
+#define _TIF_POLLING_NRFLAG	(1<<TIF_POLLING_NRFLAG)
+#define _TIF_FREEZE		(1<<TIF_FREEZE)
+
+#define _TIF_WORK_MASK		0x0000FFFE	/* work to do on interrupt/exception return */
+#define _TIF_ALLWORK_MASK	0x0000FFFF	/* work to do on any return to u-space */
+
+#endif /* __KERNEL__ */
+
+#endif /* _ASM_THREAD_INFO_H */

arch/cris/include/asm/timex.h

···
+/*
+ * linux/include/asm-cris/timex.h
+ *
+ * CRIS architecture timex specifications
+ */
+
+#ifndef _ASM_CRIS_TIMEX_H
+#define _ASM_CRIS_TIMEX_H
+
+#include <arch/timex.h>
+
+/*
+ * We don't have a cycle-counter.. but we do not support SMP anyway where this is
+ * used so it does not matter.
+ */
+
+typedef unsigned long long cycles_t;
+
+static inline cycles_t get_cycles(void)
+{
+        return 0;
+}
+
+#endif

arch/cris/include/asm/tlb.h

···
+#ifndef _CRIS_TLB_H
+#define _CRIS_TLB_H
+
+#include <linux/pagemap.h>
+
+#include <arch/tlb.h>
+
+/*
+ * cris doesn't need any special per-pte or
+ * per-vma handling..
+ */
+#define tlb_start_vma(tlb, vma) do { } while (0)
+#define tlb_end_vma(tlb, vma) do { } while (0)
+#define __tlb_remove_tlb_entry(tlb, ptep, address) do { } while (0)
+
+#define tlb_flush(tlb) flush_tlb_mm((tlb)->mm)
+#include <asm-generic/tlb.h>
+
+#endif

arch/cris/include/asm/uaccess.h

···
+/* 
+ * Authors:    Bjorn Wesen ([e-mail])
+ *	       Hans-Peter Nilsson ([e-mail])
+ */
+
+/* Asm:s have been tweaked (within the domain of correctness) to give
+   satisfactory results for "gcc version 2.96 20000427 (experimental)".
+
+   Check regularly...
+
+   Register $r9 is chosen for temporaries, being a call-clobbered register
+   first in line to be used (notably for local blocks), not colliding with
+   parameter registers.  */
+
+#ifndef _CRIS_UACCESS_H
+#define _CRIS_UACCESS_H
+
+#ifndef __ASSEMBLY__
+#include <linux/sched.h>
+#include <linux/errno.h>
+#include <asm/processor.h>
+#include <asm/page.h>
+
+#define VERIFY_READ	0
+#define VERIFY_WRITE	1
+
+/*
+ * The fs value determines whether argument validity checking should be
+ * performed or not.  If get_fs() == USER_DS, checking is performed, with
+ * get_fs() == KERNEL_DS, checking is bypassed.
+ *
+ * For historical reasons, these macros are grossly misnamed.
+ */
+
+#define MAKE_MM_SEG(s)	((mm_segment_t) { (s) })
+
+/* addr_limit is the maximum accessible address for the task. we misuse
+ * the KERNEL_DS and USER_DS values to both assign and compare the 
+ * addr_limit values through the equally misnamed get/set_fs macros.
+ * (see above)
+ */
+
+#define KERNEL_DS	MAKE_MM_SEG(0xFFFFFFFF)
+#define USER_DS		MAKE_MM_SEG(TASK_SIZE)
+
+#define get_ds()	(KERNEL_DS)
+#define get_fs()	(current_thread_info()->addr_limit)
+#define set_fs(x)	(current_thread_info()->addr_limit = (x))
+
+#define segment_eq(a,b)	((a).seg == (b).seg)
+
+#define __kernel_ok (segment_eq(get_fs(), KERNEL_DS))
+#define __user_ok(addr,size) (((size) <= TASK_SIZE)&&((addr) <= TASK_SIZE-(size)))
+#define __access_ok(addr,size) (__kernel_ok || __user_ok((addr),(size)))
+#define access_ok(type,addr,size) __access_ok((unsigned long)(addr),(size))
+
+#include <arch/uaccess.h>
+
+/*
+ * The exception table consists of pairs of addresses: the first is the
+ * address of an instruction that is allowed to fault, and the second is
+ * the address at which the program should continue.  No registers are
+ * modified, so it is entirely up to the continuation code to figure out
+ * what to do.
+ *
+ * All the routines below use bits of fixup code that are out of line
+ * with the main instruction path.  This means when everything is well,
+ * we don't even have to jump over them.  Further, they do not intrude
+ * on our cache or tlb entries.
+ */
+
+struct exception_table_entry
+{
+	unsigned long insn, fixup;
+};
+
+/*
+ * These are the main single-value transfer routines.  They automatically
+ * use the right size if we just have the right pointer type.
+ *
+ * This gets kind of ugly. We want to return _two_ values in "get_user()"
+ * and yet we don't want to do any pointers, because that is too much
+ * of a performance impact. Thus we have a few rather ugly macros here,
+ * and hide all the ugliness from the user.
+ *
+ * The "__xxx" versions of the user access functions are versions that
+ * do not verify the address space, that must have been done previously
+ * with a separate "access_ok()" call (this is used when we do multiple
+ * accesses to the same area of user memory).
+ *
+ * As we use the same address space for kernel and user data on
+ * CRIS, we can just do these as direct assignments.  (Of course, the
+ * exception handling means that it's no longer "just"...)
+ */
+#define get_user(x,ptr) \
+  __get_user_check((x),(ptr),sizeof(*(ptr)))
+#define put_user(x,ptr) \
+  __put_user_check((__typeof__(*(ptr)))(x),(ptr),sizeof(*(ptr)))
+
+#define __get_user(x,ptr) \
+  __get_user_nocheck((x),(ptr),sizeof(*(ptr)))
+#define __put_user(x,ptr) \
+  __put_user_nocheck((__typeof__(*(ptr)))(x),(ptr),sizeof(*(ptr)))
+
+extern long __put_user_bad(void);
+
+#define __put_user_size(x,ptr,size,retval)			\
+do {								\
+	retval = 0;						\
+	switch (size) {						\
+	  case 1: __put_user_asm(x,ptr,retval,"move.b"); break;	\
+	  case 2: __put_user_asm(x,ptr,retval,"move.w"); break;	\
+	  case 4: __put_user_asm(x,ptr,retval,"move.d"); break;	\
+	  case 8: __put_user_asm_64(x,ptr,retval); break;	\
+	  default: __put_user_bad();				\
+	}							\
+} while (0)
+
+#define __get_user_size(x,ptr,size,retval)			\
+do {								\
+	retval = 0;						\
+	switch (size) {						\
+	  case 1: __get_user_asm(x,ptr,retval,"move.b"); break;	\
+	  case 2: __get_user_asm(x,ptr,retval,"move.w"); break;	\
+	  case 4: __get_user_asm(x,ptr,retval,"move.d"); break;	\
+	  case 8: __get_user_asm_64(x,ptr,retval); break;	\
+	  default: (x) = __get_user_bad();			\
+	}							\
+} while (0)
+
+#define __put_user_nocheck(x,ptr,size)			\
+({							\
+	long __pu_err;					\
+	__put_user_size((x),(ptr),(size),__pu_err);	\
+	__pu_err;					\
+})
+
+#define __put_user_check(x,ptr,size)				\
+({								\
+	long __pu_err = -EFAULT;				\
+	__typeof__(*(ptr)) *__pu_addr = (ptr);			\
+	if (access_ok(VERIFY_WRITE,__pu_addr,size))		\
+		__put_user_size((x),__pu_addr,(size),__pu_err);	\
+	__pu_err;						\
+})
+
+struct __large_struct { unsigned long buf[100]; };
+#define __m(x) (*(struct __large_struct *)(x))
+
+
+
+#define __get_user_nocheck(x,ptr,size)				\
+({								\
+	long __gu_err, __gu_val;				\
+	__get_user_size(__gu_val,(ptr),(size),__gu_err);	\
+	(x) = (__typeof__(*(ptr)))__gu_val;			\
+	__gu_err;						\
+})
+
+#define __get_user_check(x,ptr,size)					\
+({									\
+	long __gu_err = -EFAULT, __gu_val = 0;				\
+	const __typeof__(*(ptr)) *__gu_addr = (ptr);			\
+	if (access_ok(VERIFY_READ,__gu_addr,size))			\
+		__get_user_size(__gu_val,__gu_addr,(size),__gu_err);	\
+	(x) = (__typeof__(*(ptr)))__gu_val;				\
+	__gu_err;							\
+})
+
+extern long __get_user_bad(void);
+
+/* More complex functions.  Most are inline, but some call functions that
+   live in lib/usercopy.c  */
+
+extern unsigned long __copy_user(void __user *to, const void *from, unsigned long n);
+extern unsigned long __copy_user_zeroing(void *to, const void __user *from, unsigned long n);
+extern unsigned long __do_clear_user(void __user *to, unsigned long n);
+
+static inline unsigned long
+__generic_copy_to_user(void __user *to, const void *from, unsigned long n)
+{
+	if (access_ok(VERIFY_WRITE, to, n))
+		return __copy_user(to,from,n);
+	return n;
+}
+
+static inline unsigned long
+__generic_copy_from_user(void *to, const void __user *from, unsigned long n)
+{
+	if (access_ok(VERIFY_READ, from, n))
+		return __copy_user_zeroing(to,from,n);
+	return n;
+}
+
+static inline unsigned long
+__generic_clear_user(void __user *to, unsigned long n)
+{
+	if (access_ok(VERIFY_WRITE, to, n))
+		return __do_clear_user(to,n);
+	return n;
+}
+
+static inline long
+__strncpy_from_user(char *dst, const char __user *src, long count)
+{
+	return __do_strncpy_from_user(dst, src, count);
+}
+
+static inline long
+strncpy_from_user(char *dst, const char __user *src, long count)
+{
+	long res = -EFAULT;
+	if (access_ok(VERIFY_READ, src, 1))
+		res = __do_strncpy_from_user(dst, src, count);
+	return res;
+}
+
+
+/* Note that these expand awfully if made into switch constructs, so
+   don't do that.  */
+
+static inline unsigned long
+__constant_copy_from_user(void *to, const void __user *from, unsigned long n)
+{
+	unsigned long ret = 0;
+	if (n == 0)
+		;
+	else if (n == 1)
+		__asm_copy_from_user_1(to, from, ret);
+	else if (n == 2)
+		__asm_copy_from_user_2(to, from, ret);
+	else if (n == 3)
+		__asm_copy_from_user_3(to, from, ret);
+	else if (n == 4)
+		__asm_copy_from_user_4(to, from, ret);
+	else if (n == 5)
+		__asm_copy_from_user_5(to, from, ret);
+	else if (n == 6)
+		__asm_copy_from_user_6(to, from, ret);
+	else if (n == 7)
+		__asm_copy_from_user_7(to, from, ret);
+	else if (n == 8)
+		__asm_copy_from_user_8(to, from, ret);
+	else if (n == 9)
+		__asm_copy_from_user_9(to, from, ret);
+	else if (n == 10)
+		__asm_copy_from_user_10(to, from, ret);
+	else if (n == 11)
+		__asm_copy_from_user_11(to, from, ret);
+	else if (n == 12)
+		__asm_copy_from_user_12(to, from, ret);
+	else if (n == 13)
+		__asm_copy_from_user_13(to, from, ret);
+	else if (n == 14)
+		__asm_copy_from_user_14(to, from, ret);
+	else if (n == 15)
+		__asm_copy_from_user_15(to, from, ret);
+	else if (n == 16)
+		__asm_copy_from_user_16(to, from, ret);
+	else if (n == 20)
+		__asm_copy_from_user_20(to, from, ret);
+	else if (n == 24)
+		__asm_copy_from_user_24(to, from, ret);
+	else
+		ret = __generic_copy_from_user(to, from, n);
+
+	return ret;
+}
+
+/* Ditto, don't make a switch out of this.  */
+
+static inline unsigned long
+__constant_copy_to_user(void __user *to, const void *from, unsigned long n)
+{
+	unsigned long ret = 0;
+	if (n == 0)
+		;
+	else if (n == 1)
+		__asm_copy_to_user_1(to, from, ret);
+	else if (n == 2)
+		__asm_copy_to_user_2(to, from, ret);
+	else if (n == 3)
+		__asm_copy_to_user_3(to, from, ret);
+	else if (n == 4)
+		__asm_copy_to_user_4(to, from, ret);
+	else if (n == 5)
+		__asm_copy_to_user_5(to, from, ret);
+	else if (n == 6)
+		__asm_copy_to_user_6(to, from, ret);
+	else if (n == 7)
+		__asm_copy_to_user_7(to, from, ret);
+	else if (n == 8)
+		__asm_copy_to_user_8(to, from, ret);
+	else if (n == 9)
+		__asm_copy_to_user_9(to, from, ret);
+	else if (n == 10)
+		__asm_copy_to_user_10(to, from, ret);
+	else if (n == 11)
+		__asm_copy_to_user_11(to, from, ret);
+	else if (n == 12)
+		__asm_copy_to_user_12(to, from, ret);
+	else if (n == 13)
+		__asm_copy_to_user_13(to, from, ret);
+	else if (n == 14)
+		__asm_copy_to_user_14(to, from, ret);
+	else if (n == 15)
+		__asm_copy_to_user_15(to, from, ret);
+	else if (n == 16)
+		__asm_copy_to_user_16(to, from, ret);
+	else if (n == 20)
+		__asm_copy_to_user_20(to, from, ret);
+	else if (n == 24)
+		__asm_copy_to_user_24(to, from, ret);
+	else
+		ret = __generic_copy_to_user(to, from, n);
+
+	return ret;
+}
+
+/* No switch, please.  */
+
+static inline unsigned long
+__constant_clear_user(void __user *to, unsigned long n)
+{
+	unsigned long ret = 0;
+	if (n == 0)
+		;
+	else if (n == 1)
+		__asm_clear_1(to, ret);
+	else if (n == 2)
+		__asm_clear_2(to, ret);
+	else if (n == 3)
+		__asm_clear_3(to, ret);
+	else if (n == 4)
+		__asm_clear_4(to, ret);
+	else if (n == 8)
+		__asm_clear_8(to, ret);
+	else if (n == 12)
+		__asm_clear_12(to, ret);
+	else if (n == 16)
+		__asm_clear_16(to, ret);
+	else if (n == 20)
+		__asm_clear_20(to, ret);
+	else if (n == 24)
+		__asm_clear_24(to, ret);
+	else
+		ret = __generic_clear_user(to, n);
+
+	return ret;
+}
+
+
+#define clear_user(to, n)			\
+(__builtin_constant_p(n) ?			\
+ __constant_clear_user(to, n) :			\
+ __generic_clear_user(to, n))
+
+#define copy_from_user(to, from, n)		\
+(__builtin_constant_p(n) ?			\
+ __constant_copy_from_user(to, from, n) :	\
+ __generic_copy_from_user(to, from, n))
+
+#define copy_to_user(to, from, n)		\
+(__builtin_constant_p(n) ?			\
+ __constant_copy_to_user(to, from, n) :		\
+ __generic_copy_to_user(to, from, n))
+
+/* We let the __ versions of copy_from/to_user inline, because they're often
+ * used in fast paths and have only a small space overhead.
+ */
+
+static inline unsigned long
+__generic_copy_from_user_nocheck(void *to, const void __user *from,
+				 unsigned long n)
+{
+	return __copy_user_zeroing(to,from,n);
+}
+
+static inline unsigned long
+__generic_copy_to_user_nocheck(void __user *to, const void *from,
+			       unsigned long n)
+{
+	return __copy_user(to,from,n);
+}
+
+static inline unsigned long
+__generic_clear_user_nocheck(void __user *to, unsigned long n)
+{
+	return __do_clear_user(to,n);
+}
+
+/* without checking */
+
+#define __copy_to_user(to,from,n)   __generic_copy_to_user_nocheck((to),(from),(n))
+#define __copy_from_user(to,from,n) __generic_copy_from_user_nocheck((to),(from),(n))
+#define __copy_to_user_inatomic __copy_to_user
+#define __copy_from_user_inatomic __copy_from_user
+#define __clear_user(to,n) __generic_clear_user_nocheck((to),(n))
+
+#define strlen_user(str)	strnlen_user((str), 0x7ffffffe)
+
+#endif  /* __ASSEMBLY__ */
+
+#endif	/* _CRIS_UACCESS_H */

arch/cris/include/asm/unistd.h

···
+#ifndef _ASM_CRIS_UNISTD_H_
+#define _ASM_CRIS_UNISTD_H_
+
+/*
+ * This file contains the system call numbers, and stub macros for libc.
+ */
+
+#define __NR_restart_syscall      0
+#define __NR_exit		  1
+#define __NR_fork		  2
+#define __NR_read		  3
+#define __NR_write		  4
+#define __NR_open		  5
+#define __NR_close		  6
+#define __NR_waitpid		  7
+#define __NR_creat		  8
+#define __NR_link		  9
+#define __NR_unlink		 10
+#define __NR_execve		 11
+#define __NR_chdir		 12
+#define __NR_time		 13
+#define __NR_mknod		 14
+#define __NR_chmod		 15
+#define __NR_lchown		 16
+#define __NR_break		 17
+#define __NR_oldstat		 18
+#define __NR_lseek		 19
+#define __NR_getpid		 20
+#define __NR_mount		 21
+#define __NR_umount		 22
+#define __NR_setuid		 23
+#define __NR_getuid		 24
+#define __NR_stime		 25
+#define __NR_ptrace		 26
+#define __NR_alarm		 27
+#define __NR_oldfstat		 28
+#define __NR_pause		 29
+#define __NR_utime		 30
+#define __NR_stty		 31
+#define __NR_gtty		 32
+#define __NR_access		 33
+#define __NR_nice		 34
+#define __NR_ftime		 35
+#define __NR_sync		 36
+#define __NR_kill		 37
+#define __NR_rename		 38
+#define __NR_mkdir		 39
+#define __NR_rmdir		 40
+#define __NR_dup		 41
+#define __NR_pipe		 42
+#define __NR_times		 43
+#define __NR_prof		 44
+#define __NR_brk		 45
+#define __NR_setgid		 46
+#define __NR_getgid		 47
+#define __NR_signal		 48
+#define __NR_geteuid		 49
+#define __NR_getegid		 50
+#define __NR_acct		 51
+#define __NR_umount2		 52
+#define __NR_lock		 53
+#define __NR_ioctl		 54
+#define __NR_fcntl		 55
+#define __NR_mpx		 56
+#define __NR_setpgid		 57
+#define __NR_ulimit		 58
+#define __NR_oldolduname	 59
+#define __NR_umask		 60
+#define __NR_chroot		 61
+#define __NR_ustat		 62
+#define __NR_dup2		 63
+#define __NR_getppid		 64
+#define __NR_getpgrp		 65
+#define __NR_setsid		 66
+#define __NR_sigaction		 67
+#define __NR_sgetmask		 68
+#define __NR_ssetmask		 69
+#define __NR_setreuid		 70
+#define __NR_setregid		 71
+#define __NR_sigsuspend		 72
+#define __NR_sigpending		 73
+#define __NR_sethostname	 74
+#define __NR_setrlimit		 75
+#define __NR_getrlimit		 76
+#define __NR_getrusage		 77
+#define __NR_gettimeofday	 78
+#define __NR_settimeofday	 79
+#define __NR_getgroups		 80
+#define __NR_setgroups		 81
+#define __NR_select		 82
+#define __NR_symlink		 83
+#define __NR_oldlstat		 84
+#define __NR_readlink		 85
+#define __NR_uselib		 86
+#define __NR_swapon		 87
+#define __NR_reboot		 88
+#define __NR_readdir		 89
+#define __NR_mmap		 90
+#define __NR_munmap		 91
+#define __NR_truncate		 92
+#define __NR_ftruncate		 93
+#define __NR_fchmod		 94
+#define __NR_fchown		 95
+#define __NR_getpriority	 96
+#define __NR_setpriority	 97
+#define __NR_profil		 98
+#define __NR_statfs		 99
+#define __NR_fstatfs		100
+#define __NR_ioperm		101
+#define __NR_socketcall		102
+#define __NR_syslog		103
+#define __NR_setitimer		104
+#define __NR_getitimer		105
+#define __NR_stat		106
+#define __NR_lstat		107
+#define __NR_fstat		108
+#define __NR_olduname		109
+#define __NR_iopl		110
+#define __NR_vhangup		111
+#define __NR_idle		112
+#define __NR_vm86		113
+#define __NR_wait4		114
+#define __NR_swapoff		115
+#define __NR_sysinfo		116
+#define __NR_ipc		117
+#define __NR_fsync		118
+#define __NR_sigreturn		119
+#define __NR_clone		120
+#define __NR_setdomainname	121
+#define __NR_uname		122
+#define __NR_modify_ldt		123
+#define __NR_adjtimex		124
+#define __NR_mprotect		125
+#define __NR_sigprocmask	126
+#define __NR_create_module	127
+#define __NR_init_module	128
+#define __NR_delete_module	129
+#define __NR_get_kernel_syms	130
+#define __NR_quotactl		131
+#define __NR_getpgid		132
+#define __NR_fchdir		133
+#define __NR_bdflush		134
+#define __NR_sysfs		135
+#define __NR_personality	136
+#define __NR_afs_syscall	137 /* Syscall for Andrew File System */
+#define __NR_setfsuid		138
+#define __NR_setfsgid		139
+#define __NR__llseek		140
+#define __NR_getdents		141
+#define __NR__newselect		142
+#define __NR_flock		143
+#define __NR_msync		144
+#define __NR_readv		145
+#define __NR_writev		146
+#define __NR_getsid		147
+#define __NR_fdatasync		148
+#define __NR__sysctl		149
+#define __NR_mlock		150
+#define __NR_munlock		151
+#define __NR_mlockall		152
+#define __NR_munlockall		153
+#define __NR_sched_setparam		154
+#define __NR_sched_getparam		155
+#define __NR_sched_setscheduler		156
+#define __NR_sched_getscheduler		157
+#define __NR_sched_yield		158
+#define __NR_sched_get_priority_max	159
+#define __NR_sched_get_priority_min	160
+#define __NR_sched_rr_get_interval	161
+#define __NR_nanosleep		162
+#define __NR_mremap		163
+#define __NR_setresuid		164
+#define __NR_getresuid		165
+
+#define __NR_query_module	167
+#define __NR_poll		168
+#define __NR_nfsservctl		169
+#define __NR_setresgid		170
+#define __NR_getresgid		171
+#define __NR_prctl              172
+#define __NR_rt_sigreturn	173
+#define __NR_rt_sigaction	174
+#define __NR_rt_sigprocmask	175
+#define __NR_rt_sigpending	176
+#define __NR_rt_sigtimedwait	177
+#define __NR_rt_sigqueueinfo	178
+#define __NR_rt_sigsuspend	179
+#define __NR_pread64		180
+#define __NR_pwrite64		181
+#define __NR_chown		182
+#define __NR_getcwd		183
+#define __NR_capget		184
+#define __NR_capset		185
+#define __NR_sigaltstack	186
+#define __NR_sendfile		187
+#define __NR_getpmsg		188	/* some people actually want streams */
+#define __NR_putpmsg		189	/* some people actually want streams */
+#define __NR_vfork		190
+#define __NR_ugetrlimit		191	/* SuS compliant getrlimit */
+#define __NR_mmap2		192
+#define __NR_truncate64		193
+#define __NR_ftruncate64	194
+#define __NR_stat64		195
+#define __NR_lstat64		196
+#define __NR_fstat64		197
+#define __NR_lchown32		198
+#define __NR_getuid32		199
+#define __NR_getgid32		200
+#define __NR_geteuid32		201
+#define __NR_getegid32		202
+#define __NR_setreuid32		203
+#define __NR_setregid32		204
+#define __NR_getgroups32	205
+#define __NR_setgroups32	206
+#define __NR_fchown32		207
+#define __NR_setresuid32	208
+#define __NR_getresuid32	209
+#define __NR_setresgid32	210
+#define __NR_getresgid32	211
+#define __NR_chown32		212
+#define __NR_setuid32		213
+#define __NR_setgid32		214
+#define __NR_setfsuid32		215
+#define __NR_setfsgid32		216
+#define __NR_pivot_root		217
+#define __NR_mincore		218
+#define __NR_madvise		219
+#define __NR_getdents64		220
+#define __NR_fcntl64		221
+/* 223 is unused */
+#define __NR_gettid             224
+#define __NR_readahead          225
+#define __NR_setxattr		226
+#define __NR_lsetxattr		227
+#define __NR_fsetxattr		228
+#define __NR_getxattr		229
+#define __NR_lgetxattr		230
+#define __NR_fgetxattr		231
+#define __NR_listxattr		232
+#define __NR_llistxattr		233
+#define __NR_flistxattr		234
+#define __NR_removexattr	235
+#define __NR_lremovexattr	236
+#define __NR_fremovexattr	237
+#define __NR_tkill		238
+#define __NR_sendfile64		239
+#define __NR_futex		240
+#define __NR_sched_setaffinity	241
+#define __NR_sched_getaffinity	242
+#define __NR_set_thread_area	243
+#define __NR_get_thread_area	244
+#define __NR_io_setup		245
+#define __NR_io_destroy		246
+#define __NR_io_getevents	247
+#define __NR_io_submit		248
+#define __NR_io_cancel		249
+#define __NR_fadvise64		250
+/* 251 is available for reuse (was briefly sys_set_zone_reclaim) */
+#define __NR_exit_group		252
+#define __NR_lookup_dcookie	253
+#define __NR_epoll_create	254
+#define __NR_epoll_ctl		255
+#define __NR_epoll_wait		256
+#define __NR_remap_file_pages	257
+#define __NR_set_tid_address	258
+#define __NR_timer_create	259
+#define __NR_timer_settime	(__NR_timer_create+1)
+#define __NR_timer_gettime	(__NR_timer_create+2)
+#define __NR_timer_getoverrun	(__NR_timer_create+3)
+#define __NR_timer_delete	(__NR_timer_create+4)
+#define __NR_clock_settime	(__NR_timer_create+5)
+#define __NR_clock_gettime	(__NR_timer_create+6)
+#define __NR_clock_getres	(__NR_timer_create+7)
+#define __NR_clock_nanosleep	(__NR_timer_create+8)
+#define __NR_statfs64		268
+#define __NR_fstatfs64		269
+#define __NR_tgkill		270
+#define __NR_utimes		271
+#define __NR_fadvise64_64	272
+#define __NR_vserver		273
+#define __NR_mbind		274
+#define __NR_get_mempolicy	275
+#define __NR_set_mempolicy	276
+#define __NR_mq_open 		277
+#define __NR_mq_unlink		(__NR_mq_open+1)
+#define __NR_mq_timedsend	(__NR_mq_open+2)
+#define __NR_mq_timedreceive	(__NR_mq_open+3)
+#define __NR_mq_notify		(__NR_mq_open+4)
+#define __NR_mq_getsetattr	(__NR_mq_open+5)
+#define __NR_kexec_load		283
+#define __NR_waitid		284
+/* #define __NR_sys_setaltroot	285 */
+#define __NR_add_key		286
+#define __NR_request_key	287
+#define __NR_keyctl		288
+#define __NR_ioprio_set		289
+#define __NR_ioprio_get		290
+#define __NR_inotify_init	291
+#define __NR_inotify_add_watch	292
+#define __NR_inotify_rm_watch	293
+#define __NR_migrate_pages	294
+#define __NR_openat		295
+#define __NR_mkdirat		296
+#define __NR_mknodat		297
+#define __NR_fchownat		298
+#define __NR_futimesat		299
+#define __NR_fstatat64		300
+#define __NR_unlinkat		301
+#define __NR_renameat		302
+#define __NR_linkat		303
+#define __NR_symlinkat		304
+#define __NR_readlinkat		305
+#define __NR_fchmodat		306
+#define __NR_faccessat		307
+#define __NR_pselect6		308
+#define __NR_ppoll		309
+#define __NR_unshare		310
+#define __NR_set_robust_list	311
+#define __NR_get_robust_list	312
+#define __NR_splice		313
+#define __NR_sync_file_range	314
+#define __NR_tee		315
+#define __NR_vmsplice		316
+#define __NR_move_pages		317
+#define __NR_getcpu		318
+#define __NR_epoll_pwait	319
+#define __NR_utimensat		320
+#define __NR_signalfd		321
+#define __NR_timerfd_create	322
+#define __NR_eventfd		323
+#define __NR_fallocate		324
+#define __NR_timerfd_settime	325
+#define __NR_timerfd_gettime	326
+
+#ifdef __KERNEL__
+
+#define NR_syscalls 327
+
+#include <arch/unistd.h>
+
+#define __ARCH_WANT_IPC_PARSE_VERSION
+#define __ARCH_WANT_OLD_READDIR
+#define __ARCH_WANT_OLD_STAT
+#define __ARCH_WANT_STAT64
+#define __ARCH_WANT_SYS_ALARM
+#define __ARCH_WANT_SYS_GETHOSTNAME
+#define __ARCH_WANT_SYS_PAUSE
+#define __ARCH_WANT_SYS_SGETMASK
+#define __ARCH_WANT_SYS_SIGNAL
+#define __ARCH_WANT_SYS_TIME
+#define __ARCH_WANT_SYS_UTIME
+#define __ARCH_WANT_SYS_WAITPID
+#define __ARCH_WANT_SYS_SOCKETCALL
+#define __ARCH_WANT_SYS_FADVISE64
+#define __ARCH_WANT_SYS_GETPGRP
+#define __ARCH_WANT_SYS_LLSEEK
+#define __ARCH_WANT_SYS_NICE
+#define __ARCH_WANT_SYS_OLD_GETRLIMIT
+#define __ARCH_WANT_SYS_OLDUMOUNT
+#define __ARCH_WANT_SYS_SIGPENDING
+#define __ARCH_WANT_SYS_SIGPROCMASK
+#define __ARCH_WANT_SYS_RT_SIGACTION
+#define __ARCH_WANT_SYS_RT_SIGSUSPEND
+
+/*
+ * "Conditional" syscalls
+ *
+ * What we want is __attribute__((weak,alias("sys_ni_syscall"))),
+ * but it doesn't work on all toolchains, so we just do it by hand
+ */
+#define cond_syscall(x) asm(".weak\t" #x "\n\t.set\t" #x ",sys_ni_syscall")
+
+#endif /* __KERNEL__ */
+#endif /* _ASM_CRIS_UNISTD_H_ */

arch/cris/include/asm/user.h

···
+#ifndef __ASM_CRIS_USER_H
+#define __ASM_CRIS_USER_H
+
+#include <linux/types.h>
+#include <asm/ptrace.h>
+#include <asm/page.h>
+#include <arch/user.h>
+
+/*
+ * Core file format: The core file is written in such a way that gdb
+ * can understand it and provide useful information to the user (under
+ * linux we use the `trad-core' bfd).  The file contents are as follows:
+ *
+ *  upage: 1 page consisting of a user struct that tells gdb
+ *	what is present in the file.  Directly after this is a
+ *	copy of the task_struct, which is currently not used by gdb,
+ *	but it may come in handy at some point.  All of the registers
+ *	are stored as part of the upage.  The upage should always be
+ *	only one page long.
+ *  data: The data segment follows next.  We use current->end_text to
+ *	current->brk to pick up all of the user variables, plus any memory
+ *	that may have been sbrk'ed.  No attempt is made to determine if a
+ *	page is demand-zero or if a page is totally unused, we just cover
+ *	the entire range.  All of the addresses are rounded in such a way
+ *	that an integral number of pages is written.
+ *  stack: We need the stack information in order to get a meaningful
+ *	backtrace.  We need to write the data from usp to
+ *	current->start_stack, so we round each of these in order to be able
+ *	to write an integer number of pages.
+ */
+        
+struct user {
+	struct user_regs_struct	regs;		/* entire machine state */
+	size_t		u_tsize;		/* text size (pages) */
+	size_t		u_dsize;		/* data size (pages) */
+	size_t		u_ssize;		/* stack size (pages) */
+	unsigned long	start_code;		/* text starting address */
+	unsigned long	start_data;		/* data starting address */
+	unsigned long	start_stack;		/* stack starting address */
+	long int	signal;			/* signal causing core dump */
+	unsigned long	u_ar0;			/* help gdb find registers */
+	unsigned long	magic;			/* identifies a core file */
+	char		u_comm[32];		/* user command name */
+};
+
+#define NBPG			PAGE_SIZE
+#define UPAGES			1
+#define HOST_TEXT_START_ADDR	(u.start_code)
+#define HOST_DATA_START_ADDR	(u.start_data)
+#define HOST_STACK_END_ADDR	(u.start_stack + u.u_ssize * NBPG)
+
+#endif /* __ASM_CRIS_USER_H */

arch/cris/mm/ioremap.c

···
 #include <linux/vmalloc.h>
 #include <linux/io.h>
 #include <asm/pgalloc.h>
-#include <asm/arch/memmap.h>
+#include <arch/memmap.h>
 
 /*
  * Generic mapping function (not visible outside):

drivers/net/cris/eth_v10.c

···
 #include <linux/skbuff.h>
 #include <linux/ethtool.h>
 
-#include <asm/arch/svinto.h>/* DMA and register descriptions */
+#include <arch/svinto.h>/* DMA and register descriptions */
 #include <asm/io.h>         /* CRIS_LED_* I/O functions */
 #include <asm/irq.h>
 #include <asm/dma.h>
 #include <asm/system.h>
 #include <asm/ethernet.h>
 #include <asm/cache.h>
-#include <asm/arch/io_interface_mux.h>
+#include <arch/io_interface_mux.h>
 
 //#define ETHDEBUG
 #define D(x)

drivers/serial/crisv10.c

···
 #include <asm/system.h>
 #include <linux/delay.h>
 
-#include <asm/arch/svinto.h>
+#include <arch/svinto.h>
 
 /* non-arch dependent serial structures are in linux/serial.h */
 #include <linux/serial.h>
 /* while we keep our own stuff (struct e100_serial) in a local .h file */
 #include "crisv10.h"
 #include <asm/fasttimer.h>
-#include <asm/arch/io_interface_mux.h>
+#include <arch/io_interface_mux.h>
 
 #ifdef CONFIG_ETRAX_SERIAL_FAST_TIMER
 #ifndef CONFIG_ETRAX_FAST_TIMER

drivers/serial/crisv10.h

···
 #include <linux/circ_buf.h>
 #include <asm/termios.h>
 #include <asm/dma.h>
-#include <asm/arch/io_interface_mux.h>
+#include <arch/io_interface_mux.h>
 
 /* Software state per channel */
 

include/asm-cris/arch-v10/io.h

···
-#ifndef _ASM_ARCH_CRIS_IO_H
-#define _ASM_ARCH_CRIS_IO_H
-
-#include <asm/arch/svinto.h>
-
-/* Etrax shadow registers - which live in arch/cris/kernel/shadows.c */
-
-extern unsigned long gen_config_ii_shadow;
-extern unsigned long port_g_data_shadow;
-extern unsigned char port_pa_dir_shadow;
-extern unsigned char port_pa_data_shadow;
-extern unsigned char port_pb_i2c_shadow;
-extern unsigned char port_pb_config_shadow;
-extern unsigned char port_pb_dir_shadow;
-extern unsigned char port_pb_data_shadow;
-extern unsigned long r_timer_ctrl_shadow;
-
-extern unsigned long port_cse1_shadow;
-extern unsigned long port_csp0_shadow;
-extern unsigned long port_csp4_shadow;
-
-extern volatile unsigned long *port_cse1_addr;
-extern volatile unsigned long *port_csp0_addr;
-extern volatile unsigned long *port_csp4_addr;
-
-/* macro for setting regs through a shadow -
- * r = register name (like R_PORT_PA_DATA)
- * s = shadow name (like port_pa_data_shadow)
- * b = bit number
- * v = value (0 or 1)
- */
-
-#define REG_SHADOW_SET(r,s,b,v) *r = s = (s & ~(1 << (b))) | ((v) << (b))
-
-/* The LED's on various Etrax-based products are set differently. */
-
-#if defined(CONFIG_ETRAX_NO_LEDS) || defined(CONFIG_SVINTO_SIM)
-#undef CONFIG_ETRAX_PA_LEDS
-#undef CONFIG_ETRAX_PB_LEDS
-#undef CONFIG_ETRAX_CSP0_LEDS
-#define CRIS_LED_NETWORK_SET_G(x)
-#define CRIS_LED_NETWORK_SET_R(x)
-#define CRIS_LED_ACTIVE_SET_G(x)
-#define CRIS_LED_ACTIVE_SET_R(x)
-#define CRIS_LED_DISK_WRITE(x)
-#define CRIS_LED_DISK_READ(x)
-#endif
-
-#if !defined(CONFIG_ETRAX_CSP0_LEDS)
-#define CRIS_LED_BIT_SET(x)
-#define CRIS_LED_BIT_CLR(x)
-#endif
-
-#define CRIS_LED_OFF    0x00
-#define CRIS_LED_GREEN  0x01
-#define CRIS_LED_RED    0x02
-#define CRIS_LED_ORANGE (CRIS_LED_GREEN | CRIS_LED_RED)
-
-#if defined(CONFIG_ETRAX_NO_LEDS)
-#define CRIS_LED_NETWORK_SET(x)
-#else
-#if CONFIG_ETRAX_LED1G == CONFIG_ETRAX_LED1R
-#define CRIS_LED_NETWORK_SET(x)                          \
-	do {                                        \
-		CRIS_LED_NETWORK_SET_G((x) & CRIS_LED_GREEN); \
-	} while (0)
-#else
-#define CRIS_LED_NETWORK_SET(x)                          \
-	do {                                        \
-		CRIS_LED_NETWORK_SET_G((x) & CRIS_LED_GREEN); \
-		CRIS_LED_NETWORK_SET_R((x) & CRIS_LED_RED);   \
-	} while (0)
-#endif
-#if CONFIG_ETRAX_LED2G == CONFIG_ETRAX_LED2R
-#define CRIS_LED_ACTIVE_SET(x)                           \
-	do {                                        \
-		CRIS_LED_ACTIVE_SET_G((x) & CRIS_LED_GREEN);  \
-	} while (0)
-#else
-#define CRIS_LED_ACTIVE_SET(x)                           \
-	do {                                        \
-		CRIS_LED_ACTIVE_SET_G((x) & CRIS_LED_GREEN);  \
-		CRIS_LED_ACTIVE_SET_R((x) & CRIS_LED_RED);    \
-	} while (0)
-#endif
-#endif
-
-#ifdef CONFIG_ETRAX_PA_LEDS
-#define CRIS_LED_NETWORK_SET_G(x) \
-         REG_SHADOW_SET(R_PORT_PA_DATA, port_pa_data_shadow, CONFIG_ETRAX_LED1G, !(x))
-#define CRIS_LED_NETWORK_SET_R(x) \
-         REG_SHADOW_SET(R_PORT_PA_DATA, port_pa_data_shadow, CONFIG_ETRAX_LED1R, !(x))
-#define CRIS_LED_ACTIVE_SET_G(x) \
-         REG_SHADOW_SET(R_PORT_PA_DATA, port_pa_data_shadow, CONFIG_ETRAX_LED2G, !(x))
-#define CRIS_LED_ACTIVE_SET_R(x) \
-         REG_SHADOW_SET(R_PORT_PA_DATA, port_pa_data_shadow, CONFIG_ETRAX_LED2R, !(x))
-#define CRIS_LED_DISK_WRITE(x) \
-         do{\
-                REG_SHADOW_SET(R_PORT_PA_DATA, port_pa_data_shadow, CONFIG_ETRAX_LED3G, !(x));\
-                REG_SHADOW_SET(R_PORT_PA_DATA, port_pa_data_shadow, CONFIG_ETRAX_LED3R, !(x));\
-        }while(0)
-#define CRIS_LED_DISK_READ(x) \
-	REG_SHADOW_SET(R_PORT_PA_DATA, port_pa_data_shadow, \
-		CONFIG_ETRAX_LED3G, !(x))
-#endif
-
-#ifdef CONFIG_ETRAX_PB_LEDS
-#define CRIS_LED_NETWORK_SET_G(x) \
-         REG_SHADOW_SET(R_PORT_PB_DATA, port_pb_data_shadow, CONFIG_ETRAX_LED1G, !(x))
-#define CRIS_LED_NETWORK_SET_R(x) \
-         REG_SHADOW_SET(R_PORT_PB_DATA, port_pb_data_shadow, CONFIG_ETRAX_LED1R, !(x))
-#define CRIS_LED_ACTIVE_SET_G(x) \
-         REG_SHADOW_SET(R_PORT_PB_DATA, port_pb_data_shadow, CONFIG_ETRAX_LED2G, !(x))
-#define CRIS_LED_ACTIVE_SET_R(x) \
-         REG_SHADOW_SET(R_PORT_PB_DATA, port_pb_data_shadow, CONFIG_ETRAX_LED2R, !(x))
-#define CRIS_LED_DISK_WRITE(x) \
-        do{\
-                REG_SHADOW_SET(R_PORT_PB_DATA, port_pb_data_shadow, CONFIG_ETRAX_LED3G, !(x));\
-                REG_SHADOW_SET(R_PORT_PB_DATA, port_pb_data_shadow, CONFIG_ETRAX_LED3R, !(x));\
-        }while(0)
-#define CRIS_LED_DISK_READ(x) \
-	REG_SHADOW_SET(R_PORT_PB_DATA, port_pb_data_shadow, \
-		CONFIG_ETRAX_LED3G, !(x))
-#endif
-
-#ifdef CONFIG_ETRAX_CSP0_LEDS
-#define CONFIGURABLE_LEDS\
-        ((1 << CONFIG_ETRAX_LED1G ) | (1 << CONFIG_ETRAX_LED1R ) |\
-         (1 << CONFIG_ETRAX_LED2G ) | (1 << CONFIG_ETRAX_LED2R ) |\
-         (1 << CONFIG_ETRAX_LED3G ) | (1 << CONFIG_ETRAX_LED3R ) |\
-         (1 << CONFIG_ETRAX_LED4G ) | (1 << CONFIG_ETRAX_LED4R ) |\
-         (1 << CONFIG_ETRAX_LED5G ) | (1 << CONFIG_ETRAX_LED5R ) |\
-         (1 << CONFIG_ETRAX_LED6G ) | (1 << CONFIG_ETRAX_LED6R ) |\
-         (1 << CONFIG_ETRAX_LED7G ) | (1 << CONFIG_ETRAX_LED7R ) |\
-         (1 << CONFIG_ETRAX_LED8Y ) | (1 << CONFIG_ETRAX_LED9Y ) |\
-         (1 << CONFIG_ETRAX_LED10Y ) |(1 << CONFIG_ETRAX_LED11Y )|\
-         (1 << CONFIG_ETRAX_LED12R ))
-
-#define CRIS_LED_NETWORK_SET_G(x) \
-         REG_SHADOW_SET(port_csp0_addr, port_csp0_shadow, CONFIG_ETRAX_LED1G, !(x))
-#define CRIS_LED_NETWORK_SET_R(x) \
-         REG_SHADOW_SET(port_csp0_addr, port_csp0_shadow, CONFIG_ETRAX_LED1R, !(x))
-#define CRIS_LED_ACTIVE_SET_G(x) \
-         REG_SHADOW_SET(port_csp0_addr, port_csp0_shadow, CONFIG_ETRAX_LED2G, !(x))
-#define CRIS_LED_ACTIVE_SET_R(x) \
-         REG_SHADOW_SET(port_csp0_addr, port_csp0_shadow, CONFIG_ETRAX_LED2R, !(x))
-#define CRIS_LED_DISK_WRITE(x) \
-        do{\
-                REG_SHADOW_SET(port_csp0_addr, port_csp0_shadow, CONFIG_ETRAX_LED3G, !(x));\
-                REG_SHADOW_SET(port_csp0_addr, port_csp0_shadow, CONFIG_ETRAX_LED3R, !(x));\
-        }while(0)
-#define CRIS_LED_DISK_READ(x) \
-         REG_SHADOW_SET(port_csp0_addr, port_csp0_shadow, CONFIG_ETRAX_LED3G, !(x))
-#define CRIS_LED_BIT_SET(x)\
-        do{\
-                if((( 1 << x) & CONFIGURABLE_LEDS)  != 0)\
-                       REG_SHADOW_SET(port_csp0_addr, port_csp0_shadow, x, 1);\
-        }while(0)
-#define CRIS_LED_BIT_CLR(x)\
-        do{\
-                if((( 1 << x) & CONFIGURABLE_LEDS)  != 0)\
-                       REG_SHADOW_SET(port_csp0_addr, port_csp0_shadow, x, 0);\
-        }while(0)
-#endif
-
-#
-#ifdef CONFIG_ETRAX_SOFT_SHUTDOWN
-#define SOFT_SHUTDOWN() \
-          REG_SHADOW_SET(port_csp0_addr, port_csp0_shadow, CONFIG_ETRAX_SHUTDOWN_BIT, 1)
-#else
-#define SOFT_SHUTDOWN()
-#endif
-
-/* Console I/O for simulated etrax100.  Use #ifdef so erroneous
-   use will be evident. */
-#ifdef CONFIG_SVINTO_SIM
-  /* Let's use the ucsim interface since it lets us do write(2, ...) */
-#define SIMCOUT(s,len)							\
-  asm ("moveq 4,$r9	\n\t"						\
-       "moveq 2,$r10	\n\t"						\
-       "move.d %0,$r11	\n\t"						\
-       "move.d %1,$r12	\n\t"						\
-       "push $irp	\n\t"						\
-       "move 0f,$irp	\n\t"						\
-       "jump -6809	\n"						\
-       "0:		\n\t"						\
-       "pop $irp"							\
-       : : "rm" (s), "rm" (len) : "r9","r10","r11","r12","memory")
-#define TRACE_ON() __extension__ \
- ({ int _Foofoo; __asm__ volatile ("bmod [%0],%0" : "=r" (_Foofoo) : "0" \
-			       (255)); _Foofoo; })
-
-#define TRACE_OFF() do { __asm__ volatile ("bmod [%0],%0" :: "r" (254)); } while (0)
-#define SIM_END() do { __asm__ volatile ("bmod [%0],%0" :: "r" (28)); } while (0)
-#define CRIS_CYCLES() __extension__ \
- ({ unsigned long c; asm ("bmod [%1],%0" : "=r" (c) : "r" (27)); c;})
-#endif /* ! defined CONFIG_SVINTO_SIM */
-
-#endif

include/asm-cris/arch-v10/irq.h

···
-/*
- * Interrupt handling assembler and defines for Linux/CRISv10
- */
-
-#ifndef _ASM_ARCH_IRQ_H
-#define _ASM_ARCH_IRQ_H
-
-#include <asm/arch/sv_addr_ag.h>
-
-#define NR_IRQS 32
-
-/* The first vector number used for IRQs in v10 is really 0x20 */
-/* but all the code and constants are offseted to make 0 the first */
-#define FIRST_IRQ 0
-
-#define SOME_IRQ_NBR        IO_BITNR(R_VECT_MASK_RD, some)   /* 0 ? */
-#define NMI_IRQ_NBR         IO_BITNR(R_VECT_MASK_RD, nmi)    /* 1 */
-#define TIMER0_IRQ_NBR      IO_BITNR(R_VECT_MASK_RD, timer0) /* 2 */
-#define TIMER1_IRQ_NBR      IO_BITNR(R_VECT_MASK_RD, timer1) /* 3 */
-/* mio, ata, par0, scsi0 on 4 */
-/* par1, scsi1 on 5 */
-#define NETWORK_STATUS_IRQ_NBR IO_BITNR(R_VECT_MASK_RD, network) /* 6 */
-
-#define SERIAL_IRQ_NBR IO_BITNR(R_VECT_MASK_RD, serial) /* 8 */
-#define PA_IRQ_NBR IO_BITNR(R_VECT_MASK_RD, pa) /* 11 */
-/* extdma0 and extdma1 is at irq 12 and 13 and/or same as dma5 and dma6 ? */
-#define EXTDMA0_IRQ_NBR IO_BITNR(R_VECT_MASK_RD, ext_dma0)
-#define EXTDMA1_IRQ_NBR IO_BITNR(R_VECT_MASK_RD, ext_dma1)
-
-/* dma0-9 is irq 16..25 */
-/* 16,17: network */
-#define DMA0_TX_IRQ_NBR IO_BITNR(R_VECT_MASK_RD, dma0)
-#define DMA1_RX_IRQ_NBR IO_BITNR(R_VECT_MASK_RD, dma1)
-#define NETWORK_DMA_TX_IRQ_NBR DMA0_TX_IRQ_NBR
-#define NETWORK_DMA_RX_IRQ_NBR DMA1_RX_IRQ_NBR
-
-/* 18,19: dma2 and dma3 shared by par0, scsi0, ser2 and ata */
-#define DMA2_TX_IRQ_NBR IO_BITNR(R_VECT_MASK_RD, dma2)
-#define DMA3_RX_IRQ_NBR IO_BITNR(R_VECT_MASK_RD, dma3)
-#define SER2_DMA_TX_IRQ_NBR DMA2_TX_IRQ_NBR
-#define SER2_DMA_RX_IRQ_NBR DMA3_RX_IRQ_NBR
-
-/* 20,21: dma4 and dma5 shared by par1, scsi1, ser3 and extdma0 */
-#define DMA4_TX_IRQ_NBR IO_BITNR(R_VECT_MASK_RD, dma4)
-#define DMA5_RX_IRQ_NBR IO_BITNR(R_VECT_MASK_RD, dma5)
-#define SER3_DMA_TX_IRQ_NBR DMA4_TX_IRQ_NBR
-#define SER3_DMA_RX_IRQ_NBR DMA5_RX_IRQ_NBR
-
-/* 22,23: dma6 and dma7 shared by ser0, extdma1 and mem2mem */
-#define DMA6_TX_IRQ_NBR IO_BITNR(R_VECT_MASK_RD, dma6)
-#define DMA7_RX_IRQ_NBR IO_BITNR(R_VECT_MASK_RD, dma7)
-#define SER0_DMA_TX_IRQ_NBR DMA6_TX_IRQ_NBR
-#define SER0_DMA_RX_IRQ_NBR DMA7_RX_IRQ_NBR
-#define MEM2MEM_DMA_TX_IRQ_NBR DMA6_TX_IRQ_NBR
-#define MEM2MEM_DMA_RX_IRQ_NBR DMA7_RX_IRQ_NBR
-
-/* 24,25: dma8 and dma9 shared by ser1 and usb */
-#define DMA8_TX_IRQ_NBR IO_BITNR(R_VECT_MASK_RD, dma8)
-#define DMA9_RX_IRQ_NBR IO_BITNR(R_VECT_MASK_RD, dma9)
-#define SER1_DMA_TX_IRQ_NBR DMA8_TX_IRQ_NBR
-#define SER1_DMA_RX_IRQ_NBR DMA9_RX_IRQ_NBR
-#define USB_DMA_TX_IRQ_NBR DMA8_TX_IRQ_NBR
-#define USB_DMA_RX_IRQ_NBR DMA9_RX_IRQ_NBR
-
-/* usb: controller at irq 31 + uses DMA8 and DMA9 */
-#define USB_HC_IRQ_NBR IO_BITNR(R_VECT_MASK_RD, usb)
-
-/* our fine, global, etrax irq vector! the pointer lives in the head.S file. */
-
-typedef void (*irqvectptr)(void);
-
-struct etrax_interrupt_vector {
-	irqvectptr v[256];
-};
-
-extern struct etrax_interrupt_vector *etrax_irv;
-void set_int_vector(int n, irqvectptr addr);
-void set_break_vector(int n, irqvectptr addr);
-
-#define __STR(x) #x
-#define STR(x) __STR(x)
- 
-/* SAVE_ALL saves registers so they match pt_regs */
-
-#define SAVE_ALL \
-  "move $irp,[$sp=$sp-16]\n\t" /* push instruction pointer and fake SBFS struct */ \
-  "push $srp\n\t"       /* push subroutine return pointer */ \
-  "push $dccr\n\t"      /* push condition codes */ \
-  "push $mof\n\t"       /* push multiply overflow reg */ \
-  "di\n\t"             /* need to disable irq's at this point */\
-  "subq 14*4,$sp\n\t"   /* make room for r0-r13 */ \
-  "movem $r13,[$sp]\n\t" /* push the r0-r13 registers */ \
-  "push $r10\n\t"       /* push orig_r10 */ \
-  "clear.d [$sp=$sp-4]\n\t"  /* frametype - this is a normal stackframe */
-
-  /* BLOCK_IRQ and UNBLOCK_IRQ do the same as mask_irq and unmask_irq */
-
-#define BLOCK_IRQ(mask,nr) \
-  "move.d " #mask ",$r0\n\t" \
-  "move.d $r0,[0xb00000d8]\n\t" 
-  
-#define UNBLOCK_IRQ(mask) \
-  "move.d " #mask ",$r0\n\t" \
-  "move.d $r0,[0xb00000dc]\n\t" 
-
-#define IRQ_NAME2(nr) nr##_interrupt(void)
-#define IRQ_NAME(nr) IRQ_NAME2(IRQ##nr)
-#define sIRQ_NAME(nr) IRQ_NAME2(sIRQ##nr)
-#define BAD_IRQ_NAME(nr) IRQ_NAME2(bad_IRQ##nr)
-
-  /* the asm IRQ handler makes sure the causing IRQ is blocked, then it calls
-   * do_IRQ (with irq disabled still). after that it unblocks and jumps to
-   * ret_from_intr (entry.S)
-   *
-   * The reason the IRQ is blocked is to allow an sti() before the handler which
-   * will acknowledge the interrupt is run.
-   */
-
-#define BUILD_IRQ(nr,mask) \
-void IRQ_NAME(nr); \
-__asm__ ( \
-          ".text\n\t" \
-          "IRQ" #nr "_interrupt:\n\t" \
-	  SAVE_ALL \
-	  BLOCK_IRQ(mask,nr) /* this must be done to prevent irq loops when we ei later */ \
-	  "moveq "#nr",$r10\n\t" \
-	  "move.d $sp,$r11\n\t" \
-	  "jsr do_IRQ\n\t" /* irq.c, r10 and r11 are arguments */ \
-	  UNBLOCK_IRQ(mask) \
-	  "moveq 0,$r9\n\t" /* make ret_from_intr realise we came from an irq */ \
-	  "jump ret_from_intr\n\t");
-
-/* This is subtle. The timer interrupt is crucial and it should not be disabled for 
- * too long. However, if it had been a normal interrupt as per BUILD_IRQ, it would
- * have been BLOCK'ed, and then softirq's are run before we return here to UNBLOCK.
- * If the softirq's take too much time to run, the timer irq won't run and the 
- * watchdog will kill us.
- *
- * Furthermore, if a lot of other irq's occur before we return here, the multiple_irq
- * handler is run and it prioritizes the timer interrupt. However if we had BLOCK'ed
- * it here, we would not get the multiple_irq at all.
- *
- * The non-blocking here is based on the knowledge that the timer interrupt is 
- * registred as a fast interrupt (IRQF_DISABLED) so that we _know_ there will not
- * be an sti() before the timer irq handler is run to acknowledge the interrupt.
- */
-
-#define BUILD_TIMER_IRQ(nr,mask) \
-void IRQ_NAME(nr); \
-__asm__ ( \
-          ".text\n\t" \
-          "IRQ" #nr "_interrupt:\n\t" \
-	  SAVE_ALL \
-	  "moveq "#nr",$r10\n\t" \
-	  "move.d $sp,$r11\n\t" \
-	  "jsr do_IRQ\n\t" /* irq.c, r10 and r11 are arguments */ \
-	  "moveq 0,$r9\n\t" /* make ret_from_intr realise we came from an irq */ \
-	  "jump ret_from_intr\n\t");
-
-#endif

include/asm-cris/arch-v32/arbiter.h

···
-#ifndef _ASM_CRIS_ARCH_ARBITER_H
-#define _ASM_CRIS_ARCH_ARBITER_H
-
-#define EXT_REGION 0
-#define INT_REGION 1
-
-typedef void (watch_callback)(void);
-
-enum
-{
-  arbiter_all_dmas = 0x3ff,
-  arbiter_cpu = 0xc00,
-  arbiter_all_clients = 0x3fff
-};
-
-enum
-{
-  arbiter_all_read = 0x55,
-  arbiter_all_write = 0xaa,
-  arbiter_all_accesses = 0xff
-};
-
-int crisv32_arbiter_allocate_bandwidth(int client, int region,
-				       unsigned long bandwidth);
-int crisv32_arbiter_watch(unsigned long start, unsigned long size,
-                          unsigned long clients, unsigned long accesses,
-                          watch_callback* cb);
-int crisv32_arbiter_unwatch(int id);
-
-#endif

include/asm-cris/arch-v32/cache.h

···
-#ifndef _ASM_CRIS_ARCH_CACHE_H
-#define _ASM_CRIS_ARCH_CACHE_H
-
-#include <asm/arch/hwregs/dma.h>
-
-/* A cache-line is 32 bytes. */
-#define L1_CACHE_BYTES 32
-#define L1_CACHE_SHIFT 5
-
-void flush_dma_list(dma_descr_data *descr);
-void flush_dma_descr(dma_descr_data *descr, int flush_buf);
-
-#define flush_dma_context(c) \
-  flush_dma_list(phys_to_virt((c)->saved_data));
-
-void cris_flush_cache_range(void *buf, unsigned long len);
-void cris_flush_cache(void);
-
-#endif /* _ASM_CRIS_ARCH_CACHE_H */

include/asm-cris/arch-v32/cryptocop.h

···
-/*
- * The device /dev/cryptocop is accessible using this driver using
- * CRYPTOCOP_MAJOR (254) and minor number 0.
- */
-
-#ifndef CRYPTOCOP_H
-#define CRYPTOCOP_H
-
-#include <linux/uio.h>
-
-
-#define CRYPTOCOP_SESSION_ID_NONE (0)
-
-typedef unsigned long long int cryptocop_session_id;
-
-/* cryptocop ioctls */
-#define ETRAXCRYPTOCOP_IOCTYPE         (250)
-
-#define CRYPTOCOP_IO_CREATE_SESSION    _IOWR(ETRAXCRYPTOCOP_IOCTYPE, 1, struct strcop_session_op)
-#define CRYPTOCOP_IO_CLOSE_SESSION     _IOW(ETRAXCRYPTOCOP_IOCTYPE, 2, struct strcop_session_op)
-#define CRYPTOCOP_IO_PROCESS_OP        _IOWR(ETRAXCRYPTOCOP_IOCTYPE, 3, struct strcop_crypto_op)
-#define CRYPTOCOP_IO_MAXNR             (3)
-
-typedef enum {
-	cryptocop_cipher_des = 0,
-	cryptocop_cipher_3des = 1,
-	cryptocop_cipher_aes = 2,
-	cryptocop_cipher_m2m = 3, /* mem2mem is essentially a NULL cipher with blocklength=1 */
-	cryptocop_cipher_none
-} cryptocop_cipher_type;
-
-typedef enum {
-	cryptocop_digest_sha1 = 0,
-	cryptocop_digest_md5 = 1,
-	cryptocop_digest_none
-} cryptocop_digest_type;
-
-typedef enum {
-	cryptocop_csum_le = 0,
-	cryptocop_csum_be = 1,
-	cryptocop_csum_none
-} cryptocop_csum_type;
-
-typedef enum {
-	cryptocop_cipher_mode_ecb = 0,
-	cryptocop_cipher_mode_cbc,
-	cryptocop_cipher_mode_none
-} cryptocop_cipher_mode;
-
-typedef enum {
-	cryptocop_3des_eee = 0,
-	cryptocop_3des_eed = 1,
-	cryptocop_3des_ede = 2,
-	cryptocop_3des_edd = 3,
-	cryptocop_3des_dee = 4,
-	cryptocop_3des_ded = 5,
-	cryptocop_3des_dde = 6,
-	cryptocop_3des_ddd = 7
-} cryptocop_3des_mode;
-
-/* Usermode accessible (ioctl) operations. */
-struct strcop_session_op{
-	cryptocop_session_id    ses_id;
-
-	cryptocop_cipher_type   cipher; /* AES, DES, 3DES, m2m, none */
-
-	cryptocop_cipher_mode   cmode; /* ECB, CBC, none */
-	cryptocop_3des_mode     des3_mode;
-
-	cryptocop_digest_type   digest; /* MD5, SHA1, none */
-
-	cryptocop_csum_type     csum;   /* BE, LE, none */
-
-	unsigned char           *key;
-	size_t                  keylen;
-};
-
-#define CRYPTOCOP_CSUM_LENGTH         (2)
-#define CRYPTOCOP_MAX_DIGEST_LENGTH   (20)  /* SHA-1 20, MD5 16 */
-#define CRYPTOCOP_MAX_IV_LENGTH       (16)  /* (3)DES==8, AES == 16 */
-#define CRYPTOCOP_MAX_KEY_LENGTH      (32)
-
-struct strcop_crypto_op{
-	cryptocop_session_id ses_id;
-
-	/* Indata. */
-	unsigned char            *indata;
-	size_t                   inlen; /* Total indata length. */
-
-	/* Cipher configuration. */
-	unsigned char            do_cipher:1;
-	unsigned char            decrypt:1; /* 1 == decrypt, 0 == encrypt */
-	unsigned char            cipher_explicit:1;
-	size_t                   cipher_start;
-	size_t                   cipher_len;
-	/* cipher_iv is used if do_cipher and cipher_explicit and the cipher
-	   mode is CBC.  The length is controlled by the type of cipher,
-	   e.g. DES/3DES 8 octets and AES 16 octets. */
-	unsigned char            cipher_iv[CRYPTOCOP_MAX_IV_LENGTH];
-	/* Outdata. */
-	unsigned char            *cipher_outdata;
-	size_t                   cipher_outlen;
-
-	/* digest configuration. */
-	unsigned char            do_digest:1;
-	size_t                   digest_start;
-	size_t                   digest_len;
-	/* Outdata.  The actual length is determined by the type of the digest. */
-	unsigned char            digest[CRYPTOCOP_MAX_DIGEST_LENGTH];
-
-	/* Checksum configuration. */
-	unsigned char            do_csum:1;
-	size_t                   csum_start;
-	size_t                   csum_len;
-	/* Outdata. */
-	unsigned char            csum[CRYPTOCOP_CSUM_LENGTH];
-};
-
-
-
-#ifdef __KERNEL__
-
-/********** The API to use from inside the kernel. ************/
-
-#include <asm/arch/hwregs/dma.h>
-
-typedef enum {
-	cryptocop_alg_csum = 0,
-	cryptocop_alg_mem2mem,
-	cryptocop_alg_md5,
-	cryptocop_alg_sha1,
-	cryptocop_alg_des,
-	cryptocop_alg_3des,
-	cryptocop_alg_aes,
-	cryptocop_no_alg,
-} cryptocop_algorithm;
-
-typedef u8 cryptocop_tfrm_id;
-
-
-struct cryptocop_operation;
-
-typedef void (cryptocop_callback)(struct cryptocop_operation*, void*);
-
-struct cryptocop_transform_init {
-	cryptocop_algorithm    alg;
-	/* Keydata for ciphers. */
-	unsigned char          key[CRYPTOCOP_MAX_KEY_LENGTH];
-	unsigned int           keylen;
-	cryptocop_cipher_mode  cipher_mode;
-	cryptocop_3des_mode    tdes_mode;
-	cryptocop_csum_type    csum_mode; /* cryptocop_csum_none is not allowed when alg==cryptocop_alg_csum */
-
-	cryptocop_tfrm_id tid; /* Locally unique in session; assigned by user, checked by driver. */
-	struct cryptocop_transform_init *next;
-};
-
-
-typedef enum {
-	cryptocop_source_dma = 0,
-	cryptocop_source_des,
-	cryptocop_source_3des,
-	cryptocop_source_aes,
-	cryptocop_source_md5,
-	cryptocop_source_sha1,
-	cryptocop_source_csum,
-	cryptocop_source_none,
-} cryptocop_source;
-
-
-struct cryptocop_desc_cfg {
-	cryptocop_tfrm_id tid;
-	cryptocop_source src;
-	unsigned int last:1; /* Last use of this transform in the operation.  Will push outdata when encountered. */
-	struct cryptocop_desc_cfg *next;
-};
-
-struct cryptocop_desc {
-	size_t length;
-	struct cryptocop_desc_cfg *cfg;
-	struct cryptocop_desc *next;
-};
-
-
-/* Flags for cryptocop_tfrm_cfg */
-#define CRYPTOCOP_NO_FLAG     (0x00)
-#define CRYPTOCOP_ENCRYPT     (0x01)
-#define CRYPTOCOP_DECRYPT     (0x02)
-#define CRYPTOCOP_EXPLICIT_IV (0x04)
-
-struct cryptocop_tfrm_cfg {
-	cryptocop_tfrm_id tid;
-
-	unsigned int flags; /* DECRYPT, ENCRYPT, EXPLICIT_IV */
-
-	/* CBC initialisation vector for cihers. */
-	u8 iv[CRYPTOCOP_MAX_IV_LENGTH];
-
-	/* The position in output where to write the transform output.  The order
-	   in which the driver writes the output is unspecified, hence if several
-	   transforms write on the same positions in the output the result is
-	   unspecified. */
-	size_t inject_ix;
-
-	struct cryptocop_tfrm_cfg *next;
-};
-
-
-
-struct cryptocop_dma_list_operation{
-	/* The consumer can provide DMA lists to send to the co-processor.  'use_dmalists' in
-	   struct cryptocop_operation must be set for the driver to use them.  outlist,
-	   out_data_buf, inlist and in_data_buf must all be physical addresses since they will
-	   be loaded to DMA . */
-	dma_descr_data *outlist; /* Out from memory to the co-processor. */
-	char           *out_data_buf;
-	dma_descr_data *inlist; /* In from the co-processor to memory. */
-	char           *in_data_buf;
-
-	cryptocop_3des_mode tdes_mode;
-	cryptocop_csum_type csum_mode;
-};
-
-
-struct cryptocop_tfrm_operation{
-	/* Operation configuration, if not 'use_dmalists' is set. */
-	struct cryptocop_tfrm_cfg *tfrm_cfg;
-	struct cryptocop_desc *desc;
-
-	struct iovec *indata;
-	size_t incount;
-	size_t inlen; /* Total inlength. */
-
-	struct iovec *outdata;
-	size_t outcount;
-	size_t outlen; /* Total outlength. */
-};
-
-
-struct cryptocop_operation {
-	cryptocop_callback *cb;
-	void *cb_data;
-
-	cryptocop_session_id sid;
-
-	/* The status of the operation when returned to consumer. */
-	int operation_status; /* 0, -EAGAIN */
-
-	/* Flags */
-	unsigned int use_dmalists:1;  /* Use outlist and inlist instead of the desc/tfrm_cfg configuration. */
-	unsigned int in_interrupt:1;  /* Set if inserting job from interrupt context. */
-	unsigned int fast_callback:1; /* Set if fast callback wanted, i.e. from interrupt context. */
-
-	union{
-		struct cryptocop_dma_list_operation list_op;
-		struct cryptocop_tfrm_operation tfrm_op;
-	};
-};
-
-
-int cryptocop_new_session(cryptocop_session_id *sid, struct cryptocop_transform_init *tinit, int alloc_flag);
-int cryptocop_free_session(cryptocop_session_id sid);
-
-int cryptocop_job_queue_insert_csum(struct cryptocop_operation *operation);
-
-int cryptocop_job_queue_insert_crypto(struct cryptocop_operation *operation);
-
-int cryptocop_job_queue_insert_user_job(struct cryptocop_operation *operation);
-
-#endif /* __KERNEL__ */
-
-#endif /* CRYPTOCOP_H */

include/asm-cris/arch-v32/hwregs/asm/pinmux_defs_asm.h

···
-#ifndef __pinmux_defs_asm_h
-#define __pinmux_defs_asm_h
-
-/*
- * This file is autogenerated from
- *   file:           ../../inst/pinmux/rtl/guinness/pinmux_regs.r
- *     id:           pinmux_regs.r,v 1.40 2005/02/09 16:22:59 perz Exp
- *     last modfied: Mon Apr 11 16:09:11 2005
- *
- *   by /n/asic/design/tools/rdesc/src/rdes2c -asm --outfile asm/pinmux_defs_asm.h ../../inst/pinmux/rtl/guinness/pinmux_regs.r
- *      id: $Id: pinmux_defs_asm.h,v 1.1 2005/04/24 18:31:04 starvik Exp $
- * Any changes here will be lost.
- *
- * -*- buffer-read-only: t -*-
- */
-
-#ifndef REG_FIELD
-#define REG_FIELD( scope, reg, field, value ) \
-  REG_FIELD_X_( value, reg_##scope##_##reg##___##field##___lsb )
-#define REG_FIELD_X_( value, shift ) ((value) << shift)
-#endif
-
-#ifndef REG_STATE
-#define REG_STATE( scope, reg, field, symbolic_value ) \
-  REG_STATE_X_( regk_##scope##_##symbolic_value, reg_##scope##_##reg##___##field##___lsb )
-#define REG_STATE_X_( k, shift ) (k << shift)
-#endif
-
-#ifndef REG_MASK
-#define REG_MASK( scope, reg, field ) \
-  REG_MASK_X_( reg_##scope##_##reg##___##field##___width, reg_##scope##_##reg##___##field##___lsb )
-#define REG_MASK_X_( width, lsb ) (((1 << width)-1) << lsb)
-#endif
-
-#ifndef REG_LSB
-#define REG_LSB( scope, reg, field ) reg_##scope##_##reg##___##field##___lsb
-#endif
-
-#ifndef REG_BIT
-#define REG_BIT( scope, reg, field ) reg_##scope##_##reg##___##field##___bit
-#endif
-
-#ifndef REG_ADDR
-#define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset)
-#define REG_ADDR_X_( inst, offs ) ((inst) + offs)
-#endif
-
-#ifndef REG_ADDR_VECT
-#define REG_ADDR_VECT( scope, inst, reg, index ) \
-         REG_ADDR_VECT_X_(inst, reg_##scope##_##reg##_offset, index, \
-			 STRIDE_##scope##_##reg )
-#define REG_ADDR_VECT_X_( inst, offs, index, stride ) \
-                          ((inst) + offs + (index) * stride)
-#endif
-
-/* Register rw_pa, scope pinmux, type rw */
-#define reg_pinmux_rw_pa___pa0___lsb 0
-#define reg_pinmux_rw_pa___pa0___width 1
-#define reg_pinmux_rw_pa___pa0___bit 0
-#define reg_pinmux_rw_pa___pa1___lsb 1
-#define reg_pinmux_rw_pa___pa1___width 1
-#define reg_pinmux_rw_pa___pa1___bit 1
-#define reg_pinmux_rw_pa___pa2___lsb 2
-#define reg_pinmux_rw_pa___pa2___width 1
-#define reg_pinmux_rw_pa___pa2___bit 2
-#define reg_pinmux_rw_pa___pa3___lsb 3
-#define reg_pinmux_rw_pa___pa3___width 1
-#define reg_pinmux_rw_pa___pa3___bit 3
-#define reg_pinmux_rw_pa___pa4___lsb 4
-#define reg_pinmux_rw_pa___pa4___width 1
-#define reg_pinmux_rw_pa___pa4___bit 4
-#define reg_pinmux_rw_pa___pa5___lsb 5
-#define reg_pinmux_rw_pa___pa5___width 1
-#define reg_pinmux_rw_pa___pa5___bit 5
-#define reg_pinmux_rw_pa___pa6___lsb 6
-#define reg_pinmux_rw_pa___pa6___width 1
-#define reg_pinmux_rw_pa___pa6___bit 6
-#define reg_pinmux_rw_pa___pa7___lsb 7
-#define reg_pinmux_rw_pa___pa7___width 1
-#define reg_pinmux_rw_pa___pa7___bit 7
-#define reg_pinmux_rw_pa___csp2_n___lsb 8
-#define reg_pinmux_rw_pa___csp2_n___width 1
-#define reg_pinmux_rw_pa___csp2_n___bit 8
-#define reg_pinmux_rw_pa___csp3_n___lsb 9
-#define reg_pinmux_rw_pa___csp3_n___width 1
-#define reg_pinmux_rw_pa___csp3_n___bit 9
-#define reg_pinmux_rw_pa___csp5_n___lsb 10
-#define reg_pinmux_rw_pa___csp5_n___width 1
-#define reg_pinmux_rw_pa___csp5_n___bit 10
-#define reg_pinmux_rw_pa___csp6_n___lsb 11
-#define reg_pinmux_rw_pa___csp6_n___width 1
-#define reg_pinmux_rw_pa___csp6_n___bit 11
-#define reg_pinmux_rw_pa___hsh4___lsb 12
-#define reg_pinmux_rw_pa___hsh4___width 1
-#define reg_pinmux_rw_pa___hsh4___bit 12
-#define reg_pinmux_rw_pa___hsh5___lsb 13
-#define reg_pinmux_rw_pa___hsh5___width 1
-#define reg_pinmux_rw_pa___hsh5___bit 13
-#define reg_pinmux_rw_pa___hsh6___lsb 14
-#define reg_pinmux_rw_pa___hsh6___width 1
-#define reg_pinmux_rw_pa___hsh6___bit 14
-#define reg_pinmux_rw_pa___hsh7___lsb 15
-#define reg_pinmux_rw_pa___hsh7___width 1
-#define reg_pinmux_rw_pa___hsh7___bit 15
-#define reg_pinmux_rw_pa_offset 0
-
-/* Register rw_hwprot, scope pinmux, type rw */
-#define reg_pinmux_rw_hwprot___ser1___lsb 0
-#define reg_pinmux_rw_hwprot___ser1___width 1
-#define reg_pinmux_rw_hwprot___ser1___bit 0
-#define reg_pinmux_rw_hwprot___ser2___lsb 1
-#define reg_pinmux_rw_hwprot___ser2___width 1
-#define reg_pinmux_rw_hwprot___ser2___bit 1
-#define reg_pinmux_rw_hwprot___ser3___lsb 2
-#define reg_pinmux_rw_hwprot___ser3___width 1
-#define reg_pinmux_rw_hwprot___ser3___bit 2
-#define reg_pinmux_rw_hwprot___sser0___lsb 3
-#define reg_pinmux_rw_hwprot___sser0___width 1
-#define reg_pinmux_rw_hwprot___sser0___bit 3
-#define reg_pinmux_rw_hwprot___sser1___lsb 4
-#define reg_pinmux_rw_hwprot___sser1___width 1
-#define reg_pinmux_rw_hwprot___sser1___bit 4
-#define reg_pinmux_rw_hwprot___ata0___lsb 5
-#define reg_pinmux_rw_hwprot___ata0___width 1
-#define reg_pinmux_rw_hwprot___ata0___bit 5
-#define reg_pinmux_rw_hwprot___ata1___lsb 6
-#define reg_pinmux_rw_hwprot___ata1___width 1
-#define reg_pinmux_rw_hwprot___ata1___bit 6
-#define reg_pinmux_rw_hwprot___ata2___lsb 7
-#define reg_pinmux_rw_hwprot___ata2___width 1
-#define reg_pinmux_rw_hwprot___ata2___bit 7
-#define reg_pinmux_rw_hwprot___ata3___lsb 8
-#define reg_pinmux_rw_hwprot___ata3___width 1
-#define reg_pinmux_rw_hwprot___ata3___bit 8
-#define reg_pinmux_rw_hwprot___ata___lsb 9
-#define reg_pinmux_rw_hwprot___ata___width 1
-#define reg_pinmux_rw_hwprot___ata___bit 9
-#define reg_pinmux_rw_hwprot___eth1___lsb 10
-#define reg_pinmux_rw_hwprot___eth1___width 1
-#define reg_pinmux_rw_hwprot___eth1___bit 10
-#define reg_pinmux_rw_hwprot___eth1_mgm___lsb 11
-#define reg_pinmux_rw_hwprot___eth1_mgm___width 1
-#define reg_pinmux_rw_hwprot___eth1_mgm___bit 11
-#define reg_pinmux_rw_hwprot___timer___lsb 12
-#define reg_pinmux_rw_hwprot___timer___width 1
-#define reg_pinmux_rw_hwprot___timer___bit 12
-#define reg_pinmux_rw_hwprot___p21___lsb 13
-#define reg_pinmux_rw_hwprot___p21___width 1
-#define reg_pinmux_rw_hwprot___p21___bit 13
-#define reg_pinmux_rw_hwprot_offset 4
-
-/* Register rw_pb_gio, scope pinmux, type rw */
-#define reg_pinmux_rw_pb_gio___pb0___lsb 0
-#define reg_pinmux_rw_pb_gio___pb0___width 1
-#define reg_pinmux_rw_pb_gio___pb0___bit 0
-#define reg_pinmux_rw_pb_gio___pb1___lsb 1
-#define reg_pinmux_rw_pb_gio___pb1___width 1
-#define reg_pinmux_rw_pb_gio___pb1___bit 1
-#define reg_pinmux_rw_pb_gio___pb2___lsb 2
-#define reg_pinmux_rw_pb_gio___pb2___width 1
-#define reg_pinmux_rw_pb_gio___pb2___bit 2
-#define reg_pinmux_rw_pb_gio___pb3___lsb 3
-#define reg_pinmux_rw_pb_gio___pb3___width 1
-#define reg_pinmux_rw_pb_gio___pb3___bit 3
-#define reg_pinmux_rw_pb_gio___pb4___lsb 4
-#define reg_pinmux_rw_pb_gio___pb4___width 1
-#define reg_pinmux_rw_pb_gio___pb4___bit 4
-#define reg_pinmux_rw_pb_gio___pb5___lsb 5
-#define reg_pinmux_rw_pb_gio___pb5___width 1
-#define reg_pinmux_rw_pb_gio___pb5___bit 5
-#define reg_pinmux_rw_pb_gio___pb6___lsb 6
-#define reg_pinmux_rw_pb_gio___pb6___width 1
-#define reg_pinmux_rw_pb_gio___pb6___bit 6
-#define reg_pinmux_rw_pb_gio___pb7___lsb 7
-#define reg_pinmux_rw_pb_gio___pb7___width 1
-#define reg_pinmux_rw_pb_gio___pb7___bit 7
-#define reg_pinmux_rw_pb_gio___pb8___lsb 8
-#define reg_pinmux_rw_pb_gio___pb8___width 1
-#define reg_pinmux_rw_pb_gio___pb8___bit 8
-#define reg_pinmux_rw_pb_gio___pb9___lsb 9
-#define reg_pinmux_rw_pb_gio___pb9___width 1
-#define reg_pinmux_rw_pb_gio___pb9___bit 9
-#define reg_pinmux_rw_pb_gio___pb10___lsb 10
-#define reg_pinmux_rw_pb_gio___pb10___width 1
-#define reg_pinmux_rw_pb_gio___pb10___bit 10
-#define reg_pinmux_rw_pb_gio___pb11___lsb 11
-#define reg_pinmux_rw_pb_gio___pb11___width 1
-#define reg_pinmux_rw_pb_gio___pb11___bit 11
-#define reg_pinmux_rw_pb_gio___pb12___lsb 12
-#define reg_pinmux_rw_pb_gio___pb12___width 1
-#define reg_pinmux_rw_pb_gio___pb12___bit 12
-#define reg_pinmux_rw_pb_gio___pb13___lsb 13
-#define reg_pinmux_rw_pb_gio___pb13___width 1
-#define reg_pinmux_rw_pb_gio___pb13___bit 13
-#define reg_pinmux_rw_pb_gio___pb14___lsb 14
-#define reg_pinmux_rw_pb_gio___pb14___width 1
-#define reg_pinmux_rw_pb_gio___pb14___bit 14
-#define reg_pinmux_rw_pb_gio___pb15___lsb 15
-#define reg_pinmux_rw_pb_gio___pb15___width 1
-#define reg_pinmux_rw_pb_gio___pb15___bit 15
-#define reg_pinmux_rw_pb_gio___pb16___lsb 16
-#define reg_pinmux_rw_pb_gio___pb16___width 1
-#define reg_pinmux_rw_pb_gio___pb16___bit 16
-#define reg_pinmux_rw_pb_gio___pb17___lsb 17
-#define reg_pinmux_rw_pb_gio___pb17___width 1
-#define reg_pinmux_rw_pb_gio___pb17___bit 17
-#define reg_pinmux_rw_pb_gio_offset 8
-
-/* Register rw_pb_iop, scope pinmux, type rw */
-#define reg_pinmux_rw_pb_iop___pb0___lsb 0
-#define reg_pinmux_rw_pb_iop___pb0___width 1
-#define reg_pinmux_rw_pb_iop___pb0___bit 0
-#define reg_pinmux_rw_pb_iop___pb1___lsb 1
-#define reg_pinmux_rw_pb_iop___pb1___width 1
-#define reg_pinmux_rw_pb_iop___pb1___bit 1
-#define reg_pinmux_rw_pb_iop___pb2___lsb 2
-#define reg_pinmux_rw_pb_iop___pb2___width 1
-#define reg_pinmux_rw_pb_iop___pb2___bit 2
-#define reg_pinmux_rw_pb_iop___pb3___lsb 3
-#define reg_pinmux_rw_pb_iop___pb3___width 1
-#define reg_pinmux_rw_pb_iop___pb3___bit 3
-#define reg_pinmux_rw_pb_iop___pb4___lsb 4
-#define reg_pinmux_rw_pb_iop___pb4___width 1
-#define reg_pinmux_rw_pb_iop___pb4___bit 4
-#define reg_pinmux_rw_pb_iop___pb5___lsb 5
-#define reg_pinmux_rw_pb_iop___pb5___width 1
-#define reg_pinmux_rw_pb_iop___pb5___bit 5
-#define reg_pinmux_rw_pb_iop___pb6___lsb 6
-#define reg_pinmux_rw_pb_iop___pb6___width 1
-#define reg_pinmux_rw_pb_iop___pb6___bit 6
-#define reg_pinmux_rw_pb_iop___pb7___lsb 7
-#define reg_pinmux_rw_pb_iop___pb7___width 1
-#define reg_pinmux_rw_pb_iop___pb7___bit 7
-#define reg_pinmux_rw_pb_iop___pb8___lsb 8
-#define reg_pinmux_rw_pb_iop___pb8___width 1
-#define reg_pinmux_rw_pb_iop___pb8___bit 8
-#define reg_pinmux_rw_pb_iop___pb9___lsb 9
-#define reg_pinmux_rw_pb_iop___pb9___width 1
-#define reg_pinmux_rw_pb_iop___pb9___bit 9
-#define reg_pinmux_rw_pb_iop___pb10___lsb 10
-#define reg_pinmux_rw_pb_iop___pb10___width 1
-#define reg_pinmux_rw_pb_iop___pb10___bit 10
-#define reg_pinmux_rw_pb_iop___pb11___lsb 11
-#define reg_pinmux_rw_pb_iop___pb11___width 1
-#define reg_pinmux_rw_pb_iop___pb11___bit 11
-#define reg_pinmux_rw_pb_iop___pb12___lsb 12
-#define reg_pinmux_rw_pb_iop___pb12___width 1
-#define reg_pinmux_rw_pb_iop___pb12___bit 12
-#define reg_pinmux_rw_pb_iop___pb13___lsb 13
-#define reg_pinmux_rw_pb_iop___pb13___width 1
-#define reg_pinmux_rw_pb_iop___pb13___bit 13
-#define reg_pinmux_rw_pb_iop___pb14___lsb 14
-#define reg_pinmux_rw_pb_iop___pb14___width 1
-#define reg_pinmux_rw_pb_iop___pb14___bit 14
-#define reg_pinmux_rw_pb_iop___pb15___lsb 15
-#define reg_pinmux_rw_pb_iop___pb15___width 1
-#define reg_pinmux_rw_pb_iop___pb15___bit 15
-#define reg_pinmux_rw_pb_iop___pb16___lsb 16
-#define reg_pinmux_rw_pb_iop___pb16___width 1
-#define reg_pinmux_rw_pb_iop___pb16___bit 16
-#define reg_pinmux_rw_pb_iop___pb17___lsb 17
-#define reg_pinmux_rw_pb_iop___pb17___width 1
-#define reg_pinmux_rw_pb_iop___pb17___bit 17
-#define reg_pinmux_rw_pb_iop_offset 12
-
-/* Register rw_pc_gio, scope pinmux, type rw */
-#define reg_pinmux_rw_pc_gio___pc0___lsb 0
-#define reg_pinmux_rw_pc_gio___pc0___width 1
-#define reg_pinmux_rw_pc_gio___pc0___bit 0
-#define reg_pinmux_rw_pc_gio___pc1___lsb 1
-#define reg_pinmux_rw_pc_gio___pc1___width 1
-#define reg_pinmux_rw_pc_gio___pc1___bit 1
-#define reg_pinmux_rw_pc_gio___pc2___lsb 2
-#define reg_pinmux_rw_pc_gio___pc2___width 1
-#define reg_pinmux_rw_pc_gio___pc2___bit 2
-#define reg_pinmux_rw_pc_gio___pc3___lsb 3
-#define reg_pinmux_rw_pc_gio___pc3___width 1
-#define reg_pinmux_rw_pc_gio___pc3___bit 3
-#define reg_pinmux_rw_pc_gio___pc4___lsb 4
-#define reg_pinmux_rw_pc_gio___pc4___width 1
-#define reg_pinmux_rw_pc_gio___pc4___bit 4
-#define reg_pinmux_rw_pc_gio___pc5___lsb 5
-#define reg_pinmux_rw_pc_gio___pc5___width 1
-#define reg_pinmux_rw_pc_gio___pc5___bit 5
-#define reg_pinmux_rw_pc_gio___pc6___lsb 6
-#define reg_pinmux_rw_pc_gio___pc6___width 1
-#define reg_pinmux_rw_pc_gio___pc6___bit 6
-#define reg_pinmux_rw_pc_gio___pc7___lsb 7
-#define reg_pinmux_rw_pc_gio___pc7___width 1
-#define reg_pinmux_rw_pc_gio___pc7___bit 7
-#define reg_pinmux_rw_pc_gio___pc8___lsb 8
-#define reg_pinmux_rw_pc_gio___pc8___width 1
-#define reg_pinmux_rw_pc_gio___pc8___bit 8
-#define reg_pinmux_rw_pc_gio___pc9___lsb 9
-#define reg_pinmux_rw_pc_gio___pc9___width 1
-#define reg_pinmux_rw_pc_gio___pc9___bit 9
-#define reg_pinmux_rw_pc_gio___pc10___lsb 10
-#define reg_pinmux_rw_pc_gio___pc10___width 1
-#define reg_pinmux_rw_pc_gio___pc10___bit 10
-#define reg_pinmux_rw_pc_gio___pc11___lsb 11
-#define reg_pinmux_rw_pc_gio___pc11___width 1
-#define reg_pinmux_rw_pc_gio___pc11___bit 11
-#define reg_pinmux_rw_pc_gio___pc12___lsb 12
-#define reg_pinmux_rw_pc_gio___pc12___width 1
-#define reg_pinmux_rw_pc_gio___pc12___bit 12
-#define reg_pinmux_rw_pc_gio___pc13___lsb 13
-#define reg_pinmux_rw_pc_gio___pc13___width 1
-#define reg_pinmux_rw_pc_gio___pc13___bit 13
-#define reg_pinmux_rw_pc_gio___pc14___lsb 14
-#define reg_pinmux_rw_pc_gio___pc14___width 1
-#define reg_pinmux_rw_pc_gio___pc14___bit 14
-#define reg_pinmux_rw_pc_gio___pc15___lsb 15
-#define reg_pinmux_rw_pc_gio___pc15___width 1
-#define reg_pinmux_rw_pc_gio___pc15___bit 15
-#define reg_pinmux_rw_pc_gio___pc16___lsb 16
-#define reg_pinmux_rw_pc_gio___pc16___width 1
-#define reg_pinmux_rw_pc_gio___pc16___bit 16
-#define reg_pinmux_rw_pc_gio___pc17___lsb 17
-#define reg_pinmux_rw_pc_gio___pc17___width 1
-#define reg_pinmux_rw_pc_gio___pc17___bit 17
-#define reg_pinmux_rw_pc_gio_offset 16
-
-/* Register rw_pc_iop, scope pinmux, type rw */
-#define reg_pinmux_rw_pc_iop___pc0___lsb 0
-#define reg_pinmux_rw_pc_iop___pc0___width 1
-#define reg_pinmux_rw_pc_iop___pc0___bit 0
-#define reg_pinmux_rw_pc_iop___pc1___lsb 1
-#define reg_pinmux_rw_pc_iop___pc1___width 1
-#define reg_pinmux_rw_pc_iop___pc1___bit 1
-#define reg_pinmux_rw_pc_iop___pc2___lsb 2
-#define reg_pinmux_rw_pc_iop___pc2___width 1
-#define reg_pinmux_rw_pc_iop___pc2___bit 2
-#define reg_pinmux_rw_pc_iop___pc3___lsb 3
-#define reg_pinmux_rw_pc_iop___pc3___width 1
-#define reg_pinmux_rw_pc_iop___pc3___bit 3
-#define reg_pinmux_rw_pc_iop___pc4___lsb 4
-#define reg_pinmux_rw_pc_iop___pc4___width 1
-#define reg_pinmux_rw_pc_iop___pc4___bit 4
-#define reg_pinmux_rw_pc_iop___pc5___lsb 5
-#define reg_pinmux_rw_pc_iop___pc5___width 1
-#define reg_pinmux_rw_pc_iop___pc5___bit 5
-#define reg_pinmux_rw_pc_iop___pc6___lsb 6
-#define reg_pinmux_rw_pc_iop___pc6___width 1
-#define reg_pinmux_rw_pc_iop___pc6___bit 6
-#define reg_pinmux_rw_pc_iop___pc7___lsb 7
-#define reg_pinmux_rw_pc_iop___pc7___width 1
-#define reg_pinmux_rw_pc_iop___pc7___bit 7
-#define reg_pinmux_rw_pc_iop___pc8___lsb 8
-#define reg_pinmux_rw_pc_iop___pc8___width 1
-#define reg_pinmux_rw_pc_iop___pc8___bit 8
-#define reg_pinmux_rw_pc_iop___pc9___lsb 9
-#define reg_pinmux_rw_pc_iop___pc9___width 1
-#define reg_pinmux_rw_pc_iop___pc9___bit 9
-#define reg_pinmux_rw_pc_iop___pc10___lsb 10
-#define reg_pinmux_rw_pc_iop___pc10___width 1
-#define reg_pinmux_rw_pc_iop___pc10___bit 10
-#define reg_pinmux_rw_pc_iop___pc11___lsb 11
-#define reg_pinmux_rw_pc_iop___pc11___width 1
-#define reg_pinmux_rw_pc_iop___pc11___bit 11
-#define reg_pinmux_rw_pc_iop___pc12___lsb 12
-#define reg_pinmux_rw_pc_iop___pc12___width 1
-#define reg_pinmux_rw_pc_iop___pc12___bit 12
-#define reg_pinmux_rw_pc_iop___pc13___lsb 13
-#define reg_pinmux_rw_pc_iop___pc13___width 1
-#define reg_pinmux_rw_pc_iop___pc13___bit 13
-#define reg_pinmux_rw_pc_iop___pc14___lsb 14
-#define reg_pinmux_rw_pc_iop___pc14___width 1
-#define reg_pinmux_rw_pc_iop___pc14___bit 14
-#define reg_pinmux_rw_pc_iop___pc15___lsb 15
-#define reg_pinmux_rw_pc_iop___pc15___width 1
-#define reg_pinmux_rw_pc_iop___pc15___bit 15
-#define reg_pinmux_rw_pc_iop___pc16___lsb 16
-#define reg_pinmux_rw_pc_iop___pc16___width 1
-#define reg_pinmux_rw_pc_iop___pc16___bit 16
-#define reg_pinmux_rw_pc_iop___pc17___lsb 17
-#define reg_pinmux_rw_pc_iop___pc17___width 1
-#define reg_pinmux_rw_pc_iop___pc17___bit 17
-#define reg_pinmux_rw_pc_iop_offset 20
-
-/* Register rw_pd_gio, scope pinmux, type rw */
-#define reg_pinmux_rw_pd_gio___pd0___lsb 0
-#define reg_pinmux_rw_pd_gio___pd0___width 1
-#define reg_pinmux_rw_pd_gio___pd0___bit 0
-#define reg_pinmux_rw_pd_gio___pd1___lsb 1
-#define reg_pinmux_rw_pd_gio___pd1___width 1
-#define reg_pinmux_rw_pd_gio___pd1___bit 1
-#define reg_pinmux_rw_pd_gio___pd2___lsb 2
-#define reg_pinmux_rw_pd_gio___pd2___width 1
-#define reg_pinmux_rw_pd_gio___pd2___bit 2
-#define reg_pinmux_rw_pd_gio___pd3___lsb 3
-#define reg_pinmux_rw_pd_gio___pd3___width 1
-#define reg_pinmux_rw_pd_gio___pd3___bit 3
-#define reg_pinmux_rw_pd_gio___pd4___lsb 4
-#define reg_pinmux_rw_pd_gio___pd4___width 1
-#define reg_pinmux_rw_pd_gio___pd4___bit 4
-#define reg_pinmux_rw_pd_gio___pd5___lsb 5
-#define reg_pinmux_rw_pd_gio___pd5___width 1
-#define reg_pinmux_rw_pd_gio___pd5___bit 5
-#define reg_pinmux_rw_pd_gio___pd6___lsb 6
-#define reg_pinmux_rw_pd_gio___pd6___width 1
-#define reg_pinmux_rw_pd_gio___pd6___bit 6
-#define reg_pinmux_rw_pd_gio___pd7___lsb 7
-#define reg_pinmux_rw_pd_gio___pd7___width 1
-#define reg_pinmux_rw_pd_gio___pd7___bit 7
-#define reg_pinmux_rw_pd_gio___pd8___lsb 8
-#define reg_pinmux_rw_pd_gio___pd8___width 1
-#define reg_pinmux_rw_pd_gio___pd8___bit 8
-#define reg_pinmux_rw_pd_gio___pd9___lsb 9
-#define reg_pinmux_rw_pd_gio___pd9___width 1
-#define reg_pinmux_rw_pd_gio___pd9___bit 9
-#define reg_pinmux_rw_pd_gio___pd10___lsb 10
-#define reg_pinmux_rw_pd_gio___pd10___width 1
-#define reg_pinmux_rw_pd_gio___pd10___bit 10
-#define reg_pinmux_rw_pd_gio___pd11___lsb 11
-#define reg_pinmux_rw_pd_gio___pd11___width 1
-#define reg_pinmux_rw_pd_gio___pd11___bit 11
-#define reg_pinmux_rw_pd_gio___pd12___lsb 12
-#define reg_pinmux_rw_pd_gio___pd12___width 1
-#define reg_pinmux_rw_pd_gio___pd12___bit 12
-#define reg_pinmux_rw_pd_gio___pd13___lsb 13
-#define reg_pinmux_rw_pd_gio___pd13___width 1
-#define reg_pinmux_rw_pd_gio___pd13___bit 13
-#define reg_pinmux_rw_pd_gio___pd14___lsb 14
-#define reg_pinmux_rw_pd_gio___pd14___width 1
-#define reg_pinmux_rw_pd_gio___pd14___bit 14
-#define reg_pinmux_rw_pd_gio___pd15___lsb 15
-#define reg_pinmux_rw_pd_gio___pd15___width 1
-#define reg_pinmux_rw_pd_gio___pd15___bit 15
-#define reg_pinmux_rw_pd_gio___pd16___lsb 16
-#define reg_pinmux_rw_pd_gio___pd16___width 1
-#define reg_pinmux_rw_pd_gio___pd16___bit 16
-#define reg_pinmux_rw_pd_gio___pd17___lsb 17
-#define reg_pinmux_rw_pd_gio___pd17___width 1
-#define reg_pinmux_rw_pd_gio___pd17___bit 17
-#define reg_pinmux_rw_pd_gio_offset 24
-
-/* Register rw_pd_iop, scope pinmux, type rw */
-#define reg_pinmux_rw_pd_iop___pd0___lsb 0
-#define reg_pinmux_rw_pd_iop___pd0___width 1
-#define reg_pinmux_rw_pd_iop___pd0___bit 0
-#define reg_pinmux_rw_pd_iop___pd1___lsb 1
-#define reg_pinmux_rw_pd_iop___pd1___width 1
-#define reg_pinmux_rw_pd_iop___pd1___bit 1
-#define reg_pinmux_rw_pd_iop___pd2___lsb 2
-#define reg_pinmux_rw_pd_iop___pd2___width 1
-#define reg_pinmux_rw_pd_iop___pd2___bit 2
-#define reg_pinmux_rw_pd_iop___pd3___lsb 3
-#define reg_pinmux_rw_pd_iop___pd3___width 1
-#define reg_pinmux_rw_pd_iop___pd3___bit 3
-#define reg_pinmux_rw_pd_iop___pd4___lsb 4
-#define reg_pinmux_rw_pd_iop___pd4___width 1
-#define reg_pinmux_rw_pd_iop___pd4___bit 4
-#define reg_pinmux_rw_pd_iop___pd5___lsb 5
-#define reg_pinmux_rw_pd_iop___pd5___width 1
-#define reg_pinmux_rw_pd_iop___pd5___bit 5
-#define reg_pinmux_rw_pd_iop___pd6___lsb 6
-#define reg_pinmux_rw_pd_iop___pd6___width 1
-#define reg_pinmux_rw_pd_iop___pd6___bit 6
-#define reg_pinmux_rw_pd_iop___pd7___lsb 7
-#define reg_pinmux_rw_pd_iop___pd7___width 1
-#define reg_pinmux_rw_pd_iop___pd7___bit 7
-#define reg_pinmux_rw_pd_iop___pd8___lsb 8
-#define reg_pinmux_rw_pd_iop___pd8___width 1
-#define reg_pinmux_rw_pd_iop___pd8___bit 8
-#define reg_pinmux_rw_pd_iop___pd9___lsb 9
-#define reg_pinmux_rw_pd_iop___pd9___width 1
-#define reg_pinmux_rw_pd_iop___pd9___bit 9
-#define reg_pinmux_rw_pd_iop___pd10___lsb 10
-#define reg_pinmux_rw_pd_iop___pd10___width 1
-#define reg_pinmux_rw_pd_iop___pd10___bit 10
-#define reg_pinmux_rw_pd_iop___pd11___lsb 11
-#define reg_pinmux_rw_pd_iop___pd11___width 1
-#define reg_pinmux_rw_pd_iop___pd11___bit 11
-#define reg_pinmux_rw_pd_iop___pd12___lsb 12
-#define reg_pinmux_rw_pd_iop___pd12___width 1
-#define reg_pinmux_rw_pd_iop___pd12___bit 12
-#define reg_pinmux_rw_pd_iop___pd13___lsb 13
-#define reg_pinmux_rw_pd_iop___pd13___width 1
-#define reg_pinmux_rw_pd_iop___pd13___bit 13
-#define reg_pinmux_rw_pd_iop___pd14___lsb 14
-#define reg_pinmux_rw_pd_iop___pd14___width 1
-#define reg_pinmux_rw_pd_iop___pd14___bit 14
-#define reg_pinmux_rw_pd_iop___pd15___lsb 15
-#define reg_pinmux_rw_pd_iop___pd15___width 1
-#define reg_pinmux_rw_pd_iop___pd15___bit 15
-#define reg_pinmux_rw_pd_iop___pd16___lsb 16
-#define reg_pinmux_rw_pd_iop___pd16___width 1
-#define reg_pinmux_rw_pd_iop___pd16___bit 16
-#define reg_pinmux_rw_pd_iop___pd17___lsb 17
-#define reg_pinmux_rw_pd_iop___pd17___width 1
-#define reg_pinmux_rw_pd_iop___pd17___bit 17
-#define reg_pinmux_rw_pd_iop_offset 28
-
-/* Register rw_pe_gio, scope pinmux, type rw */
-#define reg_pinmux_rw_pe_gio___pe0___lsb 0
-#define reg_pinmux_rw_pe_gio___pe0___width 1
-#define reg_pinmux_rw_pe_gio___pe0___bit 0
-#define reg_pinmux_rw_pe_gio___pe1___lsb 1
-#define reg_pinmux_rw_pe_gio___pe1___width 1
-#define reg_pinmux_rw_pe_gio___pe1___bit 1
-#define reg_pinmux_rw_pe_gio___pe2___lsb 2
-#define reg_pinmux_rw_pe_gio___pe2___width 1
-#define reg_pinmux_rw_pe_gio___pe2___bit 2
-#define reg_pinmux_rw_pe_gio___pe3___lsb 3
-#define reg_pinmux_rw_pe_gio___pe3___width 1
-#define reg_pinmux_rw_pe_gio___pe3___bit 3
-#define reg_pinmux_rw_pe_gio___pe4___lsb 4
-#define reg_pinmux_rw_pe_gio___pe4___width 1
-#define reg_pinmux_rw_pe_gio___pe4___bit 4
-#define reg_pinmux_rw_pe_gio___pe5___lsb 5
-#define reg_pinmux_rw_pe_gio___pe5___width 1
-#define reg_pinmux_rw_pe_gio___pe5___bit 5
-#define reg_pinmux_rw_pe_gio___pe6___lsb 6
-#define reg_pinmux_rw_pe_gio___pe6___width 1
-#define reg_pinmux_rw_pe_gio___pe6___bit 6
-#define reg_pinmux_rw_pe_gio___pe7___lsb 7
-#define reg_pinmux_rw_pe_gio___pe7___width 1
-#define reg_pinmux_rw_pe_gio___pe7___bit 7
-#define reg_pinmux_rw_pe_gio___pe8___lsb 8
-#define reg_pinmux_rw_pe_gio___pe8___width 1
-#define reg_pinmux_rw_pe_gio___pe8___bit 8
-#define reg_pinmux_rw_pe_gio___pe9___lsb 9
-#define reg_pinmux_rw_pe_gio___pe9___width 1
-#define reg_pinmux_rw_pe_gio___pe9___bit 9
-#define reg_pinmux_rw_pe_gio___pe10___lsb 10
-#define reg_pinmux_rw_pe_gio___pe10___width 1
-#define reg_pinmux_rw_pe_gio___pe10___bit 10
-#define reg_pinmux_rw_pe_gio___pe11___lsb 11
-#define reg_pinmux_rw_pe_gio___pe11___width 1
-#define reg_pinmux_rw_pe_gio___pe11___bit 11
-#define reg_pinmux_rw_pe_gio___pe12___lsb 12
-#define reg_pinmux_rw_pe_gio___pe12___width 1
-#define reg_pinmux_rw_pe_gio___pe12___bit 12
-#define reg_pinmux_rw_pe_gio___pe13___lsb 13
-#define reg_pinmux_rw_pe_gio___pe13___width 1
-#define reg_pinmux_rw_pe_gio___pe13___bit 13
-#define reg_pinmux_rw_pe_gio___pe14___lsb 14
-#define reg_pinmux_rw_pe_gio___pe14___width 1
-#define reg_pinmux_rw_pe_gio___pe14___bit 14
-#define reg_pinmux_rw_pe_gio___pe15___lsb 15
-#define reg_pinmux_rw_pe_gio___pe15___width 1
-#define reg_pinmux_rw_pe_gio___pe15___bit 15
-#define reg_pinmux_rw_pe_gio___pe16___lsb 16
-#define reg_pinmux_rw_pe_gio___pe16___width 1
-#define reg_pinmux_rw_pe_gio___pe16___bit 16
-#define reg_pinmux_rw_pe_gio___pe17___lsb 17
-#define reg_pinmux_rw_pe_gio___pe17___width 1
-#define reg_pinmux_rw_pe_gio___pe17___bit 17
-#define reg_pinmux_rw_pe_gio_offset 32
-
-/* Register rw_pe_iop, scope pinmux, type rw */
-#define reg_pinmux_rw_pe_iop___pe0___lsb 0
-#define reg_pinmux_rw_pe_iop___pe0___width 1
-#define reg_pinmux_rw_pe_iop___pe0___bit 0
-#define reg_pinmux_rw_pe_iop___pe1___lsb 1
-#define reg_pinmux_rw_pe_iop___pe1___width 1
-#define reg_pinmux_rw_pe_iop___pe1___bit 1
-#define reg_pinmux_rw_pe_iop___pe2___lsb 2
-#define reg_pinmux_rw_pe_iop___pe2___width 1
-#define reg_pinmux_rw_pe_iop___pe2___bit 2
-#define reg_pinmux_rw_pe_iop___pe3___lsb 3
-#define reg_pinmux_rw_pe_iop___pe3___width 1
-#define reg_pinmux_rw_pe_iop___pe3___bit 3
-#define reg_pinmux_rw_pe_iop___pe4___lsb 4
-#define reg_pinmux_rw_pe_iop___pe4___width 1
-#define reg_pinmux_rw_pe_iop___pe4___bit 4
-#define reg_pinmux_rw_pe_iop___pe5___lsb 5
-#define reg_pinmux_rw_pe_iop___pe5___width 1
-#define reg_pinmux_rw_pe_iop___pe5___bit 5
-#define reg_pinmux_rw_pe_iop___pe6___lsb 6
-#define reg_pinmux_rw_pe_iop___pe6___width 1
-#define reg_pinmux_rw_pe_iop___pe6___bit 6
-#define reg_pinmux_rw_pe_iop___pe7___lsb 7
-#define reg_pinmux_rw_pe_iop___pe7___width 1
-#define reg_pinmux_rw_pe_iop___pe7___bit 7
-#define reg_pinmux_rw_pe_iop___pe8___lsb 8
-#define reg_pinmux_rw_pe_iop___pe8___width 1
-#define reg_pinmux_rw_pe_iop___pe8___bit 8
-#define reg_pinmux_rw_pe_iop___pe9___lsb 9
-#define reg_pinmux_rw_pe_iop___pe9___width 1
-#define reg_pinmux_rw_pe_iop___pe9___bit 9
-#define reg_pinmux_rw_pe_iop___pe10___lsb 10
-#define reg_pinmux_rw_pe_iop___pe10___width 1
-#define reg_pinmux_rw_pe_iop___pe10___bit 10
-#define reg_pinmux_rw_pe_iop___pe11___lsb 11
-#define reg_pinmux_rw_pe_iop___pe11___width 1
-#define reg_pinmux_rw_pe_iop___pe11___bit 11
-#define reg_pinmux_rw_pe_iop___pe12___lsb 12
-#define reg_pinmux_rw_pe_iop___pe12___width 1
-#define reg_pinmux_rw_pe_iop___pe12___bit 12
-#define reg_pinmux_rw_pe_iop___pe13___lsb 13
-#define reg_pinmux_rw_pe_iop___pe13___width 1
-#define reg_pinmux_rw_pe_iop___pe13___bit 13
-#define reg_pinmux_rw_pe_iop___pe14___lsb 14
-#define reg_pinmux_rw_pe_iop___pe14___width 1
-#define reg_pinmux_rw_pe_iop___pe14___bit 14
-#define reg_pinmux_rw_pe_iop___pe15___lsb 15
-#define reg_pinmux_rw_pe_iop___pe15___width 1
-#define reg_pinmux_rw_pe_iop___pe15___bit 15
-#define reg_pinmux_rw_pe_iop___pe16___lsb 16
-#define reg_pinmux_rw_pe_iop___pe16___width 1
-#define reg_pinmux_rw_pe_iop___pe16___bit 16
-#define reg_pinmux_rw_pe_iop___pe17___lsb 17
-#define reg_pinmux_rw_pe_iop___pe17___width 1
-#define reg_pinmux_rw_pe_iop___pe17___bit 17
-#define reg_pinmux_rw_pe_iop_offset 36
-
-/* Register rw_usb_phy, scope pinmux, type rw */
-#define reg_pinmux_rw_usb_phy___en_usb0___lsb 0
-#define reg_pinmux_rw_usb_phy___en_usb0___width 1
-#define reg_pinmux_rw_usb_phy___en_usb0___bit 0
-#define reg_pinmux_rw_usb_phy___en_usb1___lsb 1
-#define reg_pinmux_rw_usb_phy___en_usb1___width 1
-#define reg_pinmux_rw_usb_phy___en_usb1___bit 1
-#define reg_pinmux_rw_usb_phy_offset 40
-
-
-/* Constants */
-#define regk_pinmux_no                            0x00000000
-#define regk_pinmux_rw_hwprot_default             0x00000000
-#define regk_pinmux_rw_pa_default                 0x00000000
-#define regk_pinmux_rw_pb_gio_default             0x00000000
-#define regk_pinmux_rw_pb_iop_default             0x00000000
-#define regk_pinmux_rw_pc_gio_default             0x00000000
-#define regk_pinmux_rw_pc_iop_default             0x00000000
-#define regk_pinmux_rw_pd_gio_default             0x00000000
-#define regk_pinmux_rw_pd_iop_default             0x00000000
-#define regk_pinmux_rw_pe_gio_default             0x00000000
-#define regk_pinmux_rw_pe_iop_default             0x00000000
-#define regk_pinmux_rw_usb_phy_default            0x00000000
-#define regk_pinmux_yes                           0x00000001
-#endif /* __pinmux_defs_asm_h */

include/asm-cris/arch-v32/hwregs/asm/reg_map_asm.h

···
-#ifndef __reg_map_h
-#define __reg_map_h
-
-/*
- * This file is autogenerated from
- *   file:            ../../mod/fakereg.rmap
- *     id:            fakereg.rmap,v 1.3 2004/02/11 19:53:22 ronny Exp
- *     last modified: Wed Feb 11 20:53:25 2004
- *   file:            ../../rtl/global.rmap
- *     id:            global.rmap,v 1.3 2003/08/18 15:08:23 mikaeln Exp
- *     last modified: Mon Aug 18 17:08:23 2003
- *   file:            ../../mod/modreg.rmap
- *     id:            modreg.rmap,v 1.31 2004/02/20 15:40:04 stefans Exp
- *     last modified: Fri Feb 20 16:40:04 2004
- *
- *   by /n/asic/design/tools/rdesc/src/rdes2c -asm --outfile asm/reg_map_asm.h -base 0xb0000000 ../../rtl/global.rmap ../../mod/modreg.rmap ../../inst/memarb/rtl/guinness/marb_top.r ../../mod/fakereg.rmap
- *      id: $Id: reg_map_asm.h,v 1.1 2005/04/24 18:31:04 starvik Exp $
- * Any changes here will be lost.
- *
- * -*- buffer-read-only: t -*-
- */
-#define regi_artpec_mod                           0xb7044000
-#define regi_ata                                  0xb0032000
-#define regi_ata_mod                              0xb7006000
-#define regi_barber                               0xb701a000
-#define regi_bif_core                             0xb0014000
-#define regi_bif_dma                              0xb0016000
-#define regi_bif_slave                            0xb0018000
-#define regi_bif_slave_ext                        0xac000000
-#define regi_bus_master                           0xb703c000
-#define regi_config                               0xb003c000
-#define regi_dma0                                 0xb0000000
-#define regi_dma1                                 0xb0002000
-#define regi_dma2                                 0xb0004000
-#define regi_dma3                                 0xb0006000
-#define regi_dma4                                 0xb0008000
-#define regi_dma5                                 0xb000a000
-#define regi_dma6                                 0xb000c000
-#define regi_dma7                                 0xb000e000
-#define regi_dma8                                 0xb0010000
-#define regi_dma9                                 0xb0012000
-#define regi_eth0                                 0xb0034000
-#define regi_eth1                                 0xb0036000
-#define regi_eth_mod                              0xb7004000
-#define regi_eth_mod1                             0xb701c000
-#define regi_eth_strmod                           0xb7008000
-#define regi_eth_strmod1                          0xb7032000
-#define regi_ext_dma                              0xb703a000
-#define regi_ext_mem                              0xb7046000
-#define regi_gen_io                               0xb7016000
-#define regi_gio                                  0xb001a000
-#define regi_hook                                 0xb7000000
-#define regi_iop                                  0xb0020000
-#define regi_irq                                  0xb001c000
-#define regi_irq_nmi                              0xb701e000
-#define regi_marb                                 0xb003e000
-#define regi_marb_bp0                             0xb003e240
-#define regi_marb_bp1                             0xb003e280
-#define regi_marb_bp2                             0xb003e2c0
-#define regi_marb_bp3                             0xb003e300
-#define regi_nand_mod                             0xb7014000
-#define regi_p21                                  0xb002e000
-#define regi_p21_mod                              0xb7042000
-#define regi_pci_mod                              0xb7010000
-#define regi_pin_test                             0xb7018000
-#define regi_pinmux                               0xb0038000
-#define regi_sdram_chk                            0xb703e000
-#define regi_sdram_mod                            0xb7012000
-#define regi_ser0                                 0xb0026000
-#define regi_ser1                                 0xb0028000
-#define regi_ser2                                 0xb002a000
-#define regi_ser3                                 0xb002c000
-#define regi_ser_mod0                             0xb7020000
-#define regi_ser_mod1                             0xb7022000
-#define regi_ser_mod2                             0xb7024000
-#define regi_ser_mod3                             0xb7026000
-#define regi_smif_stat                            0xb700e000
-#define regi_sser0                                0xb0022000
-#define regi_sser1                                0xb0024000
-#define regi_sser_mod0                            0xb700a000
-#define regi_sser_mod1                            0xb700c000
-#define regi_strcop                               0xb0030000
-#define regi_strmux                               0xb003a000
-#define regi_strmux_tst                           0xb7040000
-#define regi_tap                                  0xb7002000
-#define regi_timer                                0xb001e000
-#define regi_timer_mod                            0xb7034000
-#define regi_trace                                0xb0040000
-#define regi_usb0                                 0xb7028000
-#define regi_usb1                                 0xb702a000
-#define regi_usb2                                 0xb702c000
-#define regi_usb3                                 0xb702e000
-#define regi_usb_dev                              0xb7030000
-#define regi_utmi_mod0                            0xb7036000
-#define regi_utmi_mod1                            0xb7038000
-#endif /* __reg_map_h */

include/asm-cris/arch-v32/hwregs/gio_defs.h

···
-#ifndef __gio_defs_h
-#define __gio_defs_h
-
-/*
- * This file is autogenerated from
- *   file:           ../../inst/gio/rtl/gio_regs.r
- *     id:           gio_regs.r,v 1.5 2005/02/04 09:43:21 perz Exp
- *     last modfied: Mon Apr 11 16:07:47 2005
- *
- *   by /n/asic/design/tools/rdesc/src/rdes2c --outfile gio_defs.h ../../inst/gio/rtl/gio_regs.r
- *      id: $Id: gio_defs.h,v 1.6 2005/04/24 18:30:58 starvik Exp $
- * Any changes here will be lost.
- *
- * -*- buffer-read-only: t -*-
- */
-/* Main access macros */
-#ifndef REG_RD
-#define REG_RD( scope, inst, reg ) \
-  REG_READ( reg_##scope##_##reg, \
-            (inst) + REG_RD_ADDR_##scope##_##reg )
-#endif
-
-#ifndef REG_WR
-#define REG_WR( scope, inst, reg, val ) \
-  REG_WRITE( reg_##scope##_##reg, \
-             (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
-#endif
-
-#ifndef REG_RD_VECT
-#define REG_RD_VECT( scope, inst, reg, index ) \
-  REG_READ( reg_##scope##_##reg, \
-            (inst) + REG_RD_ADDR_##scope##_##reg + \
-	    (index) * STRIDE_##scope##_##reg )
-#endif
-
-#ifndef REG_WR_VECT
-#define REG_WR_VECT( scope, inst, reg, index, val ) \
-  REG_WRITE( reg_##scope##_##reg, \
-             (inst) + REG_WR_ADDR_##scope##_##reg + \
-	     (index) * STRIDE_##scope##_##reg, (val) )
-#endif
-
-#ifndef REG_RD_INT
-#define REG_RD_INT( scope, inst, reg ) \
-  REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg )
-#endif
-
-#ifndef REG_WR_INT
-#define REG_WR_INT( scope, inst, reg, val ) \
-  REG_WRITE( int, (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
-#endif
-
-#ifndef REG_RD_INT_VECT
-#define REG_RD_INT_VECT( scope, inst, reg, index ) \
-  REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg + \
-	    (index) * STRIDE_##scope##_##reg )
-#endif
-
-#ifndef REG_WR_INT_VECT
-#define REG_WR_INT_VECT( scope, inst, reg, index, val ) \
-  REG_WRITE( int, (inst) + REG_WR_ADDR_##scope##_##reg + \
-	     (index) * STRIDE_##scope##_##reg, (val) )
-#endif
-
-#ifndef REG_TYPE_CONV
-#define REG_TYPE_CONV( type, orgtype, val ) \
-  ( { union { orgtype o; type n; } r; r.o = val; r.n; } )
-#endif
-
-#ifndef reg_page_size
-#define reg_page_size 8192
-#endif
-
-#ifndef REG_ADDR
-#define REG_ADDR( scope, inst, reg ) \
-  ( (inst) + REG_RD_ADDR_##scope##_##reg )
-#endif
-
-#ifndef REG_ADDR_VECT
-#define REG_ADDR_VECT( scope, inst, reg, index ) \
-  ( (inst) + REG_RD_ADDR_##scope##_##reg + \
-    (index) * STRIDE_##scope##_##reg )
-#endif
-
-/* C-code for register scope gio */
-
-/* Register rw_pa_dout, scope gio, type rw */
-typedef struct {
-  unsigned int data : 8;
-  unsigned int dummy1 : 24;
-} reg_gio_rw_pa_dout;
-#define REG_RD_ADDR_gio_rw_pa_dout 0
-#define REG_WR_ADDR_gio_rw_pa_dout 0
-
-/* Register r_pa_din, scope gio, type r */
-typedef struct {
-  unsigned int data : 8;
-  unsigned int dummy1 : 24;
-} reg_gio_r_pa_din;
-#define REG_RD_ADDR_gio_r_pa_din 4
-
-/* Register rw_pa_oe, scope gio, type rw */
-typedef struct {
-  unsigned int oe : 8;
-  unsigned int dummy1 : 24;
-} reg_gio_rw_pa_oe;
-#define REG_RD_ADDR_gio_rw_pa_oe 8
-#define REG_WR_ADDR_gio_rw_pa_oe 8
-
-/* Register rw_intr_cfg, scope gio, type rw */
-typedef struct {
-  unsigned int pa0 : 3;
-  unsigned int pa1 : 3;
-  unsigned int pa2 : 3;
-  unsigned int pa3 : 3;
-  unsigned int pa4 : 3;
-  unsigned int pa5 : 3;
-  unsigned int pa6 : 3;
-  unsigned int pa7 : 3;
-  unsigned int dummy1 : 8;
-} reg_gio_rw_intr_cfg;
-#define REG_RD_ADDR_gio_rw_intr_cfg 12
-#define REG_WR_ADDR_gio_rw_intr_cfg 12
-
-/* Register rw_intr_mask, scope gio, type rw */
-typedef struct {
-  unsigned int pa0 : 1;
-  unsigned int pa1 : 1;
-  unsigned int pa2 : 1;
-  unsigned int pa3 : 1;
-  unsigned int pa4 : 1;
-  unsigned int pa5 : 1;
-  unsigned int pa6 : 1;
-  unsigned int pa7 : 1;
-  unsigned int dummy1 : 24;
-} reg_gio_rw_intr_mask;
-#define REG_RD_ADDR_gio_rw_intr_mask 16
-#define REG_WR_ADDR_gio_rw_intr_mask 16
-
-/* Register rw_ack_intr, scope gio, type rw */
-typedef struct {
-  unsigned int pa0 : 1;
-  unsigned int pa1 : 1;
-  unsigned int pa2 : 1;
-  unsigned int pa3 : 1;
-  unsigned int pa4 : 1;
-  unsigned int pa5 : 1;
-  unsigned int pa6 : 1;
-  unsigned int pa7 : 1;
-  unsigned int dummy1 : 24;
-} reg_gio_rw_ack_intr;
-#define REG_RD_ADDR_gio_rw_ack_intr 20
-#define REG_WR_ADDR_gio_rw_ack_intr 20
-
-/* Register r_intr, scope gio, type r */
-typedef struct {
-  unsigned int pa0 : 1;
-  unsigned int pa1 : 1;
-  unsigned int pa2 : 1;
-  unsigned int pa3 : 1;
-  unsigned int pa4 : 1;
-  unsigned int pa5 : 1;
-  unsigned int pa6 : 1;
-  unsigned int pa7 : 1;
-  unsigned int dummy1 : 24;
-} reg_gio_r_intr;
-#define REG_RD_ADDR_gio_r_intr 24
-
-/* Register r_masked_intr, scope gio, type r */
-typedef struct {
-  unsigned int pa0 : 1;
-  unsigned int pa1 : 1;
-  unsigned int pa2 : 1;
-  unsigned int pa3 : 1;
-  unsigned int pa4 : 1;
-  unsigned int pa5 : 1;
-  unsigned int pa6 : 1;
-  unsigned int pa7 : 1;
-  unsigned int dummy1 : 24;
-} reg_gio_r_masked_intr;
-#define REG_RD_ADDR_gio_r_masked_intr 28
-
-/* Register rw_pb_dout, scope gio, type rw */
-typedef struct {
-  unsigned int data : 18;
-  unsigned int dummy1 : 14;
-} reg_gio_rw_pb_dout;
-#define REG_RD_ADDR_gio_rw_pb_dout 32
-#define REG_WR_ADDR_gio_rw_pb_dout 32
-
-/* Register r_pb_din, scope gio, type r */
-typedef struct {
-  unsigned int data : 18;
-  unsigned int dummy1 : 14;
-} reg_gio_r_pb_din;
-#define REG_RD_ADDR_gio_r_pb_din 36
-
-/* Register rw_pb_oe, scope gio, type rw */
-typedef struct {
-  unsigned int oe : 18;
-  unsigned int dummy1 : 14;
-} reg_gio_rw_pb_oe;
-#define REG_RD_ADDR_gio_rw_pb_oe 40
-#define REG_WR_ADDR_gio_rw_pb_oe 40
-
-/* Register rw_pc_dout, scope gio, type rw */
-typedef struct {
-  unsigned int data : 18;
-  unsigned int dummy1 : 14;
-} reg_gio_rw_pc_dout;
-#define REG_RD_ADDR_gio_rw_pc_dout 48
-#define REG_WR_ADDR_gio_rw_pc_dout 48
-
-/* Register r_pc_din, scope gio, type r */
-typedef struct {
-  unsigned int data : 18;
-  unsigned int dummy1 : 14;
-} reg_gio_r_pc_din;
-#define REG_RD_ADDR_gio_r_pc_din 52
-
-/* Register rw_pc_oe, scope gio, type rw */
-typedef struct {
-  unsigned int oe : 18;
-  unsigned int dummy1 : 14;
-} reg_gio_rw_pc_oe;
-#define REG_RD_ADDR_gio_rw_pc_oe 56
-#define REG_WR_ADDR_gio_rw_pc_oe 56
-
-/* Register rw_pd_dout, scope gio, type rw */
-typedef struct {
-  unsigned int data : 18;
-  unsigned int dummy1 : 14;
-} reg_gio_rw_pd_dout;
-#define REG_RD_ADDR_gio_rw_pd_dout 64
-#define REG_WR_ADDR_gio_rw_pd_dout 64
-
-/* Register r_pd_din, scope gio, type r */
-typedef struct {
-  unsigned int data : 18;
-  unsigned int dummy1 : 14;
-} reg_gio_r_pd_din;
-#define REG_RD_ADDR_gio_r_pd_din 68
-
-/* Register rw_pd_oe, scope gio, type rw */
-typedef struct {
-  unsigned int oe : 18;
-  unsigned int dummy1 : 14;
-} reg_gio_rw_pd_oe;
-#define REG_RD_ADDR_gio_rw_pd_oe 72
-#define REG_WR_ADDR_gio_rw_pd_oe 72
-
-/* Register rw_pe_dout, scope gio, type rw */
-typedef struct {
-  unsigned int data : 18;
-  unsigned int dummy1 : 14;
-} reg_gio_rw_pe_dout;
-#define REG_RD_ADDR_gio_rw_pe_dout 80
-#define REG_WR_ADDR_gio_rw_pe_dout 80
-
-/* Register r_pe_din, scope gio, type r */
-typedef struct {
-  unsigned int data : 18;
-  unsigned int dummy1 : 14;
-} reg_gio_r_pe_din;
-#define REG_RD_ADDR_gio_r_pe_din 84
-
-/* Register rw_pe_oe, scope gio, type rw */
-typedef struct {
-  unsigned int oe : 18;
-  unsigned int dummy1 : 14;
-} reg_gio_rw_pe_oe;
-#define REG_RD_ADDR_gio_rw_pe_oe 88
-#define REG_WR_ADDR_gio_rw_pe_oe 88
-
-
-/* Constants */
-enum {
-  regk_gio_anyedge                         = 0x00000007,
-  regk_gio_hi                              = 0x00000001,
-  regk_gio_lo                              = 0x00000002,
-  regk_gio_negedge                         = 0x00000006,
-  regk_gio_no                              = 0x00000000,
-  regk_gio_off                             = 0x00000000,
-  regk_gio_posedge                         = 0x00000005,
-  regk_gio_rw_intr_cfg_default             = 0x00000000,
-  regk_gio_rw_intr_mask_default            = 0x00000000,
-  regk_gio_rw_pa_oe_default                = 0x00000000,
-  regk_gio_rw_pb_oe_default                = 0x00000000,
-  regk_gio_rw_pc_oe_default                = 0x00000000,
-  regk_gio_rw_pd_oe_default                = 0x00000000,
-  regk_gio_rw_pe_oe_default                = 0x00000000,
-  regk_gio_set                             = 0x00000003,
-  regk_gio_yes                             = 0x00000001
-};
-#endif /* __gio_defs_h */

include/asm-cris/arch-v32/hwregs/intr_vect.h

···
-/* Interrupt vector numbers autogenerated by /n/asic/design/tools/rdesc/src/rdes2intr version
- from ../../inst/intr_vect/rtl/guinness/ivmask.config.r
-version . */
-
-#ifndef _______INST_INTR_VECT_RTL_GUINNESS_IVMASK_CONFIG_R
-#define _______INST_INTR_VECT_RTL_GUINNESS_IVMASK_CONFIG_R
-#define MEMARB_INTR_VECT	0x31
-#define GEN_IO_INTR_VECT	0x32
-#define IOP0_INTR_VECT	0x33
-#define IOP1_INTR_VECT	0x34
-#define IOP2_INTR_VECT	0x35
-#define IOP3_INTR_VECT	0x36
-#define DMA0_INTR_VECT	0x37
-#define DMA1_INTR_VECT	0x38
-#define DMA2_INTR_VECT	0x39
-#define DMA3_INTR_VECT	0x3a
-#define DMA4_INTR_VECT	0x3b
-#define DMA5_INTR_VECT	0x3c
-#define DMA6_INTR_VECT	0x3d
-#define DMA7_INTR_VECT	0x3e
-#define DMA8_INTR_VECT	0x3f
-#define DMA9_INTR_VECT	0x40
-#define ATA_INTR_VECT	0x41
-#define SSER0_INTR_VECT	0x42
-#define SSER1_INTR_VECT	0x43
-#define SER0_INTR_VECT	0x44
-#define SER1_INTR_VECT	0x45
-#define SER2_INTR_VECT	0x46
-#define SER3_INTR_VECT	0x47
-#define P21_INTR_VECT	0x48
-#define ETH0_INTR_VECT	0x49
-#define ETH1_INTR_VECT	0x4a
-#define TIMER_INTR_VECT	0x4b
-#define BIF_ARB_INTR_VECT	0x4c
-#define BIF_DMA_INTR_VECT	0x4d
-#define EXT_INTR_VECT	0x4e
-#define IPI_INTR_VECT	0x4f
-
-#endif

include/asm-cris/arch-v32/hwregs/pinmux_defs.h

···
-#ifndef __pinmux_defs_h
-#define __pinmux_defs_h
-
-/*
- * This file is autogenerated from
- *   file:           ../../inst/pinmux/rtl/guinness/pinmux_regs.r
- *     id:           pinmux_regs.r,v 1.40 2005/02/09 16:22:59 perz Exp
- *     last modfied: Mon Apr 11 16:09:11 2005
- *
- *   by /n/asic/design/tools/rdesc/src/rdes2c --outfile pinmux_defs.h ../../inst/pinmux/rtl/guinness/pinmux_regs.r
- *      id: $Id: pinmux_defs.h,v 1.3 2005/04/24 18:30:58 starvik Exp $
- * Any changes here will be lost.
- *
- * -*- buffer-read-only: t -*-
- */
-/* Main access macros */
-#ifndef REG_RD
-#define REG_RD( scope, inst, reg ) \
-  REG_READ( reg_##scope##_##reg, \
-            (inst) + REG_RD_ADDR_##scope##_##reg )
-#endif
-
-#ifndef REG_WR
-#define REG_WR( scope, inst, reg, val ) \
-  REG_WRITE( reg_##scope##_##reg, \
-             (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
-#endif
-
-#ifndef REG_RD_VECT
-#define REG_RD_VECT( scope, inst, reg, index ) \
-  REG_READ( reg_##scope##_##reg, \
-            (inst) + REG_RD_ADDR_##scope##_##reg + \
-	    (index) * STRIDE_##scope##_##reg )
-#endif
-
-#ifndef REG_WR_VECT
-#define REG_WR_VECT( scope, inst, reg, index, val ) \
-  REG_WRITE( reg_##scope##_##reg, \
-             (inst) + REG_WR_ADDR_##scope##_##reg + \
-	     (index) * STRIDE_##scope##_##reg, (val) )
-#endif
-
-#ifndef REG_RD_INT
-#define REG_RD_INT( scope, inst, reg ) \
-  REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg )
-#endif
-
-#ifndef REG_WR_INT
-#define REG_WR_INT( scope, inst, reg, val ) \
-  REG_WRITE( int, (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
-#endif
-
-#ifndef REG_RD_INT_VECT
-#define REG_RD_INT_VECT( scope, inst, reg, index ) \
-  REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg + \
-	    (index) * STRIDE_##scope##_##reg )
-#endif
-
-#ifndef REG_WR_INT_VECT
-#define REG_WR_INT_VECT( scope, inst, reg, index, val ) \
-  REG_WRITE( int, (inst) + REG_WR_ADDR_##scope##_##reg + \
-	     (index) * STRIDE_##scope##_##reg, (val) )
-#endif
-
-#ifndef REG_TYPE_CONV
-#define REG_TYPE_CONV( type, orgtype, val ) \
-  ( { union { orgtype o; type n; } r; r.o = val; r.n; } )
-#endif
-
-#ifndef reg_page_size
-#define reg_page_size 8192
-#endif
-
-#ifndef REG_ADDR
-#define REG_ADDR( scope, inst, reg ) \
-  ( (inst) + REG_RD_ADDR_##scope##_##reg )
-#endif
-
-#ifndef REG_ADDR_VECT
-#define REG_ADDR_VECT( scope, inst, reg, index ) \
-  ( (inst) + REG_RD_ADDR_##scope##_##reg + \
-    (index) * STRIDE_##scope##_##reg )
-#endif
-
-/* C-code for register scope pinmux */
-
-/* Register rw_pa, scope pinmux, type rw */
-typedef struct {
-  unsigned int pa0    : 1;
-  unsigned int pa1    : 1;
-  unsigned int pa2    : 1;
-  unsigned int pa3    : 1;
-  unsigned int pa4    : 1;
-  unsigned int pa5    : 1;
-  unsigned int pa6    : 1;
-  unsigned int pa7    : 1;
-  unsigned int csp2_n : 1;
-  unsigned int csp3_n : 1;
-  unsigned int csp5_n : 1;
-  unsigned int csp6_n : 1;
-  unsigned int hsh4   : 1;
-  unsigned int hsh5   : 1;
-  unsigned int hsh6   : 1;
-  unsigned int hsh7   : 1;
-  unsigned int dummy1 : 16;
-} reg_pinmux_rw_pa;
-#define REG_RD_ADDR_pinmux_rw_pa 0
-#define REG_WR_ADDR_pinmux_rw_pa 0
-
-/* Register rw_hwprot, scope pinmux, type rw */
-typedef struct {
-  unsigned int ser1     : 1;
-  unsigned int ser2     : 1;
-  unsigned int ser3     : 1;
-  unsigned int sser0    : 1;
-  unsigned int sser1    : 1;
-  unsigned int ata0     : 1;
-  unsigned int ata1     : 1;
-  unsigned int ata2     : 1;
-  unsigned int ata3     : 1;
-  unsigned int ata      : 1;
-  unsigned int eth1     : 1;
-  unsigned int eth1_mgm : 1;
-  unsigned int timer    : 1;
-  unsigned int p21      : 1;
-  unsigned int dummy1   : 18;
-} reg_pinmux_rw_hwprot;
-#define REG_RD_ADDR_pinmux_rw_hwprot 4
-#define REG_WR_ADDR_pinmux_rw_hwprot 4
-
-/* Register rw_pb_gio, scope pinmux, type rw */
-typedef struct {
-  unsigned int pb0  : 1;
-  unsigned int pb1  : 1;
-  unsigned int pb2  : 1;
-  unsigned int pb3  : 1;
-  unsigned int pb4  : 1;
-  unsigned int pb5  : 1;
-  unsigned int pb6  : 1;
-  unsigned int pb7  : 1;
-  unsigned int pb8  : 1;
-  unsigned int pb9  : 1;
-  unsigned int pb10 : 1;
-  unsigned int pb11 : 1;
-  unsigned int pb12 : 1;
-  unsigned int pb13 : 1;
-  unsigned int pb14 : 1;
-  unsigned int pb15 : 1;
-  unsigned int pb16 : 1;
-  unsigned int pb17 : 1;
-  unsigned int dummy1 : 14;
-} reg_pinmux_rw_pb_gio;
-#define REG_RD_ADDR_pinmux_rw_pb_gio 8
-#define REG_WR_ADDR_pinmux_rw_pb_gio 8
-
-/* Register rw_pb_iop, scope pinmux, type rw */
-typedef struct {
-  unsigned int pb0  : 1;
-  unsigned int pb1  : 1;
-  unsigned int pb2  : 1;
-  unsigned int pb3  : 1;
-  unsigned int pb4  : 1;
-  unsigned int pb5  : 1;
-  unsigned int pb6  : 1;
-  unsigned int pb7  : 1;
-  unsigned int pb8  : 1;
-  unsigned int pb9  : 1;
-  unsigned int pb10 : 1;
-  unsigned int pb11 : 1;
-  unsigned int pb12 : 1;
-  unsigned int pb13 : 1;
-  unsigned int pb14 : 1;
-  unsigned int pb15 : 1;
-  unsigned int pb16 : 1;
-  unsigned int pb17 : 1;
-  unsigned int dummy1 : 14;
-} reg_pinmux_rw_pb_iop;
-#define REG_RD_ADDR_pinmux_rw_pb_iop 12
-#define REG_WR_ADDR_pinmux_rw_pb_iop 12
-
-/* Register rw_pc_gio, scope pinmux, type rw */
-typedef struct {
-  unsigned int pc0  : 1;
-  unsigned int pc1  : 1;
-  unsigned int pc2  : 1;
-  unsigned int pc3  : 1;
-  unsigned int pc4  : 1;
-  unsigned int pc5  : 1;
-  unsigned int pc6  : 1;
-  unsigned int pc7  : 1;
-  unsigned int pc8  : 1;
-  unsigned int pc9  : 1;
-  unsigned int pc10 : 1;
-  unsigned int pc11 : 1;
-  unsigned int pc12 : 1;
-  unsigned int pc13 : 1;
-  unsigned int pc14 : 1;
-  unsigned int pc15 : 1;
-  unsigned int pc16 : 1;
-  unsigned int pc17 : 1;
-  unsigned int dummy1 : 14;
-} reg_pinmux_rw_pc_gio;
-#define REG_RD_ADDR_pinmux_rw_pc_gio 16
-#define REG_WR_ADDR_pinmux_rw_pc_gio 16
-
-/* Register rw_pc_iop, scope pinmux, type rw */
-typedef struct {
-  unsigned int pc0  : 1;
-  unsigned int pc1  : 1;
-  unsigned int pc2  : 1;
-  unsigned int pc3  : 1;
-  unsigned int pc4  : 1;
-  unsigned int pc5  : 1;
-  unsigned int pc6  : 1;
-  unsigned int pc7  : 1;
-  unsigned int pc8  : 1;
-  unsigned int pc9  : 1;
-  unsigned int pc10 : 1;
-  unsigned int pc11 : 1;
-  unsigned int pc12 : 1;
-  unsigned int pc13 : 1;
-  unsigned int pc14 : 1;
-  unsigned int pc15 : 1;
-  unsigned int pc16 : 1;
-  unsigned int pc17 : 1;
-  unsigned int dummy1 : 14;
-} reg_pinmux_rw_pc_iop;
-#define REG_RD_ADDR_pinmux_rw_pc_iop 20
-#define REG_WR_ADDR_pinmux_rw_pc_iop 20
-
-/* Register rw_pd_gio, scope pinmux, type rw */
-typedef struct {
-  unsigned int pd0  : 1;
-  unsigned int pd1  : 1;
-  unsigned int pd2  : 1;
-  unsigned int pd3  : 1;
-  unsigned int pd4  : 1;
-  unsigned int pd5  : 1;
-  unsigned int pd6  : 1;
-  unsigned int pd7  : 1;
-  unsigned int pd8  : 1;
-  unsigned int pd9  : 1;
-  unsigned int pd10 : 1;
-  unsigned int pd11 : 1;
-  unsigned int pd12 : 1;
-  unsigned int pd13 : 1;
-  unsigned int pd14 : 1;
-  unsigned int pd15 : 1;
-  unsigned int pd16 : 1;
-  unsigned int pd17 : 1;
-  unsigned int dummy1 : 14;
-} reg_pinmux_rw_pd_gio;
-#define REG_RD_ADDR_pinmux_rw_pd_gio 24
-#define REG_WR_ADDR_pinmux_rw_pd_gio 24
-
-/* Register rw_pd_iop, scope pinmux, type rw */
-typedef struct {
-  unsigned int pd0  : 1;
-  unsigned int pd1  : 1;
-  unsigned int pd2  : 1;
-  unsigned int pd3  : 1;
-  unsigned int pd4  : 1;
-  unsigned int pd5  : 1;
-  unsigned int pd6  : 1;
-  unsigned int pd7  : 1;
-  unsigned int pd8  : 1;
-  unsigned int pd9  : 1;
-  unsigned int pd10 : 1;
-  unsigned int pd11 : 1;
-  unsigned int pd12 : 1;
-  unsigned int pd13 : 1;
-  unsigned int pd14 : 1;
-  unsigned int pd15 : 1;
-  unsigned int pd16 : 1;
-  unsigned int pd17 : 1;
-  unsigned int dummy1 : 14;
-} reg_pinmux_rw_pd_iop;
-#define REG_RD_ADDR_pinmux_rw_pd_iop 28
-#define REG_WR_ADDR_pinmux_rw_pd_iop 28
-
-/* Register rw_pe_gio, scope pinmux, type rw */
-typedef struct {
-  unsigned int pe0  : 1;
-  unsigned int pe1  : 1;
-  unsigned int pe2  : 1;
-  unsigned int pe3  : 1;
-  unsigned int pe4  : 1;
-  unsigned int pe5  : 1;
-  unsigned int pe6  : 1;
-  unsigned int pe7  : 1;
-  unsigned int pe8  : 1;
-  unsigned int pe9  : 1;
-  unsigned int pe10 : 1;
-  unsigned int pe11 : 1;
-  unsigned int pe12 : 1;
-  unsigned int pe13 : 1;
-  unsigned int pe14 : 1;
-  unsigned int pe15 : 1;
-  unsigned int pe16 : 1;
-  unsigned int pe17 : 1;
-  unsigned int dummy1 : 14;
-} reg_pinmux_rw_pe_gio;
-#define REG_RD_ADDR_pinmux_rw_pe_gio 32
-#define REG_WR_ADDR_pinmux_rw_pe_gio 32
-
-/* Register rw_pe_iop, scope pinmux, type rw */
-typedef struct {
-  unsigned int pe0  : 1;
-  unsigned int pe1  : 1;
-  unsigned int pe2  : 1;
-  unsigned int pe3  : 1;
-  unsigned int pe4  : 1;
-  unsigned int pe5  : 1;
-  unsigned int pe6  : 1;
-  unsigned int pe7  : 1;
-  unsigned int pe8  : 1;
-  unsigned int pe9  : 1;
-  unsigned int pe10 : 1;
-  unsigned int pe11 : 1;
-  unsigned int pe12 : 1;
-  unsigned int pe13 : 1;
-  unsigned int pe14 : 1;
-  unsigned int pe15 : 1;
-  unsigned int pe16 : 1;
-  unsigned int pe17 : 1;
-  unsigned int dummy1 : 14;
-} reg_pinmux_rw_pe_iop;
-#define REG_RD_ADDR_pinmux_rw_pe_iop 36
-#define REG_WR_ADDR_pinmux_rw_pe_iop 36
-
-/* Register rw_usb_phy, scope pinmux, type rw */
-typedef struct {
-  unsigned int en_usb0 : 1;
-  unsigned int en_usb1 : 1;
-  unsigned int dummy1  : 30;
-} reg_pinmux_rw_usb_phy;
-#define REG_RD_ADDR_pinmux_rw_usb_phy 40
-#define REG_WR_ADDR_pinmux_rw_usb_phy 40
-
-
-/* Constants */
-enum {
-  regk_pinmux_no                           = 0x00000000,
-  regk_pinmux_rw_hwprot_default            = 0x00000000,
-  regk_pinmux_rw_pa_default                = 0x00000000,
-  regk_pinmux_rw_pb_gio_default            = 0x00000000,
-  regk_pinmux_rw_pb_iop_default            = 0x00000000,
-  regk_pinmux_rw_pc_gio_default            = 0x00000000,
-  regk_pinmux_rw_pc_iop_default            = 0x00000000,
-  regk_pinmux_rw_pd_gio_default            = 0x00000000,
-  regk_pinmux_rw_pd_iop_default            = 0x00000000,
-  regk_pinmux_rw_pe_gio_default            = 0x00000000,
-  regk_pinmux_rw_pe_iop_default            = 0x00000000,
-  regk_pinmux_rw_usb_phy_default           = 0x00000000,
-  regk_pinmux_yes                          = 0x00000001
-};
-#endif /* __pinmux_defs_h */

include/asm-cris/arch-v32/hwregs/strmux_defs.h

···
-#ifndef __strmux_defs_h
-#define __strmux_defs_h
-
-/*
- * This file is autogenerated from
- *   file:           ../../inst/strmux/rtl/guinness/strmux_regs.r
- *     id:           strmux_regs.r,v 1.10 2005/02/10 10:10:46 perz Exp
- *     last modfied: Mon Apr 11 16:09:43 2005
- *
- *   by /n/asic/design/tools/rdesc/src/rdes2c --outfile strmux_defs.h ../../inst/strmux/rtl/guinness/strmux_regs.r
- *      id: $Id: strmux_defs.h,v 1.5 2005/04/24 18:30:58 starvik Exp $
- * Any changes here will be lost.
- *
- * -*- buffer-read-only: t -*-
- */
-/* Main access macros */
-#ifndef REG_RD
-#define REG_RD( scope, inst, reg ) \
-  REG_READ( reg_##scope##_##reg, \
-            (inst) + REG_RD_ADDR_##scope##_##reg )
-#endif
-
-#ifndef REG_WR
-#define REG_WR( scope, inst, reg, val ) \
-  REG_WRITE( reg_##scope##_##reg, \
-             (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
-#endif
-
-#ifndef REG_RD_VECT
-#define REG_RD_VECT( scope, inst, reg, index ) \
-  REG_READ( reg_##scope##_##reg, \
-            (inst) + REG_RD_ADDR_##scope##_##reg + \
-	    (index) * STRIDE_##scope##_##reg )
-#endif
-
-#ifndef REG_WR_VECT
-#define REG_WR_VECT( scope, inst, reg, index, val ) \
-  REG_WRITE( reg_##scope##_##reg, \
-             (inst) + REG_WR_ADDR_##scope##_##reg + \
-	     (index) * STRIDE_##scope##_##reg, (val) )
-#endif
-
-#ifndef REG_RD_INT
-#define REG_RD_INT( scope, inst, reg ) \
-  REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg )
-#endif
-
-#ifndef REG_WR_INT
-#define REG_WR_INT( scope, inst, reg, val ) \
-  REG_WRITE( int, (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
-#endif
-
-#ifndef REG_RD_INT_VECT
-#define REG_RD_INT_VECT( scope, inst, reg, index ) \
-  REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg + \
-	    (index) * STRIDE_##scope##_##reg )
-#endif
-
-#ifndef REG_WR_INT_VECT
-#define REG_WR_INT_VECT( scope, inst, reg, index, val ) \
-  REG_WRITE( int, (inst) + REG_WR_ADDR_##scope##_##reg + \
-	     (index) * STRIDE_##scope##_##reg, (val) )
-#endif
-
-#ifndef REG_TYPE_CONV
-#define REG_TYPE_CONV( type, orgtype, val ) \
-  ( { union { orgtype o; type n; } r; r.o = val; r.n; } )
-#endif
-
-#ifndef reg_page_size
-#define reg_page_size 8192
-#endif
-
-#ifndef REG_ADDR
-#define REG_ADDR( scope, inst, reg ) \
-  ( (inst) + REG_RD_ADDR_##scope##_##reg )
-#endif
-
-#ifndef REG_ADDR_VECT
-#define REG_ADDR_VECT( scope, inst, reg, index ) \
-  ( (inst) + REG_RD_ADDR_##scope##_##reg + \
-    (index) * STRIDE_##scope##_##reg )
-#endif
-
-/* C-code for register scope strmux */
-
-/* Register rw_cfg, scope strmux, type rw */
-typedef struct {
-  unsigned int dma0 : 3;
-  unsigned int dma1 : 3;
-  unsigned int dma2 : 3;
-  unsigned int dma3 : 3;
-  unsigned int dma4 : 3;
-  unsigned int dma5 : 3;
-  unsigned int dma6 : 3;
-  unsigned int dma7 : 3;
-  unsigned int dma8 : 3;
-  unsigned int dma9 : 3;
-  unsigned int dummy1 : 2;
-} reg_strmux_rw_cfg;
-#define REG_RD_ADDR_strmux_rw_cfg 0
-#define REG_WR_ADDR_strmux_rw_cfg 0
-
-
-/* Constants */
-enum {
-  regk_strmux_ata                          = 0x00000003,
-  regk_strmux_eth0                         = 0x00000001,
-  regk_strmux_eth1                         = 0x00000004,
-  regk_strmux_ext0                         = 0x00000001,
-  regk_strmux_ext1                         = 0x00000001,
-  regk_strmux_ext2                         = 0x00000001,
-  regk_strmux_ext3                         = 0x00000001,
-  regk_strmux_iop0                         = 0x00000002,
-  regk_strmux_iop1                         = 0x00000001,
-  regk_strmux_off                          = 0x00000000,
-  regk_strmux_p21                          = 0x00000004,
-  regk_strmux_rw_cfg_default               = 0x00000000,
-  regk_strmux_ser0                         = 0x00000002,
-  regk_strmux_ser1                         = 0x00000002,
-  regk_strmux_ser2                         = 0x00000004,
-  regk_strmux_ser3                         = 0x00000003,
-  regk_strmux_sser0                        = 0x00000003,
-  regk_strmux_sser1                        = 0x00000003,
-  regk_strmux_strcop                       = 0x00000002
-};
-#endif /* __strmux_defs_h */

include/asm-cris/arch-v32/io.h

···
-#ifndef _ASM_ARCH_CRIS_IO_H
-#define _ASM_ARCH_CRIS_IO_H
-
-#include <linux/spinlock.h>
-#include <hwregs/reg_map.h>
-#include <hwregs/reg_rdwr.h>
-#include <hwregs/gio_defs.h>
-
-enum crisv32_io_dir
-{
-  crisv32_io_dir_in = 0,
-  crisv32_io_dir_out = 1
-};
-
-struct crisv32_ioport
-{
-  volatile unsigned long *oe;
-  volatile unsigned long *data;
-  volatile unsigned long *data_in;
-  unsigned int pin_count;
-  spinlock_t lock;
-};
-
-struct crisv32_iopin
-{
-  struct crisv32_ioport* port;
-  int bit;
-};
-
-extern struct crisv32_ioport crisv32_ioports[];
-
-extern struct crisv32_iopin crisv32_led1_green;
-extern struct crisv32_iopin crisv32_led1_red;
-extern struct crisv32_iopin crisv32_led2_green;
-extern struct crisv32_iopin crisv32_led2_red;
-extern struct crisv32_iopin crisv32_led3_green;
-extern struct crisv32_iopin crisv32_led3_red;
-
-extern struct crisv32_iopin crisv32_led_net0_green;
-extern struct crisv32_iopin crisv32_led_net0_red;
-extern struct crisv32_iopin crisv32_led_net1_green;
-extern struct crisv32_iopin crisv32_led_net1_red;
-
-static inline void crisv32_io_set(struct crisv32_iopin *iopin, int val)
-{
-	long flags;
-	spin_lock_irqsave(&iopin->port->lock, flags);
-
-	if (val)
-		*iopin->port->data |= iopin->bit;
-	else
-		*iopin->port->data &= ~iopin->bit;
-
-	spin_unlock_irqrestore(&iopin->port->lock, flags);
-}
-
-static inline void crisv32_io_set_dir(struct crisv32_iopin* iopin,
-			       enum crisv32_io_dir dir)
-{
-	long flags;
-	spin_lock_irqsave(&iopin->port->lock, flags);
-
-	if (dir == crisv32_io_dir_in)
-		*iopin->port->oe &= ~iopin->bit;
-	else
-		*iopin->port->oe |= iopin->bit;
-
-	spin_unlock_irqrestore(&iopin->port->lock, flags);
-}
-
-static inline int crisv32_io_rd(struct crisv32_iopin* iopin)
-{
-	return ((*iopin->port->data_in & iopin->bit) ? 1 : 0);
-}
-
-int crisv32_io_get(struct crisv32_iopin* iopin,
-                   unsigned int port, unsigned int pin);
-int crisv32_io_get_name(struct crisv32_iopin* iopin,
-			const char *name);
-
-#define CRIS_LED_OFF    0x00
-#define CRIS_LED_GREEN  0x01
-#define CRIS_LED_RED    0x02
-#define CRIS_LED_ORANGE (CRIS_LED_GREEN | CRIS_LED_RED)
-
-#if (defined(CONFIG_ETRAX_NBR_LED_GRP_ONE) || defined(CONFIG_ETRAX_NBR_LED_GRP_TWO))
-#define CRIS_LED_NETWORK_GRP0_SET(x)                          \
-	do {                                             \
-		CRIS_LED_NETWORK_GRP0_SET_G((x) & CRIS_LED_GREEN); \
-		CRIS_LED_NETWORK_GRP0_SET_R((x) & CRIS_LED_RED);   \
-	} while (0)
-#else
-#define CRIS_LED_NETWORK_GRP0_SET(x) while (0) {}
-#endif
-
-#define CRIS_LED_NETWORK_GRP0_SET_G(x) \
-	crisv32_io_set(&crisv32_led_net0_green, !(x));
-
-#define CRIS_LED_NETWORK_GRP0_SET_R(x) \
-	crisv32_io_set(&crisv32_led_net0_red, !(x));
-
-#if defined(CONFIG_ETRAX_NBR_LED_GRP_TWO)
-#define CRIS_LED_NETWORK_GRP1_SET(x)                          \
-	do {                                             \
-		CRIS_LED_NETWORK_GRP1_SET_G((x) & CRIS_LED_GREEN); \
-		CRIS_LED_NETWORK_GRP1_SET_R((x) & CRIS_LED_RED);   \
-	} while (0)
-#else
-#define CRIS_LED_NETWORK_GRP1_SET(x) while (0) {}
-#endif
-
-#define CRIS_LED_NETWORK_GRP1_SET_G(x) \
-	crisv32_io_set(&crisv32_led_net1_green, !(x));
-
-#define CRIS_LED_NETWORK_GRP1_SET_R(x) \
-	crisv32_io_set(&crisv32_led_net1_red, !(x));
-
-#define CRIS_LED_ACTIVE_SET(x)                           \
-	do {                                        \
-		CRIS_LED_ACTIVE_SET_G((x) & CRIS_LED_GREEN);  \
-		CRIS_LED_ACTIVE_SET_R((x) & CRIS_LED_RED);    \
-	} while (0)
-
-#define CRIS_LED_ACTIVE_SET_G(x) \
-	crisv32_io_set(&crisv32_led2_green, !(x));
-#define CRIS_LED_ACTIVE_SET_R(x) \
-	crisv32_io_set(&crisv32_led2_red, !(x));
-#define CRIS_LED_DISK_WRITE(x) \
-         do{\
-		crisv32_io_set(&crisv32_led3_green, !(x)); \
-		crisv32_io_set(&crisv32_led3_red, !(x));   \
-        }while(0)
-#define CRIS_LED_DISK_READ(x) \
-	crisv32_io_set(&crisv32_led3_green, !(x));
-
-#endif

include/asm-cris/arch-v32/pinmux.h

···
-#ifndef _ASM_CRIS_ARCH_PINMUX_H
-#define _ASM_CRIS_ARCH_PINMUX_H
-
-#define PORT_B 0
-#define PORT_C 1
-#define PORT_D 2
-#define PORT_E 3
-
-enum pin_mode
-{
-  pinmux_none = 0,
-  pinmux_fixed,
-  pinmux_gpio,
-  pinmux_iop
-};
-
-enum fixed_function
-{
-  pinmux_ser1,
-  pinmux_ser2,
-  pinmux_ser3,
-  pinmux_sser0,
-  pinmux_sser1,
-  pinmux_ata0,
-  pinmux_ata1,
-  pinmux_ata2,
-  pinmux_ata3,
-  pinmux_ata,
-  pinmux_eth1,
-  pinmux_timer
-};
-
-int crisv32_pinmux_init(void);
-int crisv32_pinmux_alloc(int port, int first_pin, int last_pin, enum pin_mode);
-int crisv32_pinmux_alloc_fixed(enum fixed_function function);
-int crisv32_pinmux_dealloc(int port, int first_pin, int last_pin);
-int crisv32_pinmux_dealloc_fixed(enum fixed_function function);
-void crisv32_pinmux_dump(void);
-
-#endif

include/asm-cris/atomic.h

···
-/* $Id: atomic.h,v 1.3 2001/07/25 16:15:19 bjornw Exp $ */
-
-#ifndef __ASM_CRIS_ATOMIC__
-#define __ASM_CRIS_ATOMIC__
-
-#include <linux/compiler.h>
-
-#include <asm/system.h>
-#include <asm/arch/atomic.h>
-
-/*
- * Atomic operations that C can't guarantee us.  Useful for
- * resource counting etc..
- */
-
-typedef struct { volatile int counter; } atomic_t;
-
-#define ATOMIC_INIT(i)  { (i) }
-
-#define atomic_read(v) ((v)->counter)
-#define atomic_set(v,i) (((v)->counter) = (i))
-
-/* These should be written in asm but we do it in C for now. */
-
-static inline void atomic_add(int i, volatile atomic_t *v)
-{
-	unsigned long flags;
-	cris_atomic_save(v, flags);
-	v->counter += i;
-	cris_atomic_restore(v, flags);
-}
-
-static inline void atomic_sub(int i, volatile atomic_t *v)
-{
-	unsigned long flags;
-	cris_atomic_save(v, flags);
-	v->counter -= i;
-	cris_atomic_restore(v, flags);
-}
-
-static inline int atomic_add_return(int i, volatile atomic_t *v)
-{
-	unsigned long flags;
-	int retval;
-	cris_atomic_save(v, flags);
-	retval = (v->counter += i);
-	cris_atomic_restore(v, flags);
-	return retval;
-}
-
-#define atomic_add_negative(a, v)	(atomic_add_return((a), (v)) < 0)
-
-static inline int atomic_sub_return(int i, volatile atomic_t *v)
-{
-	unsigned long flags;
-	int retval;
-	cris_atomic_save(v, flags);
-	retval = (v->counter -= i);
-	cris_atomic_restore(v, flags);
-	return retval;
-}
-
-static inline int atomic_sub_and_test(int i, volatile atomic_t *v)
-{
-	int retval;
-	unsigned long flags;
-	cris_atomic_save(v, flags);
-	retval = (v->counter -= i) == 0;
-	cris_atomic_restore(v, flags);
-	return retval;
-}
-
-static inline void atomic_inc(volatile atomic_t *v)
-{
-	unsigned long flags;
-	cris_atomic_save(v, flags);
-	(v->counter)++;
-	cris_atomic_restore(v, flags);
-}
-
-static inline void atomic_dec(volatile atomic_t *v)
-{
-	unsigned long flags;
-	cris_atomic_save(v, flags);
-	(v->counter)--;
-	cris_atomic_restore(v, flags);
-}
-
-static inline int atomic_inc_return(volatile atomic_t *v)
-{
-	unsigned long flags;
-	int retval;
-	cris_atomic_save(v, flags);
-	retval = ++(v->counter);
-	cris_atomic_restore(v, flags);
-	return retval;
-}
-
-static inline int atomic_dec_return(volatile atomic_t *v)
-{
-	unsigned long flags;
-	int retval;
-	cris_atomic_save(v, flags);
-	retval = --(v->counter);
-	cris_atomic_restore(v, flags);
-	return retval;
-}
-static inline int atomic_dec_and_test(volatile atomic_t *v)
-{
-	int retval;
-	unsigned long flags;
-	cris_atomic_save(v, flags);
-	retval = --(v->counter) == 0;
-	cris_atomic_restore(v, flags);
-	return retval;
-}
-
-static inline int atomic_inc_and_test(volatile atomic_t *v)
-{
-	int retval;
-	unsigned long flags;
-	cris_atomic_save(v, flags);
-	retval = ++(v->counter) == 0;
-	cris_atomic_restore(v, flags);
-	return retval;
-}
-
-static inline int atomic_cmpxchg(atomic_t *v, int old, int new)
-{
-	int ret;
-	unsigned long flags;
-
-	cris_atomic_save(v, flags);
-	ret = v->counter;
-	if (likely(ret == old))
-		v->counter = new;
-	cris_atomic_restore(v, flags);
-	return ret;
-}
-
-#define atomic_xchg(v, new) (xchg(&((v)->counter), new))
-
-static inline int atomic_add_unless(atomic_t *v, int a, int u)
-{
-	int ret;
-	unsigned long flags;
-
-	cris_atomic_save(v, flags);
-	ret = v->counter;
-	if (ret != u)
-		v->counter += a;
-	cris_atomic_restore(v, flags);
-	return ret != u;
-}
-#define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0)
-
-/* Atomic operations are already serializing */
-#define smp_mb__before_atomic_dec()    barrier()
-#define smp_mb__after_atomic_dec()     barrier()
-#define smp_mb__before_atomic_inc()    barrier()
-#define smp_mb__after_atomic_inc()     barrier()
-
-#include <asm-generic/atomic.h>
-#endif

include/asm-cris/bitops.h

···
-/* asm/bitops.h for Linux/CRIS
- *
- * TODO: asm versions if speed is needed
- *
- * All bit operations return 0 if the bit was cleared before the
- * operation and != 0 if it was not.
- *
- * bit 0 is the LSB of addr; bit 32 is the LSB of (addr+1).
- */
-
-#ifndef _CRIS_BITOPS_H
-#define _CRIS_BITOPS_H
-
-/* Currently this is unsuitable for consumption outside the kernel.  */
-#ifdef __KERNEL__ 
-
-#ifndef _LINUX_BITOPS_H
-#error only <linux/bitops.h> can be included directly
-#endif
-
-#include <asm/arch/bitops.h>
-#include <asm/system.h>
-#include <asm/atomic.h>
-#include <linux/compiler.h>
-
-/*
- * set_bit - Atomically set a bit in memory
- * @nr: the bit to set
- * @addr: the address to start counting from
- *
- * This function is atomic and may not be reordered.  See __set_bit()
- * if you do not require the atomic guarantees.
- * Note that @nr may be almost arbitrarily large; this function is not
- * restricted to acting on a single-word quantity.
- */
-
-#define set_bit(nr, addr)    (void)test_and_set_bit(nr, addr)
-
-/*
- * clear_bit - Clears a bit in memory
- * @nr: Bit to clear
- * @addr: Address to start counting from
- *
- * clear_bit() is atomic and may not be reordered.  However, it does
- * not contain a memory barrier, so if it is used for locking purposes,
- * you should call smp_mb__before_clear_bit() and/or smp_mb__after_clear_bit()
- * in order to ensure changes are visible on other processors.
- */
-
-#define clear_bit(nr, addr)  (void)test_and_clear_bit(nr, addr)
-
-/*
- * change_bit - Toggle a bit in memory
- * @nr: Bit to change
- * @addr: Address to start counting from
- *
- * change_bit() is atomic and may not be reordered.
- * Note that @nr may be almost arbitrarily large; this function is not
- * restricted to acting on a single-word quantity.
- */
-
-#define change_bit(nr, addr) (void)test_and_change_bit(nr, addr)
-
-/**
- * test_and_set_bit - Set a bit and return its old value
- * @nr: Bit to set
- * @addr: Address to count from
- *
- * This operation is atomic and cannot be reordered.  
- * It also implies a memory barrier.
- */
-
-static inline int test_and_set_bit(int nr, volatile unsigned long *addr)
-{
-	unsigned int mask, retval;
-	unsigned long flags;
-	unsigned int *adr = (unsigned int *)addr;
-	
-	adr += nr >> 5;
-	mask = 1 << (nr & 0x1f);
-	cris_atomic_save(addr, flags);
-	retval = (mask & *adr) != 0;
-	*adr |= mask;
-	cris_atomic_restore(addr, flags);
-	return retval;
-}
-
-/*
- * clear_bit() doesn't provide any barrier for the compiler.
- */
-#define smp_mb__before_clear_bit()      barrier()
-#define smp_mb__after_clear_bit()       barrier()
-
-/**
- * test_and_clear_bit - Clear a bit and return its old value
- * @nr: Bit to clear
- * @addr: Address to count from
- *
- * This operation is atomic and cannot be reordered.  
- * It also implies a memory barrier.
- */
-
-static inline int test_and_clear_bit(int nr, volatile unsigned long *addr)
-{
-	unsigned int mask, retval;
-	unsigned long flags;
-	unsigned int *adr = (unsigned int *)addr;
-	
-	adr += nr >> 5;
-	mask = 1 << (nr & 0x1f);
-	cris_atomic_save(addr, flags);
-	retval = (mask & *adr) != 0;
-	*adr &= ~mask;
-	cris_atomic_restore(addr, flags);
-	return retval;
-}
-
-/**
- * test_and_change_bit - Change a bit and return its old value
- * @nr: Bit to change
- * @addr: Address to count from
- *
- * This operation is atomic and cannot be reordered.  
- * It also implies a memory barrier.
- */
-
-static inline int test_and_change_bit(int nr, volatile unsigned long *addr)
-{
-	unsigned int mask, retval;
-	unsigned long flags;
-	unsigned int *adr = (unsigned int *)addr;
-	adr += nr >> 5;
-	mask = 1 << (nr & 0x1f);
-	cris_atomic_save(addr, flags);
-	retval = (mask & *adr) != 0;
-	*adr ^= mask;
-	cris_atomic_restore(addr, flags);
-	return retval;
-}
-
-#include <asm-generic/bitops/non-atomic.h>
-
-/*
- * Since we define it "external", it collides with the built-in
- * definition, which doesn't have the same semantics.  We don't want to
- * use -fno-builtin, so just hide the name ffs.
- */
-#define ffs kernel_ffs
-
-#include <asm-generic/bitops/fls.h>
-#include <asm-generic/bitops/fls64.h>
-#include <asm-generic/bitops/hweight.h>
-#include <asm-generic/bitops/find.h>
-#include <asm-generic/bitops/lock.h>
-
-#include <asm-generic/bitops/ext2-non-atomic.h>
-
-#define ext2_set_bit_atomic(l,n,a)   test_and_set_bit(n,a)
-#define ext2_clear_bit_atomic(l,n,a) test_and_clear_bit(n,a)
-
-#include <asm-generic/bitops/minix.h>
-#include <asm-generic/bitops/sched.h>
-
-#endif /* __KERNEL__ */
-
-#endif /* _CRIS_BITOPS_H */

include/asm-cris/bug.h

···
-#ifndef _CRIS_BUG_H
-#define _CRIS_BUG_H
-#include <asm/arch/bug.h>
-#endif

include/asm-cris/byteorder.h

···
-#ifndef _CRIS_BYTEORDER_H
-#define _CRIS_BYTEORDER_H
-
-#ifdef __GNUC__
-
-#ifdef __KERNEL__
-#include <asm/arch/byteorder.h>
-
-/* defines are necessary because the other files detect the presence
- * of a defined __arch_swab32, not an inline
- */
-#define __arch__swab32(x) ___arch__swab32(x)
-#define __arch__swab16(x) ___arch__swab16(x)
-#endif /* __KERNEL__ */
-
-#if !defined(__STRICT_ANSI__) || defined(__KERNEL__)
-#  define __BYTEORDER_HAS_U64__
-#  define __SWAB_64_THRU_32__
-#endif
-
-#endif /* __GNUC__ */
-
-#include <linux/byteorder/little_endian.h>
-
-#endif
-
-

include/asm-cris/cache.h

···
-#ifndef _ASM_CACHE_H
-#define _ASM_CACHE_H
-
-#include <asm/arch/cache.h>
-
-#endif /* _ASM_CACHE_H */

include/asm-cris/checksum.h

···
-/* TODO: csum_tcpudp_magic could be speeded up, and csum_fold as well */
-
-#ifndef _CRIS_CHECKSUM_H
-#define _CRIS_CHECKSUM_H
-
-#include <asm/arch/checksum.h>
-
-/*
- * computes the checksum of a memory block at buff, length len,
- * and adds in "sum" (32-bit)
- *
- * returns a 32-bit number suitable for feeding into itself
- * or csum_tcpudp_magic
- *
- * this function must be called with even lengths, except
- * for the last fragment, which may be odd
- *
- * it's best to have buff aligned on a 32-bit boundary
- */
-__wsum csum_partial(const void *buff, int len, __wsum sum);
-
-/*
- * the same as csum_partial, but copies from src while it
- * checksums
- *
- * here even more important to align src and dst on a 32-bit (or even
- * better 64-bit) boundary
- */
-
-__wsum csum_partial_copy_nocheck(const void *src, void *dst,
-				       int len, __wsum sum);
-
-/*
- *	Fold a partial checksum into a word
- */
-
-static inline __sum16 csum_fold(__wsum csum)
-{
-	u32 sum = (__force u32)csum;
-	sum = (sum & 0xffff) + (sum >> 16); /* add in end-around carry */
-	sum = (sum & 0xffff) + (sum >> 16); /* add in end-around carry */
-	return (__force __sum16)~sum;
-}
-
-extern __wsum csum_partial_copy_from_user(const void __user *src, void *dst,
-						int len, __wsum sum,
-						int *errptr);
-
-/*
- *	This is a version of ip_compute_csum() optimized for IP headers,
- *	which always checksum on 4 octet boundaries.
- *
- */
-
-static inline __sum16 ip_fast_csum(const void *iph, unsigned int ihl)
-{
-	return csum_fold(csum_partial(iph, ihl * 4, 0));
-}
- 
-/*
- * computes the checksum of the TCP/UDP pseudo-header
- * returns a 16-bit checksum, already complemented
- */
-
-static inline __sum16 csum_tcpudp_magic(__be32 saddr, __be32 daddr,
-						   unsigned short len,
-						   unsigned short proto,
-						   __wsum sum)
-{
-	return csum_fold(csum_tcpudp_nofold(saddr,daddr,len,proto,sum));
-}
-
-/*
- * this routine is used for miscellaneous IP-like checksums, mainly
- * in icmp.c
- */
-
-static inline __sum16 ip_compute_csum(const void *buff, int len)
-{
-	return csum_fold (csum_partial(buff, len, 0));
-}
-
-#endif

include/asm-cris/delay.h

···
-#ifndef _CRIS_DELAY_H
-#define _CRIS_DELAY_H
-
-/*
- * Copyright (C) 1998-2002 Axis Communications AB
- *
- * Delay routines, using a pre-computed "loops_per_second" value.
- */
-
-#include <asm/arch/delay.h>
-
-/* Use only for very small delays ( < 1 msec).  */
-
-extern unsigned long loops_per_usec; /* arch/cris/mm/init.c */
-
-/* May be defined by arch/delay.h. */
-#ifndef udelay
-static inline void udelay(unsigned long usecs)
-{
-	__delay(usecs * loops_per_usec);
-}
-#endif
-
-#endif /* defined(_CRIS_DELAY_H) */
-
-
-

include/asm-cris/dma.h

···
-/* $Id: dma.h,v 1.2 2001/05/09 12:17:42 johana Exp $ */
-
-#ifndef _ASM_DMA_H
-#define _ASM_DMA_H
-
-#include <asm/arch/dma.h>
-
-/* it's useless on the Etrax, but unfortunately needed by the new
-   bootmem allocator (but this should do it for this) */
-
-#define MAX_DMA_ADDRESS PAGE_OFFSET
-
-/* From PCI */
-
-#ifdef CONFIG_PCI
-extern int isa_dma_bridge_buggy;
-#else
-#define isa_dma_bridge_buggy 	(0)
-#endif
-
-#endif /* _ASM_DMA_H */

include/asm-cris/elf.h

···
-#ifndef __ASMCRIS_ELF_H
-#define __ASMCRIS_ELF_H
-
-/*
- * ELF register definitions..
- */
-
-#include <asm/user.h>
-
-#define R_CRIS_NONE             0
-#define R_CRIS_8                1
-#define R_CRIS_16               2
-#define R_CRIS_32               3
-#define R_CRIS_8_PCREL          4
-#define R_CRIS_16_PCREL         5
-#define R_CRIS_32_PCREL         6
-#define R_CRIS_GNU_VTINHERIT    7
-#define R_CRIS_GNU_VTENTRY      8
-#define R_CRIS_COPY             9
-#define R_CRIS_GLOB_DAT         10
-#define R_CRIS_JUMP_SLOT        11
-#define R_CRIS_RELATIVE         12
-#define R_CRIS_16_GOT           13
-#define R_CRIS_32_GOT           14
-#define R_CRIS_16_GOTPLT        15
-#define R_CRIS_32_GOTPLT        16
-#define R_CRIS_32_GOTREL        17
-#define R_CRIS_32_PLT_GOTREL    18
-#define R_CRIS_32_PLT_PCREL     19
-
-typedef unsigned long elf_greg_t;
-
-/* Note that NGREG is defined to ELF_NGREG in include/linux/elfcore.h, and is
-   thus exposed to user-space. */
-#define ELF_NGREG (sizeof (struct user_regs_struct) / sizeof(elf_greg_t))
-typedef elf_greg_t elf_gregset_t[ELF_NGREG];
-
-/* A placeholder; CRIS does not have any fp regs.  */
-typedef unsigned long elf_fpregset_t;
-
-/*
- * These are used to set parameters in the core dumps.
- */
-#define ELF_CLASS	ELFCLASS32
-#define ELF_DATA	ELFDATA2LSB
-#define ELF_ARCH	EM_CRIS
-
-#include <asm/arch/elf.h>
-
-/* The master for these definitions is {binutils}/include/elf/cris.h:  */
-/* User symbols in this file have a leading underscore.  */
-#define EF_CRIS_UNDERSCORE		0x00000001
-
-/* This is a mask for different incompatible machine variants.  */
-#define EF_CRIS_VARIANT_MASK		0x0000000e
-
-/* Variant 0; may contain v0..10 object.  */
-#define EF_CRIS_VARIANT_ANY_V0_V10	0x00000000
-
-/* Variant 1; contains v32 object.  */
-#define EF_CRIS_VARIANT_V32		0x00000002
-
-/* Variant 2; contains object compatible with v32 and v10.  */
-#define EF_CRIS_VARIANT_COMMON_V10_V32	0x00000004
-/* End of excerpt from {binutils}/include/elf/cris.h.  */
-
-#define USE_ELF_CORE_DUMP
-
-#define ELF_EXEC_PAGESIZE	8192
-
-/* This is the location that an ET_DYN program is loaded if exec'ed.  Typical
-   use of this is to invoke "./ld.so someprog" to test out a new version of
-   the loader.  We need to make sure that it is out of the way of the program
-   that it will "exec", and that there is sufficient room for the brk.  */
-
-#define ELF_ET_DYN_BASE         (2 * TASK_SIZE / 3)
-
-/* This yields a mask that user programs can use to figure out what
-   instruction set this CPU supports.  This could be done in user space,
-   but it's not easy, and we've already done it here.  */
-
-#define ELF_HWCAP       (0)
-
-/* This yields a string that ld.so will use to load implementation
-   specific libraries for optimization.  This is more specific in
-   intent than poking at uname or /proc/cpuinfo.
-*/
-
-#define ELF_PLATFORM  (NULL)
-
-#define SET_PERSONALITY(ex) set_personality(PER_LINUX)
-
-#endif

include/asm-cris/io.h

···
-#ifndef _ASM_CRIS_IO_H
-#define _ASM_CRIS_IO_H
-
-#include <asm/page.h>   /* for __va, __pa */
-#include <asm/arch/io.h>
-#include <linux/kernel.h>
-
-struct cris_io_operations
-{
-	u32 (*read_mem)(void *addr, int size);
-	void (*write_mem)(u32 val, int size, void *addr);
-	u32 (*read_io)(u32 port, void *addr, int size, int count);
-	void (*write_io)(u32 port, void *addr, int size, int count);
-};
-
-#ifdef CONFIG_PCI
-extern struct cris_io_operations *cris_iops;
-#else
-#define cris_iops ((struct cris_io_operations*)NULL)
-#endif
-
-/*
- * Change virtual addresses to physical addresses and vv.
- */
-
-static inline unsigned long virt_to_phys(volatile void * address)
-{
-	return __pa(address);
-}
-
-static inline void * phys_to_virt(unsigned long address)
-{
-	return __va(address);
-}
-
-extern void __iomem * __ioremap(unsigned long offset, unsigned long size, unsigned long flags);
-extern void __iomem * __ioremap_prot(unsigned long phys_addr, unsigned long size, pgprot_t prot);
-
-static inline void __iomem * ioremap (unsigned long offset, unsigned long size)
-{
-	return __ioremap(offset, size, 0);
-}
-
-extern void iounmap(volatile void * __iomem addr);
-
-extern void __iomem * ioremap_nocache(unsigned long offset, unsigned long size);
-
-/*
- * IO bus memory addresses are also 1:1 with the physical address
- */
-#define virt_to_bus virt_to_phys
-#define bus_to_virt phys_to_virt
-
-/*
- * readX/writeX() are used to access memory mapped devices. On some
- * architectures the memory mapped IO stuff needs to be accessed
- * differently. On the CRIS architecture, we just read/write the
- * memory location directly.
- */
-#ifdef CONFIG_PCI
-#define PCI_SPACE(x) ((((unsigned)(x)) & 0x10000000) == 0x10000000)
-#else
-#define PCI_SPACE(x) 0
-#endif
-static inline unsigned char readb(const volatile void __iomem *addr)
-{
-	if (PCI_SPACE(addr) && cris_iops)
-		return cris_iops->read_mem((void*)addr, 1);
-	else
-		return *(volatile unsigned char __force *) addr;
-}
-static inline unsigned short readw(const volatile void __iomem *addr)
-{
-	if (PCI_SPACE(addr) && cris_iops)
-		return cris_iops->read_mem((void*)addr, 2);
-	else
-		return *(volatile unsigned short __force *) addr;
-}
-static inline unsigned int readl(const volatile void __iomem *addr)
-{
-	if (PCI_SPACE(addr) && cris_iops)
-		return cris_iops->read_mem((void*)addr, 4);
-	else
-		return *(volatile unsigned int __force *) addr;
-}
-#define readb_relaxed(addr) readb(addr)
-#define readw_relaxed(addr) readw(addr)
-#define readl_relaxed(addr) readl(addr)
-#define __raw_readb readb
-#define __raw_readw readw
-#define __raw_readl readl
-
-static inline void writeb(unsigned char b, volatile void __iomem *addr)
-{
-	if (PCI_SPACE(addr) && cris_iops)
-		cris_iops->write_mem(b, 1, (void*)addr);
-	else
-		*(volatile unsigned char __force *) addr = b;
-}
-static inline void writew(unsigned short b, volatile void __iomem *addr)
-{
-	if (PCI_SPACE(addr) && cris_iops)
-		cris_iops->write_mem(b, 2, (void*)addr);
-	else
-		*(volatile unsigned short __force *) addr = b;
-}
-static inline void writel(unsigned int b, volatile void __iomem *addr)
-{
-	if (PCI_SPACE(addr) && cris_iops)
-		cris_iops->write_mem(b, 4, (void*)addr);
-	else
-		*(volatile unsigned int __force *) addr = b;
-}
-#define __raw_writeb writeb
-#define __raw_writew writew
-#define __raw_writel writel
-
-#define mmiowb()
-
-#define memset_io(a,b,c)	memset((void *)(a),(b),(c))
-#define memcpy_fromio(a,b,c)	memcpy((a),(void *)(b),(c))
-#define memcpy_toio(a,b,c)	memcpy((void *)(a),(b),(c))
-
-
-/* I/O port access. Normally there is no I/O space on CRIS but when
- * Cardbus/PCI is enabled the request is passed through the bridge.
- */
-
-#define IO_SPACE_LIMIT 0xffff
-#define inb(port) (cris_iops ? cris_iops->read_io(port,NULL,1,1) : 0)
-#define inw(port) (cris_iops ? cris_iops->read_io(port,NULL,2,1) : 0)
-#define inl(port) (cris_iops ? cris_iops->read_io(port,NULL,4,1) : 0)
-#define insb(port,addr,count) (cris_iops ? cris_iops->read_io(port,addr,1,count) : 0)
-#define insw(port,addr,count) (cris_iops ? cris_iops->read_io(port,addr,2,count) : 0)
-#define insl(port,addr,count) (cris_iops ? cris_iops->read_io(port,addr,4,count) : 0)
-#define outb(data,port) if (cris_iops) cris_iops->write_io(port,(void*)(unsigned)data,1,1)
-#define outw(data,port) if (cris_iops) cris_iops->write_io(port,(void*)(unsigned)data,2,1)
-#define outl(data,port) if (cris_iops) cris_iops->write_io(port,(void*)(unsigned)data,4,1)
-#define outsb(port,addr,count) if(cris_iops) cris_iops->write_io(port,(void*)addr,1,count)
-#define outsw(port,addr,count) if(cris_iops) cris_iops->write_io(port,(void*)addr,2,count)
-#define outsl(port,addr,count) if(cris_iops) cris_iops->write_io(port,(void*)addr,3,count)
-
-/*
- * Convert a physical pointer to a virtual kernel pointer for /dev/mem
- * access
- */
-#define xlate_dev_mem_ptr(p)	__va(p)
-
-/*
- * Convert a virtual cached pointer to an uncached pointer
- */
-#define xlate_dev_kmem_ptr(p)	p
-
-#endif

include/asm-cris/irq.h

···
-#ifndef _ASM_IRQ_H
-#define _ASM_IRQ_H
-
-#include <asm/arch/irq.h>
-
-static inline int irq_canonicalize(int irq)
-{  
-  return irq; 
-}
-
-#endif  /* _ASM_IRQ_H */
-
-

include/asm-cris/mmu.h

···
-/*
- * CRIS MMU constants and PTE layout
- */
-
-#ifndef _CRIS_MMU_H
-#define _CRIS_MMU_H
-
-#include <asm/arch/mmu.h>
-
-#endif

include/asm-cris/page.h

···
-#ifndef _CRIS_PAGE_H
-#define _CRIS_PAGE_H
-
-#include <asm/arch/page.h>
-#include <linux/const.h>
-
-/* PAGE_SHIFT determines the page size */
-#define PAGE_SHIFT	13
-#define PAGE_SIZE	(_AC(1, UL) << PAGE_SHIFT)
-#define PAGE_MASK	(~(PAGE_SIZE-1))
-
-#define clear_page(page)        memset((void *)(page), 0, PAGE_SIZE)
-#define copy_page(to,from)      memcpy((void *)(to), (void *)(from), PAGE_SIZE)
-
-#define clear_user_page(page, vaddr, pg)    clear_page(page)
-#define copy_user_page(to, from, vaddr, pg) copy_page(to, from)
-
-#define __alloc_zeroed_user_highpage(movableflags, vma, vaddr) \
-	alloc_page_vma(GFP_HIGHUSER | __GFP_ZERO | movableflags, vma, vaddr)
-#define __HAVE_ARCH_ALLOC_ZEROED_USER_HIGHPAGE
-
-/*
- * These are used to make use of C type-checking..
- */
-#ifndef __ASSEMBLY__
-typedef struct { unsigned long pte; } pte_t;
-typedef struct { unsigned long pgd; } pgd_t;
-typedef struct { unsigned long pgprot; } pgprot_t;
-typedef struct page *pgtable_t;
-#endif
-
-#define pte_val(x)	((x).pte)
-#define pgd_val(x)	((x).pgd)
-#define pgprot_val(x)	((x).pgprot)
-
-#define __pte(x)	((pte_t) { (x) } )
-#define __pgd(x)	((pgd_t) { (x) } )
-#define __pgprot(x)	((pgprot_t) { (x) } )
-
-/* On CRIS the PFN numbers doesn't start at 0 so we have to compensate */
-/* for that before indexing into the page table starting at mem_map    */
-#define ARCH_PFN_OFFSET		(PAGE_OFFSET >> PAGE_SHIFT)
-#define pfn_valid(pfn)		(((pfn) - (PAGE_OFFSET >> PAGE_SHIFT)) < max_mapnr)
-
-/* to index into the page map. our pages all start at physical addr PAGE_OFFSET so
- * we can let the map start there. notice that we subtract PAGE_OFFSET because
- * we start our mem_map there - in other ports they map mem_map physically and
- * use __pa instead. in our system both the physical and virtual address of DRAM
- * is too high to let mem_map start at 0, so we do it this way instead (similar
- * to arm and m68k I think)
- */ 
-
-#define virt_to_page(kaddr)    (mem_map + (((unsigned long)(kaddr) - PAGE_OFFSET) >> PAGE_SHIFT))
-#define VALID_PAGE(page)       (((page) - mem_map) < max_mapnr)
-#define virt_addr_valid(kaddr)	pfn_valid((unsigned)(kaddr) >> PAGE_SHIFT)
-
-/* convert a page (based on mem_map and forward) to a physical address
- * do this by figuring out the virtual address and then use __pa
- */
-
-#define page_to_phys(page)     __pa((((page) - mem_map) << PAGE_SHIFT) + PAGE_OFFSET)
-
-#ifndef __ASSEMBLY__
-
-#endif /* __ASSEMBLY__ */
-
-#define VM_DATA_DEFAULT_FLAGS	(VM_READ | VM_WRITE | VM_EXEC | \
-				 VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC)
-
-#include <asm-generic/memory_model.h>
-#include <asm-generic/page.h>
-
-#endif /* _CRIS_PAGE_H */
-

include/asm-cris/pgtable.h

···
-/*
- * CRIS pgtable.h - macros and functions to manipulate page tables.
- */
-
-#ifndef _CRIS_PGTABLE_H
-#define _CRIS_PGTABLE_H
-
-#include <asm/page.h>
-#include <asm-generic/pgtable-nopmd.h>
-
-#ifndef __ASSEMBLY__
-#include <linux/sched.h>
-#include <asm/mmu.h>
-#endif
-#include <asm/arch/pgtable.h>
-
-/*
- * The Linux memory management assumes a three-level page table setup. On
- * CRIS, we use that, but "fold" the mid level into the top-level page
- * table. Since the MMU TLB is software loaded through an interrupt, it
- * supports any page table structure, so we could have used a three-level
- * setup, but for the amounts of memory we normally use, a two-level is
- * probably more efficient.
- *
- * This file contains the functions and defines necessary to modify and use
- * the CRIS page table tree.
- */
-#ifndef __ASSEMBLY__
-extern void paging_init(void);
-#endif
-
-/* Certain architectures need to do special things when pte's
- * within a page table are directly modified.  Thus, the following
- * hook is made available.
- */
-#define set_pte(pteptr, pteval) ((*(pteptr)) = (pteval))
-#define set_pte_at(mm,addr,ptep,pteval) set_pte(ptep,pteval)
-
-/*
- * (pmds are folded into pgds so this doesn't get actually called,
- * but the define is needed for a generic inline function.)
- */
-#define set_pmd(pmdptr, pmdval) (*(pmdptr) = pmdval)
-#define set_pgu(pudptr, pudval) (*(pudptr) = pudval)
-
-/* PGDIR_SHIFT determines the size of the area a second-level page table can
- * map. It is equal to the page size times the number of PTE's that fit in
- * a PMD page. A PTE is 4-bytes in CRIS. Hence the following number.
- */
-
-#define PGDIR_SHIFT	(PAGE_SHIFT + (PAGE_SHIFT-2))
-#define PGDIR_SIZE	(1UL << PGDIR_SHIFT)
-#define PGDIR_MASK	(~(PGDIR_SIZE-1))
-
-/*
- * entries per page directory level: we use a two-level, so
- * we don't really have any PMD directory physically.
- * pointers are 4 bytes so we can use the page size and 
- * divide it by 4 (shift by 2).
- */
-#define PTRS_PER_PTE	(1UL << (PAGE_SHIFT-2))
-#define PTRS_PER_PGD	(1UL << (PAGE_SHIFT-2))
-
-/* calculate how many PGD entries a user-level program can use
- * the first mappable virtual address is 0
- * (TASK_SIZE is the maximum virtual address space)
- */
-
-#define USER_PTRS_PER_PGD       (TASK_SIZE/PGDIR_SIZE)
-#define FIRST_USER_ADDRESS      0
-
-/* zero page used for uninitialized stuff */
-#ifndef __ASSEMBLY__
-extern unsigned long empty_zero_page;
-#define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page))
-#endif
-
-/* number of bits that fit into a memory pointer */
-#define BITS_PER_PTR			(8*sizeof(unsigned long))
-
-/* to align the pointer to a pointer address */
-#define PTR_MASK			(~(sizeof(void*)-1))
-
-/* sizeof(void*)==1<<SIZEOF_PTR_LOG2 */
-/* 64-bit machines, beware!  SRB. */
-#define SIZEOF_PTR_LOG2			2
-
-/* to find an entry in a page-table */
-#define PAGE_PTR(address) \
-((unsigned long)(address)>>(PAGE_SHIFT-SIZEOF_PTR_LOG2)&PTR_MASK&~PAGE_MASK)
-
-/* to set the page-dir */
-#define SET_PAGE_DIR(tsk,pgdir)
-
-#define pte_none(x)	(!pte_val(x))
-#define pte_present(x)	(pte_val(x) & _PAGE_PRESENT)
-#define pte_clear(mm,addr,xp)	do { pte_val(*(xp)) = 0; } while (0)
-
-#define pmd_none(x)     (!pmd_val(x))
-/* by removing the _PAGE_KERNEL bit from the comparision, the same pmd_bad
- * works for both _PAGE_TABLE and _KERNPG_TABLE pmd entries.
- */
-#define	pmd_bad(x)	((pmd_val(x) & (~PAGE_MASK & ~_PAGE_KERNEL)) != _PAGE_TABLE)
-#define pmd_present(x)	(pmd_val(x) & _PAGE_PRESENT)
-#define pmd_clear(xp)	do { pmd_val(*(xp)) = 0; } while (0)
-
-#ifndef __ASSEMBLY__
-
-/*
- * The following only work if pte_present() is true.
- * Undefined behaviour if not..
- */
-
-static inline int pte_write(pte_t pte)          { return pte_val(pte) & _PAGE_WRITE; }
-static inline int pte_dirty(pte_t pte)          { return pte_val(pte) & _PAGE_MODIFIED; }
-static inline int pte_young(pte_t pte)          { return pte_val(pte) & _PAGE_ACCESSED; }
-static inline int pte_file(pte_t pte)           { return pte_val(pte) & _PAGE_FILE; }
-static inline int pte_special(pte_t pte)	{ return 0; }
-
-static inline pte_t pte_wrprotect(pte_t pte)
-{
-        pte_val(pte) &= ~(_PAGE_WRITE | _PAGE_SILENT_WRITE);
-        return pte;
-}
-
-static inline pte_t pte_mkclean(pte_t pte)
-{
-	pte_val(pte) &= ~(_PAGE_MODIFIED | _PAGE_SILENT_WRITE); 
-	return pte; 
-}
-
-static inline pte_t pte_mkold(pte_t pte)
-{
-	pte_val(pte) &= ~(_PAGE_ACCESSED | _PAGE_SILENT_READ);
-	return pte;
-}
-
-static inline pte_t pte_mkwrite(pte_t pte)
-{
-        pte_val(pte) |= _PAGE_WRITE;
-        if (pte_val(pte) & _PAGE_MODIFIED)
-                pte_val(pte) |= _PAGE_SILENT_WRITE;
-        return pte;
-}
-
-static inline pte_t pte_mkdirty(pte_t pte)
-{
-        pte_val(pte) |= _PAGE_MODIFIED;
-        if (pte_val(pte) & _PAGE_WRITE)
-                pte_val(pte) |= _PAGE_SILENT_WRITE;
-        return pte;
-}
-
-static inline pte_t pte_mkyoung(pte_t pte)
-{
-        pte_val(pte) |= _PAGE_ACCESSED;
-        if (pte_val(pte) & _PAGE_READ)
-        {
-                pte_val(pte) |= _PAGE_SILENT_READ;
-                if ((pte_val(pte) & (_PAGE_WRITE | _PAGE_MODIFIED)) ==
-		    (_PAGE_WRITE | _PAGE_MODIFIED))
-                        pte_val(pte) |= _PAGE_SILENT_WRITE;
-        }
-        return pte;
-}
-static inline pte_t pte_mkspecial(pte_t pte)	{ return pte; }
-
-/*
- * Conversion functions: convert a page and protection to a page entry,
- * and a page entry and page directory to the page they refer to.
- */
-
-/* What actually goes as arguments to the various functions is less than
- * obvious, but a rule of thumb is that struct page's goes as struct page *,
- * really physical DRAM addresses are unsigned long's, and DRAM "virtual"
- * addresses (the 0xc0xxxxxx's) goes as void *'s.
- */
-
-static inline pte_t __mk_pte(void * page, pgprot_t pgprot)
-{
-	pte_t pte;
-	/* the PTE needs a physical address */
-	pte_val(pte) = __pa(page) | pgprot_val(pgprot);
-	return pte;
-}
-
-#define mk_pte(page, pgprot) __mk_pte(page_address(page), (pgprot))
-
-#define mk_pte_phys(physpage, pgprot) \
-({                                                                      \
-        pte_t __pte;                                                    \
-                                                                        \
-        pte_val(__pte) = (physpage) + pgprot_val(pgprot);               \
-        __pte;                                                          \
-})
-
-static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
-{ pte_val(pte) = (pte_val(pte) & _PAGE_CHG_MASK) | pgprot_val(newprot); return pte; }
-
-
-/* pte_val refers to a page in the 0x4xxxxxxx physical DRAM interval
- * __pte_page(pte_val) refers to the "virtual" DRAM interval
- * pte_pagenr refers to the page-number counted starting from the virtual DRAM start
- */
-
-static inline unsigned long __pte_page(pte_t pte)
-{
-	/* the PTE contains a physical address */
-	return (unsigned long)__va(pte_val(pte) & PAGE_MASK);
-}
-
-#define pte_pagenr(pte)         ((__pte_page(pte) - PAGE_OFFSET) >> PAGE_SHIFT)
-
-/* permanent address of a page */
-
-#define __page_address(page)    (PAGE_OFFSET + (((page) - mem_map) << PAGE_SHIFT))
-#define pte_page(pte)           (mem_map+pte_pagenr(pte))
-
-/* only the pte's themselves need to point to physical DRAM (see above)
- * the pagetable links are purely handled within the kernel SW and thus
- * don't need the __pa and __va transformations.
- */
-
-static inline void pmd_set(pmd_t * pmdp, pte_t * ptep)
-{ pmd_val(*pmdp) = _PAGE_TABLE | (unsigned long) ptep; }
-
-#define pmd_page(pmd)		(pfn_to_page(pmd_val(pmd) >> PAGE_SHIFT))
-#define pmd_page_vaddr(pmd)	((unsigned long) __va(pmd_val(pmd) & PAGE_MASK))
-
-/* to find an entry in a page-table-directory. */
-#define pgd_index(address) (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD-1))
-
-/* to find an entry in a page-table-directory */
-static inline pgd_t * pgd_offset(const struct mm_struct *mm, unsigned long address)
-{
-	return mm->pgd + pgd_index(address);
-}
-
-/* to find an entry in a kernel page-table-directory */
-#define pgd_offset_k(address) pgd_offset(&init_mm, address)
-
-/* Find an entry in the third-level page table.. */
-#define __pte_offset(address) \
-	(((address) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1))
-#define pte_offset_kernel(dir, address) \
-	((pte_t *) pmd_page_vaddr(*(dir)) +  __pte_offset(address))
-#define pte_offset_map(dir, address) \
-	((pte_t *)page_address(pmd_page(*(dir))) + __pte_offset(address))
-#define pte_offset_map_nested(dir, address) pte_offset_map(dir, address)
-
-#define pte_unmap(pte) do { } while (0)
-#define pte_unmap_nested(pte) do { } while (0)
-#define pte_pfn(x)		((unsigned long)(__va((x).pte)) >> PAGE_SHIFT)
-#define pfn_pte(pfn, prot)	__pte(((pfn) << PAGE_SHIFT) | pgprot_val(prot))
-
-#define pte_ERROR(e) \
-        printk("%s:%d: bad pte %p(%08lx).\n", __FILE__, __LINE__, &(e), pte_val(e))
-#define pgd_ERROR(e) \
-        printk("%s:%d: bad pgd %p(%08lx).\n", __FILE__, __LINE__, &(e), pgd_val(e))
-
-
-extern pgd_t swapper_pg_dir[PTRS_PER_PGD]; /* defined in head.S */
-
-/*
- * CRIS doesn't have any external MMU info: the kernel page
- * tables contain all the necessary information.
- * 
- * Actually I am not sure on what this could be used for.
- */
-static inline void update_mmu_cache(struct vm_area_struct * vma,
-	unsigned long address, pte_t pte)
-{
-}
-
-/* Encode and de-code a swap entry (must be !pte_none(e) && !pte_present(e)) */
-/* Since the PAGE_PRESENT bit is bit 4, we can use the bits above */
-
-#define __swp_type(x)			(((x).val >> 5) & 0x7f)
-#define __swp_offset(x)			((x).val >> 12)
-#define __swp_entry(type, offset)	((swp_entry_t) { ((type) << 5) | ((offset) << 12) })
-#define __pte_to_swp_entry(pte)		((swp_entry_t) { pte_val(pte) })
-#define __swp_entry_to_pte(x)		((pte_t) { (x).val })
-
-#define kern_addr_valid(addr)   (1)
-
-#include <asm-generic/pgtable.h>
-
-/*
- * No page table caches to initialise
- */
-#define pgtable_cache_init()   do { } while (0)
-
-#define pte_to_pgoff(x)	(pte_val(x) >> 6)
-#define pgoff_to_pte(x)	__pte(((x) << 6) | _PAGE_FILE)
-
-typedef pte_t *pte_addr_t;
-
-#endif /* __ASSEMBLY__ */
-#endif /* _CRIS_PGTABLE_H */

include/asm-cris/processor.h

···
-/*
- * include/asm-cris/processor.h
- *
- * Copyright (C) 2000, 2001 Axis Communications AB
- *
- * Authors:         Bjorn Wesen        Initial version
- *
- */
-
-#ifndef __ASM_CRIS_PROCESSOR_H
-#define __ASM_CRIS_PROCESSOR_H
-
-#include <asm/system.h>
-#include <asm/page.h>
-#include <asm/ptrace.h>
-#include <asm/arch/processor.h>
-
-struct task_struct;
-
-#define STACK_TOP	TASK_SIZE
-#define STACK_TOP_MAX	STACK_TOP
-
-/* This decides where the kernel will search for a free chunk of vm
- * space during mmap's.
- */
-#define TASK_UNMAPPED_BASE      (PAGE_ALIGN(TASK_SIZE / 3))
-
-/* THREAD_SIZE is the size of the task_struct/kernel_stack combo.
- * normally, the stack is found by doing something like p + THREAD_SIZE
- * in CRIS, a page is 8192 bytes, which seems like a sane size
- */
-
-#define THREAD_SIZE       PAGE_SIZE
-#define KERNEL_STACK_SIZE PAGE_SIZE
-
-/*
- * At user->kernel entry, the pt_regs struct is stacked on the top of the kernel-stack.
- * This macro allows us to find those regs for a task.
- * Notice that subsequent pt_regs stackings, like recursive interrupts occurring while
- * we're in the kernel, won't affect this - only the first user->kernel transition
- * registers are reached by this.
- */
-
-#define user_regs(thread_info) (((struct pt_regs *)((unsigned long)(thread_info) + THREAD_SIZE)) - 1)
-
-/*
- * Dito but for the currently running task
- */
-
-#define task_pt_regs(task) user_regs(task_thread_info(task))
-#define current_regs() task_pt_regs(current)
-
-static inline void prepare_to_copy(struct task_struct *tsk)
-{
-}
-
-extern int kernel_thread(int (*fn)(void *), void * arg, unsigned long flags);
-
-unsigned long get_wchan(struct task_struct *p);
-
-#define KSTK_ESP(tsk)   ((tsk) == current ? rdusp() : (tsk)->thread.usp)
-
-extern unsigned long thread_saved_pc(struct task_struct *tsk);
-
-/* Free all resources held by a thread. */
-static inline void release_thread(struct task_struct *dead_task)
-{
-        /* Nothing needs to be done.  */
-}
-
-#define init_stack      (init_thread_union.stack)
-
-#define cpu_relax()     barrier()
-
-#endif /* __ASM_CRIS_PROCESSOR_H */

include/asm-cris/ptrace.h

···
-#ifndef _CRIS_PTRACE_H
-#define _CRIS_PTRACE_H
-
-#include <asm/arch/ptrace.h>
-
-#ifdef __KERNEL__
-
-/* Arbitrarily choose the same ptrace numbers as used by the Sparc code. */
-#define PTRACE_GETREGS            12
-#define PTRACE_SETREGS            13
-
-#define profile_pc(regs) instruction_pointer(regs)
-
-#endif /* __KERNEL__ */
-
-#endif /* _CRIS_PTRACE_H */

include/asm-cris/spinlock.h

···
-#include <asm/arch/spinlock.h>

include/asm-cris/system.h

···
-#ifndef __ASM_CRIS_SYSTEM_H
-#define __ASM_CRIS_SYSTEM_H
-
-#include <asm/arch/system.h>
-
-/* the switch_to macro calls resume, an asm function in entry.S which does the actual
- * task switching.
- */
-
-extern struct task_struct *resume(struct task_struct *prev, struct task_struct *next, int);
-#define switch_to(prev,next,last) last = resume(prev,next, \
-					 (int)&((struct task_struct *)0)->thread)
-
-#define barrier() __asm__ __volatile__("": : :"memory")
-#define mb() barrier()
-#define rmb() mb()
-#define wmb() mb()
-#define read_barrier_depends() do { } while(0)
-#define set_mb(var, value)  do { var = value; mb(); } while (0)
-
-#ifdef CONFIG_SMP
-#define smp_mb()        mb()
-#define smp_rmb()       rmb()
-#define smp_wmb()       wmb()
-#define smp_read_barrier_depends()     read_barrier_depends()
-#else
-#define smp_mb()        barrier()
-#define smp_rmb()       barrier()
-#define smp_wmb()       barrier()
-#define smp_read_barrier_depends()     do { } while(0)
-#endif
-
-#define iret()
-
-/*
- * disable hlt during certain critical i/o operations
- */
-#define HAVE_DISABLE_HLT
-void disable_hlt(void);
-void enable_hlt(void);
-
-static inline unsigned long __xchg(unsigned long x, volatile void * ptr, int size)
-{
-  /* since Etrax doesn't have any atomic xchg instructions, we need to disable
-     irq's (if enabled) and do it with move.d's */
-  unsigned long flags,temp;
-  local_irq_save(flags); /* save flags, including irq enable bit and shut off irqs */
-  switch (size) {
-  case 1:
-    *((unsigned char *)&temp) = x;
-    x = *(unsigned char *)ptr;
-    *(unsigned char *)ptr = *((unsigned char *)&temp);
-    break;
-  case 2:
-    *((unsigned short *)&temp) = x;
-    x = *(unsigned short *)ptr;
-    *(unsigned short *)ptr = *((unsigned short *)&temp);
-    break;
-  case 4:
-    temp = x;
-    x = *(unsigned long *)ptr;
-    *(unsigned long *)ptr = temp;
-    break;
-  }
-  local_irq_restore(flags); /* restore irq enable bit */
-  return x;
-}
-
-#include <asm-generic/cmpxchg-local.h>
-
-/*
- * cmpxchg_local and cmpxchg64_local are atomic wrt current CPU. Always make
- * them available.
- */
-#define cmpxchg_local(ptr, o, n)				 	       \
-	((__typeof__(*(ptr)))__cmpxchg_local_generic((ptr), (unsigned long)(o),\
-			(unsigned long)(n), sizeof(*(ptr))))
-#define cmpxchg64_local(ptr, o, n) __cmpxchg64_local_generic((ptr), (o), (n))
-
-#ifndef CONFIG_SMP
-#include <asm-generic/cmpxchg.h>
-#endif
-
-#define arch_align_stack(x) (x)
-
-void default_idle(void);
-
-#endif

include/asm-cris/thread_info.h

···
-/* thread_info.h: CRIS low-level thread information
- *
- * Copyright (C) 2002  David Howells ([e-mail])
- * - Incorporating suggestions made by Linus Torvalds and Dave Miller
- * 
- * CRIS port by Axis Communications
- */
-
-#ifndef _ASM_THREAD_INFO_H
-#define _ASM_THREAD_INFO_H
-
-#ifdef __KERNEL__
-
-#define __HAVE_ARCH_THREAD_INFO_ALLOCATOR
-
-#ifndef __ASSEMBLY__
-#include <asm/types.h>
-#include <asm/processor.h>
-#include <asm/arch/thread_info.h>
-#include <asm/segment.h>
-#endif
-
-
-/*
- * low level task data that entry.S needs immediate access to
- * - this struct should fit entirely inside of one cache line
- * - this struct shares the supervisor stack pages
- * - if the contents of this structure are changed, the assembly constants must also be changed
- */
-#ifndef __ASSEMBLY__
-struct thread_info {
-	struct task_struct	*task;		/* main task structure */
-	struct exec_domain	*exec_domain;	/* execution domain */
-	unsigned long		flags;		/* low level flags */
-	__u32			cpu;		/* current CPU */
-	int			preempt_count;	/* 0 => preemptable, <0 => BUG */
-	__u32			tls;		/* TLS for this thread */
-
-	mm_segment_t		addr_limit;	/* thread address space:
-					 	   0-0xBFFFFFFF for user-thead
-						   0-0xFFFFFFFF for kernel-thread
-						*/
-	struct restart_block    restart_block;
-	__u8			supervisor_stack[0];
-};
-
-#endif
-
-#define PREEMPT_ACTIVE		0x10000000
-
-/*
- * macros/functions for gaining access to the thread information structure
- *
- * preempt_count needs to be 1 initially, until the scheduler is functional.
- */
-#ifndef __ASSEMBLY__
-#define INIT_THREAD_INFO(tsk)				\
-{							\
-	.task		= &tsk,				\
-	.exec_domain	= &default_exec_domain,		\
-	.flags		= 0,				\
-	.cpu		= 0,				\
-	.preempt_count	= 1,				\
-	.addr_limit	= KERNEL_DS,			\
-	.restart_block = {				\
-		       .fn = do_no_restart_syscall,	\
-	},						\
-}
-
-#define init_thread_info	(init_thread_union.thread_info)
-
-/* thread information allocation */
-#define alloc_thread_info(tsk) ((struct thread_info *) __get_free_pages(GFP_KERNEL,1))
-#define free_thread_info(ti) free_pages((unsigned long) (ti), 1)
-
-#endif /* !__ASSEMBLY__ */
-
-/*
- * thread information flags
- * - these are process state flags that various assembly files may need to access
- * - pending work-to-be-done flags are in LSW
- * - other flags in MSW
- */
-#define TIF_SYSCALL_TRACE	0	/* syscall trace active */
-#define TIF_NOTIFY_RESUME	1	/* resumption notification requested */
-#define TIF_SIGPENDING		2	/* signal pending */
-#define TIF_NEED_RESCHED	3	/* rescheduling necessary */
-#define TIF_RESTORE_SIGMASK	9	/* restore signal mask in do_signal() */
-#define TIF_POLLING_NRFLAG	16	/* true if poll_idle() is polling TIF_NEED_RESCHED */
-#define TIF_MEMDIE		17
-#define TIF_FREEZE		18	/* is freezing for suspend */
-
-#define _TIF_SYSCALL_TRACE	(1<<TIF_SYSCALL_TRACE)
-#define _TIF_NOTIFY_RESUME	(1<<TIF_NOTIFY_RESUME)
-#define _TIF_SIGPENDING		(1<<TIF_SIGPENDING)
-#define _TIF_NEED_RESCHED	(1<<TIF_NEED_RESCHED)
-#define _TIF_RESTORE_SIGMASK	(1<<TIF_RESTORE_SIGMASK)
-#define _TIF_POLLING_NRFLAG	(1<<TIF_POLLING_NRFLAG)
-#define _TIF_FREEZE		(1<<TIF_FREEZE)
-
-#define _TIF_WORK_MASK		0x0000FFFE	/* work to do on interrupt/exception return */
-#define _TIF_ALLWORK_MASK	0x0000FFFF	/* work to do on any return to u-space */
-
-#endif /* __KERNEL__ */
-
-#endif /* _ASM_THREAD_INFO_H */

include/asm-cris/timex.h

···
-/*
- * linux/include/asm-cris/timex.h
- *
- * CRIS architecture timex specifications
- */
-
-#ifndef _ASM_CRIS_TIMEX_H
-#define _ASM_CRIS_TIMEX_H
-
-#include <asm/arch/timex.h>
-
-/*
- * We don't have a cycle-counter.. but we do not support SMP anyway where this is
- * used so it does not matter.
- */
-
-typedef unsigned long long cycles_t;
-
-static inline cycles_t get_cycles(void)
-{
-        return 0;
-}
-
-#endif

include/asm-cris/tlb.h

···
-#ifndef _CRIS_TLB_H
-#define _CRIS_TLB_H
-
-#include <linux/pagemap.h>
-
-#include <asm/arch/tlb.h>
-
-/*
- * cris doesn't need any special per-pte or
- * per-vma handling..
- */
-#define tlb_start_vma(tlb, vma) do { } while (0)
-#define tlb_end_vma(tlb, vma) do { } while (0)
-#define __tlb_remove_tlb_entry(tlb, ptep, address) do { } while (0)
-
-#define tlb_flush(tlb) flush_tlb_mm((tlb)->mm)
-#include <asm-generic/tlb.h>
-
-#endif

include/asm-cris/uaccess.h

···
-/* 
- * Authors:    Bjorn Wesen ([e-mail])
- *	       Hans-Peter Nilsson ([e-mail])
- */
-
-/* Asm:s have been tweaked (within the domain of correctness) to give
-   satisfactory results for "gcc version 2.96 20000427 (experimental)".
-
-   Check regularly...
-
-   Register $r9 is chosen for temporaries, being a call-clobbered register
-   first in line to be used (notably for local blocks), not colliding with
-   parameter registers.  */
-
-#ifndef _CRIS_UACCESS_H
-#define _CRIS_UACCESS_H
-
-#ifndef __ASSEMBLY__
-#include <linux/sched.h>
-#include <linux/errno.h>
-#include <asm/processor.h>
-#include <asm/page.h>
-
-#define VERIFY_READ	0
-#define VERIFY_WRITE	1
-
-/*
- * The fs value determines whether argument validity checking should be
- * performed or not.  If get_fs() == USER_DS, checking is performed, with
- * get_fs() == KERNEL_DS, checking is bypassed.
- *
- * For historical reasons, these macros are grossly misnamed.
- */
-
-#define MAKE_MM_SEG(s)	((mm_segment_t) { (s) })
-
-/* addr_limit is the maximum accessible address for the task. we misuse
- * the KERNEL_DS and USER_DS values to both assign and compare the 
- * addr_limit values through the equally misnamed get/set_fs macros.
- * (see above)
- */
-
-#define KERNEL_DS	MAKE_MM_SEG(0xFFFFFFFF)
-#define USER_DS		MAKE_MM_SEG(TASK_SIZE)
-
-#define get_ds()	(KERNEL_DS)
-#define get_fs()	(current_thread_info()->addr_limit)
-#define set_fs(x)	(current_thread_info()->addr_limit = (x))
-
-#define segment_eq(a,b)	((a).seg == (b).seg)
-
-#define __kernel_ok (segment_eq(get_fs(), KERNEL_DS))
-#define __user_ok(addr,size) (((size) <= TASK_SIZE)&&((addr) <= TASK_SIZE-(size)))
-#define __access_ok(addr,size) (__kernel_ok || __user_ok((addr),(size)))
-#define access_ok(type,addr,size) __access_ok((unsigned long)(addr),(size))
-
-#include <asm/arch/uaccess.h>
-
-/*
- * The exception table consists of pairs of addresses: the first is the
- * address of an instruction that is allowed to fault, and the second is
- * the address at which the program should continue.  No registers are
- * modified, so it is entirely up to the continuation code to figure out
- * what to do.
- *
- * All the routines below use bits of fixup code that are out of line
- * with the main instruction path.  This means when everything is well,
- * we don't even have to jump over them.  Further, they do not intrude
- * on our cache or tlb entries.
- */
-
-struct exception_table_entry
-{
-	unsigned long insn, fixup;
-};
-
-/*
- * These are the main single-value transfer routines.  They automatically
- * use the right size if we just have the right pointer type.
- *
- * This gets kind of ugly. We want to return _two_ values in "get_user()"
- * and yet we don't want to do any pointers, because that is too much
- * of a performance impact. Thus we have a few rather ugly macros here,
- * and hide all the ugliness from the user.
- *
- * The "__xxx" versions of the user access functions are versions that
- * do not verify the address space, that must have been done previously
- * with a separate "access_ok()" call (this is used when we do multiple
- * accesses to the same area of user memory).
- *
- * As we use the same address space for kernel and user data on
- * CRIS, we can just do these as direct assignments.  (Of course, the
- * exception handling means that it's no longer "just"...)
- */
-#define get_user(x,ptr) \
-  __get_user_check((x),(ptr),sizeof(*(ptr)))
-#define put_user(x,ptr) \
-  __put_user_check((__typeof__(*(ptr)))(x),(ptr),sizeof(*(ptr)))
-
-#define __get_user(x,ptr) \
-  __get_user_nocheck((x),(ptr),sizeof(*(ptr)))
-#define __put_user(x,ptr) \
-  __put_user_nocheck((__typeof__(*(ptr)))(x),(ptr),sizeof(*(ptr)))
-
-extern long __put_user_bad(void);
-
-#define __put_user_size(x,ptr,size,retval)			\
-do {								\
-	retval = 0;						\
-	switch (size) {						\
-	  case 1: __put_user_asm(x,ptr,retval,"move.b"); break;	\
-	  case 2: __put_user_asm(x,ptr,retval,"move.w"); break;	\
-	  case 4: __put_user_asm(x,ptr,retval,"move.d"); break;	\
-	  case 8: __put_user_asm_64(x,ptr,retval); break;	\
-	  default: __put_user_bad();				\
-	}							\
-} while (0)
-
-#define __get_user_size(x,ptr,size,retval)			\
-do {								\
-	retval = 0;						\
-	switch (size) {						\
-	  case 1: __get_user_asm(x,ptr,retval,"move.b"); break;	\
-	  case 2: __get_user_asm(x,ptr,retval,"move.w"); break;	\
-	  case 4: __get_user_asm(x,ptr,retval,"move.d"); break;	\
-	  case 8: __get_user_asm_64(x,ptr,retval); break;	\
-	  default: (x) = __get_user_bad();			\
-	}							\
-} while (0)
-
-#define __put_user_nocheck(x,ptr,size)			\
-({							\
-	long __pu_err;					\
-	__put_user_size((x),(ptr),(size),__pu_err);	\
-	__pu_err;					\
-})
-
-#define __put_user_check(x,ptr,size)				\
-({								\
-	long __pu_err = -EFAULT;				\
-	__typeof__(*(ptr)) *__pu_addr = (ptr);			\
-	if (access_ok(VERIFY_WRITE,__pu_addr,size))		\
-		__put_user_size((x),__pu_addr,(size),__pu_err);	\
-	__pu_err;						\
-})
-
-struct __large_struct { unsigned long buf[100]; };
-#define __m(x) (*(struct __large_struct *)(x))
-
-
-
-#define __get_user_nocheck(x,ptr,size)				\
-({								\
-	long __gu_err, __gu_val;				\
-	__get_user_size(__gu_val,(ptr),(size),__gu_err);	\
-	(x) = (__typeof__(*(ptr)))__gu_val;			\
-	__gu_err;						\
-})
-
-#define __get_user_check(x,ptr,size)					\
-({									\
-	long __gu_err = -EFAULT, __gu_val = 0;				\
-	const __typeof__(*(ptr)) *__gu_addr = (ptr);			\
-	if (access_ok(VERIFY_READ,__gu_addr,size))			\
-		__get_user_size(__gu_val,__gu_addr,(size),__gu_err);	\
-	(x) = (__typeof__(*(ptr)))__gu_val;				\
-	__gu_err;							\
-})
-
-extern long __get_user_bad(void);
-
-/* More complex functions.  Most are inline, but some call functions that
-   live in lib/usercopy.c  */
-
-extern unsigned long __copy_user(void __user *to, const void *from, unsigned long n);
-extern unsigned long __copy_user_zeroing(void *to, const void __user *from, unsigned long n);
-extern unsigned long __do_clear_user(void __user *to, unsigned long n);
-
-static inline unsigned long
-__generic_copy_to_user(void __user *to, const void *from, unsigned long n)
-{
-	if (access_ok(VERIFY_WRITE, to, n))
-		return __copy_user(to,from,n);
-	return n;
-}
-
-static inline unsigned long
-__generic_copy_from_user(void *to, const void __user *from, unsigned long n)
-{
-	if (access_ok(VERIFY_READ, from, n))
-		return __copy_user_zeroing(to,from,n);
-	return n;
-}
-
-static inline unsigned long
-__generic_clear_user(void __user *to, unsigned long n)
-{
-	if (access_ok(VERIFY_WRITE, to, n))
-		return __do_clear_user(to,n);
-	return n;
-}
-
-static inline long
-__strncpy_from_user(char *dst, const char __user *src, long count)
-{
-	return __do_strncpy_from_user(dst, src, count);
-}
-
-static inline long
-strncpy_from_user(char *dst, const char __user *src, long count)
-{
-	long res = -EFAULT;
-	if (access_ok(VERIFY_READ, src, 1))
-		res = __do_strncpy_from_user(dst, src, count);
-	return res;
-}
-
-
-/* Note that these expand awfully if made into switch constructs, so
-   don't do that.  */
-
-static inline unsigned long
-__constant_copy_from_user(void *to, const void __user *from, unsigned long n)
-{
-	unsigned long ret = 0;
-	if (n == 0)
-		;
-	else if (n == 1)
-		__asm_copy_from_user_1(to, from, ret);
-	else if (n == 2)
-		__asm_copy_from_user_2(to, from, ret);
-	else if (n == 3)
-		__asm_copy_from_user_3(to, from, ret);
-	else if (n == 4)
-		__asm_copy_from_user_4(to, from, ret);
-	else if (n == 5)
-		__asm_copy_from_user_5(to, from, ret);
-	else if (n == 6)
-		__asm_copy_from_user_6(to, from, ret);
-	else if (n == 7)
-		__asm_copy_from_user_7(to, from, ret);
-	else if (n == 8)
-		__asm_copy_from_user_8(to, from, ret);
-	else if (n == 9)
-		__asm_copy_from_user_9(to, from, ret);
-	else if (n == 10)
-		__asm_copy_from_user_10(to, from, ret);
-	else if (n == 11)
-		__asm_copy_from_user_11(to, from, ret);
-	else if (n == 12)
-		__asm_copy_from_user_12(to, from, ret);
-	else if (n == 13)
-		__asm_copy_from_user_13(to, from, ret);
-	else if (n == 14)
-		__asm_copy_from_user_14(to, from, ret);
-	else if (n == 15)
-		__asm_copy_from_user_15(to, from, ret);
-	else if (n == 16)
-		__asm_copy_from_user_16(to, from, ret);
-	else if (n == 20)
-		__asm_copy_from_user_20(to, from, ret);
-	else if (n == 24)
-		__asm_copy_from_user_24(to, from, ret);
-	else
-		ret = __generic_copy_from_user(to, from, n);
-
-	return ret;
-}
-
-/* Ditto, don't make a switch out of this.  */
-
-static inline unsigned long
-__constant_copy_to_user(void __user *to, const void *from, unsigned long n)
-{
-	unsigned long ret = 0;
-	if (n == 0)
-		;
-	else if (n == 1)
-		__asm_copy_to_user_1(to, from, ret);
-	else if (n == 2)
-		__asm_copy_to_user_2(to, from, ret);
-	else if (n == 3)
-		__asm_copy_to_user_3(to, from, ret);
-	else if (n == 4)
-		__asm_copy_to_user_4(to, from, ret);
-	else if (n == 5)
-		__asm_copy_to_user_5(to, from, ret);
-	else if (n == 6)
-		__asm_copy_to_user_6(to, from, ret);
-	else if (n == 7)
-		__asm_copy_to_user_7(to, from, ret);
-	else if (n == 8)
-		__asm_copy_to_user_8(to, from, ret);
-	else if (n == 9)
-		__asm_copy_to_user_9(to, from, ret);
-	else if (n == 10)
-		__asm_copy_to_user_10(to, from, ret);
-	else if (n == 11)
-		__asm_copy_to_user_11(to, from, ret);
-	else if (n == 12)
-		__asm_copy_to_user_12(to, from, ret);
-	else if (n == 13)
-		__asm_copy_to_user_13(to, from, ret);
-	else if (n == 14)
-		__asm_copy_to_user_14(to, from, ret);
-	else if (n == 15)
-		__asm_copy_to_user_15(to, from, ret);
-	else if (n == 16)
-		__asm_copy_to_user_16(to, from, ret);
-	else if (n == 20)
-		__asm_copy_to_user_20(to, from, ret);
-	else if (n == 24)
-		__asm_copy_to_user_24(to, from, ret);
-	else
-		ret = __generic_copy_to_user(to, from, n);
-
-	return ret;
-}
-
-/* No switch, please.  */
-
-static inline unsigned long
-__constant_clear_user(void __user *to, unsigned long n)
-{
-	unsigned long ret = 0;
-	if (n == 0)
-		;
-	else if (n == 1)
-		__asm_clear_1(to, ret);
-	else if (n == 2)
-		__asm_clear_2(to, ret);
-	else if (n == 3)
-		__asm_clear_3(to, ret);
-	else if (n == 4)
-		__asm_clear_4(to, ret);
-	else if (n == 8)
-		__asm_clear_8(to, ret);
-	else if (n == 12)
-		__asm_clear_12(to, ret);
-	else if (n == 16)
-		__asm_clear_16(to, ret);
-	else if (n == 20)
-		__asm_clear_20(to, ret);
-	else if (n == 24)
-		__asm_clear_24(to, ret);
-	else
-		ret = __generic_clear_user(to, n);
-
-	return ret;
-}
-
-
-#define clear_user(to, n)			\
-(__builtin_constant_p(n) ?			\
- __constant_clear_user(to, n) :			\
- __generic_clear_user(to, n))
-
-#define copy_from_user(to, from, n)		\
-(__builtin_constant_p(n) ?			\
- __constant_copy_from_user(to, from, n) :	\
- __generic_copy_from_user(to, from, n))
-
-#define copy_to_user(to, from, n)		\
-(__builtin_constant_p(n) ?			\
- __constant_copy_to_user(to, from, n) :		\
- __generic_copy_to_user(to, from, n))
-
-/* We let the __ versions of copy_from/to_user inline, because they're often
- * used in fast paths and have only a small space overhead.
- */
-
-static inline unsigned long
-__generic_copy_from_user_nocheck(void *to, const void __user *from,
-				 unsigned long n)
-{
-	return __copy_user_zeroing(to,from,n);
-}
-
-static inline unsigned long
-__generic_copy_to_user_nocheck(void __user *to, const void *from,
-			       unsigned long n)
-{
-	return __copy_user(to,from,n);
-}
-
-static inline unsigned long
-__generic_clear_user_nocheck(void __user *to, unsigned long n)
-{
-	return __do_clear_user(to,n);
-}
-
-/* without checking */
-
-#define __copy_to_user(to,from,n)   __generic_copy_to_user_nocheck((to),(from),(n))
-#define __copy_from_user(to,from,n) __generic_copy_from_user_nocheck((to),(from),(n))
-#define __copy_to_user_inatomic __copy_to_user
-#define __copy_from_user_inatomic __copy_from_user
-#define __clear_user(to,n) __generic_clear_user_nocheck((to),(n))
-
-#define strlen_user(str)	strnlen_user((str), 0x7ffffffe)
-
-#endif  /* __ASSEMBLY__ */
-
-#endif	/* _CRIS_UACCESS_H */

include/asm-cris/unistd.h

···
-#ifndef _ASM_CRIS_UNISTD_H_
-#define _ASM_CRIS_UNISTD_H_
-
-/*
- * This file contains the system call numbers, and stub macros for libc.
- */
-
-#define __NR_restart_syscall      0
-#define __NR_exit		  1
-#define __NR_fork		  2
-#define __NR_read		  3
-#define __NR_write		  4
-#define __NR_open		  5
-#define __NR_close		  6
-#define __NR_waitpid		  7
-#define __NR_creat		  8
-#define __NR_link		  9
-#define __NR_unlink		 10
-#define __NR_execve		 11
-#define __NR_chdir		 12
-#define __NR_time		 13
-#define __NR_mknod		 14
-#define __NR_chmod		 15
-#define __NR_lchown		 16
-#define __NR_break		 17
-#define __NR_oldstat		 18
-#define __NR_lseek		 19
-#define __NR_getpid		 20
-#define __NR_mount		 21
-#define __NR_umount		 22
-#define __NR_setuid		 23
-#define __NR_getuid		 24
-#define __NR_stime		 25
-#define __NR_ptrace		 26
-#define __NR_alarm		 27
-#define __NR_oldfstat		 28
-#define __NR_pause		 29
-#define __NR_utime		 30
-#define __NR_stty		 31
-#define __NR_gtty		 32
-#define __NR_access		 33
-#define __NR_nice		 34
-#define __NR_ftime		 35
-#define __NR_sync		 36
-#define __NR_kill		 37
-#define __NR_rename		 38
-#define __NR_mkdir		 39
-#define __NR_rmdir		 40
-#define __NR_dup		 41
-#define __NR_pipe		 42
-#define __NR_times		 43
-#define __NR_prof		 44
-#define __NR_brk		 45
-#define __NR_setgid		 46
-#define __NR_getgid		 47
-#define __NR_signal		 48
-#define __NR_geteuid		 49
-#define __NR_getegid		 50
-#define __NR_acct		 51
-#define __NR_umount2		 52
-#define __NR_lock		 53
-#define __NR_ioctl		 54
-#define __NR_fcntl		 55
-#define __NR_mpx		 56
-#define __NR_setpgid		 57
-#define __NR_ulimit		 58
-#define __NR_oldolduname	 59
-#define __NR_umask		 60
-#define __NR_chroot		 61
-#define __NR_ustat		 62
-#define __NR_dup2		 63
-#define __NR_getppid		 64
-#define __NR_getpgrp		 65
-#define __NR_setsid		 66
-#define __NR_sigaction		 67
-#define __NR_sgetmask		 68
-#define __NR_ssetmask		 69
-#define __NR_setreuid		 70
-#define __NR_setregid		 71
-#define __NR_sigsuspend		 72
-#define __NR_sigpending		 73
-#define __NR_sethostname	 74
-#define __NR_setrlimit		 75
-#define __NR_getrlimit		 76
-#define __NR_getrusage		 77
-#define __NR_gettimeofday	 78
-#define __NR_settimeofday	 79
-#define __NR_getgroups		 80
-#define __NR_setgroups		 81
-#define __NR_select		 82
-#define __NR_symlink		 83
-#define __NR_oldlstat		 84
-#define __NR_readlink		 85
-#define __NR_uselib		 86
-#define __NR_swapon		 87
-#define __NR_reboot		 88
-#define __NR_readdir		 89
-#define __NR_mmap		 90
-#define __NR_munmap		 91
-#define __NR_truncate		 92
-#define __NR_ftruncate		 93
-#define __NR_fchmod		 94
-#define __NR_fchown		 95
-#define __NR_getpriority	 96
-#define __NR_setpriority	 97
-#define __NR_profil		 98
-#define __NR_statfs		 99
-#define __NR_fstatfs		100
-#define __NR_ioperm		101
-#define __NR_socketcall		102
-#define __NR_syslog		103
-#define __NR_setitimer		104
-#define __NR_getitimer		105
-#define __NR_stat		106
-#define __NR_lstat		107
-#define __NR_fstat		108
-#define __NR_olduname		109
-#define __NR_iopl		110
-#define __NR_vhangup		111
-#define __NR_idle		112
-#define __NR_vm86		113
-#define __NR_wait4		114
-#define __NR_swapoff		115
-#define __NR_sysinfo		116
-#define __NR_ipc		117
-#define __NR_fsync		118
-#define __NR_sigreturn		119
-#define __NR_clone		120
-#define __NR_setdomainname	121
-#define __NR_uname		122
-#define __NR_modify_ldt		123
-#define __NR_adjtimex		124
-#define __NR_mprotect		125
-#define __NR_sigprocmask	126
-#define __NR_create_module	127
-#define __NR_init_module	128
-#define __NR_delete_module	129
-#define __NR_get_kernel_syms	130
-#define __NR_quotactl		131
-#define __NR_getpgid		132
-#define __NR_fchdir		133
-#define __NR_bdflush		134
-#define __NR_sysfs		135
-#define __NR_personality	136
-#define __NR_afs_syscall	137 /* Syscall for Andrew File System */
-#define __NR_setfsuid		138
-#define __NR_setfsgid		139
-#define __NR__llseek		140
-#define __NR_getdents		141
-#define __NR__newselect		142
-#define __NR_flock		143
-#define __NR_msync		144
-#define __NR_readv		145
-#define __NR_writev		146
-#define __NR_getsid		147
-#define __NR_fdatasync		148
-#define __NR__sysctl		149
-#define __NR_mlock		150
-#define __NR_munlock		151
-#define __NR_mlockall		152
-#define __NR_munlockall		153
-#define __NR_sched_setparam		154
-#define __NR_sched_getparam		155
-#define __NR_sched_setscheduler		156
-#define __NR_sched_getscheduler		157
-#define __NR_sched_yield		158
-#define __NR_sched_get_priority_max	159
-#define __NR_sched_get_priority_min	160
-#define __NR_sched_rr_get_interval	161
-#define __NR_nanosleep		162
-#define __NR_mremap		163
-#define __NR_setresuid		164
-#define __NR_getresuid		165
-
-#define __NR_query_module	167
-#define __NR_poll		168
-#define __NR_nfsservctl		169
-#define __NR_setresgid		170
-#define __NR_getresgid		171
-#define __NR_prctl              172
-#define __NR_rt_sigreturn	173
-#define __NR_rt_sigaction	174
-#define __NR_rt_sigprocmask	175
-#define __NR_rt_sigpending	176
-#define __NR_rt_sigtimedwait	177
-#define __NR_rt_sigqueueinfo	178
-#define __NR_rt_sigsuspend	179
-#define __NR_pread64		180
-#define __NR_pwrite64		181
-#define __NR_chown		182
-#define __NR_getcwd		183
-#define __NR_capget		184
-#define __NR_capset		185
-#define __NR_sigaltstack	186
-#define __NR_sendfile		187
-#define __NR_getpmsg		188	/* some people actually want streams */
-#define __NR_putpmsg		189	/* some people actually want streams */
-#define __NR_vfork		190
-#define __NR_ugetrlimit		191	/* SuS compliant getrlimit */
-#define __NR_mmap2		192
-#define __NR_truncate64		193
-#define __NR_ftruncate64	194
-#define __NR_stat64		195
-#define __NR_lstat64		196
-#define __NR_fstat64		197
-#define __NR_lchown32		198
-#define __NR_getuid32		199
-#define __NR_getgid32		200
-#define __NR_geteuid32		201
-#define __NR_getegid32		202
-#define __NR_setreuid32		203
-#define __NR_setregid32		204
-#define __NR_getgroups32	205
-#define __NR_setgroups32	206
-#define __NR_fchown32		207
-#define __NR_setresuid32	208
-#define __NR_getresuid32	209
-#define __NR_setresgid32	210
-#define __NR_getresgid32	211
-#define __NR_chown32		212
-#define __NR_setuid32		213
-#define __NR_setgid32		214
-#define __NR_setfsuid32		215
-#define __NR_setfsgid32		216
-#define __NR_pivot_root		217
-#define __NR_mincore		218
-#define __NR_madvise		219
-#define __NR_getdents64		220
-#define __NR_fcntl64		221
-/* 223 is unused */
-#define __NR_gettid             224
-#define __NR_readahead          225
-#define __NR_setxattr		226
-#define __NR_lsetxattr		227
-#define __NR_fsetxattr		228
-#define __NR_getxattr		229
-#define __NR_lgetxattr		230
-#define __NR_fgetxattr		231
-#define __NR_listxattr		232
-#define __NR_llistxattr		233
-#define __NR_flistxattr		234
-#define __NR_removexattr	235
-#define __NR_lremovexattr	236
-#define __NR_fremovexattr	237
-#define __NR_tkill		238
-#define __NR_sendfile64		239
-#define __NR_futex		240
-#define __NR_sched_setaffinity	241
-#define __NR_sched_getaffinity	242
-#define __NR_set_thread_area	243
-#define __NR_get_thread_area	244
-#define __NR_io_setup		245
-#define __NR_io_destroy		246
-#define __NR_io_getevents	247
-#define __NR_io_submit		248
-#define __NR_io_cancel		249
-#define __NR_fadvise64		250
-/* 251 is available for reuse (was briefly sys_set_zone_reclaim) */
-#define __NR_exit_group		252
-#define __NR_lookup_dcookie	253
-#define __NR_epoll_create	254
-#define __NR_epoll_ctl		255
-#define __NR_epoll_wait		256
-#define __NR_remap_file_pages	257
-#define __NR_set_tid_address	258
-#define __NR_timer_create	259
-#define __NR_timer_settime	(__NR_timer_create+1)
-#define __NR_timer_gettime	(__NR_timer_create+2)
-#define __NR_timer_getoverrun	(__NR_timer_create+3)
-#define __NR_timer_delete	(__NR_timer_create+4)
-#define __NR_clock_settime	(__NR_timer_create+5)
-#define __NR_clock_gettime	(__NR_timer_create+6)
-#define __NR_clock_getres	(__NR_timer_create+7)
-#define __NR_clock_nanosleep	(__NR_timer_create+8)
-#define __NR_statfs64		268
-#define __NR_fstatfs64		269
-#define __NR_tgkill		270
-#define __NR_utimes		271
-#define __NR_fadvise64_64	272
-#define __NR_vserver		273
-#define __NR_mbind		274
-#define __NR_get_mempolicy	275
-#define __NR_set_mempolicy	276
-#define __NR_mq_open 		277
-#define __NR_mq_unlink		(__NR_mq_open+1)
-#define __NR_mq_timedsend	(__NR_mq_open+2)
-#define __NR_mq_timedreceive	(__NR_mq_open+3)
-#define __NR_mq_notify		(__NR_mq_open+4)
-#define __NR_mq_getsetattr	(__NR_mq_open+5)
-#define __NR_kexec_load		283
-#define __NR_waitid		284
-/* #define __NR_sys_setaltroot	285 */
-#define __NR_add_key		286
-#define __NR_request_key	287
-#define __NR_keyctl		288
-#define __NR_ioprio_set		289
-#define __NR_ioprio_get		290
-#define __NR_inotify_init	291
-#define __NR_inotify_add_watch	292
-#define __NR_inotify_rm_watch	293
-#define __NR_migrate_pages	294
-#define __NR_openat		295
-#define __NR_mkdirat		296
-#define __NR_mknodat		297
-#define __NR_fchownat		298
-#define __NR_futimesat		299
-#define __NR_fstatat64		300
-#define __NR_unlinkat		301
-#define __NR_renameat		302
-#define __NR_linkat		303
-#define __NR_symlinkat		304
-#define __NR_readlinkat		305
-#define __NR_fchmodat		306
-#define __NR_faccessat		307
-#define __NR_pselect6		308
-#define __NR_ppoll		309
-#define __NR_unshare		310
-#define __NR_set_robust_list	311
-#define __NR_get_robust_list	312
-#define __NR_splice		313
-#define __NR_sync_file_range	314
-#define __NR_tee		315
-#define __NR_vmsplice		316
-#define __NR_move_pages		317
-#define __NR_getcpu		318
-#define __NR_epoll_pwait	319
-#define __NR_utimensat		320
-#define __NR_signalfd		321
-#define __NR_timerfd_create	322
-#define __NR_eventfd		323
-#define __NR_fallocate		324
-#define __NR_timerfd_settime	325
-#define __NR_timerfd_gettime	326
-
-#ifdef __KERNEL__
-
-#define NR_syscalls 327
-
-#include <asm/arch/unistd.h>
-
-#define __ARCH_WANT_IPC_PARSE_VERSION
-#define __ARCH_WANT_OLD_READDIR
-#define __ARCH_WANT_OLD_STAT
-#define __ARCH_WANT_STAT64
-#define __ARCH_WANT_SYS_ALARM
-#define __ARCH_WANT_SYS_GETHOSTNAME
-#define __ARCH_WANT_SYS_PAUSE
-#define __ARCH_WANT_SYS_SGETMASK
-#define __ARCH_WANT_SYS_SIGNAL
-#define __ARCH_WANT_SYS_TIME
-#define __ARCH_WANT_SYS_UTIME
-#define __ARCH_WANT_SYS_WAITPID
-#define __ARCH_WANT_SYS_SOCKETCALL
-#define __ARCH_WANT_SYS_FADVISE64
-#define __ARCH_WANT_SYS_GETPGRP
-#define __ARCH_WANT_SYS_LLSEEK
-#define __ARCH_WANT_SYS_NICE
-#define __ARCH_WANT_SYS_OLD_GETRLIMIT
-#define __ARCH_WANT_SYS_OLDUMOUNT
-#define __ARCH_WANT_SYS_SIGPENDING
-#define __ARCH_WANT_SYS_SIGPROCMASK
-#define __ARCH_WANT_SYS_RT_SIGACTION
-#define __ARCH_WANT_SYS_RT_SIGSUSPEND
-
-/*
- * "Conditional" syscalls
- *
- * What we want is __attribute__((weak,alias("sys_ni_syscall"))),
- * but it doesn't work on all toolchains, so we just do it by hand
- */
-#define cond_syscall(x) asm(".weak\t" #x "\n\t.set\t" #x ",sys_ni_syscall")
-
-#endif /* __KERNEL__ */
-#endif /* _ASM_CRIS_UNISTD_H_ */

include/asm-cris/user.h

···
-#ifndef __ASM_CRIS_USER_H
-#define __ASM_CRIS_USER_H
-
-#include <linux/types.h>
-#include <asm/ptrace.h>
-#include <asm/page.h>
-#include <asm/arch/user.h>
-
-/*
- * Core file format: The core file is written in such a way that gdb
- * can understand it and provide useful information to the user (under
- * linux we use the `trad-core' bfd).  The file contents are as follows:
- *
- *  upage: 1 page consisting of a user struct that tells gdb
- *	what is present in the file.  Directly after this is a
- *	copy of the task_struct, which is currently not used by gdb,
- *	but it may come in handy at some point.  All of the registers
- *	are stored as part of the upage.  The upage should always be
- *	only one page long.
- *  data: The data segment follows next.  We use current->end_text to
- *	current->brk to pick up all of the user variables, plus any memory
- *	that may have been sbrk'ed.  No attempt is made to determine if a
- *	page is demand-zero or if a page is totally unused, we just cover
- *	the entire range.  All of the addresses are rounded in such a way
- *	that an integral number of pages is written.
- *  stack: We need the stack information in order to get a meaningful
- *	backtrace.  We need to write the data from usp to
- *	current->start_stack, so we round each of these in order to be able
- *	to write an integer number of pages.
- */
-        
-struct user {
-	struct user_regs_struct	regs;		/* entire machine state */
-	size_t		u_tsize;		/* text size (pages) */
-	size_t		u_dsize;		/* data size (pages) */
-	size_t		u_ssize;		/* stack size (pages) */
-	unsigned long	start_code;		/* text starting address */
-	unsigned long	start_data;		/* data starting address */
-	unsigned long	start_stack;		/* stack starting address */
-	long int	signal;			/* signal causing core dump */
-	unsigned long	u_ar0;			/* help gdb find registers */
-	unsigned long	magic;			/* identifies a core file */
-	char		u_comm[32];		/* user command name */
-};
-
-#define NBPG			PAGE_SIZE
-#define UPAGES			1
-#define HOST_TEXT_START_ADDR	(u.start_code)
-#define HOST_DATA_START_ADDR	(u.start_data)
-#define HOST_STACK_END_ADDR	(u.start_stack + u.u_ssize * NBPG)
-
-#endif /* __ASM_CRIS_USER_H */