[PATCH] ppc32: ppc440 pagetable attributes (comments updates)

Here's an incremental patch with comment updates and some additional
grammar cleanups.

Signed-off-by: Matt Porter <mporter@kernel.crashing.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>

authored by Matt Porter and committed by Linus Torvalds 021a52ac 534afb90

+13 -13
+13 -13
include/asm-ppc/pgtable.h
··· 227 * doesn't support SMP. So we can use this as software bit, like 228 * DIRTY. 229 * 230 - * PPC Book-E Linux implementation uses PPC HW PTE bit field definition, 231 - * even it doesn't have HW PTE. 0-11th LSB of PTE stand for memory 232 - * protection-related function. (See PTE structure in include/asm-ppc/mmu.h) 233 - * Definition of _PAGE_XXX in "include/asm-ppc/pagetable.h" stands for 234 - * above bits. Note that those bits values are CPU dependent, not 235 - * architecture. 236 * 237 - * Kernel PTE entry holds arch-dependent swp_entry structure under certain 238 - * situation. In other words, in such situation, some portion of PTE bits 239 - * are used as swp_entry. In PPC implementation, 3-24th LSB are shared with 240 - * swp_entry, however 0-2nd three LSB still hold protection values. 241 - * That means three protection bits are reserved for both PTE and SWAP 242 - * entry at the most three LSBs. 243 * 244 - * There are three protection bits available for SWAP entry; 245 * _PAGE_PRESENT 246 * _PAGE_FILE 247 * _PAGE_HASHPTE (if HW has)
··· 227 * doesn't support SMP. So we can use this as software bit, like 228 * DIRTY. 229 * 230 + * With the PPC 44x Linux implementation, the 0-11th LSBs of the PTE are used 231 + * for memory protection related functions (see PTE structure in 232 + * include/asm-ppc/mmu.h). The _PAGE_XXX definitions in this file map to the 233 + * above bits. Note that the bit values are CPU specific, not architecture 234 + * specific. 235 * 236 + * The kernel PTE entry holds an arch-dependent swp_entry structure under 237 + * certain situations. In other words, in such situations some portion of 238 + * the PTE bits are used as a swp_entry. In the PPC implementation, the 239 + * 3-24th LSB are shared with swp_entry, however the 0-2nd three LSB still 240 + * hold protection values. That means the three protection bits are 241 + * reserved for both PTE and SWAP entry at the most significant three 242 + * LSBs. 243 * 244 + * There are three protection bits available for SWAP entry: 245 * _PAGE_PRESENT 246 * _PAGE_FILE 247 * _PAGE_HASHPTE (if HW has)