[IA64] Fix 64-bit atomic routines to return "long"

These have been broken (returning "int") since the dawn of
time. But there were no users that needed the whole value
until commit
424acaaeb3a3932d64a9b4bd59df6cf72c22d8f3
rwsem: wake queued readers when writer blocks on active read lock

made this change:

- (rwsem_atomic_update(0, sem) & RWSEM_ACTIVE_MASK))
- /* Someone grabbed the sem already */
+ rwsem_atomic_update(0, sem) < RWSEM_WAITING_BIAS)
+ /* Someone grabbed the sem for write already */

RWSEM_ACTIVE_MASK is 0xffffffffL, so the old code only looked
at the low order 32-bits. The new code needs to see all 64 bits.

Signed-off-by: Tony Luck <tony.luck@intel.com>

Tony Luck 01d69a82 ad41a1e0

+4 -4
+4 -4
arch/ia64/include/asm/atomic.h
··· 41 return new; 42 } 43 44 - static __inline__ int 45 ia64_atomic64_add (__s64 i, atomic64_t *v) 46 { 47 __s64 old, new; ··· 69 return new; 70 } 71 72 - static __inline__ int 73 ia64_atomic64_sub (__s64 i, atomic64_t *v) 74 { 75 __s64 old, new; ··· 107 108 #define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0) 109 110 - static __inline__ int atomic64_add_unless(atomic64_t *v, long a, long u) 111 { 112 long c, old; 113 c = atomic64_read(v); ··· 158 return atomic_add_return(i, v) < 0; 159 } 160 161 - static __inline__ int 162 atomic64_add_negative (__s64 i, atomic64_t *v) 163 { 164 return atomic64_add_return(i, v) < 0;
··· 41 return new; 42 } 43 44 + static __inline__ long 45 ia64_atomic64_add (__s64 i, atomic64_t *v) 46 { 47 __s64 old, new; ··· 69 return new; 70 } 71 72 + static __inline__ long 73 ia64_atomic64_sub (__s64 i, atomic64_t *v) 74 { 75 __s64 old, new; ··· 107 108 #define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0) 109 110 + static __inline__ long atomic64_add_unless(atomic64_t *v, long a, long u) 111 { 112 long c, old; 113 c = atomic64_read(v); ··· 158 return atomic_add_return(i, v) < 0; 159 } 160 161 + static __inline__ long 162 atomic64_add_negative (__s64 i, atomic64_t *v) 163 { 164 return atomic64_add_return(i, v) < 0;