Merge branch 'drm-fixes' of git://people.freedesktop.org/~airlied/linux

Pull drm fixes from Dave Airlie:
"I really need to get back to sending these on my Friday, instead of my
Monday morning, but nothing too amazing in here: a few amdkfd fixes, a
few radeon fixes, i915 fixes, one tegra fix and one core fix"

* 'drm-fixes' of git://people.freedesktop.org/~airlied/linux:
drm: Zero out invalid vblank timestamp in drm_update_vblank_count.
drm/tegra: Don't use vblank_disable_immediate on incapable driver.
drm/radeon: stop trying to suspend UVD sessions
drm/radeon: more strictly validate the UVD codec
drm/radeon: make UVD handle checking more strict
drm/radeon: make VCE handle check more strict
drm/radeon: fix userptr lockup
drm/radeon: fix userptr BO unpin bug v3
drm/amdkfd: Initialize sdma vm when creating sdma queue
drm/amdkfd: Don't report local memory size
drm/amdkfd: allow unregister process with queues
drm/i915: Drop PIPE-A quirk for 945GSE HP Mini
drm/i915: Sink rate read should be saved in deca-kHz
drm/i915/dp: there is no audio on port A
drm/i915: Add missing MacBook Pro models with dual channel LVDS
drm/i915: Assume dual channel LVDS if pixel clock necessitates it
drm/radeon: don't setup audio on asics that don't support it
drm/radeon: disable semaphores for UVD V1 (v2)

+5 -2
drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c
··· 430 430 431 431 BUG_ON(!dqm || !qpd); 432 432 433 - BUG_ON(!list_empty(&qpd->queues_list)); 433 + pr_debug("In func %s\n", __func__); 434 434 435 - pr_debug("kfd: In func %s\n", __func__); 435 + pr_debug("qpd->queues_list is %s\n", 436 + list_empty(&qpd->queues_list) ? "empty" : "not empty"); 436 437 437 438 retval = 0; 438 439 mutex_lock(&dqm->lock); ··· 882 881 mutex_unlock(&dqm->lock); 883 882 return -ENOMEM; 884 883 } 884 + 885 + init_sdma_vm(dqm, q, qpd); 885 886 886 887 retval = mqd->init_mqd(mqd, &q->mqd, &q->mqd_mem_obj, 887 888 &q->gart_mqd_addr, &q->properties);
+2 -2
drivers/gpu/drm/amd/amdkfd/kfd_topology.c
··· 728 728 sysfs_show_32bit_prop(buffer, "max_engine_clk_fcompute", 729 729 dev->gpu->kfd2kgd->get_max_engine_clock_in_mhz( 730 730 dev->gpu->kgd)); 731 + 731 732 sysfs_show_64bit_prop(buffer, "local_mem_size", 732 - dev->gpu->kfd2kgd->get_vmem_size( 733 - dev->gpu->kgd)); 733 + (unsigned long long int) 0); 734 734 735 735 sysfs_show_32bit_prop(buffer, "fw_version", 736 736 dev->gpu->kfd2kgd->get_fw_version(
+4 -5
drivers/gpu/drm/drm_irq.c
··· 131 131 132 132 /* Reinitialize corresponding vblank timestamp if high-precision query 133 133 * available. Skip this step if query unsupported or failed. Will 134 - * reinitialize delayed at next vblank interrupt in that case. 134 + * reinitialize delayed at next vblank interrupt in that case and 135 + * assign 0 for now, to mark the vblanktimestamp as invalid. 135 136 */ 136 - if (rc) { 137 - tslot = atomic_read(&vblank->count) + diff; 138 - vblanktimestamp(dev, crtc, tslot) = t_vblank; 139 - } 137 + tslot = atomic_read(&vblank->count) + diff; 138 + vblanktimestamp(dev, crtc, tslot) = rc ? t_vblank : (struct timeval) {0, 0}; 140 139 141 140 smp_mb__before_atomic(); 142 141 atomic_add(diff, &vblank->count);
-3
drivers/gpu/drm/i915/intel_display.c
··· 13635 13635 }; 13636 13636 13637 13637 static struct intel_quirk intel_quirks[] = { 13638 - /* HP Mini needs pipe A force quirk (LP: #322104) */ 13639 - { 0x27ae, 0x103c, 0x361a, quirk_pipea_force }, 13640 - 13641 13638 /* Toshiba Protege R-205, S-209 needs pipe A force quirk */ 13642 13639 { 0x2592, 0x1179, 0x0001, quirk_pipea_force }, 13643 13640
+5 -4
drivers/gpu/drm/i915/intel_dp.c
··· 1348 1348 1349 1349 pipe_config->has_dp_encoder = true; 1350 1350 pipe_config->has_drrs = false; 1351 - pipe_config->has_audio = intel_dp->has_audio; 1351 + pipe_config->has_audio = intel_dp->has_audio && port != PORT_A; 1352 1352 1353 1353 if (is_edp(intel_dp) && intel_connector->panel.fixed_mode) { 1354 1354 intel_fixed_panel_mode(intel_connector->panel.fixed_mode, ··· 2211 2211 int dotclock; 2212 2212 2213 2213 tmp = I915_READ(intel_dp->output_reg); 2214 - if (tmp & DP_AUDIO_OUTPUT_ENABLE) 2215 - pipe_config->has_audio = true; 2214 + 2215 + pipe_config->has_audio = tmp & DP_AUDIO_OUTPUT_ENABLE && port != PORT_A; 2216 2216 2217 2217 if ((port == PORT_A) || !HAS_PCH_CPT(dev)) { 2218 2218 if (tmp & DP_SYNC_HS_HIGH) ··· 3812 3812 if (val == 0) 3813 3813 break; 3814 3814 3815 - intel_dp->sink_rates[i] = val * 200; 3815 + /* Value read is in kHz while drm clock is saved in deca-kHz */ 3816 + intel_dp->sink_rates[i] = (val * 200) / 10; 3816 3817 } 3817 3818 intel_dp->num_sink_rates = i; 3818 3819 }
+24 -2
drivers/gpu/drm/i915/intel_lvds.c
··· 813 813 static const struct dmi_system_id intel_dual_link_lvds[] = { 814 814 { 815 815 .callback = intel_dual_link_lvds_callback, 816 - .ident = "Apple MacBook Pro (Core i5/i7 Series)", 816 + .ident = "Apple MacBook Pro 15\" (2010)", 817 + .matches = { 818 + DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."), 819 + DMI_MATCH(DMI_PRODUCT_NAME, "MacBookPro6,2"), 820 + }, 821 + }, 822 + { 823 + .callback = intel_dual_link_lvds_callback, 824 + .ident = "Apple MacBook Pro 15\" (2011)", 817 825 .matches = { 818 826 DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."), 819 827 DMI_MATCH(DMI_PRODUCT_NAME, "MacBookPro8,2"), 828 + }, 829 + }, 830 + { 831 + .callback = intel_dual_link_lvds_callback, 832 + .ident = "Apple MacBook Pro 15\" (2012)", 833 + .matches = { 834 + DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."), 835 + DMI_MATCH(DMI_PRODUCT_NAME, "MacBookPro9,1"), 820 836 }, 821 837 }, 822 838 { } /* terminating entry */ ··· 863 847 /* use the module option value if specified */ 864 848 if (i915.lvds_channel_mode > 0) 865 849 return i915.lvds_channel_mode == 2; 850 + 851 + /* single channel LVDS is limited to 112 MHz */ 852 + if (lvds_encoder->attached_connector->base.panel.fixed_mode->clock 853 + > 112999) 854 + return true; 866 855 867 856 if (dmi_check_system(intel_dual_link_lvds)) 868 857 return true; ··· 1132 1111 out: 1133 1112 mutex_unlock(&dev->mode_config.mutex); 1134 1113 1114 + intel_panel_init(&intel_connector->panel, fixed_mode, downclock_mode); 1115 + 1135 1116 lvds_encoder->is_dual_link = compute_is_dual_link_lvds(lvds_encoder); 1136 1117 DRM_DEBUG_KMS("detected %s-link lvds configuration\n", 1137 1118 lvds_encoder->is_dual_link ? "dual" : "single"); ··· 1148 1125 } 1149 1126 drm_connector_register(connector); 1150 1127 1151 - intel_panel_init(&intel_connector->panel, fixed_mode, downclock_mode); 1152 1128 intel_panel_setup_backlight(connector, INVALID_PIPE); 1153 1129 1154 1130 return;
-1
drivers/gpu/drm/radeon/radeon.h
··· 1673 1673 struct radeon_bo *vcpu_bo; 1674 1674 void *cpu_addr; 1675 1675 uint64_t gpu_addr; 1676 - void *saved_bo; 1677 1676 atomic_t handles[RADEON_MAX_UVD_HANDLES]; 1678 1677 struct drm_file *filp[RADEON_MAX_UVD_HANDLES]; 1679 1678 unsigned img_size[RADEON_MAX_UVD_HANDLES];
+1 -1
drivers/gpu/drm/radeon/radeon_asic.c
··· 1202 1202 static struct radeon_asic_ring rv770_uvd_ring = { 1203 1203 .ib_execute = &uvd_v1_0_ib_execute, 1204 1204 .emit_fence = &uvd_v2_2_fence_emit, 1205 - .emit_semaphore = &uvd_v1_0_semaphore_emit, 1205 + .emit_semaphore = &uvd_v2_2_semaphore_emit, 1206 1206 .cs_parse = &radeon_uvd_cs_parse, 1207 1207 .ring_test = &uvd_v1_0_ring_test, 1208 1208 .ib_test = &uvd_v1_0_ib_test,
+4
drivers/gpu/drm/radeon/radeon_asic.h
··· 949 949 int uvd_v2_2_resume(struct radeon_device *rdev); 950 950 void uvd_v2_2_fence_emit(struct radeon_device *rdev, 951 951 struct radeon_fence *fence); 952 + bool uvd_v2_2_semaphore_emit(struct radeon_device *rdev, 953 + struct radeon_ring *ring, 954 + struct radeon_semaphore *semaphore, 955 + bool emit_wait); 952 956 953 957 /* uvd v3.1 */ 954 958 bool uvd_v3_1_semaphore_emit(struct radeon_device *rdev,
+4
drivers/gpu/drm/radeon/radeon_audio.c
··· 464 464 return; 465 465 466 466 rdev = connector->encoder->dev->dev_private; 467 + 468 + if (!radeon_audio_chipset_supported(rdev)) 469 + return; 470 + 467 471 radeon_encoder = to_radeon_encoder(connector->encoder); 468 472 dig = radeon_encoder->enc_priv; 469 473
+3
drivers/gpu/drm/radeon/radeon_mn.c
··· 142 142 143 143 list_for_each_entry(bo, &node->bos, mn_list) { 144 144 145 + if (!bo->tbo.ttm || bo->tbo.ttm->state != tt_bound) 146 + continue; 147 + 145 148 r = radeon_bo_reserve(bo, true); 146 149 if (r) { 147 150 DRM_ERROR("(%ld) failed to reserve user bo\n", r);
+3 -5
drivers/gpu/drm/radeon/radeon_ttm.c
··· 591 591 { 592 592 struct radeon_device *rdev = radeon_get_rdev(ttm->bdev); 593 593 struct radeon_ttm_tt *gtt = (void *)ttm; 594 - struct scatterlist *sg; 595 - int i; 594 + struct sg_page_iter sg_iter; 596 595 597 596 int write = !(gtt->userflags & RADEON_GEM_USERPTR_READONLY); 598 597 enum dma_data_direction direction = write ? ··· 604 605 /* free the sg table and pages again */ 605 606 dma_unmap_sg(rdev->dev, ttm->sg->sgl, ttm->sg->nents, direction); 606 607 607 - for_each_sg(ttm->sg->sgl, sg, ttm->sg->nents, i) { 608 - struct page *page = sg_page(sg); 609 - 608 + for_each_sg_page(ttm->sg->sgl, &sg_iter, ttm->sg->nents, 0) { 609 + struct page *page = sg_page_iter_page(&sg_iter); 610 610 if (!(gtt->userflags & RADEON_GEM_USERPTR_READONLY)) 611 611 set_page_dirty(page); 612 612
+93 -51
drivers/gpu/drm/radeon/radeon_uvd.c
··· 204 204 205 205 int radeon_uvd_suspend(struct radeon_device *rdev) 206 206 { 207 - unsigned size; 208 - void *ptr; 209 - int i; 207 + int i, r; 210 208 211 209 if (rdev->uvd.vcpu_bo == NULL) 212 210 return 0; 213 211 214 - for (i = 0; i < RADEON_MAX_UVD_HANDLES; ++i) 215 - if (atomic_read(&rdev->uvd.handles[i])) 216 - break; 212 + for (i = 0; i < RADEON_MAX_UVD_HANDLES; ++i) { 213 + uint32_t handle = atomic_read(&rdev->uvd.handles[i]); 214 + if (handle != 0) { 215 + struct radeon_fence *fence; 217 216 218 - if (i == RADEON_MAX_UVD_HANDLES) 219 - return 0; 217 + radeon_uvd_note_usage(rdev); 220 218 221 - size = radeon_bo_size(rdev->uvd.vcpu_bo); 222 - size -= rdev->uvd_fw->size; 219 + r = radeon_uvd_get_destroy_msg(rdev, 220 + R600_RING_TYPE_UVD_INDEX, handle, &fence); 221 + if (r) { 222 + DRM_ERROR("Error destroying UVD (%d)!\n", r); 223 + continue; 224 + } 223 225 224 - ptr = rdev->uvd.cpu_addr; 225 - ptr += rdev->uvd_fw->size; 226 + radeon_fence_wait(fence, false); 227 + radeon_fence_unref(&fence); 226 228 227 - rdev->uvd.saved_bo = kmalloc(size, GFP_KERNEL); 228 - memcpy(rdev->uvd.saved_bo, ptr, size); 229 + rdev->uvd.filp[i] = NULL; 230 + atomic_set(&rdev->uvd.handles[i], 0); 231 + } 232 + } 229 233 230 234 return 0; 231 235 } ··· 250 246 ptr = rdev->uvd.cpu_addr; 251 247 ptr += rdev->uvd_fw->size; 252 248 253 - if (rdev->uvd.saved_bo != NULL) { 254 - memcpy(ptr, rdev->uvd.saved_bo, size); 255 - kfree(rdev->uvd.saved_bo); 256 - rdev->uvd.saved_bo = NULL; 257 - } else 258 - memset(ptr, 0, size); 249 + memset(ptr, 0, size); 259 250 260 251 return 0; 261 252 } ··· 395 396 return 0; 396 397 } 397 398 399 + static int radeon_uvd_validate_codec(struct radeon_cs_parser *p, 400 + unsigned stream_type) 401 + { 402 + switch (stream_type) { 403 + case 0: /* H264 */ 404 + case 1: /* VC1 */ 405 + /* always supported */ 406 + return 0; 407 + 408 + case 3: /* MPEG2 */ 409 + case 4: /* MPEG4 */ 410 + /* only since UVD 3 */ 411 + if (p->rdev->family >= CHIP_PALM) 412 + return 0; 413 + 414 + /* fall through */ 415 + default: 416 + DRM_ERROR("UVD codec not supported by hardware %d!\n", 417 + stream_type); 418 + return -EINVAL; 419 + } 420 + } 421 + 398 422 static int radeon_uvd_cs_msg(struct radeon_cs_parser *p, struct radeon_bo *bo, 399 423 unsigned offset, unsigned buf_sizes[]) 400 424 { ··· 458 436 return -EINVAL; 459 437 } 460 438 461 - if (msg_type == 1) { 462 - /* it's a decode msg, calc buffer sizes */ 463 - r = radeon_uvd_cs_msg_decode(msg, buf_sizes); 464 - /* calc image size (width * height) */ 465 - img_size = msg[6] * msg[7]; 439 + switch (msg_type) { 440 + case 0: 441 + /* it's a create msg, calc image size (width * height) */ 442 + img_size = msg[7] * msg[8]; 443 + 444 + r = radeon_uvd_validate_codec(p, msg[4]); 466 445 radeon_bo_kunmap(bo); 467 446 if (r) 468 447 return r; 469 448 470 - } else if (msg_type == 2) { 449 + /* try to alloc a new handle */ 450 + for (i = 0; i < RADEON_MAX_UVD_HANDLES; ++i) { 451 + if (atomic_read(&p->rdev->uvd.handles[i]) == handle) { 452 + DRM_ERROR("Handle 0x%x already in use!\n", handle); 453 + return -EINVAL; 454 + } 455 + 456 + if (!atomic_cmpxchg(&p->rdev->uvd.handles[i], 0, handle)) { 457 + p->rdev->uvd.filp[i] = p->filp; 458 + p->rdev->uvd.img_size[i] = img_size; 459 + return 0; 460 + } 461 + } 462 + 463 + DRM_ERROR("No more free UVD handles!\n"); 464 + return -EINVAL; 465 + 466 + case 1: 467 + /* it's a decode msg, validate codec and calc buffer sizes */ 468 + r = radeon_uvd_validate_codec(p, msg[4]); 469 + if (!r) 470 + r = radeon_uvd_cs_msg_decode(msg, buf_sizes); 471 + radeon_bo_kunmap(bo); 472 + if (r) 473 + return r; 474 + 475 + /* validate the handle */ 476 + for (i = 0; i < RADEON_MAX_UVD_HANDLES; ++i) { 477 + if (atomic_read(&p->rdev->uvd.handles[i]) == handle) { 478 + if (p->rdev->uvd.filp[i] != p->filp) { 479 + DRM_ERROR("UVD handle collision detected!\n"); 480 + return -EINVAL; 481 + } 482 + return 0; 483 + } 484 + } 485 + 486 + DRM_ERROR("Invalid UVD handle 0x%x!\n", handle); 487 + return -ENOENT; 488 + 489 + case 2: 471 490 /* it's a destroy msg, free the handle */ 472 491 for (i = 0; i < RADEON_MAX_UVD_HANDLES; ++i) 473 492 atomic_cmpxchg(&p->rdev->uvd.handles[i], handle, 0); 474 493 radeon_bo_kunmap(bo); 475 494 return 0; 476 - } else { 477 - /* it's a create msg, calc image size (width * height) */ 478 - img_size = msg[7] * msg[8]; 479 - radeon_bo_kunmap(bo); 480 495 481 - if (msg_type != 0) { 482 - DRM_ERROR("Illegal UVD message type (%d)!\n", msg_type); 483 - return -EINVAL; 484 - } 496 + default: 485 497 486 - /* it's a create msg, no special handling needed */ 498 + DRM_ERROR("Illegal UVD message type (%d)!\n", msg_type); 499 + return -EINVAL; 487 500 } 488 501 489 - /* create or decode, validate the handle */ 490 - for (i = 0; i < RADEON_MAX_UVD_HANDLES; ++i) { 491 - if (atomic_read(&p->rdev->uvd.handles[i]) == handle) 492 - return 0; 493 - } 494 - 495 - /* handle not found try to alloc a new one */ 496 - for (i = 0; i < RADEON_MAX_UVD_HANDLES; ++i) { 497 - if (!atomic_cmpxchg(&p->rdev->uvd.handles[i], 0, handle)) { 498 - p->rdev->uvd.filp[i] = p->filp; 499 - p->rdev->uvd.img_size[i] = img_size; 500 - return 0; 501 - } 502 - } 503 - 504 - DRM_ERROR("No more free UVD handles!\n"); 502 + BUG(); 505 503 return -EINVAL; 506 504 } 507 505
+48 -17
drivers/gpu/drm/radeon/radeon_vce.c
··· 493 493 * 494 494 * @p: parser context 495 495 * @handle: handle to validate 496 + * @allocated: allocated a new handle? 496 497 * 497 498 * Validates the handle and return the found session index or -EINVAL 498 499 * we we don't have another free session index. 499 500 */ 500 - int radeon_vce_validate_handle(struct radeon_cs_parser *p, uint32_t handle) 501 + static int radeon_vce_validate_handle(struct radeon_cs_parser *p, 502 + uint32_t handle, bool *allocated) 501 503 { 502 504 unsigned i; 503 505 506 + *allocated = false; 507 + 504 508 /* validate the handle */ 505 509 for (i = 0; i < RADEON_MAX_VCE_HANDLES; ++i) { 506 - if (atomic_read(&p->rdev->vce.handles[i]) == handle) 510 + if (atomic_read(&p->rdev->vce.handles[i]) == handle) { 511 + if (p->rdev->vce.filp[i] != p->filp) { 512 + DRM_ERROR("VCE handle collision detected!\n"); 513 + return -EINVAL; 514 + } 507 515 return i; 516 + } 508 517 } 509 518 510 519 /* handle not found try to alloc a new one */ ··· 521 512 if (!atomic_cmpxchg(&p->rdev->vce.handles[i], 0, handle)) { 522 513 p->rdev->vce.filp[i] = p->filp; 523 514 p->rdev->vce.img_size[i] = 0; 515 + *allocated = true; 524 516 return i; 525 517 } 526 518 } ··· 539 529 int radeon_vce_cs_parse(struct radeon_cs_parser *p) 540 530 { 541 531 int session_idx = -1; 542 - bool destroyed = false; 532 + bool destroyed = false, created = false, allocated = false; 543 533 uint32_t tmp, handle = 0; 544 534 uint32_t *size = &tmp; 545 - int i, r; 535 + int i, r = 0; 546 536 547 537 while (p->idx < p->chunk_ib->length_dw) { 548 538 uint32_t len = radeon_get_ib_value(p, p->idx); ··· 550 540 551 541 if ((len < 8) || (len & 3)) { 552 542 DRM_ERROR("invalid VCE command length (%d)!\n", len); 553 - return -EINVAL; 543 + r = -EINVAL; 544 + goto out; 554 545 } 555 546 556 547 if (destroyed) { 557 548 DRM_ERROR("No other command allowed after destroy!\n"); 558 - return -EINVAL; 549 + r = -EINVAL; 550 + goto out; 559 551 } 560 552 561 553 switch (cmd) { 562 554 case 0x00000001: // session 563 555 handle = radeon_get_ib_value(p, p->idx + 2); 564 - session_idx = radeon_vce_validate_handle(p, handle); 556 + session_idx = radeon_vce_validate_handle(p, handle, 557 + &allocated); 565 558 if (session_idx < 0) 566 559 return session_idx; 567 560 size = &p->rdev->vce.img_size[session_idx]; ··· 574 561 break; 575 562 576 563 case 0x01000001: // create 564 + created = true; 565 + if (!allocated) { 566 + DRM_ERROR("Handle already in use!\n"); 567 + r = -EINVAL; 568 + goto out; 569 + } 570 + 577 571 *size = radeon_get_ib_value(p, p->idx + 8) * 578 572 radeon_get_ib_value(p, p->idx + 10) * 579 573 8 * 3 / 2; ··· 598 578 r = radeon_vce_cs_reloc(p, p->idx + 10, p->idx + 9, 599 579 *size); 600 580 if (r) 601 - return r; 581 + goto out; 602 582 603 583 r = radeon_vce_cs_reloc(p, p->idx + 12, p->idx + 11, 604 584 *size / 3); 605 585 if (r) 606 - return r; 586 + goto out; 607 587 break; 608 588 609 589 case 0x02000001: // destroy ··· 614 594 r = radeon_vce_cs_reloc(p, p->idx + 3, p->idx + 2, 615 595 *size * 2); 616 596 if (r) 617 - return r; 597 + goto out; 618 598 break; 619 599 620 600 case 0x05000004: // video bitstream buffer ··· 622 602 r = radeon_vce_cs_reloc(p, p->idx + 3, p->idx + 2, 623 603 tmp); 624 604 if (r) 625 - return r; 605 + goto out; 626 606 break; 627 607 628 608 case 0x05000005: // feedback buffer 629 609 r = radeon_vce_cs_reloc(p, p->idx + 3, p->idx + 2, 630 610 4096); 631 611 if (r) 632 - return r; 612 + goto out; 633 613 break; 634 614 635 615 default: 636 616 DRM_ERROR("invalid VCE command (0x%x)!\n", cmd); 637 - return -EINVAL; 617 + r = -EINVAL; 618 + goto out; 638 619 } 639 620 640 621 if (session_idx == -1) { 641 622 DRM_ERROR("no session command at start of IB\n"); 642 - return -EINVAL; 623 + r = -EINVAL; 624 + goto out; 643 625 } 644 626 645 627 p->idx += len / 4; 646 628 } 647 629 648 - if (destroyed) { 649 - /* IB contains a destroy msg, free the handle */ 630 + if (allocated && !created) { 631 + DRM_ERROR("New session without create command!\n"); 632 + r = -ENOENT; 633 + } 634 + 635 + out: 636 + if ((!r && destroyed) || (r && allocated)) { 637 + /* 638 + * IB contains a destroy msg or we have allocated an 639 + * handle and got an error, anyway free the handle 640 + */ 650 641 for (i = 0; i < RADEON_MAX_VCE_HANDLES; ++i) 651 642 atomic_cmpxchg(&p->rdev->vce.handles[i], handle, 0); 652 643 } 653 644 654 - return 0; 645 + return r; 655 646 } 656 647 657 648 /**
+3
drivers/gpu/drm/radeon/rv770d.h
··· 989 989 ((n) & 0x3FFF) << 16) 990 990 991 991 /* UVD */ 992 + #define UVD_SEMA_ADDR_LOW 0xef00 993 + #define UVD_SEMA_ADDR_HIGH 0xef04 994 + #define UVD_SEMA_CMD 0xef08 992 995 #define UVD_GPCOM_VCPU_CMD 0xef0c 993 996 #define UVD_GPCOM_VCPU_DATA0 0xef10 994 997 #define UVD_GPCOM_VCPU_DATA1 0xef14
+2 -12
drivers/gpu/drm/radeon/uvd_v1_0.c
··· 466 466 struct radeon_semaphore *semaphore, 467 467 bool emit_wait) 468 468 { 469 - uint64_t addr = semaphore->gpu_addr; 470 - 471 - radeon_ring_write(ring, PACKET0(UVD_SEMA_ADDR_LOW, 0)); 472 - radeon_ring_write(ring, (addr >> 3) & 0x000FFFFF); 473 - 474 - radeon_ring_write(ring, PACKET0(UVD_SEMA_ADDR_HIGH, 0)); 475 - radeon_ring_write(ring, (addr >> 23) & 0x000FFFFF); 476 - 477 - radeon_ring_write(ring, PACKET0(UVD_SEMA_CMD, 0)); 478 - radeon_ring_write(ring, emit_wait ? 1 : 0); 479 - 480 - return true; 469 + /* disable semaphores for UVD V1 hardware */ 470 + return false; 481 471 } 482 472 483 473 /**
+29
drivers/gpu/drm/radeon/uvd_v2_2.c
··· 60 60 } 61 61 62 62 /** 63 + * uvd_v2_2_semaphore_emit - emit semaphore command 64 + * 65 + * @rdev: radeon_device pointer 66 + * @ring: radeon_ring pointer 67 + * @semaphore: semaphore to emit commands for 68 + * @emit_wait: true if we should emit a wait command 69 + * 70 + * Emit a semaphore command (either wait or signal) to the UVD ring. 71 + */ 72 + bool uvd_v2_2_semaphore_emit(struct radeon_device *rdev, 73 + struct radeon_ring *ring, 74 + struct radeon_semaphore *semaphore, 75 + bool emit_wait) 76 + { 77 + uint64_t addr = semaphore->gpu_addr; 78 + 79 + radeon_ring_write(ring, PACKET0(UVD_SEMA_ADDR_LOW, 0)); 80 + radeon_ring_write(ring, (addr >> 3) & 0x000FFFFF); 81 + 82 + radeon_ring_write(ring, PACKET0(UVD_SEMA_ADDR_HIGH, 0)); 83 + radeon_ring_write(ring, (addr >> 23) & 0x000FFFFF); 84 + 85 + radeon_ring_write(ring, PACKET0(UVD_SEMA_CMD, 0)); 86 + radeon_ring_write(ring, emit_wait ? 1 : 0); 87 + 88 + return true; 89 + } 90 + 91 + /** 63 92 * uvd_v2_2_resume - memory controller programming 64 93 * 65 94 * @rdev: radeon_device pointer
-1
drivers/gpu/drm/tegra/drm.c
··· 173 173 drm->irq_enabled = true; 174 174 175 175 /* syncpoints are used for full 32-bit hardware VBLANK counters */ 176 - drm->vblank_disable_immediate = true; 177 176 drm->max_vblank_count = 0xffffffff; 178 177 179 178 err = drm_vblank_init(drm, drm->mode_config.num_crtc);