Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

dt-bindings: interrupt-controller: Convert hisilicon,mbigen-v2 to DT schema

Convert the HiSilicon MBIGEN binding to DT schema format. It's a
straight-forward conversion.

Link: https://lore.kernel.org/r/20250812203327.730393-1-robh@kernel.org
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>

+76 -84
-84
Documentation/devicetree/bindings/interrupt-controller/hisilicon,mbigen-v2.txt
··· 1 - Hisilicon mbigen device tree bindings. 2 - ======================================= 3 - 4 - Mbigen means: message based interrupt generator. 5 - 6 - MBI is kind of msi interrupt only used on Non-PCI devices. 7 - 8 - To reduce the wired interrupt number connected to GIC, 9 - Hisilicon designed mbigen to collect and generate interrupt. 10 - 11 - 12 - Non-pci devices can connect to mbigen and generate the 13 - interrupt by writing ITS register. 14 - 15 - The mbigen chip and devices connect to mbigen have the following properties: 16 - 17 - Mbigen main node required properties: 18 - ------------------------------------------- 19 - - compatible: Should be "hisilicon,mbigen-v2" 20 - 21 - - reg: Specifies the base physical address and size of the Mbigen 22 - registers. 23 - 24 - Mbigen sub node required properties: 25 - ------------------------------------------ 26 - - interrupt controller: Identifies the node as an interrupt controller 27 - 28 - - msi-parent: Specifies the MSI controller this mbigen use. 29 - For more detail information,please refer to the generic msi-parent binding in 30 - Documentation/devicetree/bindings/interrupt-controller/msi.txt. 31 - 32 - - num-pins: the total number of pins implemented in this Mbigen 33 - instance. 34 - 35 - - #interrupt-cells : Specifies the number of cells needed to encode an 36 - interrupt source. The value must be 2. 37 - 38 - The 1st cell is hardware pin number of the interrupt.This number is local to 39 - each mbigen chip and in the range from 0 to the maximum interrupts number 40 - of the mbigen. 41 - 42 - The 2nd cell is the interrupt trigger type. 43 - The value of this cell should be: 44 - 1: rising edge triggered 45 - or 46 - 4: high level triggered 47 - 48 - Examples: 49 - 50 - mbigen_chip_dsa { 51 - compatible = "hisilicon,mbigen-v2"; 52 - reg = <0x0 0xc0080000 0x0 0x10000>; 53 - 54 - mbigen_gmac:intc_gmac { 55 - interrupt-controller; 56 - msi-parent = <&its_dsa 0x40b1c>; 57 - num-pins = <9>; 58 - #interrupt-cells = <2>; 59 - }; 60 - 61 - mbigen_i2c:intc_i2c { 62 - interrupt-controller; 63 - msi-parent = <&its_dsa 0x40b0e>; 64 - num-pins = <2>; 65 - #interrupt-cells = <2>; 66 - }; 67 - }; 68 - 69 - Devices connect to mbigen required properties: 70 - ---------------------------------------------------- 71 - -interrupts:Specifies the interrupt source. 72 - For the specific information of each cell in this property,please refer to 73 - the "interrupt-cells" description mentioned above. 74 - 75 - Examples: 76 - gmac0: ethernet@c2080000 { 77 - #address-cells = <1>; 78 - #size-cells = <0>; 79 - reg = <0 0xc2080000 0 0x20000>, 80 - <0 0xc0000000 0 0x1000>; 81 - interrupt-parent = <&mbigen_device_gmac>; 82 - interrupts = <656 1>, 83 - <657 1>; 84 - };
+76
Documentation/devicetree/bindings/interrupt-controller/hisilicon,mbigen-v2.yaml
··· 1 + # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2 + %YAML 1.2 3 + --- 4 + $id: http://devicetree.org/schemas/interrupt-controller/hisilicon,mbigen-v2.yaml# 5 + $schema: http://devicetree.org/meta-schemas/core.yaml# 6 + 7 + title: Hisilicon mbigen v2 8 + 9 + maintainers: 10 + - Wei Xu <xuwei5@hisilicon.com> 11 + 12 + description: > 13 + Mbigen means: message based interrupt generator. 14 + 15 + MBI is kind of msi interrupt only used on Non-PCI devices. 16 + 17 + To reduce the wired interrupt number connected to GIC, Hisilicon designed 18 + mbigen to collect and generate interrupt. 19 + 20 + Non-pci devices can connect to mbigen and generate the interrupt by writing 21 + ITS register. 22 + 23 + properties: 24 + compatible: 25 + const: hisilicon,mbigen-v2 26 + 27 + reg: 28 + maxItems: 1 29 + 30 + required: 31 + - compatible 32 + - reg 33 + 34 + additionalProperties: 35 + type: object 36 + additionalProperties: false 37 + 38 + properties: 39 + interrupt-controller: true 40 + 41 + '#interrupt-cells': 42 + const: 2 43 + 44 + msi-parent: 45 + maxItems: 1 46 + 47 + num-pins: 48 + description: The total number of pins implemented in this Mbigen instance. 49 + $ref: /schemas/types.yaml#/definitions/uint32 50 + 51 + required: 52 + - interrupt-controller 53 + - "#interrupt-cells" 54 + - msi-parent 55 + - num-pins 56 + 57 + examples: 58 + - | 59 + mbigen@c0080000 { 60 + compatible = "hisilicon,mbigen-v2"; 61 + reg = <0xc0080000 0x10000>; 62 + 63 + mbigen_gmac: intc_gmac { 64 + interrupt-controller; 65 + #interrupt-cells = <2>; 66 + msi-parent = <&its_dsa 0x40b1c>; 67 + num-pins = <9>; 68 + }; 69 + 70 + mbigen_i2c: intc_i2c { 71 + interrupt-controller; 72 + #interrupt-cells = <2>; 73 + msi-parent = <&its_dsa 0x40b0e>; 74 + num-pins = <2>; 75 + }; 76 + };