sparc64: Fill a missing delay slot.

If the code were already aligned to 64 bytes, wr instruction would be executed
twice --- once in delay slot and once in the jump target.

Signed-off-by: Mikulas Patocka <[e-mail]>
Signed-off-by: David S. Miller <[e-mail]>

arch/sparc/include/asm/system_64.h

···
  */
 #define write_pic(__p)  					\
 	__asm__ __volatile__("ba,pt	%%xcc, 99f\n\t"		\
+			     " nop\n\t"				\
 			     ".align	64\n"			\
 			  "99:wr	%0, 0x0, %%pic\n\t"	\
 			     "rd	%%pic, %%g0" : : "r" (__p))