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x86/insn: Add misc instructions to x86 instruction decoder

x86 instruction decoder is used for both kernel instructions and user space
instructions (e.g. uprobes, perf tools Intel PT), so it is good to update
it with new instructions.

Add instructions to x86 instruction decoder:

User Interrupt

clui
senduipi
stui
testui
uiret

Prediction history reset

hreset

Serialize instruction execution

serialize

TSX suspend load address tracking

xresldtrk
xsusldtrk

Reference:
Intel Architecture Instruction Set Extensions and Future Features
Programming Reference
May 2021
Document Number: 319433-044

Example using perf tools' x86 instruction decoder test:

$ perf test -v "x86 instruction decoder" |& grep -i hreset
Decoded ok: f3 0f 3a f0 c0 00 hreset $0x0
Decoded ok: f3 0f 3a f0 c0 00 hreset $0x0

Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Borislav Petkov <bp@suse.de>
Acked-by: Arnaldo Carvalho de Melo <acme@redhat.com>
Acked-by: Masami Hiramatsu <mhiramat@kernel.org>
Link: https://lore.kernel.org/r/20211202095029.2165714-5-adrian.hunter@intel.com

authored by

Adrian Hunter and committed by
Borislav Petkov 0153d98f a6ea1142

+6 -6
+3 -3
arch/x86/lib/x86-opcode-map.txt
··· 893 893 ce: vgf2p8affineqb Vx,Wx,Ib (66) 894 894 cf: vgf2p8affineinvqb Vx,Wx,Ib (66) 895 895 df: VAESKEYGEN Vdq,Wdq,Ib (66),(v1) 896 - f0: RORX Gy,Ey,Ib (F2),(v) 896 + f0: RORX Gy,Ey,Ib (F2),(v) | HRESET Gv,Ib (F3),(000),(11B) 897 897 EndTable 898 898 899 899 GrpTable: Grp1 ··· 976 976 2: LGDT Ms | XGETBV (000),(11B) | XSETBV (001),(11B) | VMFUNC (100),(11B) | XEND (101)(11B) | XTEST (110)(11B) | ENCLU (111),(11B) 977 977 3: LIDT Ms 978 978 4: SMSW Mw/Rv 979 - 5: rdpkru (110),(11B) | wrpkru (111),(11B) | SAVEPREVSSP (F3),(010),(11B) | RSTORSSP Mq (F3) | SETSSBSY (F3),(000),(11B) 979 + 5: rdpkru (110),(11B) | wrpkru (111),(11B) | SAVEPREVSSP (F3),(010),(11B) | RSTORSSP Mq (F3) | SETSSBSY (F3),(000),(11B) | CLUI (F3),(110),(11B) | SERIALIZE (000),(11B) | STUI (F3),(111),(11B) | TESTUI (F3)(101)(11B) | UIRET (F3),(100),(11B) | XRESLDTRK (F2),(000),(11B) | XSUSLDTRK (F2),(001),(11B) 980 980 6: LMSW Ew 981 981 7: INVLPG Mb | SWAPGS (o64),(000),(11B) | RDTSCP (001),(11B) 982 982 EndTable ··· 993 993 3: xrstors 994 994 4: xsavec 995 995 5: xsaves 996 - 6: VMPTRLD Mq | VMCLEAR Mq (66) | VMXON Mq (F3) | RDRAND Rv (11B) 996 + 6: VMPTRLD Mq | VMCLEAR Mq (66) | VMXON Mq (F3) | RDRAND Rv (11B) | SENDUIPI Gq (F3) 997 997 7: VMPTRST Mq | VMPTRST Mq (F3) | RDSEED Rv (11B) 998 998 EndTable 999 999
+3 -3
tools/arch/x86/lib/x86-opcode-map.txt
··· 893 893 ce: vgf2p8affineqb Vx,Wx,Ib (66) 894 894 cf: vgf2p8affineinvqb Vx,Wx,Ib (66) 895 895 df: VAESKEYGEN Vdq,Wdq,Ib (66),(v1) 896 - f0: RORX Gy,Ey,Ib (F2),(v) 896 + f0: RORX Gy,Ey,Ib (F2),(v) | HRESET Gv,Ib (F3),(000),(11B) 897 897 EndTable 898 898 899 899 GrpTable: Grp1 ··· 976 976 2: LGDT Ms | XGETBV (000),(11B) | XSETBV (001),(11B) | VMFUNC (100),(11B) | XEND (101)(11B) | XTEST (110)(11B) | ENCLU (111),(11B) 977 977 3: LIDT Ms 978 978 4: SMSW Mw/Rv 979 - 5: rdpkru (110),(11B) | wrpkru (111),(11B) | SAVEPREVSSP (F3),(010),(11B) | RSTORSSP Mq (F3) | SETSSBSY (F3),(000),(11B) 979 + 5: rdpkru (110),(11B) | wrpkru (111),(11B) | SAVEPREVSSP (F3),(010),(11B) | RSTORSSP Mq (F3) | SETSSBSY (F3),(000),(11B) | CLUI (F3),(110),(11B) | SERIALIZE (000),(11B) | STUI (F3),(111),(11B) | TESTUI (F3)(101)(11B) | UIRET (F3),(100),(11B) | XRESLDTRK (F2),(000),(11B) | XSUSLDTRK (F2),(001),(11B) 980 980 6: LMSW Ew 981 981 7: INVLPG Mb | SWAPGS (o64),(000),(11B) | RDTSCP (001),(11B) 982 982 EndTable ··· 993 993 3: xrstors 994 994 4: xsavec 995 995 5: xsaves 996 - 6: VMPTRLD Mq | VMCLEAR Mq (66) | VMXON Mq (F3) | RDRAND Rv (11B) 996 + 6: VMPTRLD Mq | VMCLEAR Mq (66) | VMXON Mq (F3) | RDRAND Rv (11B) | SENDUIPI Gq (F3) 997 997 7: VMPTRST Mq | VMPTRST Mq (F3) | RDSEED Rv (11B) 998 998 EndTable 999 999