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dt-bindings: IDU-intc: Clean up documentation

* Some lines exceeded 80 characters.
* Clarified statement about AUX register interface

Signed-off-by: Mischa Jonker <mischa.jonker@synopsys.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>

authored by

Mischa Jonker and committed by
Vineet Gupta 01449985 174ae4e9

+5 -4
+5 -4
Documentation/devicetree/bindings/interrupt-controller/snps,archs-idu-intc.txt
··· 1 1 * ARC-HS Interrupt Distribution Unit 2 2 3 - This optional 2nd level interrupt controller can be used in SMP configurations for 4 - dynamic IRQ routing, load balancing of common/external IRQs towards core intc. 3 + This optional 2nd level interrupt controller can be used in SMP configurations 4 + for dynamic IRQ routing, load balancing of common/external IRQs towards core 5 + intc. 5 6 6 7 Properties: 7 8 ··· 14 13 of the particular interrupt line of IDU corresponds to the line N+24 of the 15 14 core interrupt controller. 16 15 17 - intc accessed via the special ARC AUX register interface, hence "reg" property 18 - is not specified. 16 + The interrupt controller is accessed via the special ARC AUX register 17 + interface, hence "reg" property is not specified. 19 18 20 19 Example: 21 20 core_intc: core-interrupt-controller {