tjh.dev
+2
-2
arch/mips/pci/pci-rt2880.c
+2
-2
arch/mips/pci/pci-rt2880.c
···
11
11
* by the Free Software Foundation.
12
12
*/
13
13
14
+
#include <linux/delay.h>
14
15
#include <linux/types.h>
15
16
#include <linux/pci.h>
16
17
#include <linux/io.h>
···
233
232
ioport_resource.end = RT2880_PCI_IO_BASE + RT2880_PCI_IO_SIZE - 1;
234
233
235
234
rt2880_pci_reg_write(0, RT2880_PCI_REG_PCICFG_ADDR);
236
-
for (i = 0; i < 0xfffff; i++)
237
-
;
235
+
udelay(1);
238
236
239
237
rt2880_pci_reg_write(0x79, RT2880_PCI_REG_ARBCTL);
240
238
rt2880_pci_reg_write(0x07FF0001, RT2880_PCI_REG_BAR0SETUP_ADDR);
+3
-1
arch/mips/pmcs-msp71xx/msp_setup.c
+3
-1
arch/mips/pmcs-msp71xx/msp_setup.c
···
10
10
* option) any later version.
11
11
*/
12
12
13
+
#include <linux/delay.h>
14
+
13
15
#include <asm/bootinfo.h>
14
16
#include <asm/cacheflush.h>
15
17
#include <asm/idle.h>
···
79
77
*/
80
78
81
79
/* Wait a bit for the DDRC to settle */
82
-
for (i = 0; i < 100000000; i++);
80
+
mdelay(125);
83
81
84
82
#if defined(CONFIG_PMC_MSP7120_GW)
85
83
/*
+4
-2
arch/mips/sni/reset.c
+4
-2
arch/mips/sni/reset.c
···
3
3
*
4
4
* Reset a SNI machine.
5
5
*/
6
+
#include <linux/delay.h>
7
+
6
8
#include <asm/io.h>
7
9
#include <asm/reboot.h>
8
10
#include <asm/sni.h>
···
34
32
for (;;) {
35
33
for (i = 0; i < 100; i++) {
36
34
kb_wait();
37
-
for (j = 0; j < 100000 ; j++)
38
-
/* nothing */;
35
+
udelay(50);
39
36
outb_p(0xfe, 0x64); /* pulse reset low */
37
+
udelay(50);
40
38
}
41
39
}
42
40
}