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Linux kernel mirror (for testing)
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1/* SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause) */
2/* Copyright(c) 2015-17 Intel Corporation. */
3
4#ifndef __SDW_INTEL_LOCAL_H
5#define __SDW_INTEL_LOCAL_H
6
7struct hdac_bus;
8
9/**
10 * struct sdw_intel_link_res - Soundwire Intel link resource structure,
11 * typically populated by the controller driver.
12 * @hw_ops: platform-specific ops
13 * @mmio_base: mmio base of SoundWire registers
14 * @registers: Link IO registers base
15 * @ip_offset: offset for MCP_IP registers
16 * @shim: Audio shim pointer
17 * @shim_vs: Audio vendor-specific shim pointer
18 * @alh: ALH (Audio Link Hub) pointer
19 * @irq: Interrupt line
20 * @ops: Shim callback ops
21 * @dev: device implementing hw_params and free callbacks
22 * @shim_lock: mutex to handle access to shared SHIM registers
23 * @shim_mask: global pointer to check SHIM register initialization
24 * @clock_stop_quirks: mask defining requested behavior on pm_suspend
25 * @link_mask: global mask needed for power-up/down sequences
26 * @cdns: Cadence master descriptor
27 * @list: used to walk-through all masters exposed by the same controller
28 * @hbus: hdac_bus pointer, needed for power management
29 */
30struct sdw_intel_link_res {
31 const struct sdw_intel_hw_ops *hw_ops;
32
33 void __iomem *mmio_base; /* not strictly needed, useful for debug */
34 void __iomem *registers;
35 u32 ip_offset;
36 void __iomem *shim;
37 void __iomem *shim_vs;
38 void __iomem *alh;
39 int irq;
40 const struct sdw_intel_ops *ops;
41 struct device *dev;
42 struct mutex *shim_lock; /* protect shared registers */
43 u32 *shim_mask;
44 u32 clock_stop_quirks;
45 u32 link_mask;
46 struct sdw_cdns *cdns;
47 struct list_head list;
48 struct hdac_bus *hbus;
49};
50
51struct sdw_intel {
52 struct sdw_cdns cdns;
53 int instance;
54 struct sdw_intel_link_res *link_res;
55 bool startup_done;
56#ifdef CONFIG_DEBUG_FS
57 struct dentry *debugfs;
58#endif
59};
60
61struct sdw_intel_prop {
62 u16 clde;
63 u16 doaise2;
64 u16 dodse2;
65 u16 clds;
66 u16 clss;
67 u16 doaise;
68 u16 doais;
69 u16 dodse;
70 u16 dods;
71};
72
73enum intel_pdi_type {
74 INTEL_PDI_IN = 0,
75 INTEL_PDI_OUT = 1,
76 INTEL_PDI_BD = 2,
77};
78
79/*
80 * Read, write helpers for HW registers
81 */
82static inline int intel_readl(void __iomem *base, int offset)
83{
84 return readl(base + offset);
85}
86
87static inline void intel_writel(void __iomem *base, int offset, int value)
88{
89 writel(value, base + offset);
90}
91
92static inline u16 intel_readw(void __iomem *base, int offset)
93{
94 return readw(base + offset);
95}
96
97static inline void intel_writew(void __iomem *base, int offset, u16 value)
98{
99 writew(value, base + offset);
100}
101
102#define cdns_to_intel(_cdns) container_of(_cdns, struct sdw_intel, cdns)
103
104#define INTEL_MASTER_RESET_ITERATIONS 10
105
106#define SDW_INTEL_CHECK_OPS(sdw, cb) ((sdw) && (sdw)->link_res && (sdw)->link_res->hw_ops && \
107 (sdw)->link_res->hw_ops->cb)
108#define SDW_INTEL_OPS(sdw, cb) ((sdw)->link_res->hw_ops->cb)
109
110#ifdef CONFIG_DEBUG_FS
111void intel_ace2x_debugfs_init(struct sdw_intel *sdw);
112void intel_ace2x_debugfs_exit(struct sdw_intel *sdw);
113#else
114static inline void intel_ace2x_debugfs_init(struct sdw_intel *sdw) {}
115static inline void intel_ace2x_debugfs_exit(struct sdw_intel *sdw) {}
116#endif
117
118static inline void sdw_intel_debugfs_init(struct sdw_intel *sdw)
119{
120 if (SDW_INTEL_CHECK_OPS(sdw, debugfs_init))
121 SDW_INTEL_OPS(sdw, debugfs_init)(sdw);
122}
123
124static inline void sdw_intel_debugfs_exit(struct sdw_intel *sdw)
125{
126 if (SDW_INTEL_CHECK_OPS(sdw, debugfs_exit))
127 SDW_INTEL_OPS(sdw, debugfs_exit)(sdw);
128}
129
130static inline int sdw_intel_register_dai(struct sdw_intel *sdw)
131{
132 if (SDW_INTEL_CHECK_OPS(sdw, register_dai))
133 return SDW_INTEL_OPS(sdw, register_dai)(sdw);
134 return -ENOTSUPP;
135}
136
137static inline void sdw_intel_check_clock_stop(struct sdw_intel *sdw)
138{
139 if (SDW_INTEL_CHECK_OPS(sdw, check_clock_stop))
140 SDW_INTEL_OPS(sdw, check_clock_stop)(sdw);
141}
142
143static inline int sdw_intel_start_bus(struct sdw_intel *sdw)
144{
145 if (SDW_INTEL_CHECK_OPS(sdw, start_bus))
146 return SDW_INTEL_OPS(sdw, start_bus)(sdw);
147 return -ENOTSUPP;
148}
149
150static inline int sdw_intel_start_bus_after_reset(struct sdw_intel *sdw)
151{
152 if (SDW_INTEL_CHECK_OPS(sdw, start_bus_after_reset))
153 return SDW_INTEL_OPS(sdw, start_bus_after_reset)(sdw);
154 return -ENOTSUPP;
155}
156
157static inline int sdw_intel_start_bus_after_clock_stop(struct sdw_intel *sdw)
158{
159 if (SDW_INTEL_CHECK_OPS(sdw, start_bus_after_clock_stop))
160 return SDW_INTEL_OPS(sdw, start_bus_after_clock_stop)(sdw);
161 return -ENOTSUPP;
162}
163
164static inline int sdw_intel_stop_bus(struct sdw_intel *sdw, bool clock_stop)
165{
166 if (SDW_INTEL_CHECK_OPS(sdw, stop_bus))
167 return SDW_INTEL_OPS(sdw, stop_bus)(sdw, clock_stop);
168 return -ENOTSUPP;
169}
170
171static inline int sdw_intel_link_power_up(struct sdw_intel *sdw)
172{
173 if (SDW_INTEL_CHECK_OPS(sdw, link_power_up))
174 return SDW_INTEL_OPS(sdw, link_power_up)(sdw);
175 return -ENOTSUPP;
176}
177
178static inline int sdw_intel_link_power_down(struct sdw_intel *sdw)
179{
180 if (SDW_INTEL_CHECK_OPS(sdw, link_power_down))
181 return SDW_INTEL_OPS(sdw, link_power_down)(sdw);
182 return -ENOTSUPP;
183}
184
185static inline int sdw_intel_shim_check_wake(struct sdw_intel *sdw)
186{
187 if (SDW_INTEL_CHECK_OPS(sdw, shim_check_wake))
188 return SDW_INTEL_OPS(sdw, shim_check_wake)(sdw);
189 return -ENOTSUPP;
190}
191
192static inline void sdw_intel_shim_wake(struct sdw_intel *sdw, bool wake_enable)
193{
194 if (SDW_INTEL_CHECK_OPS(sdw, shim_wake))
195 SDW_INTEL_OPS(sdw, shim_wake)(sdw, wake_enable);
196}
197
198static inline void sdw_intel_sync_arm(struct sdw_intel *sdw)
199{
200 if (SDW_INTEL_CHECK_OPS(sdw, sync_arm))
201 SDW_INTEL_OPS(sdw, sync_arm)(sdw);
202}
203
204static inline int sdw_intel_sync_go_unlocked(struct sdw_intel *sdw)
205{
206 if (SDW_INTEL_CHECK_OPS(sdw, sync_go_unlocked))
207 return SDW_INTEL_OPS(sdw, sync_go_unlocked)(sdw);
208 return -ENOTSUPP;
209}
210
211static inline int sdw_intel_sync_go(struct sdw_intel *sdw)
212{
213 if (SDW_INTEL_CHECK_OPS(sdw, sync_go))
214 return SDW_INTEL_OPS(sdw, sync_go)(sdw);
215 return -ENOTSUPP;
216}
217
218static inline bool sdw_intel_sync_check_cmdsync_unlocked(struct sdw_intel *sdw)
219{
220 if (SDW_INTEL_CHECK_OPS(sdw, sync_check_cmdsync_unlocked))
221 return SDW_INTEL_OPS(sdw, sync_check_cmdsync_unlocked)(sdw);
222 return false;
223}
224
225/* common bus management */
226int intel_start_bus(struct sdw_intel *sdw);
227int intel_start_bus_after_reset(struct sdw_intel *sdw);
228void intel_check_clock_stop(struct sdw_intel *sdw);
229int intel_start_bus_after_clock_stop(struct sdw_intel *sdw);
230int intel_stop_bus(struct sdw_intel *sdw, bool clock_stop);
231
232/* common bank switch routines */
233int intel_pre_bank_switch(struct sdw_intel *sdw);
234int intel_post_bank_switch(struct sdw_intel *sdw);
235
236#endif /* __SDW_INTEL_LOCAL_H */