tjh.dev
Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
1// SPDX-License-Identifier: MIT
2/*
3 * Copyright © 2023 Intel Corporation
4 */
5
6#include "i915_irq.h"
7#include "i915_reg.h"
8#include "intel_uncore.h"
9
10void gen3_irq_reset(struct intel_uncore *uncore, i915_reg_t imr,
11 i915_reg_t iir, i915_reg_t ier)
12{
13 intel_uncore_write(uncore, imr, 0xffffffff);
14 intel_uncore_posting_read(uncore, imr);
15
16 intel_uncore_write(uncore, ier, 0);
17
18 /* IIR can theoretically queue up two events. Be paranoid. */
19 intel_uncore_write(uncore, iir, 0xffffffff);
20 intel_uncore_posting_read(uncore, iir);
21 intel_uncore_write(uncore, iir, 0xffffffff);
22 intel_uncore_posting_read(uncore, iir);
23}
24
25/*
26 * We should clear IMR at preinstall/uninstall, and just check at postinstall.
27 */
28void gen3_assert_iir_is_zero(struct intel_uncore *uncore, i915_reg_t reg)
29{
30 struct xe_device *xe = container_of(uncore, struct xe_device, uncore);
31 u32 val = intel_uncore_read(uncore, reg);
32
33 if (val == 0)
34 return;
35
36 drm_WARN(&xe->drm, 1,
37 "Interrupt register 0x%x is not zero: 0x%08x\n",
38 i915_mmio_reg_offset(reg), val);
39 intel_uncore_write(uncore, reg, 0xffffffff);
40 intel_uncore_posting_read(uncore, reg);
41 intel_uncore_write(uncore, reg, 0xffffffff);
42 intel_uncore_posting_read(uncore, reg);
43}
44
45void gen3_irq_init(struct intel_uncore *uncore,
46 i915_reg_t imr, u32 imr_val,
47 i915_reg_t ier, u32 ier_val,
48 i915_reg_t iir)
49{
50 gen3_assert_iir_is_zero(uncore, iir);
51
52 intel_uncore_write(uncore, ier, ier_val);
53 intel_uncore_write(uncore, imr, imr_val);
54 intel_uncore_posting_read(uncore, imr);
55}
56
57bool intel_irqs_enabled(struct xe_device *xe)
58{
59 /*
60 * XXX: i915 has a racy handling of the irq.enabled, since it doesn't
61 * lock its transitions. Because of that, the irq.enabled sometimes
62 * is not read with the irq.lock in place.
63 * However, the most critical cases like vblank and page flips are
64 * properly using the locks.
65 * We cannot take the lock in here or run any kind of assert because
66 * of i915 inconsistency.
67 * But at this point the xe irq is better protected against races,
68 * although the full solution would be protecting the i915 side.
69 */
70 return xe->irq.enabled;
71}
72
73void intel_synchronize_irq(struct xe_device *xe)
74{
75 synchronize_irq(to_pci_dev(xe->drm.dev)->irq);
76}