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1/* SPDX-License-Identifier: GPL-2.0-only */ 2/* 3 * Copyright (C) Fuzhou Rockchip Electronics Co.Ltd 4 * Author:Mark Yao <mark.yao@rock-chips.com> 5 * 6 * based on exynos_drm_drv.h 7 */ 8 9#ifndef _ROCKCHIP_DRM_DRV_H 10#define _ROCKCHIP_DRM_DRV_H 11 12#include <drm/drm_atomic_helper.h> 13#include <drm/drm_gem.h> 14 15#include <linux/i2c.h> 16#include <linux/module.h> 17#include <linux/component.h> 18 19#define ROCKCHIP_MAX_FB_BUFFER 3 20#define ROCKCHIP_MAX_CONNECTOR 2 21#define ROCKCHIP_MAX_CRTC 4 22 23/* 24 * display output interface supported by rockchip lcdc 25 */ 26#define ROCKCHIP_OUT_MODE_P888 0 27#define ROCKCHIP_OUT_MODE_BT1120 0 28#define ROCKCHIP_OUT_MODE_P666 1 29#define ROCKCHIP_OUT_MODE_P565 2 30#define ROCKCHIP_OUT_MODE_BT656 5 31#define ROCKCHIP_OUT_MODE_S888 8 32#define ROCKCHIP_OUT_MODE_S888_DUMMY 12 33#define ROCKCHIP_OUT_MODE_YUV420 14 34/* for use special outface */ 35#define ROCKCHIP_OUT_MODE_AAAA 15 36 37/* output flags */ 38#define ROCKCHIP_OUTPUT_DSI_DUAL BIT(0) 39 40struct drm_device; 41struct drm_connector; 42struct iommu_domain; 43 44struct rockchip_crtc_state { 45 struct drm_crtc_state base; 46 int output_type; 47 int output_mode; 48 int output_bpc; 49 int output_flags; 50 bool enable_afbc; 51 bool yuv_overlay; 52 u32 bus_format; 53 u32 bus_flags; 54 int color_space; 55}; 56#define to_rockchip_crtc_state(s) \ 57 container_of(s, struct rockchip_crtc_state, base) 58 59/* 60 * Rockchip drm private structure. 61 * 62 * @crtc: array of enabled CRTCs, used to map from "pipe" to drm_crtc. 63 * @num_pipe: number of pipes for this device. 64 * @mm_lock: protect drm_mm on multi-threads. 65 */ 66struct rockchip_drm_private { 67 struct iommu_domain *domain; 68 struct device *iommu_dev; 69 struct mutex mm_lock; 70 struct drm_mm mm; 71}; 72 73struct rockchip_encoder { 74 int crtc_endpoint_id; 75 struct drm_encoder encoder; 76}; 77 78int rockchip_drm_dma_attach_device(struct drm_device *drm_dev, 79 struct device *dev); 80void rockchip_drm_dma_detach_device(struct drm_device *drm_dev, 81 struct device *dev); 82void rockchip_drm_dma_init_device(struct drm_device *drm_dev, 83 struct device *dev); 84int rockchip_drm_wait_vact_end(struct drm_crtc *crtc, unsigned int mstimeout); 85int rockchip_drm_encoder_set_crtc_endpoint_id(struct rockchip_encoder *rencoder, 86 struct device_node *np, int port, int reg); 87int rockchip_drm_endpoint_is_subdriver(struct device_node *ep); 88extern struct platform_driver cdn_dp_driver; 89extern struct platform_driver dw_hdmi_rockchip_pltfm_driver; 90extern struct platform_driver dw_mipi_dsi_rockchip_driver; 91extern struct platform_driver inno_hdmi_driver; 92extern struct platform_driver rockchip_dp_driver; 93extern struct platform_driver rockchip_lvds_driver; 94extern struct platform_driver vop_platform_driver; 95extern struct platform_driver rk3066_hdmi_driver; 96extern struct platform_driver vop2_platform_driver; 97 98static inline struct rockchip_encoder *to_rockchip_encoder(struct drm_encoder *encoder) 99{ 100 return container_of(encoder, struct rockchip_encoder, encoder); 101} 102 103#endif /* _ROCKCHIP_DRM_DRV_H_ */