Linux kernel mirror (for testing)
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linux
1# SPDX-License-Identifier: GPL-2.0-only
2menuconfig MAILBOX
3 bool "Mailbox Hardware Support"
4 help
5 Mailbox is a framework to control hardware communication between
6 on-chip processors through queued messages and interrupt driven
7 signals. Say Y if your platform supports hardware mailboxes.
8
9if MAILBOX
10
11config ARM_MHU
12 tristate "ARM MHU Mailbox"
13 depends on ARM_AMBA
14 help
15 Say Y here if you want to build the ARM MHU controller driver.
16 The controller has 3 mailbox channels, the last of which can be
17 used in Secure mode only.
18
19config ARM_MHU_V2
20 tristate "ARM MHUv2 Mailbox"
21 depends on ARM_AMBA
22 help
23 Say Y here if you want to build the ARM MHUv2 controller driver,
24 which provides unidirectional mailboxes between processing elements.
25
26config ARM_MHU_V3
27 tristate "ARM MHUv3 Mailbox"
28 depends on HAS_IOMEM || COMPILE_TEST
29 depends on OF
30 help
31 Say Y here if you want to build the ARM MHUv3 controller driver,
32 which provides unidirectional mailboxes between processing elements.
33
34 ARM MHUv3 controllers can implement a varying number of extensions
35 that provides different means of transports: supported extensions
36 will be discovered and possibly managed at probe-time.
37
38config IMX_MBOX
39 tristate "i.MX Mailbox"
40 depends on ARCH_MXC || COMPILE_TEST
41 help
42 Mailbox implementation for i.MX Messaging Unit (MU).
43
44config PLATFORM_MHU
45 tristate "Platform MHU Mailbox"
46 depends on OF
47 depends on HAS_IOMEM
48 help
49 Say Y here if you want to build a platform specific variant MHU
50 controller driver.
51 The controller has a maximum of 3 mailbox channels, the last of
52 which can be used in Secure mode only.
53
54config PL320_MBOX
55 bool "ARM PL320 Mailbox"
56 depends on ARM_AMBA
57 help
58 An implementation of the ARM PL320 Interprocessor Communication
59 Mailbox (IPCM), tailored for the Calxeda Highbank. It is used to
60 send short messages between Highbank's A9 cores and the EnergyCore
61 Management Engine, primarily for cpufreq. Say Y here if you want
62 to use the PL320 IPCM support.
63
64config ARMADA_37XX_RWTM_MBOX
65 tristate "Armada 37xx rWTM BIU Mailbox"
66 depends on ARCH_MVEBU || COMPILE_TEST
67 depends on OF
68 help
69 Mailbox implementation for communication with the the firmware
70 running on the Cortex-M3 rWTM secure processor of the Armada 37xx
71 SOC. Say Y here if you are building for such a device (for example
72 the Turris Mox router).
73
74config OMAP2PLUS_MBOX
75 tristate "OMAP2+ Mailbox framework support"
76 depends on ARCH_OMAP2PLUS || ARCH_K3
77 help
78 Mailbox implementation for OMAP family chips with hardware for
79 interprocessor communication involving DSP, IVA1.0 and IVA2 in
80 OMAP2/3; or IPU, IVA HD and DSP in OMAP4/5. Say Y here if you
81 want to use OMAP2+ Mailbox framework support.
82
83config ROCKCHIP_MBOX
84 bool "Rockchip Soc Integrated Mailbox Support"
85 depends on ARCH_ROCKCHIP || COMPILE_TEST
86 help
87 This driver provides support for inter-processor communication
88 between CPU cores and MCU processor on Some Rockchip SOCs.
89 Please check it that the Soc you use have Mailbox hardware.
90 Say Y here if you want to use the Rockchip Mailbox support.
91
92config PCC
93 bool "Platform Communication Channel Driver"
94 depends on ACPI
95 default n
96 help
97 ACPI 5.0+ spec defines a generic mode of communication
98 between the OS and a platform such as the BMC. This medium
99 (PCC) is typically used by CPPC (ACPI CPU Performance management),
100 RAS (ACPI reliability protocol) and MPST (ACPI Memory power
101 states). Select this driver if your platform implements the
102 PCC clients mentioned above.
103
104config ALTERA_MBOX
105 tristate "Altera Mailbox"
106 depends on HAS_IOMEM
107 help
108 An implementation of the Altera Mailbox soft core. It is used
109 to send message between processors. Say Y here if you want to use the
110 Altera mailbox support.
111
112config BCM2835_MBOX
113 tristate "BCM2835 Mailbox"
114 depends on ARCH_BCM2835
115 help
116 An implementation of the BCM2385 Mailbox. It is used to invoke
117 the services of the Videocore. Say Y here if you want to use the
118 BCM2835 Mailbox.
119
120config STI_MBOX
121 tristate "STI Mailbox framework support"
122 depends on ARCH_STI && OF
123 help
124 Mailbox implementation for STMicroelectonics family chips with
125 hardware for interprocessor communication.
126
127config TI_MESSAGE_MANAGER
128 tristate "Texas Instruments Message Manager Driver"
129 depends on ARCH_KEYSTONE || ARCH_K3
130 default ARCH_K3
131 help
132 An implementation of Message Manager slave driver for Keystone
133 and K3 architecture SoCs from Texas Instruments. Message Manager
134 is a communication entity found on few of Texas Instrument's keystone
135 and K3 architecture SoCs. These may be used for communication between
136 multiple processors within the SoC. Select this driver if your
137 platform has support for the hardware block.
138
139config HI3660_MBOX
140 tristate "Hi3660 Mailbox" if EXPERT
141 depends on (ARCH_HISI || COMPILE_TEST)
142 depends on OF
143 default ARCH_HISI
144 help
145 An implementation of the hi3660 mailbox. It is used to send message
146 between application processors and other processors/MCU/DSP. Select
147 Y here if you want to use Hi3660 mailbox controller.
148
149config HI6220_MBOX
150 tristate "Hi6220 Mailbox" if EXPERT
151 depends on (ARCH_HISI || COMPILE_TEST)
152 depends on OF
153 default ARCH_HISI
154 help
155 An implementation of the hi6220 mailbox. It is used to send message
156 between application processors and MCU. Say Y here if you want to
157 build Hi6220 mailbox controller driver.
158
159config MAILBOX_TEST
160 tristate "Mailbox Test Client"
161 depends on OF
162 depends on HAS_IOMEM
163 help
164 Test client to help with testing new Controller driver
165 implementations.
166
167config POLARFIRE_SOC_MAILBOX
168 tristate "PolarFire SoC (MPFS) Mailbox"
169 depends on HAS_IOMEM
170 depends on ARCH_MICROCHIP_POLARFIRE || COMPILE_TEST
171 help
172 This driver adds support for the PolarFire SoC (MPFS) mailbox controller.
173
174 To compile this driver as a module, choose M here. the
175 module will be called mailbox-mpfs.
176
177 If unsure, say N.
178
179config QCOM_APCS_IPC
180 tristate "Qualcomm APCS IPC driver"
181 depends on ARCH_QCOM || COMPILE_TEST
182 help
183 Say y here to enable support for the APCS IPC mailbox driver,
184 providing an interface for invoking the inter-process communication
185 signals from the application processor to other masters.
186
187config TEGRA_HSP_MBOX
188 bool "Tegra HSP (Hardware Synchronization Primitives) Driver"
189 depends on ARCH_TEGRA
190 help
191 The Tegra HSP driver is used for the interprocessor communication
192 between different remote processors and host processors on Tegra186
193 and later SoCs. Say Y here if you want to have this support.
194 If unsure say N.
195
196config XGENE_SLIMPRO_MBOX
197 tristate "APM SoC X-Gene SLIMpro Mailbox Controller"
198 depends on ARCH_XGENE
199 help
200 An implementation of the APM X-Gene Interprocessor Communication
201 Mailbox (IPCM) between the ARM 64-bit cores and SLIMpro controller.
202 It is used to send short messages between ARM64-bit cores and
203 the SLIMpro Management Engine, primarily for PM. Say Y here if you
204 want to use the APM X-Gene SLIMpro IPCM support.
205
206config BCM_PDC_MBOX
207 tristate "Broadcom FlexSparx DMA Mailbox"
208 depends on ARCH_BCM_IPROC || COMPILE_TEST
209 help
210 Mailbox implementation for the Broadcom FlexSparx DMA ring manager,
211 which provides access to various offload engines on Broadcom
212 SoCs, including FA2/FA+ on Northstar Plus and PDC on Northstar 2.
213
214config BCM_FLEXRM_MBOX
215 tristate "Broadcom FlexRM Mailbox"
216 depends on ARM64
217 depends on ARCH_BCM_IPROC || COMPILE_TEST
218 select GENERIC_MSI_IRQ
219 default m if ARCH_BCM_IPROC
220 help
221 Mailbox implementation of the Broadcom FlexRM ring manager,
222 which provides access to various offload engines on Broadcom
223 SoCs. Say Y here if you want to use the Broadcom FlexRM.
224
225config STM32_IPCC
226 tristate "STM32 IPCC Mailbox"
227 depends on MACH_STM32MP157 || COMPILE_TEST
228 help
229 Mailbox implementation for STMicroelectonics STM32 family chips
230 with hardware for Inter-Processor Communication Controller (IPCC)
231 between processors. Say Y here if you want to have this support.
232
233config MTK_ADSP_MBOX
234 tristate "MediaTek ADSP Mailbox Controller"
235 depends on ARCH_MEDIATEK || COMPILE_TEST
236 help
237 Say yes here to add support for "MediaTek ADSP Mailbox Controller.
238 This mailbox driver is used to send notification or short message
239 between processors with ADSP. It will place the message to share
240 buffer and will access the ipc control.
241
242config MTK_CMDQ_MBOX
243 tristate "MediaTek CMDQ Mailbox Support"
244 depends on ARCH_MEDIATEK || COMPILE_TEST
245 select MTK_INFRACFG
246 help
247 Say yes here to add support for the MediaTek Command Queue (CMDQ)
248 mailbox driver. The CMDQ is used to help read/write registers with
249 critical time limitation, such as updating display configuration
250 during the vblank.
251
252config ZYNQMP_IPI_MBOX
253 tristate "Xilinx ZynqMP IPI Mailbox"
254 depends on ARCH_ZYNQMP && OF
255 help
256 Say yes here to add support for Xilinx IPI mailbox driver.
257 This mailbox driver is used to send notification or short message
258 between processors with Xilinx ZynqMP IPI. It will place the
259 message to the IPI buffer and will access the IPI control
260 registers to kick the other processor or enquire status.
261
262config SUN6I_MSGBOX
263 tristate "Allwinner sun6i/sun8i/sun9i/sun50i Message Box"
264 depends on ARCH_SUNXI || COMPILE_TEST
265 default ARCH_SUNXI
266 help
267 Mailbox implementation for the hardware message box present in
268 various Allwinner SoCs. This mailbox is used for communication
269 between the application CPUs and the power management coprocessor.
270
271config SPRD_MBOX
272 tristate "Spreadtrum Mailbox"
273 depends on ARCH_SPRD || COMPILE_TEST
274 help
275 Mailbox driver implementation for the Spreadtrum platform. It is used
276 to send message between application processors and MCU. Say Y here if
277 you want to build the Spreatrum mailbox controller driver.
278
279config QCOM_IPCC
280 tristate "Qualcomm Technologies, Inc. IPCC driver"
281 depends on ARCH_QCOM || COMPILE_TEST
282 help
283 Qualcomm Technologies, Inc. Inter-Processor Communication Controller
284 (IPCC) driver for MSM devices. The driver provides mailbox support for
285 sending interrupts to the clients. On the other hand, the driver also
286 acts as an interrupt controller for receiving interrupts from clients.
287 Say Y here if you want to build this driver.
288
289endif