Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
tjh.dev
kernel
os
linux
1/*
2 * Virtio PCI driver
3 *
4 * This module allows virtio devices to be used over a virtual PCI device.
5 * This can be used with QEMU based VMMs like KVM or Xen.
6 *
7 * Copyright IBM Corp. 2007
8 *
9 * Authors:
10 * Anthony Liguori <aliguori@us.ibm.com>
11 *
12 * This header is BSD licensed so anyone can use the definitions to implement
13 * compatible drivers/servers.
14 *
15 * Redistribution and use in source and binary forms, with or without
16 * modification, are permitted provided that the following conditions
17 * are met:
18 * 1. Redistributions of source code must retain the above copyright
19 * notice, this list of conditions and the following disclaimer.
20 * 2. Redistributions in binary form must reproduce the above copyright
21 * notice, this list of conditions and the following disclaimer in the
22 * documentation and/or other materials provided with the distribution.
23 * 3. Neither the name of IBM nor the names of its contributors
24 * may be used to endorse or promote products derived from this software
25 * without specific prior written permission.
26 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS'' AND
27 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
28 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
29 * ARE DISCLAIMED. IN NO EVENT SHALL IBM OR CONTRIBUTORS BE LIABLE
30 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
31 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
32 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
33 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
34 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
35 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
36 * SUCH DAMAGE.
37 */
38
39#ifndef _LINUX_VIRTIO_PCI_H
40#define _LINUX_VIRTIO_PCI_H
41
42#include <linux/types.h>
43#include <linux/kernel.h>
44
45#ifndef VIRTIO_PCI_NO_LEGACY
46
47/* A 32-bit r/o bitmask of the features supported by the host */
48#define VIRTIO_PCI_HOST_FEATURES 0
49
50/* A 32-bit r/w bitmask of features activated by the guest */
51#define VIRTIO_PCI_GUEST_FEATURES 4
52
53/* A 32-bit r/w PFN for the currently selected queue */
54#define VIRTIO_PCI_QUEUE_PFN 8
55
56/* A 16-bit r/o queue size for the currently selected queue */
57#define VIRTIO_PCI_QUEUE_NUM 12
58
59/* A 16-bit r/w queue selector */
60#define VIRTIO_PCI_QUEUE_SEL 14
61
62/* A 16-bit r/w queue notifier */
63#define VIRTIO_PCI_QUEUE_NOTIFY 16
64
65/* An 8-bit device status register. */
66#define VIRTIO_PCI_STATUS 18
67
68/* An 8-bit r/o interrupt status register. Reading the value will return the
69 * current contents of the ISR and will also clear it. This is effectively
70 * a read-and-acknowledge. */
71#define VIRTIO_PCI_ISR 19
72
73/* MSI-X registers: only enabled if MSI-X is enabled. */
74/* A 16-bit vector for configuration changes. */
75#define VIRTIO_MSI_CONFIG_VECTOR 20
76/* A 16-bit vector for selected queue notifications. */
77#define VIRTIO_MSI_QUEUE_VECTOR 22
78
79/* The remaining space is defined by each driver as the per-driver
80 * configuration space */
81#define VIRTIO_PCI_CONFIG_OFF(msix_enabled) ((msix_enabled) ? 24 : 20)
82/* Deprecated: please use VIRTIO_PCI_CONFIG_OFF instead */
83#define VIRTIO_PCI_CONFIG(dev) VIRTIO_PCI_CONFIG_OFF((dev)->msix_enabled)
84
85/* Virtio ABI version, this must match exactly */
86#define VIRTIO_PCI_ABI_VERSION 0
87
88/* How many bits to shift physical queue address written to QUEUE_PFN.
89 * 12 is historical, and due to x86 page size. */
90#define VIRTIO_PCI_QUEUE_ADDR_SHIFT 12
91
92/* The alignment to use between consumer and producer parts of vring.
93 * x86 pagesize again. */
94#define VIRTIO_PCI_VRING_ALIGN 4096
95
96#endif /* VIRTIO_PCI_NO_LEGACY */
97
98/* The bit of the ISR which indicates a device configuration change. */
99#define VIRTIO_PCI_ISR_CONFIG 0x2
100/* Vector value used to disable MSI for queue */
101#define VIRTIO_MSI_NO_VECTOR 0xffff
102
103#ifndef VIRTIO_PCI_NO_MODERN
104
105/* IDs for different capabilities. Must all exist. */
106
107/* Common configuration */
108#define VIRTIO_PCI_CAP_COMMON_CFG 1
109/* Notifications */
110#define VIRTIO_PCI_CAP_NOTIFY_CFG 2
111/* ISR access */
112#define VIRTIO_PCI_CAP_ISR_CFG 3
113/* Device specific configuration */
114#define VIRTIO_PCI_CAP_DEVICE_CFG 4
115/* PCI configuration access */
116#define VIRTIO_PCI_CAP_PCI_CFG 5
117/* Additional shared memory capability */
118#define VIRTIO_PCI_CAP_SHARED_MEMORY_CFG 8
119
120/* This is the PCI capability header: */
121struct virtio_pci_cap {
122 __u8 cap_vndr; /* Generic PCI field: PCI_CAP_ID_VNDR */
123 __u8 cap_next; /* Generic PCI field: next ptr. */
124 __u8 cap_len; /* Generic PCI field: capability length */
125 __u8 cfg_type; /* Identifies the structure. */
126 __u8 bar; /* Where to find it. */
127 __u8 id; /* Multiple capabilities of the same type */
128 __u8 padding[2]; /* Pad to full dword. */
129 __le32 offset; /* Offset within bar. */
130 __le32 length; /* Length of the structure, in bytes. */
131};
132
133struct virtio_pci_cap64 {
134 struct virtio_pci_cap cap;
135 __le32 offset_hi; /* Most sig 32 bits of offset */
136 __le32 length_hi; /* Most sig 32 bits of length */
137};
138
139struct virtio_pci_notify_cap {
140 struct virtio_pci_cap cap;
141 __le32 notify_off_multiplier; /* Multiplier for queue_notify_off. */
142};
143
144/* Fields in VIRTIO_PCI_CAP_COMMON_CFG: */
145struct virtio_pci_common_cfg {
146 /* About the whole device. */
147 __le32 device_feature_select; /* read-write */
148 __le32 device_feature; /* read-only */
149 __le32 guest_feature_select; /* read-write */
150 __le32 guest_feature; /* read-write */
151 __le16 msix_config; /* read-write */
152 __le16 num_queues; /* read-only */
153 __u8 device_status; /* read-write */
154 __u8 config_generation; /* read-only */
155
156 /* About a specific virtqueue. */
157 __le16 queue_select; /* read-write */
158 __le16 queue_size; /* read-write, power of 2. */
159 __le16 queue_msix_vector; /* read-write */
160 __le16 queue_enable; /* read-write */
161 __le16 queue_notify_off; /* read-only */
162 __le32 queue_desc_lo; /* read-write */
163 __le32 queue_desc_hi; /* read-write */
164 __le32 queue_avail_lo; /* read-write */
165 __le32 queue_avail_hi; /* read-write */
166 __le32 queue_used_lo; /* read-write */
167 __le32 queue_used_hi; /* read-write */
168};
169
170/*
171 * Warning: do not use sizeof on this: use offsetofend for
172 * specific fields you need.
173 */
174struct virtio_pci_modern_common_cfg {
175 struct virtio_pci_common_cfg cfg;
176
177 __le16 queue_notify_data; /* read-write */
178 __le16 queue_reset; /* read-write */
179
180 __le16 admin_queue_index; /* read-only */
181 __le16 admin_queue_num; /* read-only */
182};
183
184/* Fields in VIRTIO_PCI_CAP_PCI_CFG: */
185struct virtio_pci_cfg_cap {
186 struct virtio_pci_cap cap;
187 __u8 pci_cfg_data[4]; /* Data for BAR access. */
188};
189
190/* Macro versions of offsets for the Old Timers! */
191#define VIRTIO_PCI_CAP_VNDR 0
192#define VIRTIO_PCI_CAP_NEXT 1
193#define VIRTIO_PCI_CAP_LEN 2
194#define VIRTIO_PCI_CAP_CFG_TYPE 3
195#define VIRTIO_PCI_CAP_BAR 4
196#define VIRTIO_PCI_CAP_OFFSET 8
197#define VIRTIO_PCI_CAP_LENGTH 12
198
199#define VIRTIO_PCI_NOTIFY_CAP_MULT 16
200
201#define VIRTIO_PCI_COMMON_DFSELECT 0
202#define VIRTIO_PCI_COMMON_DF 4
203#define VIRTIO_PCI_COMMON_GFSELECT 8
204#define VIRTIO_PCI_COMMON_GF 12
205#define VIRTIO_PCI_COMMON_MSIX 16
206#define VIRTIO_PCI_COMMON_NUMQ 18
207#define VIRTIO_PCI_COMMON_STATUS 20
208#define VIRTIO_PCI_COMMON_CFGGENERATION 21
209#define VIRTIO_PCI_COMMON_Q_SELECT 22
210#define VIRTIO_PCI_COMMON_Q_SIZE 24
211#define VIRTIO_PCI_COMMON_Q_MSIX 26
212#define VIRTIO_PCI_COMMON_Q_ENABLE 28
213#define VIRTIO_PCI_COMMON_Q_NOFF 30
214#define VIRTIO_PCI_COMMON_Q_DESCLO 32
215#define VIRTIO_PCI_COMMON_Q_DESCHI 36
216#define VIRTIO_PCI_COMMON_Q_AVAILLO 40
217#define VIRTIO_PCI_COMMON_Q_AVAILHI 44
218#define VIRTIO_PCI_COMMON_Q_USEDLO 48
219#define VIRTIO_PCI_COMMON_Q_USEDHI 52
220#define VIRTIO_PCI_COMMON_Q_NDATA 56
221#define VIRTIO_PCI_COMMON_Q_RESET 58
222#define VIRTIO_PCI_COMMON_ADM_Q_IDX 60
223#define VIRTIO_PCI_COMMON_ADM_Q_NUM 62
224
225#endif /* VIRTIO_PCI_NO_MODERN */
226
227/* Admin command status. */
228#define VIRTIO_ADMIN_STATUS_OK 0
229
230/* Admin command opcode. */
231#define VIRTIO_ADMIN_CMD_LIST_QUERY 0x0
232#define VIRTIO_ADMIN_CMD_LIST_USE 0x1
233
234/* Admin command group type. */
235#define VIRTIO_ADMIN_GROUP_TYPE_SRIOV 0x1
236
237/* Transitional device admin command. */
238#define VIRTIO_ADMIN_CMD_LEGACY_COMMON_CFG_WRITE 0x2
239#define VIRTIO_ADMIN_CMD_LEGACY_COMMON_CFG_READ 0x3
240#define VIRTIO_ADMIN_CMD_LEGACY_DEV_CFG_WRITE 0x4
241#define VIRTIO_ADMIN_CMD_LEGACY_DEV_CFG_READ 0x5
242#define VIRTIO_ADMIN_CMD_LEGACY_NOTIFY_INFO 0x6
243
244/* Device parts access commands. */
245#define VIRTIO_ADMIN_CMD_CAP_ID_LIST_QUERY 0x7
246#define VIRTIO_ADMIN_CMD_DEVICE_CAP_GET 0x8
247#define VIRTIO_ADMIN_CMD_DRIVER_CAP_SET 0x9
248#define VIRTIO_ADMIN_CMD_RESOURCE_OBJ_CREATE 0xa
249#define VIRTIO_ADMIN_CMD_RESOURCE_OBJ_DESTROY 0xd
250#define VIRTIO_ADMIN_CMD_DEV_PARTS_METADATA_GET 0xe
251#define VIRTIO_ADMIN_CMD_DEV_PARTS_GET 0xf
252#define VIRTIO_ADMIN_CMD_DEV_PARTS_SET 0x10
253#define VIRTIO_ADMIN_CMD_DEV_MODE_SET 0x11
254
255struct virtio_admin_cmd_hdr {
256 __le16 opcode;
257 /*
258 * 1 - SR-IOV
259 * 2-65535 - reserved
260 */
261 __le16 group_type;
262 /* Unused, reserved for future extensions. */
263 __u8 reserved1[12];
264 __le64 group_member_id;
265};
266
267struct virtio_admin_cmd_status {
268 __le16 status;
269 __le16 status_qualifier;
270 /* Unused, reserved for future extensions. */
271 __u8 reserved2[4];
272};
273
274struct virtio_admin_cmd_legacy_wr_data {
275 __u8 offset; /* Starting offset of the register(s) to write. */
276 __u8 reserved[7];
277 __u8 registers[];
278};
279
280struct virtio_admin_cmd_legacy_rd_data {
281 __u8 offset; /* Starting offset of the register(s) to read. */
282};
283
284#define VIRTIO_ADMIN_CMD_NOTIFY_INFO_FLAGS_END 0
285#define VIRTIO_ADMIN_CMD_NOTIFY_INFO_FLAGS_OWNER_DEV 0x1
286#define VIRTIO_ADMIN_CMD_NOTIFY_INFO_FLAGS_OWNER_MEM 0x2
287
288#define VIRTIO_ADMIN_CMD_MAX_NOTIFY_INFO 4
289
290struct virtio_admin_cmd_notify_info_data {
291 __u8 flags; /* 0 = end of list, 1 = owner device, 2 = member device */
292 __u8 bar; /* BAR of the member or the owner device */
293 __u8 padding[6];
294 __le64 offset; /* Offset within bar. */
295};
296
297struct virtio_admin_cmd_notify_info_result {
298 struct virtio_admin_cmd_notify_info_data entries[VIRTIO_ADMIN_CMD_MAX_NOTIFY_INFO];
299};
300
301#define VIRTIO_DEV_PARTS_CAP 0x0000
302
303struct virtio_dev_parts_cap {
304 __u8 get_parts_resource_objects_limit;
305 __u8 set_parts_resource_objects_limit;
306};
307
308#define MAX_CAP_ID __KERNEL_DIV_ROUND_UP(VIRTIO_DEV_PARTS_CAP + 1, 64)
309
310struct virtio_admin_cmd_query_cap_id_result {
311 __le64 supported_caps[MAX_CAP_ID];
312};
313
314struct virtio_admin_cmd_cap_get_data {
315 __le16 id;
316 __u8 reserved[6];
317};
318
319struct virtio_admin_cmd_cap_set_data {
320 __le16 id;
321 __u8 reserved[6];
322 __u8 cap_specific_data[];
323};
324
325struct virtio_admin_cmd_resource_obj_cmd_hdr {
326 __le16 type;
327 __u8 reserved[2];
328 __le32 id; /* Indicates unique resource object id per resource object type */
329};
330
331struct virtio_admin_cmd_resource_obj_create_data {
332 struct virtio_admin_cmd_resource_obj_cmd_hdr hdr;
333 __le64 flags;
334 __u8 resource_obj_specific_data[];
335};
336
337#define VIRTIO_RESOURCE_OBJ_DEV_PARTS 0
338
339#define VIRTIO_RESOURCE_OBJ_DEV_PARTS_TYPE_GET 0
340#define VIRTIO_RESOURCE_OBJ_DEV_PARTS_TYPE_SET 1
341
342struct virtio_resource_obj_dev_parts {
343 __u8 type;
344 __u8 reserved[7];
345};
346
347#define VIRTIO_ADMIN_CMD_DEV_PARTS_METADATA_TYPE_SIZE 0
348#define VIRTIO_ADMIN_CMD_DEV_PARTS_METADATA_TYPE_COUNT 1
349#define VIRTIO_ADMIN_CMD_DEV_PARTS_METADATA_TYPE_LIST 2
350
351struct virtio_admin_cmd_dev_parts_metadata_data {
352 struct virtio_admin_cmd_resource_obj_cmd_hdr hdr;
353 __u8 type;
354 __u8 reserved[7];
355};
356
357#define VIRTIO_DEV_PART_F_OPTIONAL 0
358
359struct virtio_dev_part_hdr {
360 __le16 part_type;
361 __u8 flags;
362 __u8 reserved;
363 union {
364 struct {
365 __le32 offset;
366 __le32 reserved;
367 } pci_common_cfg;
368 struct {
369 __le16 index;
370 __u8 reserved[6];
371 } vq_index;
372 } selector;
373 __le32 length;
374};
375
376struct virtio_dev_part {
377 struct virtio_dev_part_hdr hdr;
378 __u8 value[];
379};
380
381struct virtio_admin_cmd_dev_parts_metadata_result {
382 union {
383 struct {
384 __le32 size;
385 __le32 reserved;
386 } parts_size;
387 struct {
388 __le32 count;
389 __le32 reserved;
390 } hdr_list_count;
391 struct {
392 __le32 count;
393 __le32 reserved;
394 struct virtio_dev_part_hdr hdrs[];
395 } hdr_list;
396 };
397};
398
399#define VIRTIO_ADMIN_CMD_DEV_PARTS_GET_TYPE_SELECTED 0
400#define VIRTIO_ADMIN_CMD_DEV_PARTS_GET_TYPE_ALL 1
401
402struct virtio_admin_cmd_dev_parts_get_data {
403 struct virtio_admin_cmd_resource_obj_cmd_hdr hdr;
404 __u8 type;
405 __u8 reserved[7];
406 struct virtio_dev_part_hdr hdr_list[];
407};
408
409struct virtio_admin_cmd_dev_parts_set_data {
410 struct virtio_admin_cmd_resource_obj_cmd_hdr hdr;
411 struct virtio_dev_part parts[];
412};
413
414#define VIRTIO_ADMIN_CMD_DEV_MODE_F_STOPPED 0
415
416struct virtio_admin_cmd_dev_mode_set_data {
417 __u8 flags;
418};
419
420#endif