tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux
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kernel / drivers / pinctrl / qcom / pinctrl-sm8750.c
at for-next 1729 lines 56 kB view raw
1// SPDX-License-Identifier: GPL-2.0-only 2/* 3 * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. 4 */ 5 6#include <linux/module.h> 7#include <linux/of.h> 8#include <linux/platform_device.h> 9 10#include "pinctrl-msm.h" 11 12#define REG_SIZE 0x1000 13 14#define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7, f8, f9, f10, f11) \ 15 { \ 16 .grp = PINCTRL_PINGROUP("gpio" #id, \ 17 gpio##id##_pins, \ 18 ARRAY_SIZE(gpio##id##_pins)), \ 19 .funcs = (int[]){ \ 20 msm_mux_gpio, /* gpio mode */ \ 21 msm_mux_##f1, \ 22 msm_mux_##f2, \ 23 msm_mux_##f3, \ 24 msm_mux_##f4, \ 25 msm_mux_##f5, \ 26 msm_mux_##f6, \ 27 msm_mux_##f7, \ 28 msm_mux_##f8, \ 29 msm_mux_##f9, \ 30 msm_mux_##f10, \ 31 msm_mux_##f11 /* egpio mode */ \ 32 }, \ 33 .nfuncs = 12, \ 34 .ctl_reg = REG_SIZE * id, \ 35 .io_reg = 0x4 + REG_SIZE * id, \ 36 .intr_cfg_reg = 0x8 + REG_SIZE * id, \ 37 .intr_status_reg = 0xc + REG_SIZE * id, \ 38 .intr_target_reg = 0x8 + REG_SIZE * id, \ 39 .mux_bit = 2, \ 40 .pull_bit = 0, \ 41 .drv_bit = 6, \ 42 .egpio_enable = 12, \ 43 .egpio_present = 11, \ 44 .oe_bit = 9, \ 45 .in_bit = 0, \ 46 .out_bit = 1, \ 47 .intr_enable_bit = 0, \ 48 .intr_status_bit = 0, \ 49 .intr_target_bit = 5, \ 50 .intr_target_kpss_val = 3, \ 51 .intr_raw_status_bit = 4, \ 52 .intr_polarity_bit = 1, \ 53 .intr_detection_bit = 2, \ 54 .intr_detection_width = 2, \ 55 } 56 57#define SDC_QDSD_PINGROUP(pg_name, ctl, pull, drv) \ 58 { \ 59 .grp = PINCTRL_PINGROUP(#pg_name, \ 60 pg_name##_pins, \ 61 ARRAY_SIZE(pg_name##_pins)), \ 62 .ctl_reg = ctl, \ 63 .io_reg = 0, \ 64 .intr_cfg_reg = 0, \ 65 .intr_status_reg = 0, \ 66 .intr_target_reg = 0, \ 67 .mux_bit = -1, \ 68 .pull_bit = pull, \ 69 .drv_bit = drv, \ 70 .oe_bit = -1, \ 71 .in_bit = -1, \ 72 .out_bit = -1, \ 73 .intr_enable_bit = -1, \ 74 .intr_status_bit = -1, \ 75 .intr_target_bit = -1, \ 76 .intr_raw_status_bit = -1, \ 77 .intr_polarity_bit = -1, \ 78 .intr_detection_bit = -1, \ 79 .intr_detection_width = -1, \ 80 } 81 82#define UFS_RESET(pg_name, ctl, io) \ 83 { \ 84 .grp = PINCTRL_PINGROUP(#pg_name, \ 85 pg_name##_pins, \ 86 ARRAY_SIZE(pg_name##_pins)), \ 87 .ctl_reg = ctl, \ 88 .io_reg = io, \ 89 .intr_cfg_reg = 0, \ 90 .intr_status_reg = 0, \ 91 .intr_target_reg = 0, \ 92 .mux_bit = -1, \ 93 .pull_bit = 3, \ 94 .drv_bit = 0, \ 95 .oe_bit = -1, \ 96 .in_bit = -1, \ 97 .out_bit = 0, \ 98 .intr_enable_bit = -1, \ 99 .intr_status_bit = -1, \ 100 .intr_target_bit = -1, \ 101 .intr_raw_status_bit = -1, \ 102 .intr_polarity_bit = -1, \ 103 .intr_detection_bit = -1, \ 104 .intr_detection_width = -1, \ 105 } 106 107static const struct pinctrl_pin_desc sm8750_pins[] = { 108 PINCTRL_PIN(0, "GPIO_0"), 109 PINCTRL_PIN(1, "GPIO_1"), 110 PINCTRL_PIN(2, "GPIO_2"), 111 PINCTRL_PIN(3, "GPIO_3"), 112 PINCTRL_PIN(4, "GPIO_4"), 113 PINCTRL_PIN(5, "GPIO_5"), 114 PINCTRL_PIN(6, "GPIO_6"), 115 PINCTRL_PIN(7, "GPIO_7"), 116 PINCTRL_PIN(8, "GPIO_8"), 117 PINCTRL_PIN(9, "GPIO_9"), 118 PINCTRL_PIN(10, "GPIO_10"), 119 PINCTRL_PIN(11, "GPIO_11"), 120 PINCTRL_PIN(12, "GPIO_12"), 121 PINCTRL_PIN(13, "GPIO_13"), 122 PINCTRL_PIN(14, "GPIO_14"), 123 PINCTRL_PIN(15, "GPIO_15"), 124 PINCTRL_PIN(16, "GPIO_16"), 125 PINCTRL_PIN(17, "GPIO_17"), 126 PINCTRL_PIN(18, "GPIO_18"), 127 PINCTRL_PIN(19, "GPIO_19"), 128 PINCTRL_PIN(20, "GPIO_20"), 129 PINCTRL_PIN(21, "GPIO_21"), 130 PINCTRL_PIN(22, "GPIO_22"), 131 PINCTRL_PIN(23, "GPIO_23"), 132 PINCTRL_PIN(24, "GPIO_24"), 133 PINCTRL_PIN(25, "GPIO_25"), 134 PINCTRL_PIN(26, "GPIO_26"), 135 PINCTRL_PIN(27, "GPIO_27"), 136 PINCTRL_PIN(28, "GPIO_28"), 137 PINCTRL_PIN(29, "GPIO_29"), 138 PINCTRL_PIN(30, "GPIO_30"), 139 PINCTRL_PIN(31, "GPIO_31"), 140 PINCTRL_PIN(32, "GPIO_32"), 141 PINCTRL_PIN(33, "GPIO_33"), 142 PINCTRL_PIN(34, "GPIO_34"), 143 PINCTRL_PIN(35, "GPIO_35"), 144 PINCTRL_PIN(36, "GPIO_36"), 145 PINCTRL_PIN(37, "GPIO_37"), 146 PINCTRL_PIN(38, "GPIO_38"), 147 PINCTRL_PIN(39, "GPIO_39"), 148 PINCTRL_PIN(40, "GPIO_40"), 149 PINCTRL_PIN(41, "GPIO_41"), 150 PINCTRL_PIN(42, "GPIO_42"), 151 PINCTRL_PIN(43, "GPIO_43"), 152 PINCTRL_PIN(44, "GPIO_44"), 153 PINCTRL_PIN(45, "GPIO_45"), 154 PINCTRL_PIN(46, "GPIO_46"), 155 PINCTRL_PIN(47, "GPIO_47"), 156 PINCTRL_PIN(48, "GPIO_48"), 157 PINCTRL_PIN(49, "GPIO_49"), 158 PINCTRL_PIN(50, "GPIO_50"), 159 PINCTRL_PIN(51, "GPIO_51"), 160 PINCTRL_PIN(52, "GPIO_52"), 161 PINCTRL_PIN(53, "GPIO_53"), 162 PINCTRL_PIN(54, "GPIO_54"), 163 PINCTRL_PIN(55, "GPIO_55"), 164 PINCTRL_PIN(56, "GPIO_56"), 165 PINCTRL_PIN(57, "GPIO_57"), 166 PINCTRL_PIN(58, "GPIO_58"), 167 PINCTRL_PIN(59, "GPIO_59"), 168 PINCTRL_PIN(60, "GPIO_60"), 169 PINCTRL_PIN(61, "GPIO_61"), 170 PINCTRL_PIN(62, "GPIO_62"), 171 PINCTRL_PIN(63, "GPIO_63"), 172 PINCTRL_PIN(64, "GPIO_64"), 173 PINCTRL_PIN(65, "GPIO_65"), 174 PINCTRL_PIN(66, "GPIO_66"), 175 PINCTRL_PIN(67, "GPIO_67"), 176 PINCTRL_PIN(68, "GPIO_68"), 177 PINCTRL_PIN(69, "GPIO_69"), 178 PINCTRL_PIN(70, "GPIO_70"), 179 PINCTRL_PIN(71, "GPIO_71"), 180 PINCTRL_PIN(72, "GPIO_72"), 181 PINCTRL_PIN(73, "GPIO_73"), 182 PINCTRL_PIN(74, "GPIO_74"), 183 PINCTRL_PIN(75, "GPIO_75"), 184 PINCTRL_PIN(76, "GPIO_76"), 185 PINCTRL_PIN(77, "GPIO_77"), 186 PINCTRL_PIN(78, "GPIO_78"), 187 PINCTRL_PIN(79, "GPIO_79"), 188 PINCTRL_PIN(80, "GPIO_80"), 189 PINCTRL_PIN(81, "GPIO_81"), 190 PINCTRL_PIN(82, "GPIO_82"), 191 PINCTRL_PIN(83, "GPIO_83"), 192 PINCTRL_PIN(84, "GPIO_84"), 193 PINCTRL_PIN(85, "GPIO_85"), 194 PINCTRL_PIN(86, "GPIO_86"), 195 PINCTRL_PIN(87, "GPIO_87"), 196 PINCTRL_PIN(88, "GPIO_88"), 197 PINCTRL_PIN(89, "GPIO_89"), 198 PINCTRL_PIN(90, "GPIO_90"), 199 PINCTRL_PIN(91, "GPIO_91"), 200 PINCTRL_PIN(92, "GPIO_92"), 201 PINCTRL_PIN(93, "GPIO_93"), 202 PINCTRL_PIN(94, "GPIO_94"), 203 PINCTRL_PIN(95, "GPIO_95"), 204 PINCTRL_PIN(96, "GPIO_96"), 205 PINCTRL_PIN(97, "GPIO_97"), 206 PINCTRL_PIN(98, "GPIO_98"), 207 PINCTRL_PIN(99, "GPIO_99"), 208 PINCTRL_PIN(100, "GPIO_100"), 209 PINCTRL_PIN(101, "GPIO_101"), 210 PINCTRL_PIN(102, "GPIO_102"), 211 PINCTRL_PIN(103, "GPIO_103"), 212 PINCTRL_PIN(104, "GPIO_104"), 213 PINCTRL_PIN(105, "GPIO_105"), 214 PINCTRL_PIN(106, "GPIO_106"), 215 PINCTRL_PIN(107, "GPIO_107"), 216 PINCTRL_PIN(108, "GPIO_108"), 217 PINCTRL_PIN(109, "GPIO_109"), 218 PINCTRL_PIN(110, "GPIO_110"), 219 PINCTRL_PIN(111, "GPIO_111"), 220 PINCTRL_PIN(112, "GPIO_112"), 221 PINCTRL_PIN(113, "GPIO_113"), 222 PINCTRL_PIN(114, "GPIO_114"), 223 PINCTRL_PIN(115, "GPIO_115"), 224 PINCTRL_PIN(116, "GPIO_116"), 225 PINCTRL_PIN(117, "GPIO_117"), 226 PINCTRL_PIN(118, "GPIO_118"), 227 PINCTRL_PIN(119, "GPIO_119"), 228 PINCTRL_PIN(120, "GPIO_120"), 229 PINCTRL_PIN(121, "GPIO_121"), 230 PINCTRL_PIN(122, "GPIO_122"), 231 PINCTRL_PIN(123, "GPIO_123"), 232 PINCTRL_PIN(124, "GPIO_124"), 233 PINCTRL_PIN(125, "GPIO_125"), 234 PINCTRL_PIN(126, "GPIO_126"), 235 PINCTRL_PIN(127, "GPIO_127"), 236 PINCTRL_PIN(128, "GPIO_128"), 237 PINCTRL_PIN(129, "GPIO_129"), 238 PINCTRL_PIN(130, "GPIO_130"), 239 PINCTRL_PIN(131, "GPIO_131"), 240 PINCTRL_PIN(132, "GPIO_132"), 241 PINCTRL_PIN(133, "GPIO_133"), 242 PINCTRL_PIN(134, "GPIO_134"), 243 PINCTRL_PIN(135, "GPIO_135"), 244 PINCTRL_PIN(136, "GPIO_136"), 245 PINCTRL_PIN(137, "GPIO_137"), 246 PINCTRL_PIN(138, "GPIO_138"), 247 PINCTRL_PIN(139, "GPIO_139"), 248 PINCTRL_PIN(140, "GPIO_140"), 249 PINCTRL_PIN(141, "GPIO_141"), 250 PINCTRL_PIN(142, "GPIO_142"), 251 PINCTRL_PIN(143, "GPIO_143"), 252 PINCTRL_PIN(144, "GPIO_144"), 253 PINCTRL_PIN(145, "GPIO_145"), 254 PINCTRL_PIN(146, "GPIO_146"), 255 PINCTRL_PIN(147, "GPIO_147"), 256 PINCTRL_PIN(148, "GPIO_148"), 257 PINCTRL_PIN(149, "GPIO_149"), 258 PINCTRL_PIN(150, "GPIO_150"), 259 PINCTRL_PIN(151, "GPIO_151"), 260 PINCTRL_PIN(152, "GPIO_152"), 261 PINCTRL_PIN(153, "GPIO_153"), 262 PINCTRL_PIN(154, "GPIO_154"), 263 PINCTRL_PIN(155, "GPIO_155"), 264 PINCTRL_PIN(156, "GPIO_156"), 265 PINCTRL_PIN(157, "GPIO_157"), 266 PINCTRL_PIN(158, "GPIO_158"), 267 PINCTRL_PIN(159, "GPIO_159"), 268 PINCTRL_PIN(160, "GPIO_160"), 269 PINCTRL_PIN(161, "GPIO_161"), 270 PINCTRL_PIN(162, "GPIO_162"), 271 PINCTRL_PIN(163, "GPIO_163"), 272 PINCTRL_PIN(164, "GPIO_164"), 273 PINCTRL_PIN(165, "GPIO_165"), 274 PINCTRL_PIN(166, "GPIO_166"), 275 PINCTRL_PIN(167, "GPIO_167"), 276 PINCTRL_PIN(168, "GPIO_168"), 277 PINCTRL_PIN(169, "GPIO_169"), 278 PINCTRL_PIN(170, "GPIO_170"), 279 PINCTRL_PIN(171, "GPIO_171"), 280 PINCTRL_PIN(172, "GPIO_172"), 281 PINCTRL_PIN(173, "GPIO_173"), 282 PINCTRL_PIN(174, "GPIO_174"), 283 PINCTRL_PIN(175, "GPIO_175"), 284 PINCTRL_PIN(176, "GPIO_176"), 285 PINCTRL_PIN(177, "GPIO_177"), 286 PINCTRL_PIN(178, "GPIO_178"), 287 PINCTRL_PIN(179, "GPIO_179"), 288 PINCTRL_PIN(180, "GPIO_180"), 289 PINCTRL_PIN(181, "GPIO_181"), 290 PINCTRL_PIN(182, "GPIO_182"), 291 PINCTRL_PIN(183, "GPIO_183"), 292 PINCTRL_PIN(184, "GPIO_184"), 293 PINCTRL_PIN(185, "GPIO_185"), 294 PINCTRL_PIN(186, "GPIO_186"), 295 PINCTRL_PIN(187, "GPIO_187"), 296 PINCTRL_PIN(188, "GPIO_188"), 297 PINCTRL_PIN(189, "GPIO_189"), 298 PINCTRL_PIN(190, "GPIO_190"), 299 PINCTRL_PIN(191, "GPIO_191"), 300 PINCTRL_PIN(192, "GPIO_192"), 301 PINCTRL_PIN(193, "GPIO_193"), 302 PINCTRL_PIN(194, "GPIO_194"), 303 PINCTRL_PIN(195, "GPIO_195"), 304 PINCTRL_PIN(196, "GPIO_196"), 305 PINCTRL_PIN(197, "GPIO_197"), 306 PINCTRL_PIN(198, "GPIO_198"), 307 PINCTRL_PIN(199, "GPIO_199"), 308 PINCTRL_PIN(200, "GPIO_200"), 309 PINCTRL_PIN(201, "GPIO_201"), 310 PINCTRL_PIN(202, "GPIO_202"), 311 PINCTRL_PIN(203, "GPIO_203"), 312 PINCTRL_PIN(204, "GPIO_204"), 313 PINCTRL_PIN(205, "GPIO_205"), 314 PINCTRL_PIN(206, "GPIO_206"), 315 PINCTRL_PIN(207, "GPIO_207"), 316 PINCTRL_PIN(208, "GPIO_208"), 317 PINCTRL_PIN(209, "GPIO_209"), 318 PINCTRL_PIN(210, "GPIO_210"), 319 PINCTRL_PIN(211, "GPIO_211"), 320 PINCTRL_PIN(212, "GPIO_212"), 321 PINCTRL_PIN(213, "GPIO_213"), 322 PINCTRL_PIN(214, "GPIO_214"), 323 PINCTRL_PIN(215, "UFS_RESET"), 324 PINCTRL_PIN(216, "SDC2_CLK"), 325 PINCTRL_PIN(217, "SDC2_CMD"), 326 PINCTRL_PIN(218, "SDC2_DATA"), 327}; 328 329#define DECLARE_MSM_GPIO_PINS(pin) \ 330 static const unsigned int gpio##pin##_pins[] = { pin } 331DECLARE_MSM_GPIO_PINS(0); 332DECLARE_MSM_GPIO_PINS(1); 333DECLARE_MSM_GPIO_PINS(2); 334DECLARE_MSM_GPIO_PINS(3); 335DECLARE_MSM_GPIO_PINS(4); 336DECLARE_MSM_GPIO_PINS(5); 337DECLARE_MSM_GPIO_PINS(6); 338DECLARE_MSM_GPIO_PINS(7); 339DECLARE_MSM_GPIO_PINS(8); 340DECLARE_MSM_GPIO_PINS(9); 341DECLARE_MSM_GPIO_PINS(10); 342DECLARE_MSM_GPIO_PINS(11); 343DECLARE_MSM_GPIO_PINS(12); 344DECLARE_MSM_GPIO_PINS(13); 345DECLARE_MSM_GPIO_PINS(14); 346DECLARE_MSM_GPIO_PINS(15); 347DECLARE_MSM_GPIO_PINS(16); 348DECLARE_MSM_GPIO_PINS(17); 349DECLARE_MSM_GPIO_PINS(18); 350DECLARE_MSM_GPIO_PINS(19); 351DECLARE_MSM_GPIO_PINS(20); 352DECLARE_MSM_GPIO_PINS(21); 353DECLARE_MSM_GPIO_PINS(22); 354DECLARE_MSM_GPIO_PINS(23); 355DECLARE_MSM_GPIO_PINS(24); 356DECLARE_MSM_GPIO_PINS(25); 357DECLARE_MSM_GPIO_PINS(26); 358DECLARE_MSM_GPIO_PINS(27); 359DECLARE_MSM_GPIO_PINS(28); 360DECLARE_MSM_GPIO_PINS(29); 361DECLARE_MSM_GPIO_PINS(30); 362DECLARE_MSM_GPIO_PINS(31); 363DECLARE_MSM_GPIO_PINS(32); 364DECLARE_MSM_GPIO_PINS(33); 365DECLARE_MSM_GPIO_PINS(34); 366DECLARE_MSM_GPIO_PINS(35); 367DECLARE_MSM_GPIO_PINS(36); 368DECLARE_MSM_GPIO_PINS(37); 369DECLARE_MSM_GPIO_PINS(38); 370DECLARE_MSM_GPIO_PINS(39); 371DECLARE_MSM_GPIO_PINS(40); 372DECLARE_MSM_GPIO_PINS(41); 373DECLARE_MSM_GPIO_PINS(42); 374DECLARE_MSM_GPIO_PINS(43); 375DECLARE_MSM_GPIO_PINS(44); 376DECLARE_MSM_GPIO_PINS(45); 377DECLARE_MSM_GPIO_PINS(46); 378DECLARE_MSM_GPIO_PINS(47); 379DECLARE_MSM_GPIO_PINS(48); 380DECLARE_MSM_GPIO_PINS(49); 381DECLARE_MSM_GPIO_PINS(50); 382DECLARE_MSM_GPIO_PINS(51); 383DECLARE_MSM_GPIO_PINS(52); 384DECLARE_MSM_GPIO_PINS(53); 385DECLARE_MSM_GPIO_PINS(54); 386DECLARE_MSM_GPIO_PINS(55); 387DECLARE_MSM_GPIO_PINS(56); 388DECLARE_MSM_GPIO_PINS(57); 389DECLARE_MSM_GPIO_PINS(58); 390DECLARE_MSM_GPIO_PINS(59); 391DECLARE_MSM_GPIO_PINS(60); 392DECLARE_MSM_GPIO_PINS(61); 393DECLARE_MSM_GPIO_PINS(62); 394DECLARE_MSM_GPIO_PINS(63); 395DECLARE_MSM_GPIO_PINS(64); 396DECLARE_MSM_GPIO_PINS(65); 397DECLARE_MSM_GPIO_PINS(66); 398DECLARE_MSM_GPIO_PINS(67); 399DECLARE_MSM_GPIO_PINS(68); 400DECLARE_MSM_GPIO_PINS(69); 401DECLARE_MSM_GPIO_PINS(70); 402DECLARE_MSM_GPIO_PINS(71); 403DECLARE_MSM_GPIO_PINS(72); 404DECLARE_MSM_GPIO_PINS(73); 405DECLARE_MSM_GPIO_PINS(74); 406DECLARE_MSM_GPIO_PINS(75); 407DECLARE_MSM_GPIO_PINS(76); 408DECLARE_MSM_GPIO_PINS(77); 409DECLARE_MSM_GPIO_PINS(78); 410DECLARE_MSM_GPIO_PINS(79); 411DECLARE_MSM_GPIO_PINS(80); 412DECLARE_MSM_GPIO_PINS(81); 413DECLARE_MSM_GPIO_PINS(82); 414DECLARE_MSM_GPIO_PINS(83); 415DECLARE_MSM_GPIO_PINS(84); 416DECLARE_MSM_GPIO_PINS(85); 417DECLARE_MSM_GPIO_PINS(86); 418DECLARE_MSM_GPIO_PINS(87); 419DECLARE_MSM_GPIO_PINS(88); 420DECLARE_MSM_GPIO_PINS(89); 421DECLARE_MSM_GPIO_PINS(90); 422DECLARE_MSM_GPIO_PINS(91); 423DECLARE_MSM_GPIO_PINS(92); 424DECLARE_MSM_GPIO_PINS(93); 425DECLARE_MSM_GPIO_PINS(94); 426DECLARE_MSM_GPIO_PINS(95); 427DECLARE_MSM_GPIO_PINS(96); 428DECLARE_MSM_GPIO_PINS(97); 429DECLARE_MSM_GPIO_PINS(98); 430DECLARE_MSM_GPIO_PINS(99); 431DECLARE_MSM_GPIO_PINS(100); 432DECLARE_MSM_GPIO_PINS(101); 433DECLARE_MSM_GPIO_PINS(102); 434DECLARE_MSM_GPIO_PINS(103); 435DECLARE_MSM_GPIO_PINS(104); 436DECLARE_MSM_GPIO_PINS(105); 437DECLARE_MSM_GPIO_PINS(106); 438DECLARE_MSM_GPIO_PINS(107); 439DECLARE_MSM_GPIO_PINS(108); 440DECLARE_MSM_GPIO_PINS(109); 441DECLARE_MSM_GPIO_PINS(110); 442DECLARE_MSM_GPIO_PINS(111); 443DECLARE_MSM_GPIO_PINS(112); 444DECLARE_MSM_GPIO_PINS(113); 445DECLARE_MSM_GPIO_PINS(114); 446DECLARE_MSM_GPIO_PINS(115); 447DECLARE_MSM_GPIO_PINS(116); 448DECLARE_MSM_GPIO_PINS(117); 449DECLARE_MSM_GPIO_PINS(118); 450DECLARE_MSM_GPIO_PINS(119); 451DECLARE_MSM_GPIO_PINS(120); 452DECLARE_MSM_GPIO_PINS(121); 453DECLARE_MSM_GPIO_PINS(122); 454DECLARE_MSM_GPIO_PINS(123); 455DECLARE_MSM_GPIO_PINS(124); 456DECLARE_MSM_GPIO_PINS(125); 457DECLARE_MSM_GPIO_PINS(126); 458DECLARE_MSM_GPIO_PINS(127); 459DECLARE_MSM_GPIO_PINS(128); 460DECLARE_MSM_GPIO_PINS(129); 461DECLARE_MSM_GPIO_PINS(130); 462DECLARE_MSM_GPIO_PINS(131); 463DECLARE_MSM_GPIO_PINS(132); 464DECLARE_MSM_GPIO_PINS(133); 465DECLARE_MSM_GPIO_PINS(134); 466DECLARE_MSM_GPIO_PINS(135); 467DECLARE_MSM_GPIO_PINS(136); 468DECLARE_MSM_GPIO_PINS(137); 469DECLARE_MSM_GPIO_PINS(138); 470DECLARE_MSM_GPIO_PINS(139); 471DECLARE_MSM_GPIO_PINS(140); 472DECLARE_MSM_GPIO_PINS(141); 473DECLARE_MSM_GPIO_PINS(142); 474DECLARE_MSM_GPIO_PINS(143); 475DECLARE_MSM_GPIO_PINS(144); 476DECLARE_MSM_GPIO_PINS(145); 477DECLARE_MSM_GPIO_PINS(146); 478DECLARE_MSM_GPIO_PINS(147); 479DECLARE_MSM_GPIO_PINS(148); 480DECLARE_MSM_GPIO_PINS(149); 481DECLARE_MSM_GPIO_PINS(150); 482DECLARE_MSM_GPIO_PINS(151); 483DECLARE_MSM_GPIO_PINS(152); 484DECLARE_MSM_GPIO_PINS(153); 485DECLARE_MSM_GPIO_PINS(154); 486DECLARE_MSM_GPIO_PINS(155); 487DECLARE_MSM_GPIO_PINS(156); 488DECLARE_MSM_GPIO_PINS(157); 489DECLARE_MSM_GPIO_PINS(158); 490DECLARE_MSM_GPIO_PINS(159); 491DECLARE_MSM_GPIO_PINS(160); 492DECLARE_MSM_GPIO_PINS(161); 493DECLARE_MSM_GPIO_PINS(162); 494DECLARE_MSM_GPIO_PINS(163); 495DECLARE_MSM_GPIO_PINS(164); 496DECLARE_MSM_GPIO_PINS(165); 497DECLARE_MSM_GPIO_PINS(166); 498DECLARE_MSM_GPIO_PINS(167); 499DECLARE_MSM_GPIO_PINS(168); 500DECLARE_MSM_GPIO_PINS(169); 501DECLARE_MSM_GPIO_PINS(170); 502DECLARE_MSM_GPIO_PINS(171); 503DECLARE_MSM_GPIO_PINS(172); 504DECLARE_MSM_GPIO_PINS(173); 505DECLARE_MSM_GPIO_PINS(174); 506DECLARE_MSM_GPIO_PINS(175); 507DECLARE_MSM_GPIO_PINS(176); 508DECLARE_MSM_GPIO_PINS(177); 509DECLARE_MSM_GPIO_PINS(178); 510DECLARE_MSM_GPIO_PINS(179); 511DECLARE_MSM_GPIO_PINS(180); 512DECLARE_MSM_GPIO_PINS(181); 513DECLARE_MSM_GPIO_PINS(182); 514DECLARE_MSM_GPIO_PINS(183); 515DECLARE_MSM_GPIO_PINS(184); 516DECLARE_MSM_GPIO_PINS(185); 517DECLARE_MSM_GPIO_PINS(186); 518DECLARE_MSM_GPIO_PINS(187); 519DECLARE_MSM_GPIO_PINS(188); 520DECLARE_MSM_GPIO_PINS(189); 521DECLARE_MSM_GPIO_PINS(190); 522DECLARE_MSM_GPIO_PINS(191); 523DECLARE_MSM_GPIO_PINS(192); 524DECLARE_MSM_GPIO_PINS(193); 525DECLARE_MSM_GPIO_PINS(194); 526DECLARE_MSM_GPIO_PINS(195); 527DECLARE_MSM_GPIO_PINS(196); 528DECLARE_MSM_GPIO_PINS(197); 529DECLARE_MSM_GPIO_PINS(198); 530DECLARE_MSM_GPIO_PINS(199); 531DECLARE_MSM_GPIO_PINS(200); 532DECLARE_MSM_GPIO_PINS(201); 533DECLARE_MSM_GPIO_PINS(202); 534DECLARE_MSM_GPIO_PINS(203); 535DECLARE_MSM_GPIO_PINS(204); 536DECLARE_MSM_GPIO_PINS(205); 537DECLARE_MSM_GPIO_PINS(206); 538DECLARE_MSM_GPIO_PINS(207); 539DECLARE_MSM_GPIO_PINS(208); 540DECLARE_MSM_GPIO_PINS(209); 541DECLARE_MSM_GPIO_PINS(210); 542DECLARE_MSM_GPIO_PINS(211); 543DECLARE_MSM_GPIO_PINS(212); 544DECLARE_MSM_GPIO_PINS(213); 545DECLARE_MSM_GPIO_PINS(214); 546 547static const unsigned int ufs_reset_pins[] = { 215 }; 548static const unsigned int sdc2_clk_pins[] = { 216 }; 549static const unsigned int sdc2_cmd_pins[] = { 217 }; 550static const unsigned int sdc2_data_pins[] = { 218 }; 551 552enum sm8750_functions { 553 msm_mux_gpio, 554 msm_mux_aoss_cti, 555 msm_mux_atest_char, 556 msm_mux_atest_usb, 557 msm_mux_audio_ext_mclk0, 558 msm_mux_audio_ext_mclk1, 559 msm_mux_audio_ref_clk, 560 msm_mux_cam_aon_mclk2, 561 msm_mux_cam_aon_mclk4, 562 msm_mux_cam_mclk, 563 msm_mux_cci_async_in, 564 msm_mux_cci_i2c_scl, 565 msm_mux_cci_i2c_sda, 566 msm_mux_cci_timer, 567 msm_mux_cmu_rng, 568 msm_mux_coex_uart1_rx, 569 msm_mux_coex_uart1_tx, 570 msm_mux_coex_uart2_rx, 571 msm_mux_coex_uart2_tx, 572 msm_mux_dbg_out_clk, 573 msm_mux_ddr_bist_complete, 574 msm_mux_ddr_bist_fail, 575 msm_mux_ddr_bist_start, 576 msm_mux_ddr_bist_stop, 577 msm_mux_ddr_pxi0, 578 msm_mux_ddr_pxi1, 579 msm_mux_ddr_pxi2, 580 msm_mux_ddr_pxi3, 581 msm_mux_dp_hot, 582 msm_mux_egpio, 583 msm_mux_gcc_gp1, 584 msm_mux_gcc_gp2, 585 msm_mux_gcc_gp3, 586 msm_mux_gnss_adc0, 587 msm_mux_gnss_adc1, 588 msm_mux_i2chub0_se0, 589 msm_mux_i2chub0_se1, 590 msm_mux_i2chub0_se2, 591 msm_mux_i2chub0_se3, 592 msm_mux_i2chub0_se4, 593 msm_mux_i2chub0_se5, 594 msm_mux_i2chub0_se6, 595 msm_mux_i2chub0_se7, 596 msm_mux_i2chub0_se8, 597 msm_mux_i2chub0_se9, 598 msm_mux_i2s0_data0, 599 msm_mux_i2s0_data1, 600 msm_mux_i2s0_sck, 601 msm_mux_i2s0_ws, 602 msm_mux_i2s1_data0, 603 msm_mux_i2s1_data1, 604 msm_mux_i2s1_sck, 605 msm_mux_i2s1_ws, 606 msm_mux_ibi_i3c, 607 msm_mux_jitter_bist, 608 msm_mux_mdp_esync0_out, 609 msm_mux_mdp_esync1_out, 610 msm_mux_mdp_vsync, 611 msm_mux_mdp_vsync0_out, 612 msm_mux_mdp_vsync1_out, 613 msm_mux_mdp_vsync2_out, 614 msm_mux_mdp_vsync3_out, 615 msm_mux_mdp_vsync5_out, 616 msm_mux_mdp_vsync_e, 617 msm_mux_nav_gpio0, 618 msm_mux_nav_gpio1, 619 msm_mux_nav_gpio2, 620 msm_mux_nav_gpio3, 621 msm_mux_pcie0_clk_req_n, 622 msm_mux_phase_flag, 623 msm_mux_pll_bist_sync, 624 msm_mux_pll_clk_aux, 625 msm_mux_prng_rosc0, 626 msm_mux_prng_rosc1, 627 msm_mux_prng_rosc2, 628 msm_mux_prng_rosc3, 629 msm_mux_qdss_cti, 630 msm_mux_qlink_big_enable, 631 msm_mux_qlink_big_request, 632 msm_mux_qlink_little_enable, 633 msm_mux_qlink_little_request, 634 msm_mux_qlink_wmss, 635 msm_mux_qspi0, 636 msm_mux_qspi1, 637 msm_mux_qspi2, 638 msm_mux_qspi3, 639 msm_mux_qspi_clk, 640 msm_mux_qspi_cs, 641 msm_mux_qup1_se0, 642 msm_mux_qup1_se1, 643 msm_mux_qup1_se2, 644 msm_mux_qup1_se3, 645 msm_mux_qup1_se4, 646 msm_mux_qup1_se5, 647 msm_mux_qup1_se6, 648 msm_mux_qup1_se7, 649 msm_mux_qup2_se0, 650 msm_mux_qup2_se1, 651 msm_mux_qup2_se2, 652 msm_mux_qup2_se3, 653 msm_mux_qup2_se4, 654 msm_mux_qup2_se5, 655 msm_mux_qup2_se6, 656 msm_mux_qup2_se7, 657 msm_mux_sd_write_protect, 658 msm_mux_sdc40, 659 msm_mux_sdc41, 660 msm_mux_sdc42, 661 msm_mux_sdc43, 662 msm_mux_sdc4_clk, 663 msm_mux_sdc4_cmd, 664 msm_mux_tb_trig_sdc2, 665 msm_mux_tb_trig_sdc4, 666 msm_mux_tmess_prng0, 667 msm_mux_tmess_prng1, 668 msm_mux_tmess_prng2, 669 msm_mux_tmess_prng3, 670 msm_mux_tsense_pwm1, 671 msm_mux_tsense_pwm2, 672 msm_mux_tsense_pwm3, 673 msm_mux_tsense_pwm4, 674 msm_mux_uim0_clk, 675 msm_mux_uim0_data, 676 msm_mux_uim0_present, 677 msm_mux_uim0_reset, 678 msm_mux_uim1_clk, 679 msm_mux_uim1_data, 680 msm_mux_uim1_present, 681 msm_mux_uim1_reset, 682 msm_mux_usb1_hs, 683 msm_mux_usb_phy, 684 msm_mux_vfr_0, 685 msm_mux_vfr_1, 686 msm_mux_vsense_trigger_mirnat, 687 msm_mux_wcn_sw, 688 msm_mux_wcn_sw_ctrl, 689 msm_mux__, 690}; 691 692static const char *const gpio_groups[] = { 693 "gpio0", "gpio1", "gpio2", "gpio3", "gpio4", "gpio5", 694 "gpio6", "gpio7", "gpio8", "gpio9", "gpio10", "gpio11", 695 "gpio12", "gpio13", "gpio14", "gpio15", "gpio16", "gpio17", 696 "gpio18", "gpio19", "gpio20", "gpio21", "gpio22", "gpio23", 697 "gpio24", "gpio25", "gpio26", "gpio27", "gpio28", "gpio29", 698 "gpio30", "gpio31", "gpio32", "gpio33", "gpio34", "gpio35", 699 "gpio36", "gpio37", "gpio38", "gpio39", "gpio40", "gpio41", 700 "gpio42", "gpio43", "gpio44", "gpio45", "gpio46", "gpio47", 701 "gpio48", "gpio49", "gpio50", "gpio51", "gpio52", "gpio53", 702 "gpio54", "gpio55", "gpio56", "gpio57", "gpio58", "gpio59", 703 "gpio60", "gpio61", "gpio62", "gpio63", "gpio64", "gpio65", 704 "gpio66", "gpio67", "gpio68", "gpio69", "gpio70", "gpio71", 705 "gpio72", "gpio73", "gpio74", "gpio75", "gpio76", "gpio77", 706 "gpio78", "gpio79", "gpio80", "gpio81", "gpio82", "gpio83", 707 "gpio84", "gpio85", "gpio86", "gpio87", "gpio88", "gpio89", 708 "gpio90", "gpio91", "gpio92", "gpio93", "gpio94", "gpio95", 709 "gpio96", "gpio97", "gpio98", "gpio99", "gpio100", "gpio101", 710 "gpio102", "gpio103", "gpio104", "gpio105", "gpio106", "gpio107", 711 "gpio108", "gpio109", "gpio110", "gpio111", "gpio112", "gpio113", 712 "gpio114", "gpio115", "gpio116", "gpio117", "gpio118", "gpio119", 713 "gpio120", "gpio121", "gpio122", "gpio123", "gpio124", "gpio125", 714 "gpio126", "gpio127", "gpio128", "gpio129", "gpio130", "gpio131", 715 "gpio132", "gpio133", "gpio134", "gpio135", "gpio136", "gpio137", 716 "gpio138", "gpio139", "gpio140", "gpio141", "gpio142", "gpio143", 717 "gpio144", "gpio145", "gpio146", "gpio147", "gpio148", "gpio149", 718 "gpio150", "gpio151", "gpio152", "gpio153", "gpio154", "gpio155", 719 "gpio156", "gpio157", "gpio158", "gpio159", "gpio160", "gpio161", 720 "gpio162", "gpio163", "gpio164", "gpio165", "gpio166", "gpio167", 721 "gpio168", "gpio169", "gpio170", "gpio171", "gpio172", "gpio173", 722 "gpio174", "gpio175", "gpio176", "gpio177", "gpio178", "gpio179", 723 "gpio180", "gpio181", "gpio182", "gpio183", "gpio184", "gpio185", 724 "gpio186", "gpio187", "gpio188", "gpio189", "gpio190", "gpio191", 725 "gpio192", "gpio193", "gpio194", "gpio195", "gpio196", "gpio197", 726 "gpio198", "gpio199", "gpio200", "gpio201", "gpio202", "gpio203", 727 "gpio204", "gpio205", "gpio206", "gpio207", "gpio208", "gpio209", 728 "gpio210", "gpio211", "gpio212", "gpio213", "gpio214", 729}; 730 731static const char *const egpio_groups[] = { 732 "gpio0", "gpio1", "gpio2", "gpio3", "gpio4", "gpio5", 733 "gpio6", "gpio7", "gpio32", "gpio33", "gpio34", "gpio35", 734 "gpio36", "gpio37", "gpio105", "gpio106", "gpio107", "gpio108", 735 "gpio165", "gpio166", "gpio167", "gpio168", "gpio169", "gpio170", 736 "gpio171", "gpio172", "gpio173", "gpio174", "gpio175", "gpio176", 737 "gpio177", "gpio178", "gpio179", "gpio180", "gpio181", "gpio182", 738 "gpio183", "gpio184", "gpio185", "gpio186", "gpio187", "gpio188", 739 "gpio189", "gpio190", "gpio191", "gpio192", "gpio193", "gpio194", 740 "gpio195", "gpio196", "gpio197", "gpio198", "gpio199", "gpio200", 741 "gpio201", "gpio202", "gpio203", "gpio204", "gpio205", "gpio206", 742 "gpio207", "gpio208", "gpio209", "gpio210", "gpio211", "gpio212", 743 "gpio213", "gpio214", 744}; 745 746static const char *const aoss_cti_groups[] = { 747 "gpio50", "gpio51", "gpio60", "gpio61", 748}; 749 750static const char *const atest_char_groups[] = { 751 "gpio130", "gpio131", "gpio132", "gpio133", "gpio137", 752}; 753 754static const char *const atest_usb_groups[] = { 755 "gpio70", "gpio71", "gpio72", "gpio73", "gpio76", 756}; 757 758static const char *const audio_ext_mclk0_groups[] = { 759 "gpio125", 760}; 761 762static const char *const audio_ext_mclk1_groups[] = { 763 "gpio124", 764}; 765 766static const char *const audio_ref_clk_groups[] = { 767 "gpio124", 768}; 769 770static const char *const cam_aon_mclk2_groups[] = { 771 "gpio91", 772}; 773 774static const char *const cam_aon_mclk4_groups[] = { 775 "gpio93", 776}; 777 778static const char *const cam_mclk_groups[] = { 779 "gpio89", "gpio90", "gpio92", "gpio94", "gpio95", "gpio96", 780}; 781 782static const char *const cci_async_in_groups[] = { 783 "gpio10", "gpio11", "gpio15", 784}; 785 786static const char *const cci_i2c_scl_groups[] = { 787 "gpio114", "gpio116", "gpio118", "gpio120", "gpio153", "gpio164", 788}; 789 790static const char *const cci_i2c_sda_groups[] = { 791 "gpio111", "gpio112", "gpio113", "gpio115", "gpio117", "gpio119", 792}; 793 794static const char *const cci_timer_groups[] = { 795 "gpio109", "gpio110", "gpio111", "gpio163", "gpio164", 796}; 797 798static const char *const cmu_rng_groups[] = { 799 "gpio40", "gpio41", "gpio41", "gpio43", "gpio148", "gpio149", 800 "gpio150", "gpio151", 801}; 802 803static const char *const coex_uart1_rx_groups[] = { 804 "gpio148", 805}; 806 807static const char *const coex_uart1_tx_groups[] = { 808 "gpio149", 809}; 810 811static const char *const coex_uart2_rx_groups[] = { 812 "gpio150", 813}; 814 815static const char *const coex_uart2_tx_groups[] = { 816 "gpio151", 817}; 818 819static const char *const dbg_out_clk_groups[] = { 820 "gpio78", 821}; 822 823static const char *const ddr_bist_complete_groups[] = { 824 "gpio44", 825}; 826 827static const char *const ddr_bist_fail_groups[] = { 828 "gpio40", 829}; 830 831static const char *const ddr_bist_start_groups[] = { 832 "gpio41", 833}; 834 835static const char *const ddr_bist_stop_groups[] = { 836 "gpio45", 837}; 838 839static const char *const ddr_pxi0_groups[] = { 840 "gpio54", "gpio55", 841}; 842 843static const char *const ddr_pxi1_groups[] = { 844 "gpio44", "gpio45", 845}; 846 847static const char *const ddr_pxi2_groups[] = { 848 "gpio43", "gpio52", 849}; 850 851static const char *const ddr_pxi3_groups[] = { 852 "gpio46", "gpio53", 853}; 854 855static const char *const dp_hot_groups[] = { 856 "gpio47", 857}; 858 859static const char *const gcc_gp1_groups[] = { 860 "gpio86", "gpio134", 861}; 862 863static const char *const gcc_gp2_groups[] = { 864 "gpio87", "gpio135", 865}; 866 867static const char *const gcc_gp3_groups[] = { 868 "gpio88", "gpio136", 869}; 870 871static const char *const gnss_adc0_groups[] = { 872 "gpio78", "gpio79", 873}; 874 875static const char *const gnss_adc1_groups[] = { 876 "gpio77", "gpio99", 877}; 878 879static const char *const i2chub0_se0_groups[] = { 880 "gpio64", "gpio65", 881}; 882 883static const char *const i2chub0_se1_groups[] = { 884 "gpio66", "gpio67", 885}; 886 887static const char *const i2chub0_se2_groups[] = { 888 "gpio68", "gpio69", 889}; 890 891static const char *const i2chub0_se3_groups[] = { 892 "gpio70", "gpio71", 893}; 894 895static const char *const i2chub0_se4_groups[] = { 896 "gpio72", "gpio73", 897}; 898 899static const char *const i2chub0_se5_groups[] = { 900 "gpio74", "gpio75", 901}; 902 903static const char *const i2chub0_se6_groups[] = { 904 "gpio76", "gpio77", 905}; 906 907static const char *const i2chub0_se7_groups[] = { 908 "gpio82", "gpio83", 909}; 910 911static const char *const i2chub0_se8_groups[] = { 912 "gpio206", "gpio207", 913}; 914 915static const char *const i2chub0_se9_groups[] = { 916 "gpio80", "gpio81", 917}; 918 919static const char *const i2s0_data0_groups[] = { 920 "gpio127", 921}; 922 923static const char *const i2s0_data1_groups[] = { 924 "gpio128", 925}; 926 927static const char *const i2s0_sck_groups[] = { 928 "gpio126", 929}; 930 931static const char *const i2s0_ws_groups[] = { 932 "gpio129", 933}; 934 935static const char *const i2s1_data0_groups[] = { 936 "gpio122", 937}; 938 939static const char *const i2s1_data1_groups[] = { 940 "gpio124", 941}; 942 943static const char *const i2s1_sck_groups[] = { 944 "gpio121", 945}; 946 947static const char *const i2s1_ws_groups[] = { 948 "gpio123", 949}; 950 951static const char *const ibi_i3c_groups[] = { 952 "gpio0", "gpio1", "gpio4", "gpio5", "gpio8", "gpio9", 953 "gpio12", "gpio13", "gpio28", "gpio29", "gpio32", "gpio33", 954 "gpio36", "gpio37", "gpio48", "gpio49", 955}; 956 957static const char *const jitter_bist_groups[] = { 958 "gpio73", 959}; 960 961static const char *const mdp_esync0_out_groups[] = { 962 "gpio88", 963}; 964 965static const char *const mdp_esync1_out_groups[] = { 966 "gpio100", 967}; 968 969static const char *const mdp_vsync_groups[] = { 970 "gpio86", "gpio87", "gpio97", "gpio98", 971}; 972 973static const char *const mdp_vsync0_out_groups[] = { 974 "gpio86", 975}; 976 977static const char *const mdp_vsync1_out_groups[] = { 978 "gpio86", 979}; 980 981static const char *const mdp_vsync2_out_groups[] = { 982 "gpio87", 983}; 984 985static const char *const mdp_vsync3_out_groups[] = { 986 "gpio87", 987}; 988 989static const char *const mdp_vsync5_out_groups[] = { 990 "gpio87", 991}; 992 993static const char *const mdp_vsync_e_groups[] = { 994 "gpio88", 995}; 996 997static const char *const nav_gpio0_groups[] = { 998 "gpio154", 999}; 1000 1001static const char *const nav_gpio1_groups[] = { 1002 "gpio155", 1003}; 1004 1005static const char *const nav_gpio2_groups[] = { 1006 "gpio152", 1007}; 1008 1009static const char *const nav_gpio3_groups[] = { 1010 "gpio154", 1011}; 1012 1013static const char *const pcie0_clk_req_n_groups[] = { 1014 "gpio103", 1015}; 1016 1017static const char *const phase_flag_groups[] = { 1018 "gpio10", "gpio11", "gpio14", "gpio15", "gpio16", "gpio17", "gpio18", 1019 "gpio19", "gpio20", "gpio21", "gpio22", "gpio23", "gpio24", "gpio25", 1020 "gpio26", "gpio27", "gpio28", "gpio29", "gpio31", "gpio64", "gpio65", 1021 "gpio66", "gpio67", "gpio68", "gpio69", "gpio82", "gpio83", "gpio85", 1022 "gpio101", "gpio102", "gpio103", "gpio104", 1023}; 1024 1025static const char *const pll_bist_sync_groups[] = { 1026 "gpio104", 1027}; 1028 1029static const char *const pll_clk_aux_groups[] = { 1030 "gpio95", 1031}; 1032 1033static const char *const prng_rosc0_groups[] = { 1034 "gpio85", 1035}; 1036 1037static const char *const prng_rosc1_groups[] = { 1038 "gpio64", 1039}; 1040 1041static const char *const prng_rosc2_groups[] = { 1042 "gpio65", 1043}; 1044 1045static const char *const prng_rosc3_groups[] = { 1046 "gpio66", 1047}; 1048 1049static const char *const qdss_cti_groups[] = { 1050 "gpio27", "gpio31", "gpio72", "gpio73", "gpio82", "gpio83", "gpio159", 1051 "gpio162", 1052}; 1053 1054static const char *const qlink_big_enable_groups[] = { 1055 "gpio160", 1056}; 1057 1058static const char *const qlink_big_request_groups[] = { 1059 "gpio159", 1060}; 1061 1062static const char *const qlink_little_enable_groups[] = { 1063 "gpio157", 1064}; 1065 1066static const char *const qlink_little_request_groups[] = { 1067 "gpio156", 1068}; 1069 1070static const char *const qlink_wmss_groups[] = { 1071 "gpio158", 1072}; 1073 1074static const char *const qspi0_groups[] = { 1075 "gpio52", 1076}; 1077 1078static const char *const qspi1_groups[] = { 1079 "gpio53", 1080}; 1081 1082static const char *const qspi2_groups[] = { 1083 "gpio55", 1084}; 1085 1086static const char *const qspi3_groups[] = { 1087 "gpio56", 1088}; 1089 1090static const char *const qspi_clk_groups[] = { 1091 "gpio54", 1092}; 1093 1094static const char *const qspi_cs_groups[] = { 1095 "gpio57", "gpio58", 1096}; 1097 1098static const char *const qup1_se0_groups[] = { 1099 "gpio32", "gpio33", "gpio34", "gpio35", 1100}; 1101 1102static const char *const qup1_se1_groups[] = { 1103 "gpio36", "gpio37", "gpio38", "gpio39", 1104}; 1105 1106static const char *const qup1_se2_groups[] = { 1107 "gpio40", "gpio41", "gpio42", "gpio43", "gpio134", "gpio135", "gpio136", 1108}; 1109 1110static const char *const qup1_se3_groups[] = { 1111 "gpio44", "gpio45", "gpio46", "gpio47", 1112}; 1113 1114static const char *const qup1_se4_groups[] = { 1115 "gpio48", "gpio49", "gpio50", "gpio51", 1116}; 1117 1118static const char *const qup1_se5_groups[] = { 1119 "gpio52", "gpio53", "gpio54", "gpio55", 1120}; 1121 1122static const char *const qup1_se6_groups[] = { 1123 "gpio56", "gpio57", "gpio58", "gpio59", 1124}; 1125 1126static const char *const qup1_se7_groups[] = { 1127 "gpio60", "gpio61", "gpio62", "gpio63", 1128}; 1129 1130static const char *const qup2_se0_groups[] = { 1131 "gpio0", "gpio1", "gpio2", "gpio3", 1132}; 1133 1134static const char *const qup2_se1_groups[] = { 1135 "gpio4", "gpio5", "gpio6", "gpio7", 1136}; 1137 1138static const char *const qup2_se2_groups[] = { 1139 "gpio8", "gpio9", "gpio10", "gpio11", "gpio12", "gpio13", "gpio15", 1140}; 1141 1142static const char *const qup2_se3_groups[] = { 1143 "gpio12", "gpio13", "gpio14", "gpio15", 1144}; 1145 1146static const char *const qup2_se4_groups[] = { 1147 "gpio16", "gpio17", "gpio18", "gpio19", 1148}; 1149 1150static const char *const qup2_se5_groups[] = { 1151 "gpio20", "gpio21", "gpio22", "gpio23", 1152}; 1153 1154static const char *const qup2_se6_groups[] = { 1155 "gpio24", "gpio25", "gpio26", "gpio27", 1156}; 1157 1158static const char *const qup2_se7_groups[] = { 1159 "gpio28", "gpio29", "gpio30", "gpio31", 1160}; 1161 1162static const char *const sd_write_protect_groups[] = { 1163 "gpio85", 1164}; 1165 1166static const char *const sdc40_groups[] = { 1167 "gpio36", "gpio49", 1168}; 1169 1170static const char *const sdc41_groups[] = { 1171 "gpio37", "gpio51", 1172}; 1173 1174static const char *const sdc42_groups[] = { 1175 "gpio38", "gpio60", 1176}; 1177 1178static const char *const sdc43_groups[] = { 1179 "gpio39", "gpio61", 1180}; 1181 1182static const char *const sdc4_clk_groups[] = { 1183 "gpio50", "gpio150", 1184}; 1185 1186static const char *const sdc4_cmd_groups[] = { 1187 "gpio48", "gpio151", 1188}; 1189 1190static const char *const tb_trig_sdc2_groups[] = { 1191 "gpio89", 1192}; 1193 1194static const char *const tb_trig_sdc4_groups[] = { 1195 "gpio147", 1196}; 1197 1198static const char *const tmess_prng0_groups[] = { 1199 "gpio85", 1200}; 1201 1202static const char *const tmess_prng1_groups[] = { 1203 "gpio64", 1204}; 1205 1206static const char *const tmess_prng2_groups[] = { 1207 "gpio65", 1208}; 1209 1210static const char *const tmess_prng3_groups[] = { 1211 "gpio66", 1212}; 1213 1214static const char *const tsense_pwm1_groups[] = { 1215 "gpio57", 1216}; 1217 1218static const char *const tsense_pwm2_groups[] = { 1219 "gpio57", 1220}; 1221 1222static const char *const tsense_pwm3_groups[] = { 1223 "gpio57", 1224}; 1225 1226static const char *const tsense_pwm4_groups[] = { 1227 "gpio57", 1228}; 1229 1230static const char *const uim0_clk_groups[] = { 1231 "gpio131", 1232}; 1233 1234static const char *const uim0_data_groups[] = { 1235 "gpio130", 1236}; 1237 1238static const char *const uim0_present_groups[] = { 1239 "gpio133", 1240}; 1241 1242static const char *const uim0_reset_groups[] = { 1243 "gpio132", 1244}; 1245 1246static const char *const uim1_clk_groups[] = { 1247 "gpio37", "gpio55", "gpio71", "gpio135", 1248}; 1249 1250static const char *const uim1_data_groups[] = { 1251 "gpio134", "gpio36", "gpio54", "gpio70", 1252}; 1253 1254static const char *const uim1_present_groups[] = { 1255 "gpio137", 1256}; 1257 1258static const char *const uim1_reset_groups[] = { 1259 "gpio39", "gpio56", "gpio72", "gpio136", 1260}; 1261 1262static const char *const usb1_hs_groups[] = { 1263 "gpio79", 1264}; 1265 1266static const char *const usb_phy_groups[] = { 1267 "gpio59", "gpio61", 1268}; 1269 1270static const char *const vfr_0_groups[] = { 1271 "gpio150", 1272}; 1273 1274static const char *const vfr_1_groups[] = { 1275 "gpio155", 1276}; 1277 1278static const char *const vsense_trigger_mirnat_groups[] = { 1279 "gpio59", 1280}; 1281 1282static const char *const wcn_sw_groups[] = { 1283 "gpio19", 1284}; 1285 1286static const char *const wcn_sw_ctrl_groups[] = { 1287 "gpio18", 1288}; 1289 1290static const struct pinfunction sm8750_functions[] = { 1291 MSM_PIN_FUNCTION(gpio), 1292 MSM_PIN_FUNCTION(aoss_cti), 1293 MSM_PIN_FUNCTION(atest_char), 1294 MSM_PIN_FUNCTION(atest_usb), 1295 MSM_PIN_FUNCTION(audio_ext_mclk0), 1296 MSM_PIN_FUNCTION(audio_ext_mclk1), 1297 MSM_PIN_FUNCTION(audio_ref_clk), 1298 MSM_PIN_FUNCTION(cam_aon_mclk2), 1299 MSM_PIN_FUNCTION(cam_aon_mclk4), 1300 MSM_PIN_FUNCTION(cam_mclk), 1301 MSM_PIN_FUNCTION(cci_async_in), 1302 MSM_PIN_FUNCTION(cci_i2c_scl), 1303 MSM_PIN_FUNCTION(cci_i2c_sda), 1304 MSM_PIN_FUNCTION(cci_timer), 1305 MSM_PIN_FUNCTION(cmu_rng), 1306 MSM_PIN_FUNCTION(coex_uart1_rx), 1307 MSM_PIN_FUNCTION(coex_uart1_tx), 1308 MSM_PIN_FUNCTION(coex_uart2_rx), 1309 MSM_PIN_FUNCTION(coex_uart2_tx), 1310 MSM_PIN_FUNCTION(dbg_out_clk), 1311 MSM_PIN_FUNCTION(ddr_bist_complete), 1312 MSM_PIN_FUNCTION(ddr_bist_fail), 1313 MSM_PIN_FUNCTION(ddr_bist_start), 1314 MSM_PIN_FUNCTION(ddr_bist_stop), 1315 MSM_PIN_FUNCTION(ddr_pxi0), 1316 MSM_PIN_FUNCTION(ddr_pxi1), 1317 MSM_PIN_FUNCTION(ddr_pxi2), 1318 MSM_PIN_FUNCTION(ddr_pxi3), 1319 MSM_PIN_FUNCTION(dp_hot), 1320 MSM_PIN_FUNCTION(egpio), 1321 MSM_PIN_FUNCTION(gcc_gp1), 1322 MSM_PIN_FUNCTION(gcc_gp2), 1323 MSM_PIN_FUNCTION(gcc_gp3), 1324 MSM_PIN_FUNCTION(gnss_adc0), 1325 MSM_PIN_FUNCTION(gnss_adc1), 1326 MSM_PIN_FUNCTION(i2chub0_se0), 1327 MSM_PIN_FUNCTION(i2chub0_se1), 1328 MSM_PIN_FUNCTION(i2chub0_se2), 1329 MSM_PIN_FUNCTION(i2chub0_se3), 1330 MSM_PIN_FUNCTION(i2chub0_se4), 1331 MSM_PIN_FUNCTION(i2chub0_se5), 1332 MSM_PIN_FUNCTION(i2chub0_se6), 1333 MSM_PIN_FUNCTION(i2chub0_se7), 1334 MSM_PIN_FUNCTION(i2chub0_se8), 1335 MSM_PIN_FUNCTION(i2chub0_se9), 1336 MSM_PIN_FUNCTION(i2s0_data0), 1337 MSM_PIN_FUNCTION(i2s0_data1), 1338 MSM_PIN_FUNCTION(i2s0_sck), 1339 MSM_PIN_FUNCTION(i2s0_ws), 1340 MSM_PIN_FUNCTION(i2s1_data0), 1341 MSM_PIN_FUNCTION(i2s1_data1), 1342 MSM_PIN_FUNCTION(i2s1_sck), 1343 MSM_PIN_FUNCTION(i2s1_ws), 1344 MSM_PIN_FUNCTION(ibi_i3c), 1345 MSM_PIN_FUNCTION(jitter_bist), 1346 MSM_PIN_FUNCTION(mdp_esync0_out), 1347 MSM_PIN_FUNCTION(mdp_esync1_out), 1348 MSM_PIN_FUNCTION(mdp_vsync), 1349 MSM_PIN_FUNCTION(mdp_vsync0_out), 1350 MSM_PIN_FUNCTION(mdp_vsync1_out), 1351 MSM_PIN_FUNCTION(mdp_vsync2_out), 1352 MSM_PIN_FUNCTION(mdp_vsync3_out), 1353 MSM_PIN_FUNCTION(mdp_vsync5_out), 1354 MSM_PIN_FUNCTION(mdp_vsync_e), 1355 MSM_PIN_FUNCTION(nav_gpio0), 1356 MSM_PIN_FUNCTION(nav_gpio1), 1357 MSM_PIN_FUNCTION(nav_gpio2), 1358 MSM_PIN_FUNCTION(nav_gpio3), 1359 MSM_PIN_FUNCTION(pcie0_clk_req_n), 1360 MSM_PIN_FUNCTION(phase_flag), 1361 MSM_PIN_FUNCTION(pll_bist_sync), 1362 MSM_PIN_FUNCTION(pll_clk_aux), 1363 MSM_PIN_FUNCTION(prng_rosc0), 1364 MSM_PIN_FUNCTION(prng_rosc1), 1365 MSM_PIN_FUNCTION(prng_rosc2), 1366 MSM_PIN_FUNCTION(prng_rosc3), 1367 MSM_PIN_FUNCTION(qdss_cti), 1368 MSM_PIN_FUNCTION(qlink_big_enable), 1369 MSM_PIN_FUNCTION(qlink_big_request), 1370 MSM_PIN_FUNCTION(qlink_little_enable), 1371 MSM_PIN_FUNCTION(qlink_little_request), 1372 MSM_PIN_FUNCTION(qlink_wmss), 1373 MSM_PIN_FUNCTION(qspi0), 1374 MSM_PIN_FUNCTION(qspi1), 1375 MSM_PIN_FUNCTION(qspi2), 1376 MSM_PIN_FUNCTION(qspi3), 1377 MSM_PIN_FUNCTION(qspi_clk), 1378 MSM_PIN_FUNCTION(qspi_cs), 1379 MSM_PIN_FUNCTION(qup1_se0), 1380 MSM_PIN_FUNCTION(qup1_se1), 1381 MSM_PIN_FUNCTION(qup1_se2), 1382 MSM_PIN_FUNCTION(qup1_se3), 1383 MSM_PIN_FUNCTION(qup1_se4), 1384 MSM_PIN_FUNCTION(qup1_se5), 1385 MSM_PIN_FUNCTION(qup1_se6), 1386 MSM_PIN_FUNCTION(qup1_se7), 1387 MSM_PIN_FUNCTION(qup2_se0), 1388 MSM_PIN_FUNCTION(qup2_se1), 1389 MSM_PIN_FUNCTION(qup2_se2), 1390 MSM_PIN_FUNCTION(qup2_se3), 1391 MSM_PIN_FUNCTION(qup2_se4), 1392 MSM_PIN_FUNCTION(qup2_se5), 1393 MSM_PIN_FUNCTION(qup2_se6), 1394 MSM_PIN_FUNCTION(qup2_se7), 1395 MSM_PIN_FUNCTION(sd_write_protect), 1396 MSM_PIN_FUNCTION(sdc40), 1397 MSM_PIN_FUNCTION(sdc41), 1398 MSM_PIN_FUNCTION(sdc42), 1399 MSM_PIN_FUNCTION(sdc43), 1400 MSM_PIN_FUNCTION(sdc4_clk), 1401 MSM_PIN_FUNCTION(sdc4_cmd), 1402 MSM_PIN_FUNCTION(tb_trig_sdc2), 1403 MSM_PIN_FUNCTION(tb_trig_sdc4), 1404 MSM_PIN_FUNCTION(tmess_prng0), 1405 MSM_PIN_FUNCTION(tmess_prng1), 1406 MSM_PIN_FUNCTION(tmess_prng2), 1407 MSM_PIN_FUNCTION(tmess_prng3), 1408 MSM_PIN_FUNCTION(tsense_pwm1), 1409 MSM_PIN_FUNCTION(tsense_pwm2), 1410 MSM_PIN_FUNCTION(tsense_pwm3), 1411 MSM_PIN_FUNCTION(tsense_pwm4), 1412 MSM_PIN_FUNCTION(uim0_clk), 1413 MSM_PIN_FUNCTION(uim0_data), 1414 MSM_PIN_FUNCTION(uim0_present), 1415 MSM_PIN_FUNCTION(uim0_reset), 1416 MSM_PIN_FUNCTION(uim1_clk), 1417 MSM_PIN_FUNCTION(uim1_data), 1418 MSM_PIN_FUNCTION(uim1_present), 1419 MSM_PIN_FUNCTION(uim1_reset), 1420 MSM_PIN_FUNCTION(usb1_hs), 1421 MSM_PIN_FUNCTION(usb_phy), 1422 MSM_PIN_FUNCTION(vfr_0), 1423 MSM_PIN_FUNCTION(vfr_1), 1424 MSM_PIN_FUNCTION(vsense_trigger_mirnat), 1425 MSM_PIN_FUNCTION(wcn_sw), 1426 MSM_PIN_FUNCTION(wcn_sw_ctrl), 1427}; 1428 1429/* 1430 * Every pin is maintained as a single group, and missing or non-existing pin 1431 * would be maintained as dummy group to synchronize pin group index with 1432 * pin descriptor registered with pinctrl core. 1433 * Clients would not be able to request these dummy pin groups. 1434 */ 1435static const struct msm_pingroup sm8750_groups[] = { 1436 [0] = PINGROUP(0, qup2_se0, ibi_i3c, _, _, _, _, _, _, _, _, egpio), 1437 [1] = PINGROUP(1, qup2_se0, ibi_i3c, _, _, _, _, _, _, _, _, egpio), 1438 [2] = PINGROUP(2, qup2_se0, _, _, _, _, _, _, _, _, _, egpio), 1439 [3] = PINGROUP(3, qup2_se0, _, _, _, _, _, _, _, _, _, egpio), 1440 [4] = PINGROUP(4, qup2_se1, ibi_i3c, _, _, _, _, _, _, _, _, egpio), 1441 [5] = PINGROUP(5, qup2_se1, ibi_i3c, _, _, _, _, _, _, _, _, egpio), 1442 [6] = PINGROUP(6, qup2_se1, _, _, _, _, _, _, _, _, _, egpio), 1443 [7] = PINGROUP(7, qup2_se1, _, _, _, _, _, _, _, _, _, egpio), 1444 [8] = PINGROUP(8, qup2_se2, ibi_i3c, _, _, _, _, _, _, _, _, _), 1445 [9] = PINGROUP(9, qup2_se2, ibi_i3c, _, _, _, _, _, _, _, _, _), 1446 [10] = PINGROUP(10, qup2_se2, cci_async_in, phase_flag, _, _, _, _, _, _, _, _), 1447 [11] = PINGROUP(11, qup2_se2, cci_async_in, phase_flag, _, _, _, _, _, _, _, _), 1448 [12] = PINGROUP(12, qup2_se3, ibi_i3c, qup2_se2, _, _, _, _, _, _, _, _), 1449 [13] = PINGROUP(13, qup2_se3, ibi_i3c, qup2_se2, _, _, _, _, _, _, _, _), 1450 [14] = PINGROUP(14, qup2_se3, phase_flag, _, _, _, _, _, _, _, _, _), 1451 [15] = PINGROUP(15, qup2_se3, cci_async_in, qup2_se2, phase_flag, _, _, _, _, _, _, _), 1452 [16] = PINGROUP(16, qup2_se4, phase_flag, _, _, _, _, _, _, _, _, _), 1453 [17] = PINGROUP(17, qup2_se4, phase_flag, _, _, _, _, _, _, _, _, _), 1454 [18] = PINGROUP(18, wcn_sw_ctrl, qup2_se4, phase_flag, _, _, _, _, _, _, _, _), 1455 [19] = PINGROUP(19, wcn_sw, qup2_se4, phase_flag, _, _, _, _, _, _, _, _), 1456 [20] = PINGROUP(20, qup2_se5, phase_flag, _, _, _, _, _, _, _, _, _), 1457 [21] = PINGROUP(21, qup2_se5, phase_flag, _, _, _, _, _, _, _, _, _), 1458 [22] = PINGROUP(22, qup2_se5, phase_flag, _, _, _, _, _, _, _, _, _), 1459 [23] = PINGROUP(23, qup2_se5, qup2_se5, phase_flag, _, _, _, _, _, _, _, _), 1460 [24] = PINGROUP(24, qup2_se6, phase_flag, _, _, _, _, _, _, _, _, _), 1461 [25] = PINGROUP(25, qup2_se6, phase_flag, _, _, _, _, _, _, _, _, _), 1462 [26] = PINGROUP(26, qup2_se6, phase_flag, _, _, _, _, _, _, _, _, _), 1463 [27] = PINGROUP(27, qup2_se6, qdss_cti, phase_flag, _, _, _, _, _, _, _, _), 1464 [28] = PINGROUP(28, qup2_se7, ibi_i3c, phase_flag, _, _, _, _, _, _, _, _), 1465 [29] = PINGROUP(29, qup2_se7, ibi_i3c, phase_flag, _, _, _, _, _, _, _, _), 1466 [30] = PINGROUP(30, qup2_se7, _, _, _, _, _, _, _, _, _, _), 1467 [31] = PINGROUP(31, qup2_se7, qdss_cti, phase_flag, _, _, _, _, _, _, _, _), 1468 [32] = PINGROUP(32, qup1_se0, ibi_i3c, _, _, _, _, _, _, _, _, egpio), 1469 [33] = PINGROUP(33, qup1_se0, ibi_i3c, _, _, _, _, _, _, _, _, egpio), 1470 [34] = PINGROUP(34, qup1_se0, _, _, _, _, _, _, _, _, _, egpio), 1471 [35] = PINGROUP(35, qup1_se0, _, _, _, _, _, _, _, _, _, egpio), 1472 [36] = PINGROUP(36, qup1_se1, uim1_data, ibi_i3c, sdc40, _, _, _, _, _, _, egpio), 1473 [37] = PINGROUP(37, qup1_se1, uim1_clk, ibi_i3c, sdc41, _, _, _, _, _, _, egpio), 1474 [38] = PINGROUP(38, qup1_se1, sdc42, _, _, _, _, _, _, _, _, _), 1475 [39] = PINGROUP(39, qup1_se1, uim1_reset, sdc43, _, _, _, _, _, _, _, _), 1476 [40] = PINGROUP(40, qup1_se2, cmu_rng, ddr_bist_fail, _, _, _, _, _, _, _, _), 1477 [41] = PINGROUP(41, qup1_se2, cmu_rng, ddr_bist_start, _, _, _, _, _, _, _, _), 1478 [42] = PINGROUP(42, qup1_se2, cmu_rng, _, _, _, _, _, _, _, _, _), 1479 [43] = PINGROUP(43, qup1_se2, cmu_rng, _, ddr_pxi2, _, _, _, _, _, _, _), 1480 [44] = PINGROUP(44, qup1_se3, ddr_bist_complete, ddr_pxi1, _, _, _, _, _, _, _, _), 1481 [45] = PINGROUP(45, qup1_se3, ddr_bist_stop, ddr_pxi1, _, _, _, _, _, _, _, _), 1482 [46] = PINGROUP(46, qup1_se3, ddr_pxi3, _, _, _, _, _, _, _, _, _), 1483 [47] = PINGROUP(47, qup1_se3, dp_hot, _, _, _, _, _, _, _, _, _), 1484 [48] = PINGROUP(48, qup1_se4, ibi_i3c, sdc4_cmd, _, _, _, _, _, _, _, _), 1485 [49] = PINGROUP(49, qup1_se4, ibi_i3c, sdc40, _, _, _, _, _, _, _, _), 1486 [50] = PINGROUP(50, qup1_se4, aoss_cti, sdc4_clk, _, _, _, _, _, _, _, _), 1487 [51] = PINGROUP(51, qup1_se4, aoss_cti, sdc41, _, _, _, _, _, _, _, _), 1488 [52] = PINGROUP(52, qup1_se5, qspi0, ddr_pxi2, _, _, _, _, _, _, _, _), 1489 [53] = PINGROUP(53, qup1_se5, qspi1, _, ddr_pxi3, _, _, _, _, _, _, _), 1490 [54] = PINGROUP(54, qup1_se5, qspi_clk, uim1_data, ddr_pxi0, _, _, _, _, _, _, _), 1491 [55] = PINGROUP(55, qup1_se5, qspi2, uim1_clk, ddr_pxi0, _, _, _, _, _, _, _), 1492 [56] = PINGROUP(56, qup1_se6, qspi3, uim1_reset, _, _, _, _, _, _, _, _), 1493 [57] = PINGROUP(57, qup1_se6, qspi_cs, tsense_pwm1, tsense_pwm2, tsense_pwm3, tsense_pwm4, 1494 _, _, _, _, _), 1495 [58] = PINGROUP(58, qup1_se6, qspi_cs, _, _, _, _, _, _, _, _, _), 1496 [59] = PINGROUP(59, qup1_se6, usb_phy, vsense_trigger_mirnat, _, _, _, _, _, _, _, _), 1497 [60] = PINGROUP(60, qup1_se7, aoss_cti, sdc42, _, _, _, _, _, _, _, _), 1498 [61] = PINGROUP(61, qup1_se7, usb_phy, aoss_cti, sdc43, _, _, _, _, _, _, _), 1499 [62] = PINGROUP(62, qup1_se7, _, _, _, _, _, _, _, _, _, _), 1500 [63] = PINGROUP(63, qup1_se7, _, _, _, _, _, _, _, _, _, _), 1501 [64] = PINGROUP(64, i2chub0_se0, prng_rosc1, tmess_prng1, phase_flag, _, _, _, _, _, _, _), 1502 [65] = PINGROUP(65, i2chub0_se0, prng_rosc2, tmess_prng2, phase_flag, _, _, _, _, _, _, _), 1503 [66] = PINGROUP(66, i2chub0_se1, prng_rosc3, tmess_prng3, phase_flag, _, _, _, _, _, _, _), 1504 [67] = PINGROUP(67, i2chub0_se1, phase_flag, _, _, _, _, _, _, _, _, _), 1505 [68] = PINGROUP(68, i2chub0_se2, phase_flag, _, _, _, _, _, _, _, _, _), 1506 [69] = PINGROUP(69, i2chub0_se2, phase_flag, _, _, _, _, _, _, _, _, _), 1507 [70] = PINGROUP(70, i2chub0_se3, uim1_data, _, atest_usb, _, _, _, _, _, _, _), 1508 [71] = PINGROUP(71, i2chub0_se3, uim1_clk, _, atest_usb, _, _, _, _, _, _, _), 1509 [72] = PINGROUP(72, i2chub0_se4, uim1_reset, qdss_cti, _, atest_usb, _, _, _, _, _, _), 1510 [73] = PINGROUP(73, i2chub0_se4, qdss_cti, jitter_bist, atest_usb, _, _, _, _, _, _, _), 1511 [74] = PINGROUP(74, i2chub0_se5, _, _, _, _, _, _, _, _, _, _), 1512 [75] = PINGROUP(75, i2chub0_se5, _, _, _, _, _, _, _, _, _, _), 1513 [76] = PINGROUP(76, i2chub0_se6, atest_usb, _, _, _, _, _, _, _, _, _), 1514 [77] = PINGROUP(77, i2chub0_se6, gnss_adc1, _, _, _, _, _, _, _, _, _), 1515 [78] = PINGROUP(78, dbg_out_clk, gnss_adc0, _, _, _, _, _, _, _, _, _), 1516 [79] = PINGROUP(79, usb1_hs, gnss_adc0, _, _, _, _, _, _, _, _, _), 1517 [80] = PINGROUP(80, i2chub0_se9, _, _, _, _, _, _, _, _, _, _), 1518 [81] = PINGROUP(81, i2chub0_se9, _, _, _, _, _, _, _, _, _, _), 1519 [82] = PINGROUP(82, i2chub0_se7, qdss_cti, phase_flag, _, _, _, _, _, _, _, _), 1520 [83] = PINGROUP(83, i2chub0_se7, qdss_cti, phase_flag, _, _, _, _, _, _, _, _), 1521 [84] = PINGROUP(84, _, _, _, _, _, _, _, _, _, _, _), 1522 [85] = PINGROUP(85, sd_write_protect, prng_rosc0, tmess_prng0, phase_flag, _, _, _, _, _, 1523 _, _), 1524 [86] = PINGROUP(86, mdp_vsync, mdp_vsync0_out, mdp_vsync1_out, gcc_gp1, _, _, _, _, _, _, 1525 _), 1526 [87] = PINGROUP(87, mdp_vsync, mdp_vsync2_out, mdp_vsync3_out, mdp_vsync5_out, gcc_gp2, _, 1527 _, _, _, _, _), 1528 [88] = PINGROUP(88, mdp_vsync_e, mdp_esync0_out, gcc_gp3, _, _, _, _, _, _, _, _), 1529 [89] = PINGROUP(89, cam_mclk, tb_trig_sdc2, _, _, _, _, _, _, _, _, _), 1530 [90] = PINGROUP(90, cam_mclk, _, _, _, _, _, _, _, _, _, _), 1531 [91] = PINGROUP(91, cam_aon_mclk2, _, _, _, _, _, _, _, _, _, _), 1532 [92] = PINGROUP(92, cam_mclk, _, _, _, _, _, _, _, _, _, _), 1533 [93] = PINGROUP(93, cam_aon_mclk4, _, _, _, _, _, _, _, _, _, _), 1534 [94] = PINGROUP(94, cam_mclk, _, _, _, _, _, _, _, _, _, _), 1535 [95] = PINGROUP(95, cam_mclk, pll_clk_aux, _, _, _, _, _, _, _, _, _), 1536 [96] = PINGROUP(96, cam_mclk, _, _, _, _, _, _, _, _, _, _), 1537 [97] = PINGROUP(97, mdp_vsync, _, _, _, _, _, _, _, _, _, _), 1538 [98] = PINGROUP(98, mdp_vsync, _, _, _, _, _, _, _, _, _, _), 1539 [99] = PINGROUP(99, gnss_adc1, _, _, _, _, _, _, _, _, _, _), 1540 [100] = PINGROUP(100, mdp_esync1_out, _, _, _, _, _, _, _, _, _, _), 1541 [101] = PINGROUP(101, phase_flag, _, _, _, _, _, _, _, _, _, _), 1542 [102] = PINGROUP(102, phase_flag, _, _, _, _, _, _, _, _, _, _), 1543 [103] = PINGROUP(103, pcie0_clk_req_n, phase_flag, _, _, _, _, _, _, _, _, _), 1544 [104] = PINGROUP(104, pll_bist_sync, phase_flag, _, _, _, _, _, _, _, _, _), 1545 [105] = PINGROUP(105, _, _, _, _, _, _, _, _, _, _, egpio), 1546 [106] = PINGROUP(106, _, _, _, _, _, _, _, _, _, _, egpio), 1547 [107] = PINGROUP(107, _, _, _, _, _, _, _, _, _, _, egpio), 1548 [108] = PINGROUP(108, _, _, _, _, _, _, _, _, _, _, egpio), 1549 [109] = PINGROUP(109, cci_timer, _, _, _, _, _, _, _, _, _, _), 1550 [110] = PINGROUP(110, cci_timer, _, _, _, _, _, _, _, _, _, _), 1551 [111] = PINGROUP(111, cci_timer, cci_i2c_sda, _, _, _, _, _, _, _, _, _), 1552 [112] = PINGROUP(112, cci_i2c_sda, _, _, _, _, _, _, _, _, _, _), 1553 [113] = PINGROUP(113, cci_i2c_sda, _, _, _, _, _, _, _, _, _, _), 1554 [114] = PINGROUP(114, cci_i2c_scl, _, _, _, _, _, _, _, _, _, _), 1555 [115] = PINGROUP(115, cci_i2c_sda, _, _, _, _, _, _, _, _, _, _), 1556 [116] = PINGROUP(116, cci_i2c_scl, _, _, _, _, _, _, _, _, _, _), 1557 [117] = PINGROUP(117, cci_i2c_sda, _, _, _, _, _, _, _, _, _, _), 1558 [118] = PINGROUP(118, cci_i2c_scl, _, _, _, _, _, _, _, _, _, _), 1559 [119] = PINGROUP(119, cci_i2c_sda, _, _, _, _, _, _, _, _, _, _), 1560 [120] = PINGROUP(120, cci_i2c_scl, _, _, _, _, _, _, _, _, _, _), 1561 [121] = PINGROUP(121, i2s1_sck, _, _, _, _, _, _, _, _, _, _), 1562 [122] = PINGROUP(122, i2s1_data0, _, _, _, _, _, _, _, _, _, _), 1563 [123] = PINGROUP(123, i2s1_ws, _, _, _, _, _, _, _, _, _, _), 1564 [124] = PINGROUP(124, i2s1_data1, audio_ext_mclk1, audio_ref_clk, _, _, _, _, _, _, _, _), 1565 [125] = PINGROUP(125, audio_ext_mclk0, _, _, _, _, _, _, _, _, _, _), 1566 [126] = PINGROUP(126, i2s0_sck, _, _, _, _, _, _, _, _, _, _), 1567 [127] = PINGROUP(127, i2s0_data0, _, _, _, _, _, _, _, _, _, _), 1568 [128] = PINGROUP(128, i2s0_data1, _, _, _, _, _, _, _, _, _, _), 1569 [129] = PINGROUP(129, i2s0_ws, _, _, _, _, _, _, _, _, _, _), 1570 [130] = PINGROUP(130, uim0_data, atest_char, _, _, _, _, _, _, _, _, _), 1571 [131] = PINGROUP(131, uim0_clk, atest_char, _, _, _, _, _, _, _, _, _), 1572 [132] = PINGROUP(132, uim0_reset, atest_char, _, _, _, _, _, _, _, _, _), 1573 [133] = PINGROUP(133, uim0_present, atest_char, _, _, _, _, _, _, _, _, _), 1574 [134] = PINGROUP(134, uim1_data, qup1_se2, gcc_gp1, _, _, _, _, _, _, _, _), 1575 [135] = PINGROUP(135, uim1_clk, qup1_se2, gcc_gp2, _, _, _, _, _, _, _, _), 1576 [136] = PINGROUP(136, uim1_reset, qup1_se2, gcc_gp3, _, _, _, _, _, _, _, _), 1577 [137] = PINGROUP(137, uim1_present, atest_char, _, _, _, _, _, _, _, _, _), 1578 [138] = PINGROUP(138, _, _, _, _, _, _, _, _, _, _, _), 1579 [139] = PINGROUP(139, _, _, _, _, _, _, _, _, _, _, _), 1580 [140] = PINGROUP(140, _, _, _, _, _, _, _, _, _, _, _), 1581 [141] = PINGROUP(141, _, _, _, _, _, _, _, _, _, _, _), 1582 [142] = PINGROUP(142, _, _, _, _, _, _, _, _, _, _, _), 1583 [143] = PINGROUP(143, _, _, _, _, _, _, _, _, _, _, _), 1584 [144] = PINGROUP(144, _, _, _, _, _, _, _, _, _, _, _), 1585 [145] = PINGROUP(145, _, _, _, _, _, _, _, _, _, _, _), 1586 [146] = PINGROUP(146, _, _, _, _, _, _, _, _, _, _, _), 1587 [147] = PINGROUP(147, _, tb_trig_sdc4, _, _, _, _, _, _, _, _, _), 1588 [148] = PINGROUP(148, coex_uart1_rx, cmu_rng, _, _, _, _, _, _, _, _, _), 1589 [149] = PINGROUP(149, coex_uart1_tx, cmu_rng, _, _, _, _, _, _, _, _, _), 1590 [150] = PINGROUP(150, _, vfr_0, coex_uart2_rx, cmu_rng, sdc4_clk, _, _, _, _, _, _), 1591 [151] = PINGROUP(151, _, coex_uart2_tx, cmu_rng, sdc4_cmd, _, _, _, _, _, _, _), 1592 [152] = PINGROUP(152, nav_gpio2, _, _, _, _, _, _, _, _, _, _), 1593 [153] = PINGROUP(153, cci_i2c_scl, _, _, _, _, _, _, _, _, _, _), 1594 [154] = PINGROUP(154, nav_gpio0, nav_gpio3, _, _, _, _, _, _, _, _, _), 1595 [155] = PINGROUP(155, nav_gpio1, vfr_1, _, _, _, _, _, _, _, _, _), 1596 [156] = PINGROUP(156, qlink_little_request, _, _, _, _, _, _, _, _, _, _), 1597 [157] = PINGROUP(157, qlink_little_enable, _, _, _, _, _, _, _, _, _, _), 1598 [158] = PINGROUP(158, qlink_wmss, _, _, _, _, _, _, _, _, _, _), 1599 [159] = PINGROUP(159, qlink_big_request, qdss_cti, _, _, _, _, _, _, _, _, _), 1600 [160] = PINGROUP(160, qlink_big_enable, _, _, _, _, _, _, _, _, _, _), 1601 [161] = PINGROUP(161, _, _, _, _, _, _, _, _, _, _, _), 1602 [162] = PINGROUP(162, qdss_cti, _, _, _, _, _, _, _, _, _, _), 1603 [163] = PINGROUP(163, cci_timer, _, _, _, _, _, _, _, _, _, _), 1604 [164] = PINGROUP(164, cci_timer, cci_i2c_scl, _, _, _, _, _, _, _, _, _), 1605 [165] = PINGROUP(165, _, _, _, _, _, _, _, _, _, _, egpio), 1606 [166] = PINGROUP(166, _, _, _, _, _, _, _, _, _, _, egpio), 1607 [167] = PINGROUP(167, _, _, _, _, _, _, _, _, _, _, egpio), 1608 [168] = PINGROUP(168, _, _, _, _, _, _, _, _, _, _, egpio), 1609 [169] = PINGROUP(169, _, _, _, _, _, _, _, _, _, _, egpio), 1610 [170] = PINGROUP(170, _, _, _, _, _, _, _, _, _, _, egpio), 1611 [171] = PINGROUP(171, _, _, _, _, _, _, _, _, _, _, egpio), 1612 [172] = PINGROUP(172, _, _, _, _, _, _, _, _, _, _, egpio), 1613 [173] = PINGROUP(173, _, _, _, _, _, _, _, _, _, _, egpio), 1614 [174] = PINGROUP(174, _, _, _, _, _, _, _, _, _, _, egpio), 1615 [175] = PINGROUP(175, _, _, _, _, _, _, _, _, _, _, egpio), 1616 [176] = PINGROUP(176, _, _, _, _, _, _, _, _, _, _, egpio), 1617 [177] = PINGROUP(177, _, _, _, _, _, _, _, _, _, _, egpio), 1618 [178] = PINGROUP(178, _, _, _, _, _, _, _, _, _, _, egpio), 1619 [179] = PINGROUP(179, _, _, _, _, _, _, _, _, _, _, egpio), 1620 [180] = PINGROUP(180, _, _, _, _, _, _, _, _, _, _, egpio), 1621 [181] = PINGROUP(181, _, _, _, _, _, _, _, _, _, _, egpio), 1622 [182] = PINGROUP(182, _, _, _, _, _, _, _, _, _, _, egpio), 1623 [183] = PINGROUP(183, _, _, _, _, _, _, _, _, _, _, egpio), 1624 [184] = PINGROUP(184, _, _, _, _, _, _, _, _, _, _, egpio), 1625 [185] = PINGROUP(185, _, _, _, _, _, _, _, _, _, _, egpio), 1626 [186] = PINGROUP(186, _, _, _, _, _, _, _, _, _, _, egpio), 1627 [187] = PINGROUP(187, _, _, _, _, _, _, _, _, _, _, egpio), 1628 [188] = PINGROUP(188, _, _, _, _, _, _, _, _, _, _, egpio), 1629 [189] = PINGROUP(189, _, _, _, _, _, _, _, _, _, _, egpio), 1630 [190] = PINGROUP(190, _, _, _, _, _, _, _, _, _, _, egpio), 1631 [191] = PINGROUP(191, _, _, _, _, _, _, _, _, _, _, egpio), 1632 [192] = PINGROUP(192, _, _, _, _, _, _, _, _, _, _, egpio), 1633 [193] = PINGROUP(193, _, _, _, _, _, _, _, _, _, _, egpio), 1634 [194] = PINGROUP(194, _, _, _, _, _, _, _, _, _, _, egpio), 1635 [195] = PINGROUP(195, _, _, _, _, _, _, _, _, _, _, egpio), 1636 [196] = PINGROUP(196, _, _, _, _, _, _, _, _, _, _, egpio), 1637 [197] = PINGROUP(197, _, _, _, _, _, _, _, _, _, _, egpio), 1638 [198] = PINGROUP(198, _, _, _, _, _, _, _, _, _, _, egpio), 1639 [199] = PINGROUP(199, _, _, _, _, _, _, _, _, _, _, egpio), 1640 [200] = PINGROUP(200, _, _, _, _, _, _, _, _, _, _, egpio), 1641 [201] = PINGROUP(201, _, _, _, _, _, _, _, _, _, _, egpio), 1642 [202] = PINGROUP(202, _, _, _, _, _, _, _, _, _, _, egpio), 1643 [203] = PINGROUP(203, _, _, _, _, _, _, _, _, _, _, egpio), 1644 [204] = PINGROUP(204, _, _, _, _, _, _, _, _, _, _, egpio), 1645 [205] = PINGROUP(205, _, _, _, _, _, _, _, _, _, _, egpio), 1646 [206] = PINGROUP(206, i2chub0_se8, _, _, _, _, _, _, _, _, _, egpio), 1647 [207] = PINGROUP(207, i2chub0_se8, _, _, _, _, _, _, _, _, _, egpio), 1648 [208] = PINGROUP(208, _, _, _, _, _, _, _, _, _, _, egpio), 1649 [209] = PINGROUP(209, _, _, _, _, _, _, _, _, _, _, egpio), 1650 [210] = PINGROUP(210, _, _, _, _, _, _, _, _, _, _, egpio), 1651 [211] = PINGROUP(211, _, _, _, _, _, _, _, _, _, _, egpio), 1652 [212] = PINGROUP(212, _, _, _, _, _, _, _, _, _, _, egpio), 1653 [213] = PINGROUP(213, _, _, _, _, _, _, _, _, _, _, egpio), 1654 [214] = PINGROUP(214, _, _, _, _, _, _, _, _, _, _, egpio), 1655 [215] = UFS_RESET(ufs_reset, 0xe2004, 0xe3000), 1656 [216] = SDC_QDSD_PINGROUP(sdc2_clk, 0xdb000, 14, 6), 1657 [217] = SDC_QDSD_PINGROUP(sdc2_cmd, 0xdb000, 11, 3), 1658 [218] = SDC_QDSD_PINGROUP(sdc2_data, 0xdb000, 9, 0), 1659}; 1660 1661static const struct msm_gpio_wakeirq_map sm8750_pdc_map[] = { 1662 { 0, 72 }, { 3, 80 }, { 4, 73 }, { 7, 74 }, { 8, 75 }, 1663 { 11, 76 }, { 12, 87 }, { 15, 98 }, { 18, 110 }, { 19, 79 }, 1664 { 23, 82 }, { 24, 83 }, { 27, 84 }, { 28, 85 }, { 31, 86 }, 1665 { 32, 92 }, { 35, 68 }, { 36, 93 }, { 39, 94 }, { 43, 95 }, 1666 { 46, 96 }, { 47, 121 }, { 48, 97 }, { 51, 118 }, { 54, 102 }, 1667 { 55, 71 }, { 56, 103 }, { 57, 104 }, { 59, 105 }, { 61, 81 }, 1668 { 63, 91 }, { 64, 77 }, { 65, 90 }, { 66, 106 }, { 67, 99 }, 1669 { 68, 112 }, { 69, 113 }, { 75, 114 }, { 78, 115 }, { 79, 116 }, 1670 { 80, 122 }, { 81, 123 }, { 84, 101 }, { 85, 124 }, { 86, 125 }, 1671 { 87, 126 }, { 88, 127 }, { 95, 128 }, { 96, 129 }, { 97, 100 }, 1672 { 98, 117 }, { 99, 78 }, { 102, 130 }, { 103, 131 }, { 104, 132 }, 1673 { 108, 133 }, { 133, 134 }, { 137, 67 }, { 148, 135 }, { 150, 136 }, 1674 { 152, 137 }, { 154, 138 }, { 155, 89 }, { 156, 139 }, { 159, 140 }, 1675 { 162, 109 }, { 163, 108 }, { 166, 141 }, { 169, 142 }, { 171, 143 }, 1676 { 172, 144 }, { 174, 145 }, { 176, 146 }, { 177, 120 }, { 181, 147 }, 1677 { 182, 148 }, { 185, 149 }, { 188, 111 }, { 190, 88 }, { 191, 150 }, 1678 { 192, 151 }, { 193, 152 }, { 196, 153 }, { 197, 154 }, { 198, 70 }, 1679 { 199, 119 }, { 200, 69 }, { 201, 155 }, { 202, 156 }, { 203, 157 }, 1680 { 204, 158 }, { 205, 107 }, { 209, 159 }, 1681}; 1682 1683static const struct msm_pinctrl_soc_data sm8750_tlmm = { 1684 .pins = sm8750_pins, 1685 .npins = ARRAY_SIZE(sm8750_pins), 1686 .functions = sm8750_functions, 1687 .nfunctions = ARRAY_SIZE(sm8750_functions), 1688 .groups = sm8750_groups, 1689 .ngroups = ARRAY_SIZE(sm8750_groups), 1690 .ngpios = 216, 1691 .wakeirq_map = sm8750_pdc_map, 1692 .nwakeirq_map = ARRAY_SIZE(sm8750_pdc_map), 1693 .egpio_func = 11, 1694}; 1695 1696static int sm8750_tlmm_probe(struct platform_device *pdev) 1697{ 1698 return msm_pinctrl_probe(pdev, &sm8750_tlmm); 1699} 1700 1701static const struct of_device_id sm8750_tlmm_of_match[] = { 1702 { .compatible = "qcom,sm8750-tlmm", }, 1703 {}, 1704}; 1705 1706static struct platform_driver sm8750_tlmm_driver = { 1707 .driver = { 1708 .name = "sm8750-tlmm", 1709 .of_match_table = sm8750_tlmm_of_match, 1710 }, 1711 .probe = sm8750_tlmm_probe, 1712 .remove = msm_pinctrl_remove, 1713}; 1714 1715static int __init sm8750_tlmm_init(void) 1716{ 1717 return platform_driver_register(&sm8750_tlmm_driver); 1718} 1719arch_initcall(sm8750_tlmm_init); 1720 1721static void __exit sm8750_tlmm_exit(void) 1722{ 1723 platform_driver_unregister(&sm8750_tlmm_driver); 1724} 1725module_exit(sm8750_tlmm_exit); 1726 1727MODULE_DESCRIPTION("QTI SM8750 TLMM driver"); 1728MODULE_LICENSE("GPL"); 1729MODULE_DEVICE_TABLE(of, sm8750_tlmm_of_match);