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lib.systems.architectures: add microarchitecture levels

Variation on:
- https://github.com/NixOS/nixpkgs/pull/208398
- https://github.com/NixOS/nixpkgs/pull/224978

Co-authored-by: Sandro Jäckel <sandro.jaeckel@gmail.com>
Co-authored-by: Shawn8901 <shawn8901@googlemail.com>
Co-authored-by: AveryanAlex <alex@averyan.ru>

Fabián Heredia Montiel 79dfc50b 998b322e

+42 -13
+28 -11
lib/systems/architectures.nix
··· 3 3 rec { 4 4 # gcc.arch to its features (as in /proc/cpuinfo) 5 5 features = { 6 + # x86_64 Generic 7 + # Spec: https://gitlab.com/x86-psABIs/x86-64-ABI/ 6 8 default = [ ]; 9 + x86-64 = [ ]; 10 + x86-64-v2 = [ "sse3" "ssse3" "sse4_1" "sse4_2" ]; 11 + x86-64-v3 = [ "sse3" "ssse3" "sse4_1" "sse4_2" "avx" "avx2" "fma" ]; 12 + x86-64-v4 = [ "sse3" "ssse3" "sse4_1" "sse4_2" "avx" "avx2" "avx512" "fma" ]; 7 13 # x86_64 Intel 14 + nehalem = [ "sse3" "ssse3" "sse4_1" "sse4_2" "aes" ]; 8 15 westmere = [ "sse3" "ssse3" "sse4_1" "sse4_2" "aes" ]; 9 16 sandybridge = [ "sse3" "ssse3" "sse4_1" "sse4_2" "aes" "avx" ]; 10 17 ivybridge = [ "sse3" "ssse3" "sse4_1" "sse4_2" "aes" "avx" ]; ··· 41 48 42 49 # a superior CPU has all the features of an inferior and is able to build and test code for it 43 50 inferiors = { 51 + # x86_64 Generic 52 + default = [ ]; 53 + x86-64 = [ ]; 54 + x86-64-v2 = [ "x86-64" ]; 55 + x86-64-v3 = [ "x86-64-v2" ] ++ inferiors.x86-64-v2; 56 + x86-64-v4 = [ "x86-64-v3" ] ++ inferiors.x86-64-v3; 57 + 44 58 # x86_64 Intel 45 59 # https://gcc.gnu.org/onlinedocs/gcc/x86-Options.html 46 - default = [ ]; 47 - westmere = [ ]; 48 - sandybridge = [ "westmere" ] ++ inferiors.westmere; 49 - ivybridge = [ "sandybridge" ] ++ inferiors.sandybridge; 50 - haswell = [ "ivybridge" ] ++ inferiors.ivybridge; 51 - broadwell = [ "haswell" ] ++ inferiors.haswell; 52 - skylake = [ "broadwell" ] ++ inferiors.broadwell; 53 - skylake-avx512 = [ "skylake" ] ++ inferiors.skylake; 60 + nehalem = [ "x86-64-v2" ] ++ inferiors.x86-64-v2; 61 + westmere = [ "nehalem" ] ++ inferiors.nehalem; 62 + sandybridge = [ "westmere" ] ++ inferiors.westmere; 63 + ivybridge = [ "sandybridge" ] ++ inferiors.sandybridge; 64 + 65 + haswell = lib.unique ([ "ivybridge" "x86-64-v3" ] ++ inferiors.ivybridge ++ inferiors.x86-64-v3); 66 + broadwell = [ "haswell" ] ++ inferiors.haswell; 67 + skylake = [ "broadwell" ] ++ inferiors.broadwell; 68 + 69 + skylake-avx512 = lib.unique ([ "skylake" "x86-64-v4" ] ++ inferiors.skylake ++ inferiors.x86-64-v4); 54 70 cannonlake = [ "skylake-avx512" ] ++ inferiors.skylake-avx512; 55 71 icelake-client = [ "cannonlake" ] ++ inferiors.cannonlake; 56 72 icelake-server = [ "icelake-client" ] ++ inferiors.icelake-client; 57 - cascadelake = [ "skylake-avx512" ] ++ inferiors.cannonlake; 73 + cascadelake = [ "cannonlake" ] ++ inferiors.cannonlake; 58 74 cooperlake = [ "cascadelake" ] ++ inferiors.cascadelake; 59 75 tigerlake = [ "icelake-server" ] ++ inferiors.icelake-server; 76 + 60 77 # CX16 does not exist on alderlake, while it does on nearly all other intel CPUs 61 78 alderlake = [ ]; 62 79 ··· 87 104 # https://gcc.gnu.org/onlinedocs/gcc/x86-Options.html 88 105 # https://en.wikichip.org/wiki/amd/microarchitectures/zen 89 106 # https://en.wikichip.org/wiki/intel/microarchitectures/skylake 90 - znver1 = [ "skylake" ] ++ inferiors.skylake; 107 + znver1 = [ "skylake" ] ++ inferiors.skylake; # Includes haswell and x86-64-v3 91 108 znver2 = [ "znver1" ] ++ inferiors.znver1; 92 109 znver3 = [ "znver2" ] ++ inferiors.znver2; 93 - znver4 = [ "znver3" ] ++ inferiors.znver3; 110 + znver4 = lib.unique ([ "znver3" "x86-64-v4" ] ++ inferiors.znver3 ++ inferiors.x86-64-v4); 94 111 95 112 # other 96 113 armv5te = [ ];
+14 -2
pkgs/build-support/cc-wrapper/default.nix
··· 106 106 isGccArchSupported = arch: 107 107 if targetPlatform.isPower then false else # powerpc does not allow -march= 108 108 if isGNU then 109 - { # Intel 109 + { # Generic 110 + x86-64-v2 = versionAtLeast ccVersion "11.0"; 111 + x86-64-v3 = versionAtLeast ccVersion "11.0"; 112 + x86-64-v4 = versionAtLeast ccVersion "11.0"; 113 + 114 + # Intel 110 115 skylake = versionAtLeast ccVersion "6.0"; 111 116 skylake-avx512 = versionAtLeast ccVersion "6.0"; 112 117 cannonlake = versionAtLeast ccVersion "8.0"; ··· 117 122 tigerlake = versionAtLeast ccVersion "10.0"; 118 123 knm = versionAtLeast ccVersion "8.0"; 119 124 alderlake = versionAtLeast ccVersion "12.0"; 125 + 120 126 # AMD 121 127 znver1 = versionAtLeast ccVersion "6.0"; 122 128 znver2 = versionAtLeast ccVersion "9.0"; ··· 124 130 znver4 = versionAtLeast ccVersion "13.0"; 125 131 }.${arch} or true 126 132 else if isClang then 127 - { # Intel 133 + { #Generic 134 + x86-64-v2 = versionAtLeast ccVersion "12.0"; 135 + x86-64-v3 = versionAtLeast ccVersion "12.0"; 136 + x86-64-v4 = versionAtLeast ccVersion "12.0"; 137 + 138 + # Intel 128 139 cannonlake = versionAtLeast ccVersion "5.0"; 129 140 icelake-client = versionAtLeast ccVersion "7.0"; 130 141 icelake-server = versionAtLeast ccVersion "7.0"; 131 142 knm = versionAtLeast ccVersion "7.0"; 132 143 alderlake = versionAtLeast ccVersion "16.0"; 144 + 133 145 # AMD 134 146 znver1 = versionAtLeast ccVersion "4.0"; 135 147 znver2 = versionAtLeast ccVersion "9.0";