fix: address Phase 6 code review feedback in test_pe_lanes.py

tests/test_pe_lanes.py

···
 - AC8.3: FREE on shared frame preserves other lanes' data
 - AC8.4: ALLOC_REMOTE emits ALLOC_SHARED when fref+2 is non-zero
 - AC8.5: ALLOC_REMOTE emits ALLOC when fref+2 is zero (backwards compatible)
+- AC8.6: Full loop pipelining scenario — two iterations concurrent on different lanes
 """
 
 import pytest
···
         assert out_tok_1.target == 1, "Output should route to target_pe=1"
 
         # Interleaved verification: confirm independent lanes
-        all_matched = [e for e in matched if isinstance(e, Matched)]
         matches_by_id = {}
-        for m in all_matched:
+        for m in matched:
             if m.act_id not in matches_by_id:
                 matches_by_id[m.act_id] = []
             matches_by_id[m.act_id].append(m)
···
         assert matches_by_id[1][-1].left + matches_by_id[1][-1].right == 3000, \
             "Iteration 2 arithmetic correct"
 
-        # Both iterations ran on SAME frame
-        assert pe.tag_store.__class__.__name__ == 'dict' or True, "tag_store structure OK"
+        # Both iterations ran on SAME frame (verified at allocation, re-confirmed)
+        assert frame_id_1 == frame_id, "Both iterations ran on same frame"
 
         # Both iterations used DIFFERENT lanes
         assert lane_0 != lane_1, "Iterations used different lanes"