"Das U-Boot" Source Tree

rng: rockchip: Add support for rkrng variant

Add support for rkrng variant, used by e.g. RK3528 and RK3576.

Imported from vendor U-Boot linux-6.1-stan-rkr5 tag with minor
adjustments for mainline.

Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>

authored by

Lin Jinhan and committed by
Kever Yang
7fe0b792 6ef723af

+73
+73
drivers/rng/rockchip_rng.c
··· 70 70 #define TRNG_v1_VERSION_CODE 0x46BC 71 71 /* end of TRNG V1 register define */ 72 72 73 + /* start of RKRNG register define */ 74 + #define RKRNG_CTRL 0x0010 75 + #define RKRNG_CTRL_INST_REQ BIT(0) 76 + #define RKRNG_CTRL_RESEED_REQ BIT(1) 77 + #define RKRNG_CTRL_TEST_REQ BIT(2) 78 + #define RKRNG_CTRL_SW_DRNG_REQ BIT(3) 79 + #define RKRNG_CTRL_SW_TRNG_REQ BIT(4) 80 + 81 + #define RKRNG_STATE 0x0014 82 + #define RKRNG_STATE_INST_ACK BIT(0) 83 + #define RKRNG_STATE_RESEED_ACK BIT(1) 84 + #define RKRNG_STATE_TEST_ACK BIT(2) 85 + #define RKRNG_STATE_SW_DRNG_ACK BIT(3) 86 + #define RKRNG_STATE_SW_TRNG_ACK BIT(4) 87 + 88 + /* DRNG_DATA_0 ~ DNG_DATA_7 */ 89 + #define RKRNG_DRNG_DATA_0 0x0070 90 + #define RKRNG_DRNG_DATA_7 0x008C 91 + 92 + /* end of RKRNG register define */ 93 + 73 94 #define RK_RNG_TIME_OUT 50000 /* max 50ms */ 74 95 75 96 #define trng_write(pdata, pos, val) writel(val, (pdata)->base + (pos)) ··· 228 249 return retval; 229 250 } 230 251 252 + static int rkrng_init(struct udevice *dev) 253 + { 254 + struct rk_rng_plat *pdata = dev_get_priv(dev); 255 + u32 reg = 0; 256 + 257 + rk_clrreg(pdata->base + RKRNG_CTRL, 0xffff); 258 + 259 + reg = trng_read(pdata, RKRNG_STATE); 260 + trng_write(pdata, RKRNG_STATE, reg); 261 + 262 + return 0; 263 + } 264 + 265 + static int rkrng_rng_read(struct udevice *dev, void *data, size_t len) 266 + { 267 + struct rk_rng_plat *pdata = dev_get_priv(dev); 268 + u32 reg = 0; 269 + int retval; 270 + 271 + if (len > RK_HW_RNG_MAX) 272 + return -EINVAL; 273 + 274 + reg = RKRNG_CTRL_SW_DRNG_REQ; 275 + 276 + rk_clrsetreg(pdata->base + RKRNG_CTRL, 0xffff, reg); 277 + 278 + retval = readl_poll_timeout(pdata->base + RKRNG_STATE, reg, 279 + (reg & RKRNG_STATE_SW_DRNG_ACK), 280 + RK_RNG_TIME_OUT); 281 + if (retval) 282 + goto exit; 283 + 284 + trng_write(pdata, RKRNG_STATE, reg); 285 + 286 + rk_rng_read_regs(pdata->base + RKRNG_DRNG_DATA_0, data, len); 287 + 288 + exit: 289 + /* close TRNG */ 290 + rk_clrreg(pdata->base + RKRNG_CTRL, 0xffff); 291 + 292 + return retval; 293 + } 294 + 231 295 static int rockchip_rng_read(struct udevice *dev, void *data, size_t len) 232 296 { 233 297 unsigned char *buf = data; ··· 295 359 .rk_rng_read = rk_trngv1_rng_read, 296 360 }; 297 361 362 + static const struct rk_rng_soc_data rkrng_soc_data = { 363 + .rk_rng_init = rkrng_init, 364 + .rk_rng_read = rkrng_rng_read, 365 + }; 366 + 298 367 static const struct dm_rng_ops rockchip_rng_ops = { 299 368 .read = rockchip_rng_read, 300 369 }; ··· 323 392 { 324 393 .compatible = "rockchip,rk3588-rng", 325 394 .data = (ulong)&rk_trngv1_soc_data, 395 + }, 396 + { 397 + .compatible = "rockchip,rkrng", 398 + .data = (ulong)&rkrng_soc_data, 326 399 }, 327 400 {}, 328 401 };