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"Das U-Boot" Source Tree
usb: dwc3-generic: Add STih407 support
Add STi glue logic to manage the DWC3 HC on STiH407
SoC family. It configures the internal glue logic and
syscfg registers.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Marek Vasut <marex@denx.de>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Link: https://lore.kernel.org/r/20250130163547.512990-6-patrice.chotard@foss.st.com
Signed-off-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
authored by
Patrice Chotard
and committed by
Mattijs Korpershoek
23542078
9de4b7e0
+144
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MAINTAINERS
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MAINTAINERS
···
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F: drivers/serial/serial_sti_asc.c
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F: drivers/sysreset/sysreset_sti.c
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F: drivers/timer/arm_global_timer.c
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F: drivers/usb/host/dwc3-sti.c
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F: include/dt-bindings/clock/stih407-clks.h
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F: include/dt-bindings/clock/stih410-clks.h
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F: include/dt-bindings/reset/stih407-resets.h
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drivers/usb/dwc3/Kconfig
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drivers/usb/dwc3/Kconfig
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Host and Peripheral operation modes are supported. OTG is not
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supported.
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config USB_DWC3_STI
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bool "STi USB wrapper"
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depends on DM_USB && USB_DWC3_GENERIC && SYSCON
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help
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Enables support for the on-chip xHCI controller on STMicroelectronics
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STiH407 family SoCs. This is a driver for the dwc3 to provide the
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glue logic to configure the controller.
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menu "PHY Subsystem"
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config USB_DWC3_PHY_OMAP
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drivers/usb/dwc3/Makefile
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drivers/usb/dwc3/Makefile
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drivers/usb/dwc3/dwc3-generic-sti.c
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drivers/usb/dwc3/dwc3-generic-sti.c
···
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// SPDX-License-Identifier: GPL-2.0-or-later OR BSD-3-Clause
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/*
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* STi specific glue layer for DWC3
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*
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* Copyright (C) 2025, STMicroelectronics - All Rights Reserved
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*/
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#define LOG_CATEGORY UCLASS_NOP
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#include <reset.h>
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#include <regmap.h>
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#include <syscon.h>
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#include <asm/io.h>
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#include <dm/device.h>
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#include <dm/device_compat.h>
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#include <dm/read.h>
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#include <linux/usb/otg.h>
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#include "dwc3-generic.h"
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/* glue registers */
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#define CLKRST_CTRL 0x00
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#define AUX_CLK_EN BIT(0)
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#define SW_PIPEW_RESET_N BIT(4)
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#define EXT_CFG_RESET_N BIT(8)
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#define XHCI_REVISION BIT(12)
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#define USB2_VBUS_MNGMNT_SEL1 0x2C
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#define USB2_VBUS_UTMIOTG 0x1
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#define SEL_OVERRIDE_VBUSVALID(n) ((n) << 0)
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#define SEL_OVERRIDE_POWERPRESENT(n) ((n) << 4)
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#define SEL_OVERRIDE_BVALID(n) ((n) << 8)
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/* Static DRD configuration */
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#define USB3_CONTROL_MASK 0xf77
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#define USB3_DEVICE_NOT_HOST BIT(0)
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#define USB3_FORCE_VBUSVALID BIT(1)
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#define USB3_DELAY_VBUSVALID BIT(2)
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#define USB3_SEL_FORCE_OPMODE BIT(4)
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#define USB3_FORCE_OPMODE(n) ((n) << 5)
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#define USB3_SEL_FORCE_DPPULLDOWN2 BIT(8)
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#define USB3_FORCE_DPPULLDOWN2 BIT(9)
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#define USB3_SEL_FORCE_DMPULLDOWN2 BIT(10)
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#define USB3_FORCE_DMPULLDOWN2 BIT(11)
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static void dwc3_stih407_glue_configure(struct udevice *dev, int index,
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enum usb_dr_mode mode)
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{
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struct dwc3_glue_data *glue = dev_get_plat(dev);
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struct regmap *regmap;
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ulong syscfg_base;
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ulong syscfg_offset;
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ulong glue_base;
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int ret;
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/* deassert both powerdown and softreset */
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ret = reset_deassert_bulk(&glue->resets);
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if (ret) {
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dev_err(dev, "reset_deassert_bulk error: %d\n", ret);
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return;
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}
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regmap = syscon_regmap_lookup_by_phandle(dev, "st,syscfg");
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if (IS_ERR(regmap)) {
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dev_err(dev, "unable to get st,syscfg, dev %s\n", dev->name);
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return;
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}
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syscfg_base = regmap->ranges[0].start;
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glue_base = dev_read_addr_index(dev, 0);
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syscfg_offset = dev_read_addr_index(dev, 1);
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clrbits_le32(syscfg_base + syscfg_offset, USB3_CONTROL_MASK);
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/* glue drd init */
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switch (mode) {
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case USB_DR_MODE_PERIPHERAL:
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clrbits_le32(syscfg_base + syscfg_offset,
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USB3_DELAY_VBUSVALID | USB3_SEL_FORCE_OPMODE |
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USB3_FORCE_OPMODE(0x3) | USB3_SEL_FORCE_DPPULLDOWN2 |
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USB3_FORCE_DPPULLDOWN2 | USB3_SEL_FORCE_DMPULLDOWN2 |
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USB3_FORCE_DMPULLDOWN2);
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setbits_le32(syscfg_base + syscfg_offset,
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USB3_DEVICE_NOT_HOST | USB3_FORCE_VBUSVALID);
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break;
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case USB_DR_MODE_HOST:
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clrbits_le32(syscfg_base + syscfg_offset,
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USB3_DEVICE_NOT_HOST | USB3_FORCE_VBUSVALID |
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USB3_SEL_FORCE_OPMODE | USB3_FORCE_OPMODE(0x3) |
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USB3_SEL_FORCE_DPPULLDOWN2 | USB3_FORCE_DPPULLDOWN2 |
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USB3_SEL_FORCE_DMPULLDOWN2 | USB3_FORCE_DMPULLDOWN2);
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setbits_le32(syscfg_base + syscfg_offset, USB3_DELAY_VBUSVALID);
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break;
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default:
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dev_err(dev, "Unsupported mode of operation %d\n", mode);
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return;
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}
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/* glue init */
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setbits_le32(glue_base + CLKRST_CTRL, AUX_CLK_EN | EXT_CFG_RESET_N | XHCI_REVISION);
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clrbits_le32(glue_base + CLKRST_CTRL, SW_PIPEW_RESET_N);
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/* configure mux for vbus, powerpresent and bvalid signals */
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setbits_le32(glue_base + USB2_VBUS_MNGMNT_SEL1,
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SEL_OVERRIDE_VBUSVALID(USB2_VBUS_UTMIOTG) |
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SEL_OVERRIDE_POWERPRESENT(USB2_VBUS_UTMIOTG) |
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SEL_OVERRIDE_BVALID(USB2_VBUS_UTMIOTG));
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setbits_le32(glue_base + CLKRST_CTRL, SW_PIPEW_RESET_N);
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};
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struct dwc3_glue_ops stih407_ops = {
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.glue_configure = dwc3_stih407_glue_configure,
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};
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static const struct udevice_id dwc3_sti_match[] = {
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{ .compatible = "st,stih407-dwc3", .data = (ulong)&stih407_ops},
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{ /* sentinel */ }
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};
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U_BOOT_DRIVER(dwc3_sti_wrapper) = {
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.name = "dwc3-sti",
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.id = UCLASS_NOP,
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.of_match = dwc3_sti_match,
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.bind = dwc3_glue_bind,
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.probe = dwc3_glue_probe,
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.remove = dwc3_glue_remove,
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.plat_auto = sizeof(struct dwc3_glue_data),
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};