fork of PCE focusing on macplus, supporting DaynaPort SCSI network emulation

rc759: Support higher CPU clock speeds

A new config file option "system.model" defines a 6 or 8 MHz
model. This option also defines the supported ram sizes,
replacing the old "system.alt_mem_size" option.

Higher CPU clock rates can be set by the new config file option
"system.speed".

+115 -133
+2 -2
src/arch/rc759/cmd.c
··· 5 5 /***************************************************************************** 6 6 * File name: src/arch/rc759/cmd.c * 7 7 * Created: 2012-06-29 by Hampa Hug <hampa@hampa.ch> * 8 - * Copyright: (C) 2012-2019 Hampa Hug <hampa@hampa.ch> * 8 + * Copyright: (C) 2012-2021 Hampa Hug <hampa@hampa.ch> * 9 9 *****************************************************************************/ 10 10 11 11 /***************************************************************************** ··· 501 501 502 502 while (sim->brk == 0) { 503 503 if (sim->pause == 0) { 504 - rc759_clock (sim, 8); 504 + rc759_clock (sim, 1); 505 505 } 506 506 else { 507 507 pce_usleep (100000);
+2 -2
src/arch/rc759/main.c
··· 5 5 /***************************************************************************** 6 6 * File name: src/arch/rc759/main.c * 7 7 * Created: 2012-06-29 by Hampa Hug <hampa@hampa.ch> * 8 - * Copyright: (C) 2012-2020 Hampa Hug <hampa@hampa.ch> * 8 + * Copyright: (C) 2012-2021 Hampa Hug <hampa@hampa.ch> * 9 9 *****************************************************************************/ 10 10 11 11 /***************************************************************************** ··· 297 297 break; 298 298 299 299 case 's': 300 - ini_str_add (&par_ini_str, "cpu.speed = ", 300 + ini_str_add (&par_ini_str, "system.speed = ", 301 301 optarg[0], "\n" 302 302 ); 303 303 break;
+7 -7
src/arch/rc759/msg.c
··· 102 102 static 103 103 int rc759_set_msg_emu_cpu_speed_step (rc759_t *sim, const char *msg, const char *val) 104 104 { 105 - int v; 106 - unsigned long clk, tmp; 105 + int v; 106 + unsigned speed; 107 107 108 108 if (msg_get_sint (val, &v)) { 109 109 return (1); 110 110 } 111 111 112 - clk = sim->cpu_clock_frq / 2000000; 112 + speed = sim->speed; 113 113 114 114 if (v > 0) { 115 - clk += v; 115 + speed = sim->speed + v; 116 116 } 117 117 else { 118 - tmp = -v; 119 - clk = (tmp < clk) ? (clk - tmp) : 1; 118 + speed = -v; 119 + speed = (-v < sim->speed) ? (sim->speed - -v) : 1; 120 120 } 121 121 122 - rc759_set_cpu_clock (sim, 2000000 * clk); 122 + rc759_set_speed (sim, speed); 123 123 124 124 return (0); 125 125 }
+13 -11
src/arch/rc759/pce-rc759.cfg.in
··· 22 22 23 23 24 24 system { 25 - # The CPU clock in Hz 25 + # Set the RC759 model 26 26 # 27 - # Values that correspond to real machines are 6 MHz and 8 MHz. 28 - # Larger values will cause problems for the PROM. 29 - clock = 6000000 27 + # Model 1 has a system clock speed of 6 MHz and supports 28 + # RAM sizes of 256K, 386K, 640K and 768K. 29 + # 30 + # Model 2 has a system clock speed of 8 MHz and supports 31 + # RAM sizes of 512K, 640K and 832K. 32 + model = 1 30 33 31 - # Alternate RAM size 34 + # Set the CPU speed 32 35 # 33 - # If this option is set, the PROM expects alternate RAM sizes. It 34 - # has to correspond the the specific PROM used. 35 - # Valid RAM sizes are: 36 - # 0: 256K, 384K, 640K, 768K 37 - # 1: 512K, 640K, 832K 38 - alt_mem_size = 0 36 + # This sets the CPU clock speed as a multiple of the system 37 + # clock speed. If this is set to anything other than 1, the 38 + # fastboot option should also be enabled, because the POST 39 + # code is CPU speed sensitive. 40 + speed = 1 39 41 40 42 # Enable access to real time 41 43 #
+81 -98
src/arch/rc759/rc759.c
··· 768 768 static 769 769 void rc759_setup_system (rc759_t *sim, ini_sct_t *ini) 770 770 { 771 - int mem2; 772 - int fastboot; 773 - int rtc_enable, rtc_stop; 774 - unsigned long clock; 775 - ini_sct_t *sct; 776 - 777 - sim->flags = 0; 778 - 779 - sim->current_int = 0; 780 - 781 - sim->brk = 0; 782 - sim->pause = 0; 771 + unsigned model, speed; 772 + int fastboot, rtc_enable, rtc_stop; 773 + ini_sct_t *sct; 783 774 784 775 sct = ini_next_sct (ini, NULL, "system"); 785 776 786 - ini_get_bool (sct, "alt_mem_size", &mem2, 0); 787 - ini_get_uint32 (sct, "clock", &clock, 6000000); 777 + ini_get_uint16 (sct, "model", &model, 1); 778 + ini_get_uint16 (sct, "speed", &speed, 1); 788 779 ini_get_bool (sct, "fastboot", &fastboot, 0); 789 780 ini_get_bool (sct, "rtc", &rtc_enable, 1); 790 781 ini_get_bool (sct, "rtc_stop", &rtc_stop, 0); 791 782 783 + if (model == 2) { 784 + sim->model = 2; 785 + sim->clock_freq = 8000000; 786 + } 787 + else { 788 + sim->model = 1; 789 + sim->clock_freq = 6000000; 790 + } 791 + 792 792 if (rtc_stop) { 793 793 rtc_enable = 0; 794 794 } 795 795 796 - pce_log_tag (MSG_INF, "SYSTEM:", 797 - "model=rc759 clock=%lu alt_mem_size=%d rtc=%d fastboot=%d\n", 798 - clock, mem2, rtc_enable, fastboot 799 - ); 800 - 801 - sim->cpu_clock_frq = clock; 802 - sim->cpu_clock_cnt = 0; 803 - 804 - if (mem2) { 805 - sim->flags |= RC759_FLAG_MEM2; 806 - } 796 + sim->speed = speed; 807 797 808 798 sim->rtc_enable = (rtc_enable != 0); 809 799 sim->rtc_stop = (rtc_stop != 0); 810 800 811 801 sim->fastboot = (fastboot != 0); 802 + 803 + sim->current_int = 0; 804 + 805 + sim->brk = 0; 806 + sim->pause = 0; 807 + 808 + pce_log_tag (MSG_INF, "SYSTEM:", 809 + "model=rc759-%u %lu MHz speed=%u rtc=%d fastboot=%d\n", 810 + sim->model, sim->clock_freq / 1000000, speed, 811 + rtc_enable, fastboot 812 + ); 812 813 } 813 814 814 815 static ··· 912 913 sim->ppi_port_b = 0x87; 913 914 914 915 if (sim->ram != NULL) { 915 - if (sim->flags & RC759_FLAG_MEM2) { 916 - if (sim->ram->size >= (832* 1024)) { 916 + if (sim->model == 2) { 917 + if (sim->ram->size >= (832 * 1024)) { 917 918 sim->ppi_port_a |= 0x00; 918 919 } 919 920 else if (sim->ram->size >= (640 * 1024)) { ··· 990 991 { 991 992 rc759_rtc_init (&sim->rtc); 992 993 rc759_rtc_set_irq_fct (&sim->rtc, &sim->pic, e8259_set_irq3); 993 - rc759_rtc_set_input_clock (&sim->rtc, sim->cpu_clock_frq); 994 + rc759_rtc_set_input_clock (&sim->rtc, sim->clock_freq); 994 995 995 996 if (sim->rtc_enable) { 996 997 rc759_rtc_set_time_now (&sim->rtc); ··· 1018 1019 wd179x_set_irq_fct (&sim->fdc.wd179x, &sim->pic, e8259_set_irq0); 1019 1020 wd179x_set_drq_fct (&sim->fdc.wd179x, &sim->dma, e80186_dma_set_dreq0); 1020 1021 1021 - wd179x_set_input_clock (&sim->fdc.wd179x, sim->cpu_clock_frq); 1022 + wd179x_set_input_clock (&sim->fdc.wd179x, sim->clock_freq); 1022 1023 wd179x_set_bit_clock (&sim->fdc.wd179x, 2000000); 1023 1024 1024 1025 rc759_fdc_set_disks (&sim->fdc, sim->dsks); ··· 1040 1041 ini_sct_t *sct; 1041 1042 1042 1043 rc759_spk_init (&sim->spk); 1043 - rc759_spk_set_clk_fct (&sim->spk, sim, rc759_get_cpu_clock); 1044 - rc759_spk_set_input_clock (&sim->spk, sim->cpu_clock_frq); 1044 + rc759_spk_set_clk_fct (&sim->spk, sim, rc759_get_clock); 1045 + rc759_spk_set_input_clock (&sim->spk, sim->clock_freq); 1045 1046 1046 1047 sct = ini_next_sct (ini, NULL, "speaker"); 1047 1048 ··· 1127 1128 e82730_set_monochrome (&sim->crt, mono); 1128 1129 e82730_set_min_h (&sim->crt, min_h); 1129 1130 1130 - pce_log_tag (MSG_INF, "VIDEO:", "monochrome=%d 22KHz=%d min_h=%u\n", 1131 + pce_log_tag (MSG_INF, "VIDEO:", 1132 + "monochrome=%d 22KHz=%d min_h=%u\n", 1131 1133 mono, hires, min_h 1132 1134 ); 1133 1135 1134 1136 if (hires) { 1135 1137 sim->ppi_port_b |= 0x40; 1136 - e82730_set_clock (&sim->crt, 1250000, sim->cpu_clock_frq); 1138 + e82730_set_clock (&sim->crt, 1250000, sim->clock_freq); 1137 1139 } 1138 1140 else { 1139 1141 sim->ppi_port_b &= ~0x40; 1140 - e82730_set_clock (&sim->crt, 750000, sim->cpu_clock_frq); 1142 + e82730_set_clock (&sim->crt, 750000, sim->clock_freq); 1141 1143 } 1142 1144 1143 1145 if (mono) { ··· 1400 1402 } 1401 1403 } 1402 1404 1403 - void rc759_set_cpu_clock (rc759_t *sim, unsigned long clk) 1405 + unsigned long rc759_get_clock (rc759_t *sim) 1404 1406 { 1405 - if (sim->cpu_clock_frq == clk) { 1406 - return; 1407 - } 1408 - 1409 - pce_log_tag (MSG_INF, "CPU:", "setting clock to %lu\n", clk); 1410 - 1411 - sim->cpu_clock_frq = clk; 1412 - 1413 - wd179x_set_input_clock (&sim->fdc.wd179x, sim->cpu_clock_frq); 1414 - rc759_rtc_set_input_clock (&sim->rtc, clk); 1415 - rc759_spk_set_input_clock (&sim->spk, sim->cpu_clock_frq); 1416 - 1417 - if (sim->ppi_port_b & 0x40) { 1418 - /* hires */ 1419 - e82730_set_clock (&sim->crt, 1250000, sim->cpu_clock_frq); 1420 - } 1421 - else { 1422 - e82730_set_clock (&sim->crt, 750000, sim->cpu_clock_frq); 1423 - } 1407 + return (sim->clock_cnt); 1424 1408 } 1425 1409 1426 - void rc759_set_speed (rc759_t *sim, unsigned factor) 1410 + void rc759_set_speed (rc759_t *sim, unsigned speed) 1427 1411 { 1428 - if (factor == 0) { 1429 - factor = 30; 1412 + if (speed == 0) { 1413 + speed = 1; 1430 1414 } 1431 1415 1432 - rc759_set_cpu_clock (sim, (4 + 2 * factor) * 1000000); 1433 - } 1416 + sim->speed = speed; 1434 1417 1435 - unsigned long rc759_get_cpu_clock (rc759_t *sim) 1436 - { 1437 - return (sim->cpu_clock_cnt); 1418 + pce_log (MSG_INF, "setting CPU speed to %lu MHz\n", 1419 + (sim->speed * sim->clock_freq) / 1000000 1420 + ); 1438 1421 } 1439 1422 1440 1423 ··· 1445 1428 1446 1429 pce_get_interval_us (&sim->sync_interval); 1447 1430 1448 - sim->cpu_clock_cnt = 0; 1449 - sim->cpu_clock_rem8 = 0; 1450 - sim->cpu_clock_rem1024 = 0; 1451 - sim->cpu_clock_rem32768 = 0; 1431 + sim->clock_cnt = 0; 1432 + sim->clock_rem8 = 0; 1433 + sim->clock_rem1024 = 0; 1434 + sim->clock_rem32768 = 0; 1452 1435 } 1453 1436 1454 1437 void rc759_clock_discontinuity (rc759_t *sim) ··· 1470 1453 vclk = sim->sync_clock_sim; 1471 1454 1472 1455 rclk = pce_get_interval_us (&sim->sync_interval); 1473 - rclk = (sim->cpu_clock_frq * (unsigned long long) rclk) / 1000000; 1456 + rclk = (sim->clock_freq * (unsigned long long) rclk) / 1000000; 1474 1457 rclk += sim->sync_clock_real; 1475 1458 1476 1459 if (vclk < rclk) { 1477 1460 sim->sync_clock_sim = 0; 1478 1461 sim->sync_clock_real = rclk - vclk; 1479 1462 1480 - if (sim->sync_clock_real > sim->cpu_clock_frq) { 1463 + if (sim->sync_clock_real > sim->clock_freq) { 1481 1464 sim->sync_clock_real = 0; 1482 1465 pce_log (MSG_INF, "host system too slow, skipping 1 second.\n"); 1483 1466 } ··· 1490 1473 sim->sync_clock_sim = vclk; 1491 1474 sim->sync_clock_real = 0; 1492 1475 1493 - us = (1000000 * (unsigned long long) vclk) / sim->cpu_clock_frq; 1476 + us = (1000000 * (unsigned long long) vclk) / sim->clock_freq; 1494 1477 1495 1478 if (us > PCE_IBMPC_SLEEP) { 1496 1479 pce_usleep (us); ··· 1499 1482 1500 1483 void rc759_clock (rc759_t *sim, unsigned cnt) 1501 1484 { 1502 - unsigned long clk; 1485 + unsigned long sysclk, cpuclk; 1503 1486 1504 - if (cnt == 0) { 1505 - cnt = 4; 1506 - } 1487 + sysclk = 1; 1488 + cpuclk = sim->speed; 1489 + 1490 + e86_clock (sim->cpu, cpuclk); 1507 1491 1508 - e86_clock (sim->cpu, cnt); 1509 - e80186_tcu_clock (&sim->tcu, cnt); 1510 - e80186_dma_clock (&sim->dma, cnt); 1492 + e80186_tcu_clock (&sim->tcu, sysclk); 1493 + e80186_dma_clock (&sim->dma, cpuclk); 1494 + rc759_fdc_clock (&sim->fdc.wd179x, cpuclk); 1511 1495 1512 - sim->sync_clock_sim += cnt; 1513 - sim->cpu_clock_cnt += cnt; 1514 - sim->cpu_clock_rem8 += cnt; 1496 + sim->sync_clock_sim += sysclk; 1497 + sim->clock_cnt += sysclk; 1498 + sim->clock_rem8 += sysclk; 1515 1499 1516 - if (sim->cpu_clock_rem8 < 8) { 1500 + if (sim->clock_rem8 < 8) { 1517 1501 return; 1518 1502 } 1519 1503 1520 - clk = sim->cpu_clock_rem8; 1521 - sim->cpu_clock_rem8 &= 7; 1522 - clk -= sim->cpu_clock_rem8; 1504 + sysclk = sim->clock_rem8; 1505 + sim->clock_rem8 &= 7; 1506 + sysclk -= sim->clock_rem8; 1523 1507 1524 - e82730_clock (&sim->crt, clk); 1525 - rc759_fdc_clock (&sim->fdc.wd179x, clk); 1508 + e82730_clock (&sim->crt, sysclk); 1526 1509 1527 1510 if (sim->rtc_stop == 0) { 1528 - rc759_rtc_clock (&sim->rtc, clk); 1511 + rc759_rtc_clock (&sim->rtc, sysclk); 1529 1512 } 1530 1513 1531 - sim->cpu_clock_rem1024 += clk; 1514 + sim->clock_rem1024 += sysclk; 1532 1515 1533 - if (sim->cpu_clock_rem1024 < 1024) { 1516 + if (sim->clock_rem1024 < 1024) { 1534 1517 return; 1535 1518 } 1536 1519 1537 - clk = sim->cpu_clock_rem1024; 1538 - sim->cpu_clock_rem1024 &= 1023; 1539 - clk -= sim->cpu_clock_rem1024; 1520 + sysclk = sim->clock_rem1024; 1521 + sim->clock_rem1024 &= 1023; 1522 + sysclk -= sim->clock_rem1024; 1540 1523 1541 1524 if (sim->trm != NULL) { 1542 1525 trm_check (sim->trm); 1543 1526 } 1544 1527 1545 - rc759_kbd_clock (&sim->kbd, clk); 1546 - rc759_spk_clock (&sim->spk, clk); 1528 + rc759_kbd_clock (&sim->kbd, sysclk); 1529 + rc759_spk_clock (&sim->spk, sysclk); 1547 1530 1548 - sim->cpu_clock_rem32768 += clk; 1531 + sim->clock_rem32768 += sysclk; 1549 1532 1550 - if (sim->cpu_clock_rem32768 < 32768) { 1533 + if (sim->clock_rem32768 < 32768) { 1551 1534 return; 1552 1535 } 1553 1536 1554 - clk = sim->cpu_clock_rem32768; 1555 - sim->cpu_clock_rem32768 &= 32767; 1556 - clk -= sim->cpu_clock_rem32768; 1537 + sysclk = sim->clock_rem32768; 1538 + sim->clock_rem32768 &= 32767; 1539 + sysclk -= sim->clock_rem32768; 1557 1540 1558 1541 rc759_clock_delay (sim); 1559 1542 }
+10 -13
src/arch/rc759/rc759.h
··· 53 53 #include <libini/libini.h> 54 54 55 55 56 - #define RC759_FLAG_MEM2 1 57 - 58 - 59 56 typedef struct rc759_t { 60 - unsigned flags; 57 + unsigned model; 61 58 62 59 memory_t *mem; 63 60 mem_blk_t *ram; ··· 96 93 97 94 unsigned current_int; 98 95 99 - unsigned long cpu_clock_frq; 100 - unsigned long cpu_clock_cnt; 101 - unsigned long cpu_clock_rem8; 102 - unsigned long cpu_clock_rem1024; 103 - unsigned long cpu_clock_rem32768; 96 + unsigned speed; 97 + 98 + unsigned long clock_freq; 99 + unsigned long clock_cnt; 100 + unsigned long clock_rem8; 101 + unsigned long clock_rem1024; 102 + unsigned long clock_rem32768; 104 103 105 104 unsigned long sync_clock_sim; 106 105 unsigned long sync_clock_real; ··· 130 129 *****************************************************************************/ 131 130 void rc759_reset (rc759_t *sim); 132 131 133 - void rc759_set_cpu_clock (rc759_t *sim, unsigned long clk); 134 - 135 132 /*!*************************************************************************** 136 133 * @short Set the emulated cpu clock frequency as a multiple of 4.77 MHz 137 134 *****************************************************************************/ 138 135 void rc759_set_speed (rc759_t *sim, unsigned factor); 139 136 140 137 /*!*************************************************************************** 141 - * @short Get the CPU clock 138 + * @short Get the clock count 142 139 *****************************************************************************/ 143 - unsigned long rc759_get_cpu_clock (rc759_t *sim); 140 + unsigned long rc759_get_clock (rc759_t *sim); 144 141 145 142 /*!*************************************************************************** 146 143 * @short Reset the clock counters