···3535#define MM_HIGHEST_USER_ADDRESS_WOW64 0x7FFEFFFF
3636#define MM_SYSTEM_RANGE_START_WOW64 0x80000000
37373838+/* The size of the virtual memory area that is mapped using a single PDE */
3939+#define PDE_MAPPED_VA (PTE_PER_PAGE * PAGE_SIZE)
4040+3841/* Misc address definitions */
3942//#define MI_NON_PAGED_SYSTEM_START_MIN MM_SYSTEM_SPACE_START // FIXME
4043//#define MI_SYSTEM_PTE_START MM_SYSTEM_SPACE_START
+60-23
ntoskrnl/include/internal/i386/mm.h
···2828#define MI_DEBUG_MAPPING (PVOID)0xFFBFF000
2929#define MI_HIGHEST_SYSTEM_ADDRESS (PVOID)0xFFFFFFFF
30303131-/* FIXME: These are different for PAE */
3232-#define PTE_BASE 0xC0000000
3333-#define PDE_BASE 0xC0300000
3434-#define PDE_TOP 0xC0300FFF
3535-#define PTE_TOP 0xC03FFFFF
3636-3737-#define PTE_PER_PAGE 0x400
3838-#define PDE_PER_PAGE 0x400
3939-#define PPE_PER_PAGE 1
4040-4131/* Misc address definitions */
4242-#define MI_SYSTEM_PTE_BASE (PVOID)MiAddressToPte(NULL)
4332#define MM_HIGHEST_VAD_ADDRESS \
4433 (PVOID)((ULONG_PTR)MM_HIGHEST_USER_ADDRESS - (16 * PAGE_SIZE))
4534#define MI_MAPPING_RANGE_START (ULONG)HYPER_SPACE
···128117/* On x86, these two are the same */
129118#define MI_WRITE_VALID_PPE MI_WRITE_VALID_PTE
130119131131-/* Convert an address to a corresponding PTE */
132132-#define MiAddressToPte(x) \
133133- ((PMMPTE)(((((ULONG)(x)) >> 12) << 2) + PTE_BASE))
120120+/* Translating virtual addresses to physical addresses
121121+ (See: "Intel� 64 and IA-32 Architectures Software Developer�s Manual
122122+ Volume 3A: System Programming Guide, Part 1, CHAPTER 4 PAGING")
123123+ Page directory (PD) and Page table (PT) definitions
124124+ Page directory entry (PDE) and Page table entry (PTE) definitions
125125+*/
134126135135-/* Convert an address to a corresponding PDE */
136136-#define MiAddressToPde(x) \
137137- ((PMMPDE)(((((ULONG)(x)) >> 22) << 2) + PDE_BASE))
127127+/* Maximum number of page directories pages */
128128+#ifndef _X86PAE_
129129+#define PD_COUNT 1 /* Only one page directory page */
130130+#else
131131+#define PD_COUNT (1 << 2) /* The two most significant bits in the VA */
132132+#endif
138133139139-/* Convert an address to a corresponding PTE offset/index */
140140-#define MiAddressToPteOffset(x) \
141141- ((((ULONG)(x)) << 10) >> 22)
134134+/* PAE not yet implemented. */
135135+C_ASSERT(PD_COUNT == 1);
142136143143-/* Convert an address to a corresponding PDE offset/index */
144144-#define MiAddressToPdeOffset(x) \
145145- (((ULONG)(x)) / (1024 * PAGE_SIZE))
137137+/* The number of PTEs on one page of the PT */
138138+#define PTE_PER_PAGE (PAGE_SIZE / sizeof(MMPTE))
139139+140140+/* The number of PDEs on one page of the PD */
141141+#define PDE_PER_PAGE (PAGE_SIZE / sizeof(MMPDE))
142142+143143+/* Maximum number of PDEs */
144144+#define PDE_PER_SYSTEM (PD_COUNT * PDE_PER_PAGE)
145145+146146+/* TODO: It seems this constant is not needed for x86 */
147147+#define PPE_PER_PAGE 1
148148+149149+/* Maximum number of pages for 4 GB of virtual space */
150150+#define MI_MAX_PAGES ((1ull << 32) / PAGE_SIZE)
151151+152152+/* Base addresses for page tables */
153153+#define PTE_BASE (ULONG_PTR)0xC0000000
154154+#define PTE_TOP (ULONG_PTR)(PTE_BASE + (MI_MAX_PAGES * sizeof(MMPTE)) - 1)
155155+#define PTE_MASK (PTE_TOP - PTE_BASE)
156156+157157+#define MI_SYSTEM_PTE_BASE (PVOID)MiAddressToPte(NULL)
158158+159159+/* Base addreses for page directories */
160160+#define PDE_BASE (ULONG_PTR)MiPteToPde(PTE_BASE)
161161+#define PDE_TOP (ULONG_PTR)(PDE_BASE + (PDE_PER_SYSTEM * sizeof(MMPDE)) - 1)
162162+#define PDE_MASK (PDE_TOP - PDE_BASE)
163163+164164+/* The size of the virtual memory area that is mapped using a single PDE */
165165+#define PDE_MAPPED_VA (PTE_PER_PAGE * PAGE_SIZE)
166166+167167+/* Maps the virtual address to the corresponding PTE */
168168+#define MiAddressToPte(Va) \
169169+ ((PMMPTE)(PTE_BASE + ((((ULONG_PTR)(Va)) / PAGE_SIZE) * sizeof(MMPTE))))
170170+171171+/* Maps the virtual address to the corresponding PDE */
172172+#define MiAddressToPde(Va) \
173173+ ((PMMPDE)(PDE_BASE + ((MiAddressToPdeOffset(Va)) * sizeof(MMPDE))))
174174+175175+/* Takes the PTE index (for one PD page) from the virtual address */
176176+#define MiAddressToPteOffset(Va) \
177177+ ((((ULONG_PTR)(Va)) & (PDE_MAPPED_VA - 1)) / PAGE_SIZE)
178178+179179+/* Takes the PDE offset (within all PDs pages) from the virtual address */
180180+#define MiAddressToPdeOffset(Va) (((ULONG_PTR)(Va)) / PDE_MAPPED_VA)
181181+182182+/* TODO: Free this variable (for offset from the pointer to the PDE) */
146183#define MiGetPdeOffset MiAddressToPdeOffset
147184148185/* Convert a PTE/PDE into a corresponding address */
-3
ntoskrnl/mm/ARM3/miarm.h
···1818/* Everyone loves 64K */
1919#define _64K (64 * _1KB)
20202121-/* Area mapped by a PDE */
2222-#define PDE_MAPPED_VA (PTE_PER_PAGE * PAGE_SIZE)
2323-2421/* Size of a page table */
2522#define PT_SIZE (PTE_PER_PAGE * sizeof(MMPTE))
2623