Reactos

[NTOS:MM] Make the definitions and macros for x86 more human-readable. (#2487)

- Move also PDE_MAPPED_VA definition from common miarm.h to ..arch/mm.h.
- Add assert "PAE not yet implemented".

authored by

Vadim Galyant and committed by
GitHub
ac843d7b 58d2b1f3

+63 -26
+3
ntoskrnl/include/internal/amd64/mm.h
··· 35 35 #define MM_HIGHEST_USER_ADDRESS_WOW64 0x7FFEFFFF 36 36 #define MM_SYSTEM_RANGE_START_WOW64 0x80000000 37 37 38 + /* The size of the virtual memory area that is mapped using a single PDE */ 39 + #define PDE_MAPPED_VA (PTE_PER_PAGE * PAGE_SIZE) 40 + 38 41 /* Misc address definitions */ 39 42 //#define MI_NON_PAGED_SYSTEM_START_MIN MM_SYSTEM_SPACE_START // FIXME 40 43 //#define MI_SYSTEM_PTE_START MM_SYSTEM_SPACE_START
+60 -23
ntoskrnl/include/internal/i386/mm.h
··· 28 28 #define MI_DEBUG_MAPPING (PVOID)0xFFBFF000 29 29 #define MI_HIGHEST_SYSTEM_ADDRESS (PVOID)0xFFFFFFFF 30 30 31 - /* FIXME: These are different for PAE */ 32 - #define PTE_BASE 0xC0000000 33 - #define PDE_BASE 0xC0300000 34 - #define PDE_TOP 0xC0300FFF 35 - #define PTE_TOP 0xC03FFFFF 36 - 37 - #define PTE_PER_PAGE 0x400 38 - #define PDE_PER_PAGE 0x400 39 - #define PPE_PER_PAGE 1 40 - 41 31 /* Misc address definitions */ 42 - #define MI_SYSTEM_PTE_BASE (PVOID)MiAddressToPte(NULL) 43 32 #define MM_HIGHEST_VAD_ADDRESS \ 44 33 (PVOID)((ULONG_PTR)MM_HIGHEST_USER_ADDRESS - (16 * PAGE_SIZE)) 45 34 #define MI_MAPPING_RANGE_START (ULONG)HYPER_SPACE ··· 128 117 /* On x86, these two are the same */ 129 118 #define MI_WRITE_VALID_PPE MI_WRITE_VALID_PTE 130 119 131 - /* Convert an address to a corresponding PTE */ 132 - #define MiAddressToPte(x) \ 133 - ((PMMPTE)(((((ULONG)(x)) >> 12) << 2) + PTE_BASE)) 120 + /* Translating virtual addresses to physical addresses 121 + (See: "Intel� 64 and IA-32 Architectures Software Developer�s Manual 122 + Volume 3A: System Programming Guide, Part 1, CHAPTER 4 PAGING") 123 + Page directory (PD) and Page table (PT) definitions 124 + Page directory entry (PDE) and Page table entry (PTE) definitions 125 + */ 134 126 135 - /* Convert an address to a corresponding PDE */ 136 - #define MiAddressToPde(x) \ 137 - ((PMMPDE)(((((ULONG)(x)) >> 22) << 2) + PDE_BASE)) 127 + /* Maximum number of page directories pages */ 128 + #ifndef _X86PAE_ 129 + #define PD_COUNT 1 /* Only one page directory page */ 130 + #else 131 + #define PD_COUNT (1 << 2) /* The two most significant bits in the VA */ 132 + #endif 138 133 139 - /* Convert an address to a corresponding PTE offset/index */ 140 - #define MiAddressToPteOffset(x) \ 141 - ((((ULONG)(x)) << 10) >> 22) 134 + /* PAE not yet implemented. */ 135 + C_ASSERT(PD_COUNT == 1); 142 136 143 - /* Convert an address to a corresponding PDE offset/index */ 144 - #define MiAddressToPdeOffset(x) \ 145 - (((ULONG)(x)) / (1024 * PAGE_SIZE)) 137 + /* The number of PTEs on one page of the PT */ 138 + #define PTE_PER_PAGE (PAGE_SIZE / sizeof(MMPTE)) 139 + 140 + /* The number of PDEs on one page of the PD */ 141 + #define PDE_PER_PAGE (PAGE_SIZE / sizeof(MMPDE)) 142 + 143 + /* Maximum number of PDEs */ 144 + #define PDE_PER_SYSTEM (PD_COUNT * PDE_PER_PAGE) 145 + 146 + /* TODO: It seems this constant is not needed for x86 */ 147 + #define PPE_PER_PAGE 1 148 + 149 + /* Maximum number of pages for 4 GB of virtual space */ 150 + #define MI_MAX_PAGES ((1ull << 32) / PAGE_SIZE) 151 + 152 + /* Base addresses for page tables */ 153 + #define PTE_BASE (ULONG_PTR)0xC0000000 154 + #define PTE_TOP (ULONG_PTR)(PTE_BASE + (MI_MAX_PAGES * sizeof(MMPTE)) - 1) 155 + #define PTE_MASK (PTE_TOP - PTE_BASE) 156 + 157 + #define MI_SYSTEM_PTE_BASE (PVOID)MiAddressToPte(NULL) 158 + 159 + /* Base addreses for page directories */ 160 + #define PDE_BASE (ULONG_PTR)MiPteToPde(PTE_BASE) 161 + #define PDE_TOP (ULONG_PTR)(PDE_BASE + (PDE_PER_SYSTEM * sizeof(MMPDE)) - 1) 162 + #define PDE_MASK (PDE_TOP - PDE_BASE) 163 + 164 + /* The size of the virtual memory area that is mapped using a single PDE */ 165 + #define PDE_MAPPED_VA (PTE_PER_PAGE * PAGE_SIZE) 166 + 167 + /* Maps the virtual address to the corresponding PTE */ 168 + #define MiAddressToPte(Va) \ 169 + ((PMMPTE)(PTE_BASE + ((((ULONG_PTR)(Va)) / PAGE_SIZE) * sizeof(MMPTE)))) 170 + 171 + /* Maps the virtual address to the corresponding PDE */ 172 + #define MiAddressToPde(Va) \ 173 + ((PMMPDE)(PDE_BASE + ((MiAddressToPdeOffset(Va)) * sizeof(MMPDE)))) 174 + 175 + /* Takes the PTE index (for one PD page) from the virtual address */ 176 + #define MiAddressToPteOffset(Va) \ 177 + ((((ULONG_PTR)(Va)) & (PDE_MAPPED_VA - 1)) / PAGE_SIZE) 178 + 179 + /* Takes the PDE offset (within all PDs pages) from the virtual address */ 180 + #define MiAddressToPdeOffset(Va) (((ULONG_PTR)(Va)) / PDE_MAPPED_VA) 181 + 182 + /* TODO: Free this variable (for offset from the pointer to the PDE) */ 146 183 #define MiGetPdeOffset MiAddressToPdeOffset 147 184 148 185 /* Convert a PTE/PDE into a corresponding address */
-3
ntoskrnl/mm/ARM3/miarm.h
··· 18 18 /* Everyone loves 64K */ 19 19 #define _64K (64 * _1KB) 20 20 21 - /* Area mapped by a PDE */ 22 - #define PDE_MAPPED_VA (PTE_PER_PAGE * PAGE_SIZE) 23 - 24 21 /* Size of a page table */ 25 22 #define PT_SIZE (PTE_PER_PAGE * sizeof(MMPTE)) 26 23