Reactos

[FREELDR][NTOS][HALPPC][SDK] Remove PowerPC code

Remove PowerPC-related code from the kernel, HAL, SDK and
Freeloader.

-17348
-111
boot/freeldr/freeldr/arch/powerpc/boot.s
··· 1 - .section ".text" 2 - .extern PpcInit 3 - .globl _start 4 - .globl call_ofw 5 - _start: 6 - sync 7 - isync 8 - 9 - lis %r1,stackend@ha 10 - addi %r1,%r1,stackend@l 11 - 12 - /* Store ofw call addr */ 13 - mr %r21,%r5 14 - lis %r10,ofw_call_addr@ha 15 - stw %r5,ofw_call_addr@l(%r10) 16 - 17 - bl zero_registers 18 - 19 - /* Zero CTR */ 20 - mtcr %r31 21 - 22 - lis %r3,PpcInit@ha 23 - addi %r3,%r3,PpcInit@l 24 - mtlr %r3 25 - 26 - /* Check for ofw */ 27 - lis %r3,ofw_call_addr@ha 28 - lwz %r3,ofw_call_addr@l(%r3) 29 - cmpw %r3,%r31 /* Zero? */ 30 - mr %r3,%r31 31 - beq initfp 32 - 33 - lis %r3,call_ofw@ha 34 - addi %r3,%r3,call_ofw@l 35 - b bootme 36 - 37 - initfp: 38 - /* Enabling FP at this point won't hurt, and the varargs scheme we're 39 - * using now requires it. */ 40 - mfmsr %r0 41 - ori %r0,%r0,8192 42 - mtmsr %r0 43 - 44 - bootme: 45 - blr 46 - 47 - zero_registers: 48 - xor %r2,%r2,%r2 49 - mr %r0,%r2 50 - mr %r3,%r2 51 - 52 - mr %r4,%r2 53 - mr %r5,%r2 54 - mr %r6,%r2 55 - mr %r7,%r2 56 - 57 - mr %r8,%r2 58 - mr %r9,%r2 59 - mr %r10,%r2 60 - mr %r11,%r2 61 - 62 - mr %r12,%r2 63 - mr %r13,%r2 64 - mr %r14,%r2 65 - mr %r15,%r2 66 - 67 - mr %r12,%r2 68 - mr %r13,%r2 69 - mr %r14,%r2 70 - mr %r15,%r2 71 - 72 - mr %r16,%r2 73 - mr %r17,%r2 74 - mr %r18,%r2 75 - mr %r19,%r2 76 - 77 - mr %r20,%r2 78 - mr %r21,%r2 79 - mr %r22,%r2 80 - mr %r23,%r2 81 - 82 - mr %r24,%r2 83 - mr %r25,%r2 84 - mr %r26,%r2 85 - mr %r27,%r2 86 - 87 - mr %r28,%r2 88 - mr %r29,%r2 89 - mr %r30,%r2 90 - mr %r31,%r2 91 - 92 - blr 93 - 94 - ofw_memory_size: 95 - .long 0 96 - .long 0 97 - .long 0 98 - .long 0 99 - 100 - .align 4 101 - stack: 102 - .space 0x4000 103 - stackend: 104 - .long 0,0,0,0 105 - 106 - .globl _bss 107 - .section ".bss2" 108 - _bss: 109 - .long 0 110 - 111 - .align 4
-105
boot/freeldr/freeldr/arch/powerpc/compat.h
··· 1 - #pragma once 2 - 3 - #define __init 4 - #define __initdata 5 - 6 - #define SPRN_MSSCR0 0x3f6 /* Memory Subsystem Control Register 0 */ 7 - #define SPRN_MSSSR0 0x3f7 /* Memory Subsystem Status Register 1 */ 8 - #define SPRN_LDSTCR 0x3f8 /* Load/Store control register */ 9 - #define SPRN_LDSTDB 0x3f4 /* */ 10 - #define SPRN_LR 0x008 /* Link Register */ 11 - #ifndef SPRN_PIR 12 - #define SPRN_PIR 0x3FF /* Processor Identification Register */ 13 - #endif 14 - #define SPRN_PTEHI 0x3D5 /* 981 7450 PTE HI word (S/W TLB load) */ 15 - #define SPRN_PTELO 0x3D6 /* 982 7450 PTE LO word (S/W TLB load) */ 16 - #define SPRN_PURR 0x135 /* Processor Utilization of Resources Reg */ 17 - #define SPRN_PVR 0x11F /* Processor Version Register */ 18 - #define SPRN_RPA 0x3D6 /* Required Physical Address Register */ 19 - #define SPRN_SDA 0x3BF /* Sampled Data Address Register */ 20 - #define SPRN_SDR1 0x019 /* MMU Hash Base Register */ 21 - #define SPRN_ASR 0x118 /* Address Space Register */ 22 - #define SPRN_SIA 0x3BB /* Sampled Instruction Address Register */ 23 - #define SPRN_SPRG0 0x110 /* Special Purpose Register General 0 */ 24 - #define SPRN_SPRG1 0x111 /* Special Purpose Register General 1 */ 25 - #define SPRN_SPRG2 0x112 /* Special Purpose Register General 2 */ 26 - #define SPRN_SPRG3 0x113 /* Special Purpose Register General 3 */ 27 - #define SPRN_SPRG4 0x114 /* Special Purpose Register General 4 */ 28 - #define SPRN_SPRG5 0x115 /* Special Purpose Register General 5 */ 29 - #define SPRN_SPRG6 0x116 /* Special Purpose Register General 6 */ 30 - #define SPRN_SPRG7 0x117 /* Special Purpose Register General 7 */ 31 - #define SPRN_SRR0 0x01A /* Save/Restore Register 0 */ 32 - #define SPRN_SRR1 0x01B /* Save/Restore Register 1 */ 33 - #ifndef SPRN_SVR 34 - #define SPRN_SVR 0x11E /* System Version Register */ 35 - #endif 36 - #define SPRN_THRM1 0x3FC /* Thermal Management Register 1 */ 37 - /* these bits were defined in inverted endian sense originally, ugh, confusing */ 38 - 39 - /* Values for PP (assumes Ks=0, Kp=1) */ 40 - #define PP_RWXX 0 /* Supervisor read/write, User none */ 41 - #define PP_RWRX 1 /* Supervisor read/write, User read */ 42 - #define PP_RWRW 2 /* Supervisor read/write, User read/write */ 43 - #define PP_RXRX 3 /* Supervisor read, User read */ 44 - 45 - /* Block size masks */ 46 - #define BL_128K 0x000 47 - #define BL_256K 0x001 48 - #define BL_512K 0x003 49 - #define BL_1M 0x007 50 - #define BL_2M 0x00F 51 - #define BL_4M 0x01F 52 - #define BL_8M 0x03F 53 - #define BL_16M 0x07F 54 - #define BL_32M 0x0FF 55 - #define BL_64M 0x1FF 56 - #define BL_128M 0x3FF 57 - #define BL_256M 0x7FF 58 - 59 - /* BAT Access Protection */ 60 - #define BPP_XX 0x00 /* No access */ 61 - #define BPP_RX 0x01 /* Read only */ 62 - #define BPP_RW 0x02 /* Read/write */ 63 - 64 - /* Definitions for 40x embedded chips. */ 65 - #define _PAGE_GUARDED 0x001 /* G: page is guarded from prefetch */ 66 - #define _PAGE_FILE 0x001 /* when !present: nonlinear file mapping */ 67 - #define _PAGE_PRESENT 0x002 /* software: PTE contains a translation */ 68 - #define _PAGE_NO_CACHE 0x004 /* I: caching is inhibited */ 69 - #define _PAGE_WRITETHRU 0x008 /* W: caching is write-through */ 70 - #define _PAGE_USER 0x010 /* matches one of the zone permission bits */ 71 - #define _PAGE_RW 0x040 /* software: Writes permitted */ 72 - #define _PAGE_DIRTY 0x080 /* software: dirty page */ 73 - #define _PAGE_HWWRITE 0x100 /* hardware: Dirty & RW, set in exception */ 74 - #define _PAGE_HWEXEC 0x200 /* hardware: EX permission */ 75 - #define _PAGE_ACCESSED 0x400 /* software: R: page referenced */ 76 - 77 - #define _PMD_PRESENT 0x400 /* PMD points to page of PTEs */ 78 - #define _PMD_BAD 0x802 79 - #define _PMD_SIZE 0x0e0 /* size field, != 0 for large-page PMD entry */ 80 - #define _PMD_SIZE_4M 0x0c0 81 - #define _PMD_SIZE_16M 0x0e0 82 - #define PMD_PAGE_SIZE(pmdval) (1024 << (((pmdval) & _PMD_SIZE) >> 4)) 83 - 84 - #define PVR_VER(pvr)(((pvr) >> 16) & 0xFFFF) /* Version field */ 85 - 86 - #define KERNELBASE 0x80000000 87 - 88 - typedef unsigned char __u8; 89 - typedef unsigned short __u16; 90 - typedef unsigned int __u32; 91 - 92 - typedef struct _pci_reg_property { 93 - struct { 94 - int a_hi, a_mid, a_lo; 95 - } addr; 96 - int size_hi, size_lo; 97 - } pci_reg_property; 98 - 99 - void btext_drawstring(const char *c); 100 - void btext_drawhex(unsigned long v); 101 - 102 - void *ioremap(__u32 phys, __u32 size); 103 - void iounmap(void *logical); 104 - 105 - __u32 GetPVR(void);
-348
boot/freeldr/freeldr/arch/powerpc/loader.c
··· 1 - /* 2 - * FreeLoader 3 - * Copyright (C) 1998-2003 Brian Palmer <brianp@sginet.com> 4 - * Copyright (C) 2005 Alex Ionescu <alex@relsoft.net> 5 - * 6 - * This program is free software; you can redistribute it and/or modify 7 - * it under the terms of the GNU General Public License as published by 8 - * the Free Software Foundation; either version 2 of the License, or 9 - * (at your option) any later version. 10 - * 11 - * This program is distributed in the hope that it will be useful, 12 - * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 - * GNU General Public License for more details. 15 - * 16 - * You should have received a copy of the GNU General Public License along 17 - * with this program; if not, write to the Free Software Foundation, Inc., 18 - * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. 19 - */ 20 - #define _NTSYSTEM_ 21 - #include <freeldr.h> 22 - 23 - #include <debug.h> 24 - 25 - #define DbgPrint printf 26 - 27 - extern PVOID KernelBase; 28 - extern PVOID KernelMemory; 29 - 30 - PVOID 31 - NTAPI 32 - LdrPEGetExportByName(PVOID BaseAddress, 33 - PUCHAR SymbolName, 34 - USHORT Hint); 35 - 36 - /* FUNCTIONS *****************************************************************/ 37 - 38 - PLOADER_MODULE 39 - NTAPI 40 - LdrGetModuleObject(PCHAR ModuleName) 41 - { 42 - ULONG i; 43 - 44 - for (i = 0; i < LoaderBlock.ModsCount; i++) 45 - { 46 - if (strstr(_strupr((PCHAR)reactos_modules[i].String), _strupr(ModuleName))) 47 - { 48 - return &reactos_modules[i]; 49 - } 50 - } 51 - 52 - return NULL; 53 - } 54 - 55 - PVOID 56 - NTAPI 57 - LdrPEFixupForward(IN PCHAR ForwardName) 58 - { 59 - CHAR NameBuffer[128]; 60 - PCHAR p; 61 - PLOADER_MODULE ModuleObject; 62 - 63 - strcpy(NameBuffer, ForwardName); 64 - p = strchr(NameBuffer, '.'); 65 - if (p == NULL) return NULL; 66 - *p = 0; 67 - 68 - ModuleObject = LdrGetModuleObject(NameBuffer); 69 - if (!ModuleObject) 70 - { 71 - DbgPrint("LdrPEFixupForward: failed to find module %s\n", NameBuffer); 72 - return NULL; 73 - } 74 - 75 - return LdrPEGetExportByName((PVOID)ModuleObject->ModStart, (PUCHAR)(p + 1), 0xffff); 76 - } 77 - 78 - PVOID 79 - NTAPI 80 - LdrPEGetExportByName(PVOID BaseAddress, 81 - PUCHAR SymbolName, 82 - USHORT Hint) 83 - { 84 - PIMAGE_EXPORT_DIRECTORY ExportDir; 85 - PULONG * ExFunctions; 86 - PULONG * ExNames; 87 - USHORT * ExOrdinals; 88 - PVOID ExName; 89 - ULONG Ordinal; 90 - PVOID Function; 91 - LONG minn, maxn, mid, res; 92 - ULONG ExportDirSize; 93 - 94 - /* HAL and NTOS use a virtual address, switch it to physical mode */ 95 - if ((ULONG_PTR)BaseAddress & 0x80000000) 96 - { 97 - BaseAddress = (PVOID)((ULONG_PTR)BaseAddress - KSEG0_BASE + (ULONG)KernelMemory); 98 - } 99 - 100 - ExportDir = (PIMAGE_EXPORT_DIRECTORY) 101 - RtlImageDirectoryEntryToData(BaseAddress, 102 - TRUE, 103 - IMAGE_DIRECTORY_ENTRY_EXPORT, 104 - &ExportDirSize); 105 - if (!ExportDir) 106 - { 107 - DbgPrint("LdrPEGetExportByName(): no export directory!\n"); 108 - return NULL; 109 - } 110 - 111 - /* The symbol names may be missing entirely */ 112 - if (!ExportDir->AddressOfNames) 113 - { 114 - DbgPrint("LdrPEGetExportByName(): symbol names missing entirely\n"); 115 - return NULL; 116 - } 117 - 118 - /* 119 - * Get header pointers 120 - */ 121 - ExNames = (PULONG *)RVA(BaseAddress, ExportDir->AddressOfNames); 122 - ExOrdinals = (USHORT *)RVA(BaseAddress, ExportDir->AddressOfNameOrdinals); 123 - ExFunctions = (PULONG *)RVA(BaseAddress, ExportDir->AddressOfFunctions); 124 - 125 - /* 126 - * Check the hint first 127 - */ 128 - if (Hint < ExportDir->NumberOfNames) 129 - { 130 - ExName = RVA(BaseAddress, ExNames[Hint]); 131 - if (strcmp(ExName, (PCHAR)SymbolName) == 0) 132 - { 133 - Ordinal = ExOrdinals[Hint]; 134 - Function = RVA(BaseAddress, ExFunctions[Ordinal]); 135 - if ((ULONG_PTR)Function >= (ULONG_PTR)ExportDir && 136 - (ULONG_PTR)Function < (ULONG_PTR)ExportDir + ExportDirSize) 137 - { 138 - Function = LdrPEFixupForward((PCHAR)Function); 139 - if (Function == NULL) 140 - { 141 - DbgPrint("LdrPEGetExportByName(): failed to find %s\n", Function); 142 - } 143 - return Function; 144 - } 145 - 146 - if (Function != NULL) return Function; 147 - } 148 - } 149 - 150 - /* 151 - * Binary search 152 - */ 153 - minn = 0; 154 - maxn = ExportDir->NumberOfNames - 1; 155 - while (minn <= maxn) 156 - { 157 - mid = (minn + maxn) / 2; 158 - 159 - ExName = RVA(BaseAddress, ExNames[mid]); 160 - res = strcmp(ExName, (PCHAR)SymbolName); 161 - if (res == 0) 162 - { 163 - Ordinal = ExOrdinals[mid]; 164 - Function = RVA(BaseAddress, ExFunctions[Ordinal]); 165 - if ((ULONG_PTR)Function >= (ULONG_PTR)ExportDir && 166 - (ULONG_PTR)Function < (ULONG_PTR)ExportDir + ExportDirSize) 167 - { 168 - Function = LdrPEFixupForward((PCHAR)Function); 169 - if (Function == NULL) 170 - { 171 - DbgPrint("1: failed to find %s\n", Function); 172 - } 173 - return Function; 174 - } 175 - if (Function != NULL) 176 - { 177 - return Function; 178 - } 179 - } 180 - else if (res > 0) 181 - { 182 - maxn = mid - 1; 183 - } 184 - else 185 - { 186 - minn = mid + 1; 187 - } 188 - } 189 - 190 - /* Fall back on unsorted */ 191 - minn = 0; 192 - maxn = ExportDir->NumberOfNames - 1; 193 - while (minn <= maxn) 194 - { 195 - ExName = RVA(BaseAddress, ExNames[minn]); 196 - res = strcmp(ExName, (PCHAR)SymbolName); 197 - if (res == 0) 198 - { 199 - Ordinal = ExOrdinals[minn]; 200 - Function = RVA(BaseAddress, ExFunctions[Ordinal]); 201 - if ((ULONG_PTR)Function >= (ULONG_PTR)ExportDir && 202 - (ULONG_PTR)Function < (ULONG_PTR)ExportDir + ExportDirSize) 203 - { 204 - Function = LdrPEFixupForward((PCHAR)Function); 205 - if (Function == NULL) 206 - { 207 - DbgPrint("LdrPEGetExportByName(): failed to find %s\n",SymbolName); 208 - } 209 - return Function; 210 - } 211 - if (Function != NULL) 212 - { 213 - return Function; 214 - } 215 - DbgPrint("Failed to get function %s\n", SymbolName); 216 - } 217 - minn++; 218 - } 219 - 220 - DbgPrint("2: failed to find %s\n",SymbolName); 221 - return (PVOID)NULL; 222 - } 223 - 224 - NTSTATUS 225 - NTAPI 226 - LdrPEProcessImportDirectoryEntry(PVOID DriverBase, 227 - PLOADER_MODULE LoaderModule, 228 - PIMAGE_IMPORT_DESCRIPTOR ImportModuleDirectory) 229 - { 230 - PVOID* ImportAddressList; 231 - PULONG FunctionNameList; 232 - 233 - if (ImportModuleDirectory == NULL || ImportModuleDirectory->Name == 0) 234 - { 235 - return STATUS_UNSUCCESSFUL; 236 - } 237 - 238 - /* Get the import address list. */ 239 - ImportAddressList = (PVOID*)RVA(DriverBase, ImportModuleDirectory->FirstThunk); 240 - 241 - /* Get the list of functions to import. */ 242 - if (ImportModuleDirectory->OriginalFirstThunk != 0) 243 - { 244 - FunctionNameList = (PULONG)RVA(DriverBase, ImportModuleDirectory->OriginalFirstThunk); 245 - } 246 - else 247 - { 248 - FunctionNameList = (PULONG)RVA(DriverBase, ImportModuleDirectory->FirstThunk); 249 - } 250 - 251 - /* Walk through function list and fixup addresses. */ 252 - while (*FunctionNameList != 0L) 253 - { 254 - if ((*FunctionNameList) & 0x80000000) 255 - { 256 - DbgPrint("Failed to import ordinal from %s\n", LoaderModule->String); 257 - return STATUS_UNSUCCESSFUL; 258 - } 259 - else 260 - { 261 - IMAGE_IMPORT_BY_NAME *pe_name; 262 - pe_name = RVA(DriverBase, *FunctionNameList); 263 - *ImportAddressList = LdrPEGetExportByName((PVOID)LoaderModule->ModStart, pe_name->Name, pe_name->Hint); 264 - 265 - /* Fixup the address to be virtual */ 266 - *ImportAddressList = (PVOID)(ULONG_PTR)*ImportAddressList + (ULONG_PTR)KernelBase - (ULONG_PTR)KernelMemory; 267 - 268 - 269 - //DbgPrint("Looked for: %s and found: %x\n", pe_name->Name, *ImportAddressList); 270 - if ((*ImportAddressList) == NULL) 271 - { 272 - DbgPrint("Failed to import %s from %s\n", pe_name->Name, LoaderModule->String); 273 - return STATUS_UNSUCCESSFUL; 274 - } 275 - } 276 - ImportAddressList++; 277 - FunctionNameList++; 278 - } 279 - return STATUS_SUCCESS; 280 - } 281 - 282 - extern BOOLEAN FrLdrLoadDriver(PCHAR szFileName, INT nPos); 283 - 284 - NTSTATUS 285 - NTAPI 286 - LdrPEGetOrLoadModule(IN PCHAR ModuleName, 287 - IN PCHAR ImportedName, 288 - IN PLOADER_MODULE* ImportedModule) 289 - { 290 - NTSTATUS Status = STATUS_SUCCESS; 291 - 292 - *ImportedModule = LdrGetModuleObject(ImportedName); 293 - if (*ImportedModule == NULL) 294 - { 295 - /* 296 - * For now, we only support import-loading the HAL. 297 - * Later, FrLdrLoadDriver should be made to share the same 298 - * code, and we'll just call it instead. 299 - */ 300 - FrLdrLoadDriver(ImportedName, 0); 301 - 302 - /* Return the new module */ 303 - *ImportedModule = LdrGetModuleObject(ImportedName); 304 - if (*ImportedModule == NULL) 305 - { 306 - DbgPrint("Error loading import: %s\n", ImportedName); 307 - return STATUS_UNSUCCESSFUL; 308 - } 309 - } 310 - 311 - return Status; 312 - } 313 - 314 - NTSTATUS 315 - NTAPI 316 - LdrPEFixupImports(IN PVOID DllBase, 317 - IN PCHAR DllName) 318 - { 319 - PIMAGE_IMPORT_DESCRIPTOR ImportModuleDirectory; 320 - PCHAR ImportedName; 321 - NTSTATUS Status; 322 - PLOADER_MODULE ImportedModule; 323 - ULONG Size; 324 - 325 - /* Process each import module */ 326 - ImportModuleDirectory = (PIMAGE_IMPORT_DESCRIPTOR) 327 - RtlImageDirectoryEntryToData(DllBase, 328 - TRUE, 329 - IMAGE_DIRECTORY_ENTRY_IMPORT, 330 - &Size); 331 - while (ImportModuleDirectory && ImportModuleDirectory->Name) 332 - { 333 - /* Check to make sure that import lib is kernel */ 334 - ImportedName = (PCHAR) DllBase + ImportModuleDirectory->Name; 335 - //DbgPrint("Processing imports for file: %s into file: %s\n", DllName, ImportedName); 336 - 337 - Status = LdrPEGetOrLoadModule(DllName, ImportedName, &ImportedModule); 338 - if (!NT_SUCCESS(Status)) return Status; 339 - 340 - Status = LdrPEProcessImportDirectoryEntry(DllBase, ImportedModule, ImportModuleDirectory); 341 - if (!NT_SUCCESS(Status)) return Status; 342 - 343 - //DbgPrint("Imports for file: %s into file: %s complete\n", DllName, ImportedName); 344 - ImportModuleDirectory++; 345 - } 346 - 347 - return STATUS_SUCCESS; 348 - }
-555
boot/freeldr/freeldr/arch/powerpc/mach.c
··· 1 - /* 2 - * FreeLoader PowerPC Part 3 - * Copyright (C) 2005 Art Yerkes 4 - * 5 - * This program is free software; you can redistribute it and/or modify 6 - * it under the terms of the GNU General Public License as published by 7 - * the Free Software Foundation; either version 2 of the License, or 8 - * (at your option) any later version. 9 - * 10 - * This program is distributed in the hope that it will be useful, 11 - * but WITHOUT ANY WARRANTY; without even the implied warranty of 12 - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13 - * GNU General Public License for more details. 14 - * 15 - * You should have received a copy of the GNU General Public License along 16 - * with this program; if not, write to the Free Software Foundation, Inc., 17 - * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. 18 - */ 19 - #include "freeldr.h" 20 - #include "machine.h" 21 - #include "ppcmmu/mmu.h" 22 - #include "of.h" 23 - #include "prep.h" 24 - #include "compat.h" 25 - 26 - extern void BootMain( PSTR CmdLine ); 27 - extern ULONG CacheSizeLimit; 28 - of_proxy ofproxy; 29 - void *PageDirectoryStart, *PageDirectoryEnd; 30 - static int chosen_package, stdin_handle, stdout_handle, part_handle = -1; 31 - int mmu_handle = 0; 32 - int claimed[4]; 33 - BOOLEAN AcpiPresent = FALSE; 34 - CHAR FrLdrBootPath[MAX_PATH] = "", BootPart[MAX_PATH] = "", CmdLine[MAX_PATH] = "bootprep"; 35 - jmp_buf jmp; 36 - volatile char *video_mem = 0; 37 - 38 - void PpcOfwPutChar( int ch ) { 39 - char buf[3]; 40 - if( ch == 0x0a ) { buf[0] = 0x0d; buf[1] = 0x0a; } 41 - else { buf[0] = ch; buf[1] = 0; } 42 - buf[2] = 0; 43 - ofw_write(stdout_handle, buf, strlen(buf)); 44 - } 45 - 46 - int PpcFindDevice( int depth, int parent, char *devname, int *nth ) { 47 - static char buf[256]; 48 - int next = 0; 49 - int gotname = 0; 50 - int match = 0; 51 - int i; 52 - 53 - next = ofw_child( parent ); 54 - 55 - //printf( "next = %x\n", next ); 56 - 57 - gotname = ofw_getprop(parent, "name", buf, 256); 58 - 59 - //printf( "gotname = %d\n", gotname ); 60 - 61 - match = !strncmp(buf, devname, strlen(devname)); 62 - 63 - if( !nth && match ) return parent; 64 - 65 - for( i = 0; i < depth; i++ ) PpcOfwPutChar( ' ' ); 66 - 67 - if( depth == 1 ) { 68 - if( gotname > 0 ) { 69 - printf( "%c Name: %s\n", match ? '*' : ' ', buf ); 70 - } else { 71 - printf( "- No name attribute for %x\n", parent ); 72 - } 73 - } 74 - 75 - while( !match && next ) { 76 - i = PpcFindDevice( depth+1, next, devname, nth ); 77 - if( i ) return i; 78 - next = ofw_peer( next ); 79 - } 80 - 81 - return 0; 82 - } 83 - 84 - BOOLEAN PpcConsKbHit() { 85 - return FALSE; 86 - } 87 - 88 - int PpcConsGetCh() { 89 - char buf; 90 - ofw_read( stdin_handle, &buf, 1 ); 91 - return buf; 92 - } 93 - 94 - void PpcVideoClearScreen( UCHAR Attr ) { 95 - } 96 - 97 - VOID PpcVideoGetDisplaySize( PULONG Width, PULONG Height, PULONG Depth ) { 98 - *Width = 80; 99 - *Height = 25; 100 - *Depth = 16; 101 - } 102 - 103 - ULONG PpcVideoGetBufferSize() { 104 - ULONG Width, Height, Depth; 105 - MachVideoGetDisplaySize( &Width, &Height, &Depth ); 106 - return Width * Height * Depth / 8; 107 - } 108 - 109 - VIDEODISPLAYMODE PpcVideoSetDisplayMode( char *DisplayMode, BOOLEAN Init ) { 110 - //printf( "DisplayMode: %s %s\n", DisplayMode, Init ? "true" : "false" ); 111 - if( Init && !video_mem ) { 112 - video_mem = MmAllocateMemory( PpcVideoGetBufferSize() ); 113 - } 114 - return VideoTextMode; 115 - } 116 - 117 - VOID PpcVideoSetTextCursorPosition( ULONG X, ULONG Y ) { 118 - printf("SetTextCursorPosition(%d,%d)\n", X,Y); 119 - } 120 - 121 - VOID PpcVideoHideShowTextCursor( BOOLEAN Show ) { 122 - printf("HideShowTextCursor(%s)\n", Show ? "true" : "false"); 123 - } 124 - 125 - VOID PpcVideoPutChar( int Ch, UCHAR Attr, unsigned X, unsigned Y ) { 126 - printf( "\033[%d;%dH%c", Y, X, Ch ); 127 - } 128 - 129 - VOID PpcVideoCopyOffScreenBufferToVRAM( PVOID Buffer ) { 130 - int i,j; 131 - ULONG w,h,d; 132 - PCHAR ChBuf = Buffer; 133 - int offset = 0; 134 - 135 - MachVideoGetDisplaySize( &w, &h, &d ); 136 - 137 - for( i = 0; i < h; i++ ) { 138 - for( j = 0; j < w; j++ ) { 139 - offset = (j * 2) + (i * w * 2); 140 - if( ChBuf[offset] != video_mem[offset] ) { 141 - video_mem[offset] = ChBuf[offset]; 142 - MachVideoPutChar(ChBuf[offset],0,j+1,i+1); 143 - } 144 - } 145 - } 146 - } 147 - 148 - BOOLEAN PpcVideoIsPaletteFixed() { 149 - return FALSE; 150 - } 151 - 152 - VOID PpcVideoSetPaletteColor( UCHAR Color, 153 - UCHAR Red, UCHAR Green, UCHAR Blue ) { 154 - printf( "SetPaletteColor(%x,%x,%x,%x)\n", Color, Red, Green, Blue ); 155 - } 156 - 157 - VOID PpcVideoGetPaletteColor( UCHAR Color, 158 - UCHAR *Red, UCHAR *Green, UCHAR *Blue ) { 159 - printf( "GetPaletteColor(%x)\n", Color); 160 - } 161 - 162 - VOID PpcVideoSync() { 163 - printf( "Sync\n" ); 164 - } 165 - 166 - int mmu_initialized = 0; 167 - int mem_range_end; 168 - VOID PpcInitializeMmu() 169 - { 170 - if(!mmu_initialized) 171 - { 172 - MmuInit(); 173 - MmuDbgInit(0, 0x800003f8); 174 - MmuSetMemorySize(mem_range_end); 175 - //MmuDbgEnter(0x20); 176 - mmu_initialized = 1; 177 - } 178 - } 179 - 180 - ULONG PpcPrepGetMemoryMap( PBIOS_MEMORY_MAP BiosMemoryMap, 181 - ULONG MaxMemoryMapSize ); 182 - 183 - /* 184 - * Get memory the proper openfirmware way 185 - */ 186 - ULONG PpcGetMemoryMap( PBIOS_MEMORY_MAP BiosMemoryMap, 187 - ULONG MaxMemoryMapSize ) { 188 - int i, memhandle, total = 0, slots = 0, last = 0x40000, allocstart = 0x1000000; 189 - int regdata[0x40]; 190 - 191 - printf("PpcGetMemoryMap(%d)\n", MaxMemoryMapSize); 192 - 193 - memhandle = ofw_finddevice("/memory"); 194 - 195 - ofw_getprop(memhandle, "reg", (char *)regdata, sizeof(regdata)); 196 - 197 - /* Try to claim some memory in usable blocks. Try to get some 8mb bits */ 198 - for( i = 0; i < sizeof(claimed) / sizeof(claimed[0]); ) { 199 - if (!claimed[i]) 200 - claimed[i] = ofw_claim(allocstart, 8 * 1024 * 1024, 0x1000); 201 - 202 - allocstart += 8 * 1024 * 1024; 203 - 204 - if (claimed[i]) { 205 - if (last < claimed[i]) { 206 - BiosMemoryMap[slots].Type = BiosMemoryAcpiReclaim; 207 - BiosMemoryMap[slots].BaseAddress = last; 208 - BiosMemoryMap[slots].Length = claimed[i] - last; 209 - slots++; 210 - } 211 - 212 - BiosMemoryMap[slots].Type = BiosMemoryUsable; 213 - BiosMemoryMap[slots].BaseAddress = claimed[i]; 214 - BiosMemoryMap[slots].Length = 8 * 1024 * 1024; 215 - 216 - total += BiosMemoryMap[slots].Length; 217 - last = 218 - BiosMemoryMap[slots].BaseAddress + 219 - BiosMemoryMap[slots].Length; 220 - slots++; 221 - i++; 222 - } 223 - } 224 - 225 - /* Get the rest until the end of the memory object as we see it */ 226 - if (last < regdata[1]) { 227 - BiosMemoryMap[slots].Type = BiosMemoryAcpiReclaim; 228 - BiosMemoryMap[slots].BaseAddress = last; 229 - BiosMemoryMap[slots].Length = regdata[1] - last; 230 - slots++; 231 - } 232 - 233 - for (i = 0; i < slots; i++) { 234 - printf("MemoryMap[%d] = (%x:%x)\n", 235 - i, 236 - (int)BiosMemoryMap[i].BaseAddress, 237 - (int)BiosMemoryMap[i].Length); 238 - 239 - } 240 - 241 - mem_range_end = regdata[1]; 242 - 243 - printf( "Returning memory map (%d entries, %dk free, %dk total ram)\n", 244 - slots, total / 1024, regdata[1] / 1024 ); 245 - 246 - return slots; 247 - } 248 - 249 - BOOLEAN PpcDiskReadLogicalSectors( ULONG DriveNumber, ULONGLONG SectorNumber, 250 - ULONG SectorCount, PVOID Buffer ) { 251 - int rlen = 0; 252 - 253 - if( part_handle == -1 ) { 254 - part_handle = ofw_open( BootPart ); 255 - 256 - if( part_handle == -1 ) { 257 - printf("Could not open any disk devices we know about\n"); 258 - return FALSE; 259 - } 260 - } 261 - 262 - if( part_handle == -1 ) { 263 - printf("Got partition handle %x\n", part_handle); 264 - return FALSE; 265 - } 266 - 267 - if( ofw_seek( part_handle, 268 - (ULONG)(SectorNumber >> 25), 269 - (ULONG)((SectorNumber * 512) & 0xffffffff) ) ) { 270 - printf("Seek to %x failed\n", (ULONG)(SectorNumber * 512)); 271 - return FALSE; 272 - } 273 - 274 - rlen = ofw_read( part_handle, Buffer, (ULONG)(SectorCount * 512) ); 275 - return rlen > 0; 276 - } 277 - 278 - BOOLEAN PpcDiskGetDriveGeometry( ULONG DriveNumber, PGEOMETRY DriveGeometry ) { 279 - printf("GetGeometry(%d)\n", DriveNumber); 280 - DriveGeometry->BytesPerSector = 512; 281 - DriveGeometry->Heads = 16; 282 - DriveGeometry->Sectors = 63; 283 - return TRUE; 284 - } 285 - 286 - ULONG PpcDiskGetCacheableBlockCount( ULONG DriveNumber ) { 287 - printf("GetCacheableBlockCount\n"); 288 - return 1; 289 - } 290 - 291 - TIMEINFO* 292 - PpcGetTime(VOID) 293 - { 294 - static TIMEINFO TimeInfo; 295 - //printf("PpcGetTime\n"); 296 - return &TimeInfo; 297 - } 298 - 299 - VOID NarrowToWide(WCHAR *wide_name, char *name) 300 - { 301 - char *copy_name; 302 - WCHAR *wide_name_ptr; 303 - for (wide_name_ptr = wide_name, copy_name = name; 304 - (*wide_name_ptr = *copy_name); 305 - wide_name_ptr++, copy_name++); 306 - } 307 - 308 - /* Recursively copy the device tree into our representation 309 - * It'll be passed to HAL. 310 - * 311 - * When NT was first done on PPC, it was on PReP hardware, which is very 312 - * like PC hardware (really, just a PPC on a PC motherboard). HAL can guess 313 - * the addresses of needed resources in this scheme as it can on x86. 314 - * 315 - * Most PPC hardware doesn't assign fixed addresses to hardware, which is 316 - * the problem that open firmware partially solves. It allows hardware makers 317 - * much more leeway in building PPC systems. Unfortunately, because 318 - * openfirmware as originally specified neither captures nor standardizes 319 - * all possible information, and also because of bugs, most OSs use a hybrid 320 - * configuration scheme that relies both on verification of devices and 321 - * recording information from openfirmware to be treated as hints. 322 - */ 323 - VOID OfwCopyDeviceTree 324 - (PCONFIGURATION_COMPONENT_DATA ParentKey, 325 - char *name, 326 - int innode, 327 - ULONG *BusNumber, 328 - ULONG *DiskController, 329 - ULONG *DiskNumber) 330 - { 331 - int proplen = 0, node = innode; 332 - char *prev_name, cur_name[64], data[256], *slash, devtype[64]; 333 - wchar_t wide_name[64]; 334 - PCONFIGURATION_COMPONENT_DATA NewKey; 335 - 336 - NarrowToWide(wide_name, name); 337 - 338 - /* Create a key for this device */ 339 - FldrCreateComponentKey 340 - (ParentKey, 341 - AdapterClass, 342 - MultiFunctionAdapter, 343 - 0, 344 - 0, 345 - (ULONG)-1, 346 - NULL, 347 - NULL, 348 - 0, 349 - &NewKey); 350 - 351 - /* Add properties */ 352 - for (prev_name = ""; ofw_nextprop(node, prev_name, cur_name) == 1; ) 353 - { 354 - proplen = ofw_getproplen(node, cur_name); 355 - if (proplen > 256 || proplen < 0) 356 - { 357 - printf("Warning: not getting prop %s (too long: %d)\n", 358 - cur_name, proplen); 359 - continue; 360 - } 361 - ofw_getprop(node, cur_name, data, sizeof(data)); 362 - 363 - /* Get device type so we can examine it */ 364 - if (!strcmp(cur_name, "device_type")) 365 - strcpy(devtype, (char *)data); 366 - 367 - NarrowToWide(wide_name, cur_name); 368 - //RegSetValue(NewKey, wide_name, REG_BINARY, data, proplen); 369 - 370 - strcpy(data, cur_name); 371 - prev_name = data; 372 - } 373 - 374 - #if 0 375 - /* Special device handling */ 376 - if (!strcmp(devtype, "ata")) 377 - { 378 - OfwHandleDiskController(NewKey, node, *DiskController); 379 - (*DiskController)++; 380 - *DiskNumber = 0; 381 - } 382 - else if (!strcmp(devtype, "disk")) 383 - { 384 - OfwHandleDiskObject(NewKey, node, *DiskController, *DiskNumber); 385 - (*DiskNumber)++; 386 - } 387 - #endif 388 - 389 - /* Subdevices */ 390 - for (node = ofw_child(node); node; node = ofw_peer(node)) 391 - { 392 - ofw_package_to_path(node, data, sizeof(data)); 393 - slash = strrchr(data, '/'); 394 - if (slash) slash++; else continue; 395 - OfwCopyDeviceTree 396 - (NewKey, slash, node, BusNumber, DiskController, DiskNumber); 397 - } 398 - } 399 - 400 - PCONFIGURATION_COMPONENT_DATA PpcHwDetect() { 401 - PCONFIGURATION_COMPONENT_DATA RootKey; 402 - ULONG BusNumber = 0, DiskController = 0, DiskNumber = 0; 403 - int node = ofw_finddevice("/"); 404 - 405 - FldrCreateSystemKey(&RootKey); 406 - 407 - OfwCopyDeviceTree(RootKey,"/",node,&BusNumber,&DiskController,&DiskNumber); 408 - return RootKey; 409 - } 410 - 411 - VOID 412 - PpcHwIdle(VOID) 413 - { 414 - /* UNIMPLEMENTED */ 415 - } 416 - 417 - void PpcDefaultMachVtbl() 418 - { 419 - MachVtbl.ConsPutChar = PpcOfwPutChar; 420 - MachVtbl.ConsKbHit = PpcConsKbHit; 421 - MachVtbl.ConsGetCh = PpcConsGetCh; 422 - MachVtbl.VideoClearScreen = PpcVideoClearScreen; 423 - MachVtbl.VideoSetDisplayMode = PpcVideoSetDisplayMode; 424 - MachVtbl.VideoGetDisplaySize = PpcVideoGetDisplaySize; 425 - MachVtbl.VideoGetBufferSize = PpcVideoGetBufferSize; 426 - MachVtbl.VideoSetTextCursorPosition = PpcVideoSetTextCursorPosition; 427 - MachVtbl.VideoHideShowTextCursor = PpcVideoHideShowTextCursor; 428 - MachVtbl.VideoPutChar = PpcVideoPutChar; 429 - MachVtbl.VideoCopyOffScreenBufferToVRAM = 430 - PpcVideoCopyOffScreenBufferToVRAM; 431 - MachVtbl.VideoIsPaletteFixed = PpcVideoIsPaletteFixed; 432 - MachVtbl.VideoSetPaletteColor = PpcVideoSetPaletteColor; 433 - MachVtbl.VideoGetPaletteColor = PpcVideoGetPaletteColor; 434 - MachVtbl.VideoSync = PpcVideoSync; 435 - 436 - MachVtbl.GetMemoryMap = PpcGetMemoryMap; 437 - 438 - MachVtbl.DiskReadLogicalSectors = PpcDiskReadLogicalSectors; 439 - MachVtbl.DiskGetDriveGeometry = PpcDiskGetDriveGeometry; 440 - MachVtbl.DiskGetCacheableBlockCount = PpcDiskGetCacheableBlockCount; 441 - 442 - MachVtbl.GetTime = PpcGetTime; 443 - 444 - MachVtbl.HwDetect = PpcHwDetect; 445 - MachVtbl.HwIdle = PpcHwIdle; 446 - } 447 - 448 - void PpcOfwInit() 449 - { 450 - chosen_package = ofw_finddevice( "/chosen" ); 451 - 452 - ofw_getprop(chosen_package, "bootargs", 453 - CmdLine, sizeof(CmdLine)); 454 - ofw_getprop( chosen_package, "stdin", 455 - (char *)&stdin_handle, sizeof(stdin_handle) ); 456 - ofw_getprop( chosen_package, "stdout", 457 - (char *)&stdout_handle, sizeof(stdout_handle) ); 458 - ofw_getprop( chosen_package, "mmu", 459 - (char *)&mmu_handle, sizeof(mmu_handle) ); 460 - 461 - // Allow forcing prep for broken OFW 462 - if(!strncmp(CmdLine, "bootprep", 8)) 463 - { 464 - printf("Going to PREP init...\n"); 465 - ofproxy = NULL; 466 - PpcPrepInit(); 467 - return; 468 - } 469 - 470 - printf( "FreeLDR version [%s]\n", FrLdrVersionString ); 471 - 472 - BootMain( CmdLine ); 473 - } 474 - 475 - void PpcInit( of_proxy the_ofproxy ) { 476 - // Hack to be a bit easier on ram 477 - CacheSizeLimit = 64 * 1024; 478 - ofproxy = the_ofproxy; 479 - PpcDefaultMachVtbl(); 480 - if(ofproxy) PpcOfwInit(); 481 - else PpcPrepInit(); 482 - } 483 - 484 - void MachInit(const char *CmdLine) { 485 - int i, len; 486 - char *sep; 487 - 488 - BootPart[0] = 0; 489 - FrLdrBootPath[0] = 0; 490 - 491 - printf( "Determining boot device: [%s]\n", CmdLine ); 492 - 493 - sep = NULL; 494 - for( i = 0; i < strlen(CmdLine); i++ ) { 495 - if( strncmp(CmdLine + i, "boot=", 5) == 0) { 496 - strcpy(BootPart, CmdLine + i + 5); 497 - sep = strchr(BootPart, ','); 498 - if( sep ) 499 - *sep = 0; 500 - while(CmdLine[i] && CmdLine[i]!=',') i++; 501 - } 502 - } 503 - 504 - if( strlen(BootPart) == 0 ) { 505 - if (ofproxy) 506 - len = ofw_getprop(chosen_package, "bootpath", 507 - FrLdrBootPath, sizeof(FrLdrBootPath)); 508 - else 509 - len = 0; 510 - if( len < 0 ) len = 0; 511 - FrLdrBootPath[len] = 0; 512 - printf( "Boot Path: %s\n", FrLdrBootPath ); 513 - 514 - sep = strrchr(FrLdrBootPath, ','); 515 - 516 - strcpy(BootPart, FrLdrBootPath); 517 - if( sep ) { 518 - BootPart[sep - FrLdrBootPath] = 0; 519 - } 520 - } 521 - 522 - printf( "FreeLDR starting (boot partition: %s)\n", BootPart ); 523 - } 524 - 525 - void beep() { 526 - } 527 - 528 - UCHAR NTAPI READ_PORT_UCHAR(PUCHAR Address) { 529 - return GetPhysByte(((ULONG)Address)+0x80000000); 530 - } 531 - 532 - void WRITE_PORT_UCHAR(PUCHAR Address, UCHAR Value) { 533 - SetPhysByte(((ULONG)Address)+0x80000000, Value); 534 - } 535 - 536 - VOID __cdecl BootLinuxKernel( 537 - IN ULONG KernelSize, 538 - IN PVOID KernelCurrentLoadAddress, 539 - IN PVOID KernelTargetLoadAddress, 540 - IN UCHAR DriveNumber, 541 - IN ULONG PartitionNumber) 542 - { 543 - ofw_exit(); 544 - } 545 - 546 - VOID __cdecl ChainLoadBiosBootSectorCode( 547 - IN UCHAR BootDrive OPTIONAL, 548 - IN ULONG BootPartition OPTIONAL) 549 - { 550 - ofw_exit(); 551 - } 552 - 553 - void DbgBreakPoint() { 554 - __asm__("twi 31,0,0"); 555 - }
-852
boot/freeldr/freeldr/arch/powerpc/mboot.c
··· 1 - /* 2 - * FreeLoader 3 - * Copyright (C) 1998-2003 Brian Palmer <brianp@sginet.com> 4 - * Copyright (C) 2005 Alex Ionescu <alex@relsoft.net> 5 - * 6 - * This program is free software; you can redistribute it and/or modify 7 - * it under the terms of the GNU General Public License as published by 8 - * the Free Software Foundation; either version 2 of the License, or 9 - * (at your option) any later version. 10 - * 11 - * This program is distributed in the hope that it will be useful, 12 - * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 - * GNU General Public License for more details. 15 - * 16 - * You should have received a copy of the GNU General Public License along 17 - * with this program; if not, write to the Free Software Foundation, Inc., 18 - * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. 19 - */ 20 - 21 - #include <freeldr.h> 22 - #include <elf/elf.h> 23 - #include <elf/reactos.h> 24 - #include <of.h> 25 - #include "ppcmmu/mmu.h" 26 - #include "compat.h" 27 - 28 - #include <debug.h> 29 - 30 - /* We'll check this to see if we're in OFW land */ 31 - extern of_proxy ofproxy; 32 - 33 - PVOID KernelMemory = NULL; 34 - 35 - /* Bits to shift to convert a Virtual Address into an Offset in the Page Table */ 36 - #define PFN_SHIFT 12 37 - 38 - /* Bits to shift to convert a Virtual Address into an Offset in the Page Directory */ 39 - #define PDE_SHIFT 22 40 - #define PDE_SHIFT_PAE 18 41 - 42 - #define STARTUP_BASE 0xC0000000 43 - #define HYPERSPACE_BASE 0xC0400000 44 - #define HYPERSPACE_PAE_BASE 0xC0800000 45 - #define APIC_BASE 0xFEC00000 46 - #define KPCR_BASE 0xFF000000 47 - 48 - #define LowMemPageTableIndex 0 49 - #define StartupPageTableIndex (STARTUP_BASE >> 22) 50 - #define HyperspacePageTableIndex (HYPERSPACE_BASE >> 22) 51 - #define KpcrPageTableIndex (KPCR_BASE >> 22) 52 - #define ApicPageTableIndex (APIC_BASE >> 22) 53 - 54 - #define BAT_GRANULARITY (64 * 1024) 55 - #define KernelMemorySize (8 * 1024 * 1024) 56 - #define XROUNDUP(x,n) ((((ULONG)x) + ((n) - 1)) & (~((n) - 1))) 57 - 58 - #define TAG_MBOOT 'oobM' 59 - 60 - char reactos_module_strings[64][256]; // Array to hold module names 61 - 62 - /* Load Address of Next Module */ 63 - ULONG_PTR NextModuleBase = 0; 64 - 65 - /* Currently Opened Module */ 66 - PLOADER_MODULE CurrentModule = NULL; 67 - 68 - /* Unrelocated Kernel Base in Virtual Memory */ 69 - ULONG_PTR KernelBase; 70 - 71 - /* Wether PAE is to be used or not */ 72 - BOOLEAN PaeModeEnabled; 73 - 74 - /* Kernel Entrypoint in Physical Memory */ 75 - ULONG_PTR KernelEntryPoint; 76 - 77 - /* Dummy to bring in memmove */ 78 - PVOID memmove_dummy = memmove; 79 - 80 - PLOADER_MODULE 81 - NTAPI 82 - LdrGetModuleObject(PCHAR ModuleName); 83 - 84 - NTSTATUS 85 - NTAPI 86 - LdrPEFixupImports(IN PVOID DllBase, 87 - IN PCHAR DllName); 88 - 89 - VOID PpcInitializeMmu(int max); 90 - 91 - /* FUNCTIONS *****************************************************************/ 92 - 93 - /*++ 94 - * FrLdrStartup 95 - * INTERNAL 96 - * 97 - * Prepares the system for loading the Kernel. 98 - * 99 - * Params: 100 - * Magic - Multiboot Magic 101 - * 102 - * Returns: 103 - * None. 104 - * 105 - * Remarks: 106 - * None. 107 - * 108 - *--*/ 109 - 110 - typedef void (*KernelEntryFn)( void * ); 111 - 112 - int MmuPageMiss(int trapCode, ppc_trap_frame_t *trap) 113 - { 114 - int i; 115 - printf("TRAP %x\n", trapCode); 116 - for( i = 0; i < 40; i++ ) 117 - printf("r[%d] %x\n", i, trap->gpr[i]); 118 - printf("HALT!\n"); 119 - while(1); 120 - } 121 - 122 - typedef struct _ppc_map_set_t { 123 - int mapsize; 124 - int usecount; 125 - ppc_map_info_t *info; 126 - } ppc_map_set_t; 127 - 128 - extern int mmu_handle; 129 - paddr_t MmuTranslate(paddr_t possibly_virtual) 130 - { 131 - if (ofproxy) 132 - { 133 - /* Openfirmware takes liberties with boot-time memory. 134 - * if you're in a unitary kernel, it's not as difficult, but since 135 - * we rely on loading things into virtual space from here, we need 136 - * to detect the mappings so far. 137 - */ 138 - int args[2]; 139 - args[0] = possibly_virtual; 140 - args[1] = 1; /* Marker to tell we want a physical addr */ 141 - return (paddr_t)ofw_callmethod_ret("translate", mmu_handle, 2, args, 3); 142 - } 143 - else 144 - { 145 - /* Other booters don't remap ram */ 146 - return possibly_virtual; 147 - } 148 - } 149 - 150 - VOID 151 - NTAPI 152 - FrLdrAddPageMapping(ppc_map_set_t *set, int proc, paddr_t phys, vaddr_t virt) 153 - { 154 - int j; 155 - paddr_t page = ROUND_DOWN(phys, (1<<PFN_SHIFT)); 156 - 157 - if (virt == 0) 158 - virt = ROUND_DOWN(page, (1<<PFN_SHIFT)); 159 - else 160 - virt = ROUND_DOWN(virt, (1<<PFN_SHIFT)); 161 - 162 - page = MmuTranslate(page); 163 - 164 - //printf("Mapping virt [%x] to phys [%x (from) %x]\n", virt, page, phys); 165 - 166 - for( j = 0; j < set->usecount; j++ ) 167 - { 168 - if(set->info[j].addr == page) return; 169 - } 170 - 171 - if (!set->mapsize) 172 - { 173 - set->mapsize = 0x80; 174 - set->info = MmAllocateMemory(0x80 * sizeof(*set->info)); 175 - } 176 - else if (set->mapsize <= set->usecount) 177 - { 178 - ppc_map_info_t *newinfo = MmAllocateMemory(set->mapsize * 2 * sizeof(*set->info)); 179 - memcpy(newinfo, set->info, set->mapsize * sizeof(*set->info)); 180 - MmFreeMemory(set->info); 181 - set->info = newinfo; 182 - set->mapsize *= 2; 183 - } 184 - 185 - set->info[set->usecount].flags = MMU_ALL_RW; 186 - set->info[set->usecount].proc = proc; 187 - set->info[set->usecount].addr = virt; 188 - set->info[set->usecount].phys = page; 189 - set->usecount++; 190 - } 191 - 192 - extern int _start[], _end[]; 193 - 194 - VOID 195 - NTAPI 196 - FrLdrStartup(ULONG Magic) 197 - { 198 - ULONG_PTR i, tmp, OldModCount = 0; 199 - PCHAR ModHeader; 200 - CHAR ModulesTreated[64] = { 0 }; 201 - ULONG NumberOfEntries = 0, UsedEntries = 0; 202 - PPAGE_LOOKUP_TABLE_ITEM FreeLdrMap = MmGetMemoryMap(&NumberOfEntries); 203 - ppc_map_set_t memmap = { }; 204 - 205 - printf("FrLdrStartup\n"); 206 - 207 - /* Disable EE */ 208 - __asm__("mfmsr %0" : "=r" (tmp)); 209 - tmp &= 0x7fff; 210 - __asm__("mtmsr %0" : : "r" (tmp)); 211 - 212 - while(OldModCount != LoaderBlock.ModsCount) 213 - { 214 - printf("Added %d modules last pass\n", 215 - LoaderBlock.ModsCount - OldModCount); 216 - 217 - OldModCount = LoaderBlock.ModsCount; 218 - 219 - for(i = 0; i < LoaderBlock.ModsCount; i++) 220 - { 221 - if (!ModulesTreated[i]) 222 - { 223 - ModulesTreated[i] = 1; 224 - ModHeader = ((PCHAR)reactos_modules[i].ModStart); 225 - if(ModHeader[0] == 'M' && ModHeader[1] == 'Z') 226 - LdrPEFixupImports 227 - ((PVOID)reactos_modules[i].ModStart, 228 - (PCHAR)reactos_modules[i].String); 229 - } 230 - } 231 - } 232 - 233 - printf("Starting mmu\n"); 234 - 235 - PpcInitializeMmu(0); 236 - 237 - printf("Allocating vsid 0 (kernel)\n"); 238 - MmuAllocVsid(0, 0xff00); 239 - 240 - /* We'll use vsid 1 for freeldr (expendable) */ 241 - printf("Allocating vsid 1 (freeldr)\n"); 242 - MmuAllocVsid(1, 0xff); 243 - 244 - printf("Mapping Freeldr Code (%x-%x)\n", _start, _end); 245 - 246 - /* Map memory zones */ 247 - /* Freeldr itself */ 248 - for( i = (int)_start; 249 - i < (int)_end; 250 - i += (1<<PFN_SHIFT) ) { 251 - FrLdrAddPageMapping(&memmap, 1, i, 0); 252 - } 253 - 254 - printf("KernelBase %x\n", KernelBase); 255 - 256 - /* Heap pages -- this gets the entire freeldr heap */ 257 - for( i = 0; i < NumberOfEntries; i++ ) { 258 - tmp = i<<PFN_SHIFT; 259 - if (FreeLdrMap[i].PageAllocated == LoaderSystemCode) { 260 - UsedEntries++; 261 - if (tmp >= (ULONG)KernelMemory && 262 - tmp < (ULONG)KernelMemory + KernelMemorySize) { 263 - FrLdrAddPageMapping(&memmap, 0, tmp, KernelBase + tmp - (ULONG)KernelMemory); 264 - } else { 265 - FrLdrAddPageMapping(&memmap, 1, tmp, 0); 266 - } 267 - } 268 - } 269 - 270 - MmuMapPage(memmap.info, memmap.usecount); 271 - 272 - printf("Finished Mapping the Freeldr Heap (used %d pages)\n", UsedEntries); 273 - 274 - printf("Setting initial segments\n"); 275 - MmuSetVsid(0, 8, 1); 276 - MmuSetVsid(8, 16, 0); 277 - 278 - printf("Segments set!\n"); 279 - 280 - MmuTurnOn((KernelEntryFn)KernelEntryPoint, &LoaderBlock); 281 - 282 - /* Nothing more */ 283 - while(1); 284 - } 285 - 286 - /*++ 287 - * FrLdrSetupPae 288 - * INTERNAL 289 - * 290 - * Configures PAE on a MP System, and sets the PDBR if it's supported, or if 291 - * the system is UP. 292 - * 293 - * Params: 294 - * Magic - Multiboot Magic 295 - * 296 - * Returns: 297 - * None. 298 - * 299 - * Remarks: 300 - * None. 301 - * 302 - *--*/ 303 - VOID 304 - FASTCALL 305 - FrLdrSetupPae(ULONG Magic) 306 - { 307 - } 308 - 309 - /*++ 310 - * FrLdrGetKernelBase 311 - * INTERNAL 312 - * 313 - * Gets the Kernel Base to use. 314 - * 315 - * Params: 316 - * 317 - * Returns: 318 - * None. 319 - * 320 - * Remarks: 321 - * Sets both the FreeLdr internal variable as well as the one which 322 - * will be used by the Kernel. 323 - * 324 - *--*/ 325 - VOID 326 - FASTCALL 327 - FrLdrGetKernelBase(VOID) 328 - { 329 - PCHAR p; 330 - 331 - /* Default kernel base at 2GB */ 332 - KernelBase = 0x80800000; 333 - 334 - /* Set KernelBase */ 335 - LoaderBlock.KernelBase = 0x80000000; 336 - 337 - /* Read Command Line */ 338 - p = (PCHAR)LoaderBlock.CommandLine; 339 - while ((p = strchr(p, '/')) != NULL) { 340 - 341 - /* Find "/3GB" */ 342 - if (!_strnicmp(p + 1, "3GB", 3)) { 343 - 344 - /* Make sure there's nothing following it */ 345 - if (p[4] == ' ' || p[4] == 0) { 346 - 347 - /* Use 3GB */ 348 - KernelBase = 0xE0000000; 349 - LoaderBlock.KernelBase = 0xC0000000; 350 - } 351 - } 352 - 353 - p++; 354 - } 355 - } 356 - 357 - /*++ 358 - * FrLdrGetPaeMode 359 - * INTERNAL 360 - * 361 - * Determines whether PAE mode should be enabled or not. 362 - * 363 - * Params: 364 - * None. 365 - * 366 - * Returns: 367 - * None. 368 - * 369 - * Remarks: 370 - * None. 371 - * 372 - *--*/ 373 - VOID 374 - FASTCALL 375 - FrLdrGetPaeMode(VOID) 376 - { 377 - } 378 - 379 - /*++ 380 - * FrLdrSetupPageDirectory 381 - * INTERNAL 382 - * 383 - * Sets up the ReactOS Startup Page Directory. 384 - * 385 - * Params: 386 - * None. 387 - * 388 - * Returns: 389 - * None. 390 - * 391 - * Remarks: 392 - * We are setting PDEs, but using the equivalent (for our purpose) PTE structure. 393 - * As such, please note that PageFrameNumber == PageEntryNumber. 394 - * 395 - *--*/ 396 - VOID 397 - FASTCALL 398 - FrLdrSetupPageDirectory(VOID) 399 - { 400 - } 401 - 402 - /*++ 403 - * FrLdrMapModule 404 - * INTERNAL 405 - * 406 - * Loads the indicated elf image as PE. The target will appear to be 407 - * a PE image whose ImageBase has ever been KernelAddr. 408 - * 409 - * Params: 410 - * Image -- File to load 411 - * ImageName -- Name of image for the modules list 412 - * MemLoadAddr -- Freeldr address of module 413 - * KernelAddr -- Kernel address of module 414 - *--*/ 415 - #define ELF_SECTION(n) ((Elf32_Shdr*)(sptr + (n * shsize))) 416 - #define COFF_FIRST_SECTION(h) ((PIMAGE_SECTION_HEADER) ((DWORD)h+FIELD_OFFSET(IMAGE_NT_HEADERS,OptionalHeader)+(SWAPW(((PIMAGE_NT_HEADERS)(h))->FileHeader.SizeOfOptionalHeader)))) 417 - 418 - BOOLEAN 419 - NTAPI 420 - FrLdrMapModule(FILE *KernelImage, PCHAR ImageName, PCHAR MemLoadAddr, ULONG KernelAddr) 421 - { 422 - PIMAGE_DOS_HEADER ImageHeader = 0; 423 - PIMAGE_NT_HEADERS NtHeader = 0; 424 - PIMAGE_SECTION_HEADER Section; 425 - ULONG SectionCount; 426 - ULONG ImageSize; 427 - INT i, j; 428 - PLOADER_MODULE ModuleData; 429 - //int phsize, phnum; 430 - int shsize, shnum, relsize, SectionAddr = 0; 431 - PCHAR sptr; 432 - Elf32_Ehdr ehdr; 433 - Elf32_Shdr *shdr; 434 - LARGE_INTEGER Position; 435 - PSTR TempName; 436 - 437 - TempName = strrchr(ImageName, '\\'); 438 - if(TempName) TempName++; else TempName = (PSTR)ImageName; 439 - ModuleData = LdrGetModuleObject(TempName); 440 - 441 - if(ModuleData) 442 - { 443 - return TRUE; 444 - } 445 - 446 - if(!KernelAddr) 447 - KernelAddr = (ULONG)NextModuleBase - (ULONG)KernelMemory + KernelBase; 448 - if(!MemLoadAddr) 449 - MemLoadAddr = (PCHAR)NextModuleBase; 450 - 451 - ModuleData = &reactos_modules[LoaderBlock.ModsCount]; 452 - //printf("Loading file (elf at %x)\n", KernelAddr); 453 - 454 - /* Load the first 1024 bytes of the kernel image so we can read the PE header */ 455 - if (ArcRead(KernelImage, &ehdr, sizeof(ehdr), NULL) != ESUCCESS) { 456 - 457 - /* Fail if we couldn't read */ 458 - printf("Couldn't read the elf header\n"); 459 - return FALSE; 460 - } 461 - 462 - /* Start by getting elf headers */ 463 - //phsize = ehdr.e_phentsize; 464 - //phnum = ehdr.e_phnum; 465 - shsize = ehdr.e_shentsize; 466 - shnum = ehdr.e_shnum; 467 - sptr = (PCHAR)FrLdrTempAlloc(shnum * shsize, TAG_MBOOT); 468 - 469 - /* Read section headers */ 470 - Position.QuadPart = ehdr.e_shoff; 471 - ArcSeek(KernelImage, &Position, SeekAbsolute); 472 - ArcRead(KernelImage, sptr, shsize * shnum, NULL); 473 - 474 - /* Now we'll get the PE Header */ 475 - for( i = 0; i < shnum; i++ ) 476 - { 477 - shdr = ELF_SECTION(i); 478 - shdr->sh_addr = 0; 479 - 480 - /* Find the PE Header */ 481 - if (shdr->sh_type == TYPE_PEHEADER) 482 - { 483 - Position.QuadPart = shdr->sh_offset; 484 - ArcSeek(KernelImage, &Position, SeekAbsolute); 485 - ArcRead(KernelImage, MemLoadAddr, shdr->sh_size, NULL); 486 - ImageHeader = (PIMAGE_DOS_HEADER)MemLoadAddr; 487 - NtHeader = (PIMAGE_NT_HEADERS)((PCHAR)MemLoadAddr + SWAPD(ImageHeader->e_lfanew)); 488 - #if 0 489 - printf("NtHeader at %x\n", SWAPD(ImageHeader->e_lfanew)); 490 - printf("SectionAlignment %x\n", 491 - SWAPD(NtHeader->OptionalHeader.SectionAlignment)); 492 - SectionAddr = ROUND_UP 493 - (shdr->sh_size, SWAPD(NtHeader->OptionalHeader.SectionAlignment)); 494 - printf("Header ends at %x\n", SectionAddr); 495 - #endif 496 - break; 497 - } 498 - } 499 - 500 - if(i == shnum) 501 - { 502 - printf("No peheader section encountered :-(\n"); 503 - return 0; 504 - } 505 - #if 0 506 - else 507 - { 508 - printf("DOS SIG: %s\n", (PCHAR)MemLoadAddr); 509 - } 510 - #endif 511 - 512 - /* Save the Image Base */ 513 - NtHeader->OptionalHeader.ImageBase = SWAPD(KernelAddr); 514 - 515 - /* Load the file image */ 516 - Section = COFF_FIRST_SECTION(NtHeader); 517 - SectionCount = SWAPW(NtHeader->FileHeader.NumberOfSections); 518 - 519 - /* Walk each section */ 520 - for (i=0; i < SectionCount; i++, Section++) 521 - { 522 - shdr = ELF_SECTION((SWAPD(Section->PointerToRawData)+1)); 523 - 524 - shdr->sh_addr = SectionAddr = SWAPD(Section->VirtualAddress); 525 - shdr->sh_addr += KernelAddr; 526 - 527 - Section->PointerToRawData = SWAPD((Section->VirtualAddress - KernelAddr)); 528 - 529 - if (shdr->sh_type != SHT_NOBITS) 530 - { 531 - /* Content area */ 532 - printf("Loading section %d at %x (real: %x:%d)\n", i, KernelAddr + SectionAddr, MemLoadAddr+SectionAddr, shdr->sh_size); 533 - Position.QuadPart = shdr->sh_offset; 534 - ArcSeek(KernelImage, &Position, SeekAbsolute); 535 - ArcRead(KernelImage, MemLoadAddr + SectionAddr, shdr->sh_size, NULL); 536 - } 537 - else 538 - { 539 - /* Zero it out */ 540 - printf("BSS section %d at %x\n", i, KernelAddr + SectionAddr); 541 - memset(MemLoadAddr + SectionAddr, 0, 542 - ROUND_UP(shdr->sh_size, 543 - SWAPD(NtHeader->OptionalHeader.SectionAlignment))); 544 - } 545 - } 546 - 547 - ImageSize = SWAPD(NtHeader->OptionalHeader.SizeOfImage); 548 - printf("Total image size is %x\n", ImageSize); 549 - 550 - /* Handle relocation sections */ 551 - for (i = 0; i < shnum; i++) { 552 - Elf32_Rela reloc = { }; 553 - ULONG *Target32; 554 - USHORT *Target16; 555 - int numreloc, relstart, targetSection; 556 - Elf32_Sym symbol; 557 - PCHAR RelocSection, SymbolSection; 558 - 559 - shdr = ELF_SECTION(i); 560 - /* Only relocs here */ 561 - if((shdr->sh_type != SHT_REL) && 562 - (shdr->sh_type != SHT_RELA)) continue; 563 - 564 - relstart = shdr->sh_offset; 565 - relsize = shdr->sh_type == SHT_RELA ? 12 : 8; 566 - numreloc = shdr->sh_size / relsize; 567 - targetSection = shdr->sh_info; 568 - 569 - if (!ELF_SECTION(targetSection)->sh_addr) continue; 570 - 571 - RelocSection = FrLdrTempAlloc(shdr->sh_size, TAG_MBOOT); 572 - Position.QuadPart = relstart; 573 - ArcSeek(KernelImage, &Position, SeekAbsolute); 574 - ArcRead(KernelImage, RelocSection, shdr->sh_size, NULL); 575 - 576 - /* Get the symbol section */ 577 - shdr = ELF_SECTION(shdr->sh_link); 578 - 579 - SymbolSection = FrLdrTempAlloc(shdr->sh_size, TAG_MBOOT); 580 - Position.QuadPart = shdr->sh_offset; 581 - ArcSeek(KernelImage, &Position, SeekAbsolute); 582 - ArcRead(KernelImage, SymbolSection, shdr->sh_size, NULL); 583 - 584 - for(j = 0; j < numreloc; j++) 585 - { 586 - ULONG S,A,P; 587 - 588 - /* Get the reloc */ 589 - memcpy(&reloc, RelocSection + (j * relsize), sizeof(reloc)); 590 - 591 - /* Get the symbol */ 592 - memcpy(&symbol, SymbolSection + (ELF32_R_SYM(reloc.r_info) * sizeof(symbol)), sizeof(symbol)); 593 - 594 - /* Compute addends */ 595 - S = symbol.st_value + ELF_SECTION(symbol.st_shndx)->sh_addr; 596 - A = reloc.r_addend; 597 - P = reloc.r_offset + ELF_SECTION(targetSection)->sh_addr; 598 - 599 - #if 0 600 - printf("Symbol[%d] %d -> %d(%x:%x) -> %x(+%x)@%x\n", 601 - ELF32_R_TYPE(reloc.r_info), 602 - ELF32_R_SYM(reloc.r_info), 603 - symbol.st_shndx, 604 - ELF_SECTION(symbol.st_shndx)->sh_addr, 605 - symbol.st_value, 606 - S, 607 - A, 608 - P); 609 - #endif 610 - 611 - Target32 = (ULONG*)(((PCHAR)MemLoadAddr) + (P - KernelAddr)); 612 - Target16 = (USHORT *)Target32; 613 - 614 - switch (ELF32_R_TYPE(reloc.r_info)) 615 - { 616 - case R_PPC_NONE: 617 - break; 618 - case R_PPC_ADDR32: 619 - *Target32 = S + A; 620 - break; 621 - case R_PPC_REL32: 622 - *Target32 = S + A - P; 623 - break; 624 - case R_PPC_UADDR32: /* Special: Treat as RVA */ 625 - *Target32 = S + A - KernelAddr; 626 - break; 627 - case R_PPC_ADDR24: 628 - *Target32 = (ADDR24_MASK & (S+A)) | (*Target32 & ~ADDR24_MASK); 629 - break; 630 - case R_PPC_REL24: 631 - *Target32 = (ADDR24_MASK & (S+A-P)) | (*Target32 & ~ADDR24_MASK); 632 - break; 633 - case R_PPC_ADDR16_LO: 634 - *Target16 = S + A; 635 - break; 636 - case R_PPC_ADDR16_HA: 637 - *Target16 = (S + A + 0x8000) >> 16; 638 - break; 639 - default: 640 - break; 641 - } 642 - 643 - #if 0 644 - printf("reloc[%d:%x]: (type %x sym %d val %d) off %x add %x (old %x new %x)\n", 645 - j, 646 - ((ULONG)Target32) - ((ULONG)MemLoadAddr), 647 - ELF32_R_TYPE(reloc.r_info), 648 - ELF32_R_SYM(reloc.r_info), 649 - symbol.st_value, 650 - reloc.r_offset, reloc.r_addend, 651 - x, *Target32); 652 - #endif 653 - } 654 - 655 - FrLdrTempFree(SymbolSection, TAG_MBOOT); 656 - FrLdrTempFree(RelocSection, TAG_MBOOT); 657 - } 658 - 659 - FrLdrTempFree(sptr, TAG_MBOOT); 660 - 661 - ModuleData->ModStart = (ULONG)MemLoadAddr; 662 - /* Increase the next Load Base */ 663 - NextModuleBase = ROUND_UP((ULONG)MemLoadAddr + ImageSize, PAGE_SIZE); 664 - ModuleData->ModEnd = NextModuleBase; 665 - ModuleData->String = (ULONG)MmAllocateMemory(strlen(ImageName)+1); 666 - strcpy((PCHAR)ModuleData->String, ImageName); 667 - printf("Module %s (%x-%x) next at %x\n", 668 - ModuleData->String, 669 - ModuleData->ModStart, 670 - ModuleData->ModEnd, 671 - NextModuleBase); 672 - LoaderBlock.ModsCount++; 673 - 674 - /* Return Success */ 675 - return TRUE; 676 - } 677 - 678 - /*++ 679 - * FrLdrMapKernel 680 - * INTERNAL 681 - * 682 - * Maps the Kernel into memory, does PE Section Mapping, initializes the 683 - * uninitialized data sections, and relocates the image. 684 - * 685 - * Params: 686 - * KernelImage - FILE Structure representing the ntoskrnl image file. 687 - * 688 - * Returns: 689 - * TRUE if the Kernel was mapped. 690 - * 691 - * Remarks: 692 - * None. 693 - * 694 - *--*/ 695 - BOOLEAN 696 - NTAPI 697 - FrLdrMapKernel(FILE *KernelImage) 698 - { 699 - /* Get Kernel Base */ 700 - FrLdrGetKernelBase(); 701 - 702 - /* Allocate kernel memory */ 703 - KernelMemory = MmAllocateMemory(KernelMemorySize); 704 - 705 - return FrLdrMapModule(KernelImage, "ntoskrnl.exe", KernelMemory, KernelBase); 706 - } 707 - 708 - ULONG_PTR 709 - NTAPI 710 - FrLdrLoadModule(FILE *ModuleImage, 711 - PCSTR ModuleName, 712 - PULONG ModuleSize) 713 - { 714 - ARC_STATUS Status; 715 - FILEINFORMATION FileInfo; 716 - ULONG LocalModuleSize; 717 - ULONG_PTR ThisModuleBase = NextModuleBase; 718 - PLOADER_MODULE ModuleData; 719 - PSTR NameBuffer; 720 - PSTR TempName; 721 - 722 - /* Get current module data structure and module name string array */ 723 - ModuleData = &reactos_modules[LoaderBlock.ModsCount]; 724 - 725 - /* Get only the Module Name */ 726 - do { 727 - 728 - TempName = strchr(ModuleName, '\\'); 729 - 730 - if(TempName) { 731 - ModuleName = TempName + 1; 732 - } 733 - 734 - } while(TempName); 735 - NameBuffer = reactos_module_strings[LoaderBlock.ModsCount]; 736 - 737 - /* Get Module Size */ 738 - Status = ArcGetFileInformation(ModuleImage, &FileInfo); 739 - if (Status != ESUCCESS || FileInfo.EndingAddress.HighPart != 0) 740 - LocalModuleSize = 0; 741 - else 742 - LocalModuleSize = FileInfo.EndingAddress.LowPart; 743 - 744 - /* Fill out Module Data Structure */ 745 - ModuleData->ModStart = NextModuleBase; 746 - ModuleData->ModEnd = NextModuleBase + LocalModuleSize; 747 - 748 - /* Save name */ 749 - strcpy(NameBuffer, ModuleName); 750 - ModuleData->String = (ULONG_PTR)NameBuffer; 751 - 752 - /* Load the file image */ 753 - ArcRead(ModuleImage, (PVOID)NextModuleBase, LocalModuleSize, NULL); 754 - 755 - /* Move to next memory block and increase Module Count */ 756 - NextModuleBase = ROUND_UP(ModuleData->ModEnd, PAGE_SIZE); 757 - LoaderBlock.ModsCount++; 758 - 759 - /* Return Module Size if required */ 760 - if (ModuleSize != NULL) { 761 - *ModuleSize = LocalModuleSize; 762 - } 763 - 764 - printf("Module %s (%x-%x) next at %x\n", 765 - ModuleData->String, 766 - ModuleData->ModStart, 767 - ModuleData->ModEnd, 768 - NextModuleBase); 769 - 770 - return ThisModuleBase; 771 - } 772 - 773 - PVOID 774 - NTAPI 775 - FrLdrMapImage(IN FILE *Image, IN PCHAR ShortName, IN ULONG ImageType) 776 - { 777 - PVOID Result = NULL; 778 - 779 - printf("Loading image %s (type %d)\n", ShortName, ImageType); 780 - 781 - if (ImageType == 1) 782 - { 783 - if(FrLdrMapKernel(Image)) 784 - Result = (PVOID)KernelMemory; 785 - } 786 - else 787 - { 788 - PVOID ModuleBase = (PVOID)NextModuleBase; 789 - 790 - if(FrLdrMapModule(Image, ShortName, 0, 0)) 791 - Result = ModuleBase; 792 - } 793 - return Result; 794 - } 795 - 796 - ULONG_PTR 797 - NTAPI 798 - FrLdrCreateModule(PCSTR ModuleName) 799 - { 800 - PLOADER_MODULE ModuleData; 801 - PSTR NameBuffer; 802 - 803 - /* Get current module data structure and module name string array */ 804 - ModuleData = &reactos_modules[LoaderBlock.ModsCount]; 805 - NameBuffer = reactos_module_strings[LoaderBlock.ModsCount]; 806 - 807 - /* Set up the structure */ 808 - ModuleData->ModStart = NextModuleBase; 809 - ModuleData->ModEnd = -1; 810 - 811 - /* Copy the name */ 812 - strcpy(NameBuffer, ModuleName); 813 - ModuleData->String = (ULONG_PTR)NameBuffer; 814 - 815 - /* Set the current Module */ 816 - CurrentModule = ModuleData; 817 - 818 - /* Return Module Base Address */ 819 - return(ModuleData->ModStart); 820 - } 821 - 822 - BOOLEAN 823 - NTAPI 824 - FrLdrCloseModule(ULONG_PTR ModuleBase, 825 - ULONG ModuleSize) 826 - { 827 - PLOADER_MODULE ModuleData = CurrentModule; 828 - 829 - /* Make sure a module is opened */ 830 - if (ModuleData) { 831 - 832 - /* Make sure this is the right module and that it hasn't been closed */ 833 - if ((ModuleBase == ModuleData->ModStart) && (ModuleData->ModEnd == MAXULONG_PTR)) { 834 - 835 - /* Close the Module */ 836 - ModuleData->ModEnd = ModuleData->ModStart + ModuleSize; 837 - 838 - /* Set the next Module Base and increase the number of modules */ 839 - NextModuleBase = ROUND_UP(ModuleData->ModEnd, PAGE_SIZE); 840 - LoaderBlock.ModsCount++; 841 - 842 - /* Close the currently opened module */ 843 - CurrentModule = NULL; 844 - 845 - /* Success */ 846 - return(TRUE); 847 - } 848 - } 849 - 850 - /* Failure path */ 851 - return(FALSE); 852 - }
-399
boot/freeldr/freeldr/arch/powerpc/mmu.c
··· 1 - #include <freeldr.h> 2 - #include "ppcmmu/mmu.h" 3 - 4 - inline int GetMSR() { 5 - register int res asm ("r3"); 6 - __asm__("mfmsr 3"); 7 - return res; 8 - } 9 - 10 - inline int GetDEC() { 11 - register int res asm ("r3"); 12 - __asm__("mfdec 3"); 13 - return res; 14 - } 15 - 16 - __asm__("\t.globl GetPhys\n" 17 - "GetPhys:\t\n" 18 - "mflr 0\n\t" 19 - "stwu 0,-16(1)\n\t" 20 - "mfmsr 5\n\t" 21 - "andi. 6,5,0xffef\n\t"/* turn off MSR[DR] */ 22 - "mtmsr 6\n\t" 23 - "isync\n\t" 24 - "sync\n\t" 25 - "lwz 3,0(3)\n\t" /* Get actual value at phys addr r3 */ 26 - "mtmsr 5\n\t" 27 - "isync\n\t" 28 - "sync\n\t" 29 - "lwz 0,0(1)\n\t" 30 - "addi 1,1,16\n\t" 31 - "mtlr 0\n\t" 32 - "blr" 33 - ); 34 - 35 - __asm__("\t.globl GetPhysHalf\n" 36 - "GetPhysHalf:\t\n" 37 - "mflr 0\n\t" 38 - "stwu 0,-16(1)\n\t" 39 - "mfmsr 5\n\t" 40 - "andi. 6,5,0xffef\n\t"/* turn off MSR[DR] */ 41 - "mtmsr 6\n\t" 42 - "isync\n\t" 43 - "sync\n\t" 44 - "lhz 3,0(3)\n\t" /* Get actual value at phys addr r3 */ 45 - "mtmsr 5\n\t" 46 - "isync\n\t" 47 - "sync\n\t" 48 - "lwz 0,0(1)\n\t" 49 - "addi 1,1,16\n\t" 50 - "mtlr 0\n\t" 51 - "blr" 52 - ); 53 - 54 - __asm__("\t.globl GetPhysByte\n" 55 - "GetPhysByte:\t\n" 56 - "mflr 0\n\t" 57 - "stwu 0,-16(1)\n\t" 58 - "mfmsr 5\n\t" 59 - "andi. 6,5,0xffef\n\t"/* turn off MSR[DR] */ 60 - "mtmsr 6\n\t" 61 - "isync\n\t" 62 - "sync\n\t" 63 - "lbz 3,0(3)\n\t" /* Get actual value at phys addr r3 */ 64 - "mtmsr 5\n\t" 65 - "isync\n\t" 66 - "sync\n\t" 67 - "lwz 0,0(1)\n\t" 68 - "addi 1,1,16\n\t" 69 - "mtlr 0\n\t" 70 - "blr" 71 - ); 72 - 73 - __asm__("\t.globl SetPhys\n" 74 - "SetPhys:\t\n" 75 - "mflr 0\n\t" 76 - "stwu 0,-16(1)\n\t" 77 - "mfmsr 5\n\t" 78 - "andi. 6,5,0xffef\n\t"/* turn off MSR[DR] */ 79 - "mtmsr 6\n\t" 80 - "sync\n\t" 81 - "eieio\n\t" 82 - "stw 4,0(3)\n\t" /* Set actual value at phys addr r3 */ 83 - "dcbst 0,3\n\t" 84 - "mtmsr 5\n\t" 85 - "sync\n\t" 86 - "eieio\n\t" 87 - "mr 3,4\n\t" 88 - "lwz 0,0(1)\n\t" 89 - "addi 1,1,16\n\t" 90 - "mtlr 0\n\t" 91 - "blr" 92 - ); 93 - 94 - __asm__("\t.globl SetPhysHalf\n" 95 - "SetPhysHalf:\t\n" 96 - "mflr 0\n\t" 97 - "stwu 0,-16(1)\n\t" 98 - "mfmsr 5\n\t" 99 - "andi. 6,5,0xffef\n\t"/* turn off MSR[DR] */ 100 - "mtmsr 6\n\t" 101 - "sync\n\t" 102 - "eieio\n\t" 103 - "sth 4,0(3)\n\t" /* Set actual value at phys addr r3 */ 104 - "dcbst 0,3\n\t" 105 - "mtmsr 5\n\t" 106 - "sync\n\t" 107 - "eieio\n\t" 108 - "mr 3,4\n\t" 109 - "lwz 0,0(1)\n\t" 110 - "addi 1,1,16\n\t" 111 - "mtlr 0\n\t" 112 - "blr" 113 - ); 114 - 115 - __asm__("\t.globl SetPhysByte\n" 116 - "SetPhysByte:\t\n" 117 - "mflr 0\n\t" 118 - "stwu 0,-16(1)\n\t" 119 - "mfmsr 5\n\t" 120 - "andi. 6,5,0xffef\n\t"/* turn off MSR[DR] */ 121 - "mtmsr 6\n\t" 122 - "sync\n\t" 123 - "eieio\n\t" 124 - "stb 4,0(3)\n\t" /* Set actual value at phys addr r3 */ 125 - "dcbst 0,3\n\t" 126 - "mtmsr 5\n\t" 127 - "sync\n\t" 128 - "eieio\n\t" 129 - "mr 3,4\n\t" 130 - "lwz 0,0(1)\n\t" 131 - "addi 1,1,16\n\t" 132 - "mtlr 0\n\t" 133 - "blr" 134 - ); 135 - 136 - inline int GetSR(int n) { 137 - register int res asm ("r3"); 138 - switch( n ) { 139 - case 0: 140 - __asm__("mfsr 3,0"); 141 - break; 142 - case 1: 143 - __asm__("mfsr 3,1"); 144 - break; 145 - case 2: 146 - __asm__("mfsr 3,2"); 147 - break; 148 - case 3: 149 - __asm__("mfsr 3,3"); 150 - break; 151 - case 4: 152 - __asm__("mfsr 3,4"); 153 - break; 154 - case 5: 155 - __asm__("mfsr 3,5"); 156 - break; 157 - case 6: 158 - __asm__("mfsr 3,6"); 159 - break; 160 - case 7: 161 - __asm__("mfsr 3,7"); 162 - break; 163 - case 8: 164 - __asm__("mfsr 3,8"); 165 - break; 166 - case 9: 167 - __asm__("mfsr 3,9"); 168 - break; 169 - case 10: 170 - __asm__("mfsr 3,10"); 171 - break; 172 - case 11: 173 - __asm__("mfsr 3,11"); 174 - break; 175 - case 12: 176 - __asm__("mfsr 3,12"); 177 - break; 178 - case 13: 179 - __asm__("mfsr 3,13"); 180 - break; 181 - case 14: 182 - __asm__("mfsr 3,14"); 183 - break; 184 - case 15: 185 - __asm__("mfsr 3,15"); 186 - break; 187 - } 188 - return res; 189 - } 190 - 191 - inline void GetBat( int bat, int inst, int *batHi, int *batLo ) { 192 - register int bh asm("r3"), bl asm("r4"); 193 - if( inst ) { 194 - switch( bat ) { 195 - case 0: 196 - __asm__("mfibatu 3,0"); 197 - __asm__("mfibatl 4,0"); 198 - break; 199 - case 1: 200 - __asm__("mfibatu 3,1"); 201 - __asm__("mfibatl 4,1"); 202 - break; 203 - case 2: 204 - __asm__("mfibatu 3,2"); 205 - __asm__("mfibatl 4,2"); 206 - break; 207 - case 3: 208 - __asm__("mfibatu 3,3"); 209 - __asm__("mfibatl 4,3"); 210 - break; 211 - } 212 - } else { 213 - switch( bat ) { 214 - case 0: 215 - __asm__("mfdbatu 3,0"); 216 - __asm__("mfdbatl 4,0"); 217 - break; 218 - case 1: 219 - __asm__("mfdbatu 3,1"); 220 - __asm__("mfdbatl 4,1"); 221 - break; 222 - case 2: 223 - __asm__("mfdbatu 3,2"); 224 - __asm__("mfdbatl 4,2"); 225 - break; 226 - case 3: 227 - __asm__("mfdbatu 3,3"); 228 - __asm__("mfdbatl 4,3"); 229 - break; 230 - } 231 - } 232 - *batHi = bh; 233 - *batLo = bl; 234 - } 235 - 236 - inline void SetBat( int bat, int inst, int batHi, int batLo ) { 237 - register int bh asm("r3"), bl asm("r4"); 238 - bh = batHi; 239 - bl = batLo; 240 - if( inst ) { 241 - switch( bat ) { 242 - case 0: 243 - __asm__("mtibatu 0,3"); 244 - __asm__("mtibatl 0,4"); 245 - break; 246 - case 1: 247 - __asm__("mtibatu 1,3"); 248 - __asm__("mtibatl 1,4"); 249 - break; 250 - case 2: 251 - __asm__("mtibatu 2,3"); 252 - __asm__("mtibatl 2,4"); 253 - break; 254 - case 3: 255 - __asm__("mtibatu 3,3"); 256 - __asm__("mtibatl 3,4"); 257 - break; 258 - } 259 - } else { 260 - switch( bat ) { 261 - case 0: 262 - __asm__("mtdbatu 0,3"); 263 - __asm__("mtdbatl 0,4"); 264 - break; 265 - case 1: 266 - __asm__("mtdbatu 1,3"); 267 - __asm__("mtdbatl 1,4"); 268 - break; 269 - case 2: 270 - __asm__("mtdbatu 2,3"); 271 - __asm__("mtdbatl 2,4"); 272 - break; 273 - case 3: 274 - __asm__("mtdbatu 3,3"); 275 - __asm__("mtdbatl 3,4"); 276 - break; 277 - } 278 - } 279 - __asm__("isync\n\tsync"); 280 - } 281 - 282 - inline int GetSDR1() { 283 - register int res asm("r3"); 284 - __asm__("mfsdr1 3"); 285 - return res; 286 - } 287 - 288 - inline void SetSDR1( int sdr ) { 289 - #if 0 290 - int i,j; 291 - #endif 292 - __asm__("mtsdr1 3"); 293 - #if 0 294 - __asm__("sync"); 295 - __asm__("isync"); 296 - __asm__("ptesync"); 297 - 298 - for( i = 0; i < 256; i++ ) { 299 - j = i << 12; 300 - __asm__("tlbie %0,0" : : "r" (j)); 301 - } 302 - __asm__("eieio"); 303 - __asm__("tlbsync"); 304 - __asm__("ptesync"); 305 - #endif 306 - } 307 - 308 - inline int BatHit( int bath, int batl, int virt ) { 309 - int mask = 0xfffe0000 & ~((batl & 0x3f) << 17); 310 - return (batl & 0x40) && ((virt & mask) == (bath & mask)); 311 - } 312 - 313 - inline int BatTranslate( int bath, int batl, int virt ) { 314 - return (virt & 0x007fffff) | (batl & 0xfffe0000); 315 - } 316 - 317 - /* translate address */ 318 - int PpcVirt2phys( int virt, int inst ) { 319 - int msr = GetMSR(); 320 - int txmask = inst ? 0x20 : 0x10; 321 - int i, bath, batl, sr, sdr1, physbase, valo; 322 - int hash, hashmask, ptehi, ptelo, ptegaddr; 323 - //int vahi, npteg; 324 - int vsid, pteh, ptevsid, pteapi; 325 - 326 - if( msr & txmask ) { 327 - sr = GetSR( virt >> 28 ); 328 - vsid = sr & 0xfffffff; 329 - //vahi = vsid >> 4; 330 - valo = (vsid << 28) | (virt & 0xfffffff); 331 - if( sr & 0x80000000 ) { 332 - return valo; 333 - } 334 - 335 - for( i = 0; i < 4; i++ ) { 336 - GetBat( i, inst, &bath, &batl ); 337 - if( BatHit( bath, batl, virt ) ) { 338 - return BatTranslate( bath, batl, virt ); 339 - } 340 - } 341 - 342 - sdr1 = GetSDR1(); 343 - 344 - physbase = sdr1 & ~0xffff; 345 - hashmask = ((sdr1 & 0x1ff) << 10) | 0x3ff; 346 - hash = (vsid & 0x7ffff) ^ ((valo >> 12) & 0xffff); 347 - //npteg = hashmask + 1; 348 - 349 - for( pteh = 0; pteh < 0x80; pteh += 64, hash ^= 0x7ffff ) { 350 - ptegaddr = ((hashmask & hash) * 64) + physbase; 351 - 352 - for( i = 0; i < 8; i++ ) { 353 - ptehi = GetPhys( ptegaddr + (i * 8) ); 354 - ptelo = GetPhys( ptegaddr + (i * 8) + 4 ); 355 - 356 - ptevsid = (ptehi >> 7) & 0xffffff; 357 - pteapi = ptehi & 0x3f; 358 - 359 - if( (ptehi & 64) != pteh ) continue; 360 - if( ptevsid != (vsid & 0xffffff) ) continue; 361 - if( pteapi != ((virt >> 22) & 0x3f) ) continue; 362 - 363 - return (ptelo & 0xfffff000) | (virt & 0xfff); 364 - } 365 - } 366 - return -1; 367 - } else { 368 - return virt; 369 - } 370 - } 371 - 372 - /* Add a new page table entry for the indicated mapping */ 373 - BOOLEAN InsertPageEntry( int virt, int phys, int slot, int _sdr1 ) { 374 - int i, ptehi, ptelo; 375 - int sdr1 = _sdr1 ? _sdr1 : GetSDR1(); 376 - int sr = GetSR( (virt >> 28) & 0xf ); 377 - int vsid = sr & 0xfffffff; 378 - int physbase = sdr1 & ~0xffff; 379 - int hashmask = ((sdr1 & 0x1ff) << 10) | 0x3ff; 380 - int valo = (vsid << 28) | (virt & 0xfffffff); 381 - int hash = (vsid & 0x7ffff) ^ ((valo >> 12) & 0xffff); 382 - int ptegaddr = ((hashmask & hash) * 64) + physbase; 383 - 384 - for( i = 0; i < 8; i++ ) { 385 - ptehi = GetPhys( ptegaddr + (i * 8) ); 386 - 387 - if( (slot != i) && (ptehi & 0x80000000) ) continue; 388 - 389 - ptehi = (1 << 31) | (vsid << 7) | ((virt >> 22) & 0x3f); 390 - ptelo = phys & ~0xfff; 391 - 392 - SetPhys( ptegaddr + (i * 8), ptehi ); 393 - SetPhys( ptegaddr + (i * 8) + 4, ptelo ); 394 - 395 - return TRUE; 396 - } 397 - 398 - return FALSE; 399 - }
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boot/freeldr/freeldr/arch/powerpc/ofw_method.c
··· 1 - #include <freeldr.h> 2 - #include "of.h" 3 - 4 - typedef struct _ofw_method_call { 5 - const char *call_method; 6 - int nargs; 7 - int nrets; 8 - const char *method_name; 9 - int handle; 10 - int args_rets[8]; 11 - } ofw_method_call; 12 - 13 - extern int (*ofw_call_addr)(void *argstruct); 14 - 15 - int ofw_callmethod_ret(const char *method, int handle, int nargs, int *args, int ret) 16 - { 17 - ofw_method_call callframe = { 0 }; 18 - callframe.call_method = "call-method"; 19 - callframe.nargs = nargs + 2; 20 - callframe.nrets = ret+1; 21 - callframe.method_name = method; 22 - callframe.handle = handle; 23 - memcpy(callframe.args_rets, args, sizeof(int)*nargs); 24 - ofw_call_addr(&callframe); 25 - return callframe.args_rets[nargs+ret]; 26 - }
-48
boot/freeldr/freeldr/arch/powerpc/ofw_util.s
··· 1 - .section .text 2 - .globl ofw_functions 3 - .globl ofw_call_addr 4 - .globl call_ofw 5 - call_ofw: 6 - /* R3 has the function offset to call (n * 4) 7 - * Other arg registers are unchanged. */ 8 - subi %r1,%r1,0x100 9 - stw %r8,24(%r1) 10 - mflr %r8 11 - stw %r8,0(%r1) 12 - stw %r3,4(%r1) 13 - stw %r4,8(%r1) 14 - stw %r5,12(%r1) 15 - stw %r6,16(%r1) 16 - stw %r7,20(%r1) 17 - stw %r9,28(%r1) 18 - stw %r10,32(%r1) 19 - stw %r20,36(%r1) 20 - 21 - lis %r10,ofw_functions@ha 22 - addi %r8,%r10,ofw_functions@l 23 - add %r8,%r3,%r8 24 - lwz %r9,0(%r8) 25 - mtctr %r9 26 - 27 - mr %r3,%r4 28 - mr %r4,%r5 29 - mr %r5,%r6 30 - mr %r6,%r7 31 - mr %r7,%r8 32 - mr %r8,%r9 33 - 34 - /* Call ofw proxy function */ 35 - bctrl 36 - 37 - lwz %r8,0(%r1) 38 - mtlr %r8 39 - lwz %r4,8(%r1) 40 - lwz %r5,12(%r1) 41 - lwz %r6,16(%r1) 42 - lwz %r7,20(%r1) 43 - lwz %r8,24(%r1) 44 - lwz %r9,28(%r1) 45 - lwz %r10,32(%r1) 46 - lwz %r20,36(%r1) 47 - addi %r1,%r1,0x100 48 - blr
-148
boot/freeldr/freeldr/arch/powerpc/prep.c
··· 1 - #include "freeldr.h" 2 - #include "machine.h" 3 - #include "ppcmmu/mmu.h" 4 - #include "prep.h" 5 - 6 - int prep_serial = 0x800003f8; 7 - extern int mem_range_end; 8 - 9 - void sync() { __asm__("eieio\n\tsync"); } 10 - 11 - /* Simple serial */ 12 - 13 - void PpcPrepPutChar( int ch ) { 14 - if( ch == 0x0a ) { 15 - SetPhysByte(prep_serial, 0x0d); 16 - sync(); 17 - } 18 - SetPhysByte(prep_serial, ch); 19 - sync(); 20 - } 21 - 22 - BOOLEAN PpcPrepDiskReadLogicalSectors 23 - ( ULONG DriveNumber, ULONGLONG SectorNumber, 24 - ULONG SectorCount, PVOID Buffer ) { 25 - int secct; 26 - 27 - for(secct = 0; secct < SectorCount; secct++) 28 - { 29 - ide_seek(&ide1_desc, SectorNumber + secct, 0); 30 - ide_read(&ide1_desc, ((PCHAR)Buffer) + secct * 512, 512); 31 - } 32 - /* Never give up! */ 33 - return TRUE; 34 - } 35 - 36 - BOOLEAN PpcPrepConsKbHit() 37 - { 38 - return 1; 39 - //return GetPhysByte(prep_serial+5) & 1; 40 - } 41 - 42 - int PpcPrepConsGetCh() 43 - { 44 - while(!PpcPrepConsKbHit()); 45 - return GetPhysByte(prep_serial); 46 - } 47 - 48 - void PpcPrepVideoClearScreen(UCHAR Attr) 49 - { 50 - printf("\033c"); 51 - } 52 - 53 - VIDEODISPLAYMODE PpcPrepVideoSetDisplayMode( char *DisplayMode, BOOLEAN Init ) 54 - { 55 - return VideoTextMode; 56 - } 57 - 58 - void PpcPrepVideoGetDisplaySize( PULONG Width, PULONG Height, PULONG Depth ) 59 - { 60 - *Width = 80; 61 - *Height = 25; 62 - *Depth = 16; 63 - } 64 - 65 - VOID PpcInitializeMmu(int max); 66 - 67 - ULONG PpcPrepGetMemoryMap( PBIOS_MEMORY_MAP BiosMemoryMap, 68 - ULONG MaxMemoryMapSize ) 69 - { 70 - // Probe memory 71 - paddr_t physAddr; 72 - register int oldStore = 0, newStore = 0, change = 0, oldmsr; 73 - 74 - __asm__("mfmsr %0\n" : "=r" (oldmsr)); 75 - change = oldmsr & 0x6fff; 76 - __asm__("mtmsr %0\n" : : "r" (change)); 77 - 78 - // Find the last ram address in physical space ... this bypasses mapping 79 - // but could run into non-ram objects right above ram. Usually systems 80 - // aren't designed like that though. 81 - for (physAddr = 0x40000, change = newStore; 82 - (physAddr < 0x80000000) && (change == newStore); 83 - physAddr += 1 << 12) 84 - { 85 - oldStore = GetPhys(physAddr); 86 - newStore = (physAddr & 0x1000) ? 0x55aa55aa : 0xaa55aa55; 87 - SetPhys(physAddr, newStore); 88 - change = GetPhys(physAddr); 89 - SetPhys(physAddr, oldStore); 90 - } 91 - // Back off by one page 92 - physAddr -= 0x1000; 93 - BiosMemoryMap[0].BaseAddress = 0x30000; // End of ppcmmu 94 - BiosMemoryMap[0].Type = BiosMemoryUsable; 95 - BiosMemoryMap[0].Length = physAddr - BiosMemoryMap[0].BaseAddress; 96 - 97 - __asm__("mtmsr %0\n" : : "r" (oldmsr)); 98 - 99 - mem_range_end = physAddr; 100 - 101 - printf("Actual RAM: %d Mb\n", physAddr >> 20); 102 - return 1; 103 - } 104 - 105 - /* Most PReP hardware is in standard locations, based on the corresponding 106 - * hardware on PCs. */ 107 - PCONFIGURATION_COMPONENT_DATA PpcPrepHwDetect() { 108 - PCONFIGURATION_COMPONENT_DATA SystemKey; 109 - 110 - /* Create the 'System' key */ 111 - FldrCreateSystemKey(&SystemKey); 112 - 113 - printf("DetectHardware() Done\n"); 114 - return SystemKey; 115 - } 116 - 117 - VOID 118 - PpcPrepHwIdle(VOID) 119 - { 120 - /* UNIMPLEMENTED */ 121 - } 122 - 123 - void PpcPrepInit() 124 - { 125 - MachVtbl.ConsPutChar = PpcPrepPutChar; 126 - 127 - printf("Serial on\n"); 128 - 129 - ide_setup( &ide1_desc ); 130 - 131 - MachVtbl.DiskReadLogicalSectors = PpcPrepDiskReadLogicalSectors; 132 - 133 - MachVtbl.ConsKbHit = PpcPrepConsKbHit; 134 - MachVtbl.ConsGetCh = PpcPrepConsGetCh; 135 - 136 - MachVtbl.VideoClearScreen = PpcPrepVideoClearScreen; 137 - MachVtbl.VideoSetDisplayMode = PpcPrepVideoSetDisplayMode; 138 - MachVtbl.VideoGetDisplaySize = PpcPrepVideoGetDisplaySize; 139 - 140 - MachVtbl.GetMemoryMap = PpcPrepGetMemoryMap; 141 - MachVtbl.HwDetect = PpcPrepHwDetect; 142 - MachVtbl.HwIdle = PcPrepHwIdle; 143 - 144 - printf( "FreeLDR version [%s]\n", FrLdrVersionString ); 145 - 146 - BootMain( "" ); 147 - } 148 -
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boot/freeldr/freeldr/arch/powerpc/prep.h
··· 1 - #pragma once 2 - 3 - extern struct _pci_desc pci1_desc; 4 - extern struct _idectl_desc ide1_desc; 5 - extern struct _vga_desc vga1_desc; 6 - struct _pci_bar { 7 - unsigned long data; 8 - }; 9 - 10 - void sync( void ); 11 - void PpcPrepInit( void ); 12 - void ide_seek( void *extension, int low, int high ); 13 - int ide_read( void *extension, char *buffer, int bytes ); 14 - void ide_setup( void *extension ); 15 - 16 - void print_bar( struct _pci_bar *bar ); 17 - void pci_setup 18 - ( PCONFIGURATION_COMPONENT_DATA pci_bus, 19 - struct _pci_desc *pci_desc ); 20 - void pci_read_bar 21 - ( struct _pci_desc *pci_desc, 22 - int bus, int dev, int fn, int bar, 23 - struct _pci_bar *bar_data ); 24 - 25 - void vga_setup 26 - ( PCONFIGURATION_COMPONENT_DATA pci_bus, 27 - struct _pci_desc *pci_desc, struct _vga_desc *vga_desc, 28 - int bus, int dev, int fn );
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boot/freeldr/freeldr/arch/powerpc/prep_ide.c
··· 1 - #include "freeldr.h" 2 - #include "machine.h" 3 - #include "ppcmmu/mmu.h" 4 - #include "prep.h" 5 - 6 - #define SWAP_W(x) ((((x) & 0xff) << 8) | (((x) >> 8) & 0xff)) 7 - 8 - typedef struct _idectl_desc { 9 - int port; 10 - long long seekto; 11 - int seek_cylinder, seek_head, seek_sector; 12 - int cylinders, heads, sectors, bytespersec; 13 - } idectl_desc; 14 - 15 - idectl_desc ide1_desc = { 0x800001f0 }; 16 - 17 - void ide_seek( void *extension, int low, int high ) { 18 - idectl_desc *desc = (idectl_desc *)extension; 19 - long long seekto = ((((long long)high) << 32) | (low & 0xffffffff)); 20 - /* order = sector, head, cylinder */ 21 - desc->seek_sector = seekto % desc->sectors; 22 - seekto /= desc->sectors; 23 - desc->seek_head = seekto % desc->heads; 24 - seekto /= desc->heads; 25 - desc->seek_cylinder = seekto; 26 - desc->seekto = seekto; 27 - } 28 - 29 - /* Thanks chuck moore. This is based on the color forth ide code */ 30 - /* Wait for ready */ 31 - void ide_rdy( void *extension ) { 32 - idectl_desc *desc = (idectl_desc *)extension; 33 - while( !(GetPhysByte(desc->port+7) & 0x40) ) sync(); 34 - } 35 - 36 - void ide_drq( void *extension ) { 37 - idectl_desc *desc = (idectl_desc *)extension; 38 - while( !(GetPhysByte(desc->port+7) & 0x08) ) sync(); 39 - } 40 - 41 - void ide_bsy( void *extension ) { 42 - idectl_desc *desc = (idectl_desc *)extension; 43 - while( GetPhysByte(desc->port+7) & 0x80 ) 44 - { 45 - printf("Waiting for not busy\n"); 46 - sync(); 47 - } 48 - } 49 - 50 - int ide_read( void *extension, char *buffer, int bytes ) { 51 - idectl_desc *desc = (idectl_desc *)extension; 52 - short *databuf = (short *)buffer; 53 - int inwords; 54 - 55 - ide_bsy( extension ); 56 - SetPhysByte(desc->port+2, bytes / desc->bytespersec); 57 - SetPhysByte(desc->port+3, desc->seek_sector + 1); 58 - SetPhysByte(desc->port+4, desc->seek_cylinder); 59 - SetPhysByte(desc->port+5, desc->seek_cylinder >> 8); 60 - SetPhysByte(desc->port+6, desc->seek_head | 0xa0); 61 - SetPhysByte(desc->port+7, 0x20); 62 - 63 - for( inwords = 0; inwords < desc->bytespersec / sizeof(short); inwords++ ) { 64 - databuf[inwords] = GetPhysHalf(desc->port); 65 - } 66 - 67 - desc->seekto += desc->bytespersec; 68 - ide_seek( extension, desc->seekto, desc->seekto >> 32 ); 69 - 70 - return bytes - (bytes % desc->bytespersec); 71 - } 72 - 73 - void ide_setup( void *extension ) { 74 - idectl_desc *desc = (idectl_desc *)extension; 75 - short identbuffer[256]; 76 - char namebuf[41]; 77 - short *databuf = (short *)identbuffer, in; 78 - int inwords; 79 - 80 - ide_rdy( extension ); 81 - ide_bsy( extension ); 82 - desc->bytespersec = 512; 83 - SetPhysByte(desc->port+2, 1); 84 - SetPhysByte(desc->port+3, 0); 85 - SetPhysByte(desc->port+4, 0); 86 - SetPhysByte(desc->port+5, 0); 87 - SetPhysByte(desc->port+6, 0); 88 - SetPhysByte(desc->port+7, 0xec); 89 - ide_drq( extension ); 90 - 91 - for( inwords = 0; inwords < desc->bytespersec / sizeof(short); inwords++ ) { 92 - in = GetPhysHalf(desc->port); 93 - databuf[inwords] = SWAP_W(in); 94 - sync(); 95 - } 96 - 97 - desc->cylinders = identbuffer[1]; 98 - desc->heads = identbuffer[3]; 99 - desc->sectors = identbuffer[6]; 100 - 101 - /* Debug: Write out hard disc model */ 102 - 103 - strncpy(namebuf, (char *)(identbuffer+0x1b), 41); 104 - printf("HARD DISC MODEL: %s c,h,s %d,%d,%d\n", 105 - namebuf, desc->cylinders, desc->heads, desc->sectors); 106 - }
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boot/freeldr/freeldr/arch/powerpc/prep_pci.c
··· 1 - #include <freeldr.h> 2 - #include "prep.h" 3 - 4 - typedef struct _pci_cfg { 5 - unsigned long addr; 6 - unsigned long data; 7 - } pci_cfg; 8 - 9 - typedef struct _pci_desc { 10 - pci_cfg *cfg; 11 - } pci_desc; 12 - 13 - pci_desc pci1_desc = { (void *)0x80000cf8 }; 14 - #define rev16(x) ((((x)>>8)&0xff)|(((x)&0xff)<<8)) 15 - #define rev32(x) ((((x)>>24)&0xff)|(((x)>>8)&0xff00)|(((x)&0xff00)<<8)|(((x)&0xff)<<24)) 16 - #define pci_addr(bus,dev,fn,reg) \ 17 - (0x80000000 | \ 18 - ((bus & 0xff) << 16) | \ 19 - ((dev & 0x1f) << 11) | \ 20 - ((fn & 7) << 8) | \ 21 - (reg & 0xfc)) 22 - #if 0 23 - #define pci_cfg_addr(bus,dev,fn,reg) \ 24 - ((bus == 0) ? \ 25 - ((1 << (dev + 16)) | \ 26 - (dev << 11) | \ 27 - (fn << 8) | \ 28 - ((reg & 0xfc) | 1)) : pci_addr(bus,dev,fn,reg)) 29 - #else 30 - #define pci_cfg_addr(bus,dev,fn,reg) pci_addr(bus,dev,fn,reg) 31 - #endif 32 - unsigned long pci_read( pci_desc *desc, int bus, int dev, int fn, int reg, int len ) { 33 - sync(); 34 - unsigned long save_state = desc->cfg->addr, ret = 0; 35 - unsigned long addr = pci_cfg_addr(bus,dev,fn,reg); 36 - unsigned long offset = reg & 3; 37 - desc->cfg->addr = rev32(addr); 38 - sync(); 39 - switch( len ) { 40 - case 4: 41 - ret = desc->cfg->data; 42 - break; 43 - case 2: 44 - ret = desc->cfg->data; 45 - ret = (ret >> (offset << 3)) & 0xffff; 46 - break; 47 - case 1: 48 - ret = desc->cfg->data; 49 - ret = (ret >> (offset << 3)) & 0xff; 50 - break; 51 - } 52 - desc->cfg->addr = save_state; 53 - sync(); 54 - return ret; 55 - } 56 - 57 - void pci_read_bar( pci_desc *desc, int bus, int dev, int fn, int bar, 58 - struct _pci_bar *bar_data ) { 59 - bar_data->data = pci_read( desc, bus, dev, fn, 0x10 + (bar * 4), 4 ); 60 - } 61 - 62 - /* 63 - * Imagine: offset 3, len 1 64 - * let oldval = 0x12345678 and val = 0xabcd1234; 65 - * mask = ((1 << 8) - 1) << 24; // 0xff000000 66 - * oldval = (0x12345678 & 0x00ffffff) | (0xabcd1234 & 0xff000000) = 0xab345678; 67 - */ 68 - void pci_write( pci_desc *desc, int bus, int dev, int fn, int reg, int len, int val ) { 69 - unsigned long save_state = desc->cfg->addr; 70 - unsigned long addr = pci_cfg_addr(bus,dev,fn,reg); 71 - unsigned long offset = reg & 3; 72 - unsigned long oldval = pci_read( desc, bus, dev, fn, reg & ~3, 4 ); 73 - unsigned long mask = ((1 << (len * 8)) - 1) << (offset << 3); 74 - oldval = (oldval & ~mask) | ((val << (offset << 3)) & mask); 75 - desc->cfg->addr = rev32(addr); 76 - sync(); 77 - desc->cfg->data = rev32(oldval); 78 - sync(); 79 - desc->cfg->addr = save_state; 80 - sync(); 81 - } 82 - 83 - void pci_write_bar( pci_desc *desc, int bus, int dev, int fn, int bar, struct _pci_bar *bar_data ) { 84 - pci_write( desc, bus, dev, fn, 0x10 + (bar * 4), 4, bar_data->data ); 85 - } 86 - 87 - void print_bar( struct _pci_bar *bar ) { 88 - printf("BAR: %x\n", bar->data); 89 - } 90 - 91 - #define PCI_VENDORID 0 92 - #define PCI_DEVICEID 2 93 - #define PCI_HEADER_TYPE 0xe 94 - #define PCI_BASECLASS 0xb 95 - 96 - void pci_setup( PCONFIGURATION_COMPONENT_DATA pcibus, pci_desc *desc ) { 97 - unsigned char type; 98 - unsigned short vendor, device, devclass; 99 - int funcs, bus, dev, fn; 100 - 101 - pci1_desc.cfg = (pci_cfg *)0x80000cf8; 102 - 103 - printf("PCI Bus:\n"); 104 - for( bus = 0; bus < 1; bus++ ) { 105 - for( dev = 0; dev < 32; dev++ ) { 106 - type = pci_read(desc,bus,dev,0,PCI_HEADER_TYPE,1); 107 - vendor = pci_read(desc,bus,dev,0,PCI_VENDORID,2); 108 - device = pci_read(desc,bus,dev,0,PCI_DEVICEID,2); 109 - 110 - if(vendor == 0 || vendor == 0xffff) continue; 111 - if(type & 0x80) funcs = 8; else funcs = 1; 112 - 113 - for( fn = 0; fn < funcs; fn++ ) { 114 - devclass = pci_read(desc,bus,dev,fn,PCI_BASECLASS,1); 115 - printf(" %d:%d -> vendor:device:class %x:%x:%x\n", 116 - bus, dev, vendor, device, devclass); 117 - 118 - if( devclass == 3 ) { 119 - printf("Setting up vga...\n"); 120 - vga_setup(pcibus,desc,&vga1_desc,bus,dev,fn); 121 - printf("Done with vga\n"); 122 - } 123 - } 124 - } 125 - } 126 - printf("^-- end PCI\n"); 127 - }
-28
boot/freeldr/freeldr/arch/powerpc/prep_vga.c
··· 1 - #include <freeldr.h> 2 - #include "prep.h" 3 - 4 - struct _vga_desc { 5 - char *port; 6 - char *addr; 7 - }; 8 - 9 - #define VGA_WIDTH 1024 10 - #define VGA_HEIGHT 768 11 - struct _vga_desc vga1_desc = { (char *)0x800003c0 }; 12 - 13 - void vga_setup( PCONFIGURATION_COMPONENT_DATA pcibus, 14 - struct _pci_desc *desc, struct _vga_desc *vga_desc, 15 - int bus, int dev, int fn ) { 16 - struct _pci_bar bar_data; 17 - int i; 18 - 19 - for( i = 0; i < 6; i++ ) { 20 - pci_read_bar( desc, bus, dev, fn, i, &bar_data ); 21 - print_bar( &bar_data ); 22 - if( (bar_data.data > 0x10000) || ((bar_data.data&1) == 1) ) { 23 - vga_desc->addr = (char *)(0xc0000000 + (bar_data.data & ~0x7ff)); 24 - // BootInfo.dispDeviceBase = vga_desc->addr; 25 - break; 26 - } 27 - } 28 - }
-37
boot/freeldr/freeldr/include/arch/powerpc/hardware.h
··· 1 - /* 2 - * FreeLoader 3 - * 4 - * Copyright (C) 2003 Eric Kohl 5 - * 6 - * This program is free software; you can redistribute it and/or modify 7 - * it under the terms of the GNU General Public License as published by 8 - * the Free Software Foundation; either version 2 of the License, or 9 - * (at your option) any later version. 10 - * 11 - * This program is distributed in the hope that it will be useful, 12 - * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 - * GNU General Public License for more details. 15 - * 16 - * You should have received a copy of the GNU General Public License along 17 - * with this program; if not, write to the Free Software Foundation, Inc., 18 - * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. 19 - */ 20 - 21 - #pragma once 22 - 23 - #ifndef __REGISTRY_H 24 - #include "../../reactos/registry.h" 25 - #endif 26 - 27 - /* PROTOTYPES ***************************************************************/ 28 - 29 - /* hardware.c */ 30 - 31 - VOID StallExecutionProcessor(ULONG Microseconds); 32 - 33 - VOID HalpCalibrateStallExecution(VOID); 34 - 35 - ULONGLONG RDTSC(VOID); 36 - 37 - /* EOF */
-16
boot/freeldr/freeldr/include/of.h
··· 1 - #pragma once 2 - 3 - #define OF_FAILED 0 4 - #define ERR_NOT_FOUND 0xc0000010 5 - 6 - #include "of_call.h" 7 - #include <string.h> 8 - 9 - typedef int (*of_proxy) 10 - ( int table_off, void *arg1, void *arg2, void *arg3, void *arg4, void *arg5, void *arg6 ); 11 - typedef long jmp_buf[100]; 12 - extern of_proxy ofproxy; 13 - 14 - int setjmp( jmp_buf buf ); 15 - int longjmp( jmp_buf buf, int retval ); 16 - int ofw_callmethod_ret(const char *method, int handle, int nargs, int *args, int ret);
-2
hal/CMakeLists.txt
··· 4 4 add_subdirectory(halx86) 5 5 elseif(ARCH STREQUAL "arm") 6 6 add_subdirectory(halarm) 7 - elseif(ARCH STREQUAL "powerpc") 8 - # add_subdirectory(halppc) 9 7 endif()
-42
hal/halppc/generic/beep.c
··· 1 - /* 2 - * COPYRIGHT: See COPYING in the top level directory 3 - * PROJECT: ReactOS kernel 4 - * FILE: hal/halppc/generic/beep.c 5 - * PURPOSE: Speaker function (it's only one) 6 - * PROGRAMMER: Eric Kohl 7 - * UPDATE HISTORY: 8 - * Created 31/01/99 9 - */ 10 - 11 - /* INCLUDES *****************************************************************/ 12 - 13 - #include <hal.h> 14 - #define NDEBUG 15 - #include <debug.h> 16 - 17 - 18 - /* CONSTANTS *****************************************************************/ 19 - 20 - #define TIMER2 0x42 21 - #define TIMER3 0x43 22 - #define PORT_B 0x61 23 - #define CLOCKFREQ 1193167 24 - 25 - 26 - /* FUNCTIONS *****************************************************************/ 27 - /* 28 - * FUNCTION: Beeps the speaker. 29 - * ARGUMENTS: 30 - * Frequency = If 0, the speaker will be switched off, otherwise 31 - * the speaker beeps with the specified frequency. 32 - */ 33 - 34 - BOOLEAN 35 - NTAPI 36 - HalMakeBeep ( 37 - ULONG Frequency 38 - ) 39 - { 40 - return TRUE; 41 - } 42 -
-356
hal/halppc/generic/bus.c
··· 1 - /* 2 - * PROJECT: ReactOS HAL 3 - * LICENSE: GPL - See COPYING in the top level directory 4 - * FILE: hal/halppc/generic/bus.c 5 - * PURPOSE: Bus Support Routines 6 - * PROGRAMMERS: Alex Ionescu (alex.ionescu@reactos.org) 7 - */ 8 - 9 - /* INCLUDES ******************************************************************/ 10 - 11 - #include <hal.h> 12 - #define NDEBUG 13 - #include <debug.h> 14 - 15 - /* GLOBALS *******************************************************************/ 16 - 17 - ULONG HalpBusType; 18 - 19 - /* PRIVATE FUNCTIONS *********************************************************/ 20 - 21 - VOID 22 - NTAPI 23 - HalpRegisterKdSupportFunctions(VOID) 24 - { 25 - /* Register PCI Device Functions */ 26 - KdSetupPciDeviceForDebugging = HalpSetupPciDeviceForDebugging; 27 - KdReleasePciDeviceforDebugging = HalpReleasePciDeviceForDebugging; 28 - 29 - /* Register memory functions */ 30 - KdMapPhysicalMemory64 = HalpMapPhysicalMemory64; 31 - KdUnmapVirtualAddress = HalpUnmapVirtualAddress; 32 - 33 - /* Register ACPI stub */ 34 - KdCheckPowerButton = HalpCheckPowerButton; 35 - } 36 - 37 - NTSTATUS 38 - NTAPI 39 - HalpAssignSlotResources(IN PUNICODE_STRING RegistryPath, 40 - IN PUNICODE_STRING DriverClassName, 41 - IN PDRIVER_OBJECT DriverObject, 42 - IN PDEVICE_OBJECT DeviceObject, 43 - IN INTERFACE_TYPE BusType, 44 - IN ULONG BusNumber, 45 - IN ULONG SlotNumber, 46 - IN OUT PCM_RESOURCE_LIST *AllocatedResources) 47 - { 48 - BUS_HANDLER BusHandler; 49 - PAGED_CODE(); 50 - 51 - /* Only PCI is supported */ 52 - if (BusType != PCIBus) return STATUS_NOT_IMPLEMENTED; 53 - 54 - /* Setup fake PCI Bus handler */ 55 - RtlCopyMemory(&BusHandler, &HalpFakePciBusHandler, sizeof(BUS_HANDLER)); 56 - BusHandler.BusNumber = BusNumber; 57 - 58 - /* Call the PCI function */ 59 - return HalpAssignPCISlotResources(&BusHandler, 60 - &BusHandler, 61 - RegistryPath, 62 - DriverClassName, 63 - DriverObject, 64 - DeviceObject, 65 - SlotNumber, 66 - AllocatedResources); 67 - } 68 - 69 - BOOLEAN 70 - NTAPI 71 - HalpTranslateBusAddress(IN INTERFACE_TYPE InterfaceType, 72 - IN ULONG BusNumber, 73 - IN PHYSICAL_ADDRESS BusAddress, 74 - IN OUT PULONG AddressSpace, 75 - OUT PPHYSICAL_ADDRESS TranslatedAddress) 76 - { 77 - /* Translation is easy */ 78 - TranslatedAddress->QuadPart = BusAddress.QuadPart; 79 - return TRUE; 80 - } 81 - 82 - ULONG 83 - NTAPI 84 - HalpGetSystemInterruptVector(IN ULONG BusNumber, 85 - IN ULONG BusInterruptLevel, 86 - IN ULONG BusInterruptVector, 87 - OUT PKIRQL Irql, 88 - OUT PKAFFINITY Affinity) 89 - { 90 - ULONG Vector = IRQ2VECTOR(BusInterruptLevel); 91 - *Irql = (KIRQL)VECTOR2IRQL(Vector); 92 - *Affinity = 0xFFFFFFFF; 93 - return Vector; 94 - } 95 - 96 - BOOLEAN 97 - NTAPI 98 - HalpFindBusAddressTranslation(IN PHYSICAL_ADDRESS BusAddress, 99 - IN OUT PULONG AddressSpace, 100 - OUT PPHYSICAL_ADDRESS TranslatedAddress, 101 - IN OUT PULONG_PTR Context, 102 - IN BOOLEAN NextBus) 103 - { 104 - /* Make sure we have a context */ 105 - if (!Context) return FALSE; 106 - 107 - /* If we have data in the context, then this shouldn't be a new lookup */ 108 - if ((*Context != 0) && (NextBus != FALSE)) return FALSE; 109 - 110 - /* Return bus data */ 111 - TranslatedAddress->QuadPart = BusAddress.QuadPart; 112 - 113 - /* Set context value and return success */ 114 - *Context = 1; 115 - return TRUE; 116 - } 117 - 118 - VOID 119 - NTAPI 120 - HalpInitNonBusHandler(VOID) 121 - { 122 - /* These should be written by the PCI driver later, but we give defaults */ 123 - HalPciTranslateBusAddress = HalpTranslateBusAddress; 124 - HalPciAssignSlotResources = HalpAssignSlotResources; 125 - HalFindBusAddressTranslation = HalpFindBusAddressTranslation; 126 - } 127 - 128 - /* PUBLIC FUNCTIONS **********************************************************/ 129 - 130 - /* 131 - * @implemented 132 - */ 133 - NTSTATUS 134 - NTAPI 135 - HalAdjustResourceList(IN PCM_RESOURCE_LIST Resources) 136 - { 137 - /* Deprecated, return success */ 138 - return STATUS_SUCCESS; 139 - } 140 - 141 - /* 142 - * @implemented 143 - */ 144 - NTSTATUS 145 - NTAPI 146 - HalAssignSlotResources(IN PUNICODE_STRING RegistryPath, 147 - IN PUNICODE_STRING DriverClassName, 148 - IN PDRIVER_OBJECT DriverObject, 149 - IN PDEVICE_OBJECT DeviceObject, 150 - IN INTERFACE_TYPE BusType, 151 - IN ULONG BusNumber, 152 - IN ULONG SlotNumber, 153 - IN OUT PCM_RESOURCE_LIST *AllocatedResources) 154 - { 155 - /* Check the bus type */ 156 - if (BusType != PCIBus) 157 - { 158 - /* Call our internal handler */ 159 - return HalpAssignSlotResources(RegistryPath, 160 - DriverClassName, 161 - DriverObject, 162 - DeviceObject, 163 - BusType, 164 - BusNumber, 165 - SlotNumber, 166 - AllocatedResources); 167 - } 168 - else 169 - { 170 - /* Call the PCI registered function */ 171 - return HalPciAssignSlotResources(RegistryPath, 172 - DriverClassName, 173 - DriverObject, 174 - DeviceObject, 175 - PCIBus, 176 - BusNumber, 177 - SlotNumber, 178 - AllocatedResources); 179 - } 180 - } 181 - 182 - /* 183 - * @implemented 184 - */ 185 - ULONG 186 - NTAPI 187 - HalGetBusData(IN BUS_DATA_TYPE BusDataType, 188 - IN ULONG BusNumber, 189 - IN ULONG SlotNumber, 190 - IN PVOID Buffer, 191 - IN ULONG Length) 192 - { 193 - /* Call the extended function */ 194 - return HalGetBusDataByOffset(BusDataType, 195 - BusNumber, 196 - SlotNumber, 197 - Buffer, 198 - 0, 199 - Length); 200 - } 201 - 202 - /* 203 - * @implemented 204 - */ 205 - ULONG 206 - NTAPI 207 - HalGetBusDataByOffset(IN BUS_DATA_TYPE BusDataType, 208 - IN ULONG BusNumber, 209 - IN ULONG SlotNumber, 210 - IN PVOID Buffer, 211 - IN ULONG Offset, 212 - IN ULONG Length) 213 - { 214 - BUS_HANDLER BusHandler; 215 - 216 - /* Look as the bus type */ 217 - if (BusDataType == Cmos) 218 - { 219 - /* Call CMOS Function */ 220 - return HalpGetCmosData(0, SlotNumber, Buffer, Length); 221 - } 222 - else if (BusDataType == EisaConfiguration) 223 - { 224 - /* FIXME: TODO */ 225 - ASSERT(FALSE); 226 - } 227 - else if ((BusDataType == PCIConfiguration) && 228 - (HalpPCIConfigInitialized) && 229 - ((BusNumber >= HalpMinPciBus) && (BusNumber <= HalpMaxPciBus))) 230 - { 231 - /* Setup fake PCI Bus handler */ 232 - RtlCopyMemory(&BusHandler, &HalpFakePciBusHandler, sizeof(BUS_HANDLER)); 233 - BusHandler.BusNumber = BusNumber; 234 - 235 - /* Call PCI function */ 236 - return HalpGetPCIData(&BusHandler, 237 - &BusHandler, 238 - *(PPCI_SLOT_NUMBER)&SlotNumber, 239 - Buffer, 240 - Offset, 241 - Length); 242 - } 243 - 244 - /* Invalid bus */ 245 - return 0; 246 - } 247 - 248 - /* 249 - * @implemented 250 - */ 251 - ULONG 252 - NTAPI 253 - HalGetInterruptVector(IN INTERFACE_TYPE InterfaceType, 254 - IN ULONG BusNumber, 255 - IN ULONG BusInterruptLevel, 256 - IN ULONG BusInterruptVector, 257 - OUT PKIRQL Irql, 258 - OUT PKAFFINITY Affinity) 259 - { 260 - /* Call the system bus translator */ 261 - return HalpGetSystemInterruptVector(BusNumber, 262 - BusInterruptLevel, 263 - BusInterruptVector, 264 - Irql, 265 - Affinity); 266 - } 267 - 268 - /* 269 - * @implemented 270 - */ 271 - ULONG 272 - NTAPI 273 - HalSetBusData(IN BUS_DATA_TYPE BusDataType, 274 - IN ULONG BusNumber, 275 - IN ULONG SlotNumber, 276 - IN PVOID Buffer, 277 - IN ULONG Length) 278 - { 279 - /* Call the extended function */ 280 - return HalSetBusDataByOffset(BusDataType, 281 - BusNumber, 282 - SlotNumber, 283 - Buffer, 284 - 0, 285 - Length); 286 - } 287 - 288 - /* 289 - * @implemented 290 - */ 291 - ULONG 292 - NTAPI 293 - HalSetBusDataByOffset(IN BUS_DATA_TYPE BusDataType, 294 - IN ULONG BusNumber, 295 - IN ULONG SlotNumber, 296 - IN PVOID Buffer, 297 - IN ULONG Offset, 298 - IN ULONG Length) 299 - { 300 - BUS_HANDLER BusHandler; 301 - 302 - /* Look as the bus type */ 303 - if (BusDataType == Cmos) 304 - { 305 - /* Call CMOS Function */ 306 - return HalpSetCmosData(0, SlotNumber, Buffer, Length); 307 - } 308 - else if ((BusDataType == PCIConfiguration) && (HalpPCIConfigInitialized)) 309 - { 310 - /* Setup fake PCI Bus handler */ 311 - RtlCopyMemory(&BusHandler, &HalpFakePciBusHandler, sizeof(BUS_HANDLER)); 312 - BusHandler.BusNumber = BusNumber; 313 - 314 - /* Call PCI function */ 315 - return HalpSetPCIData(&BusHandler, 316 - &BusHandler, 317 - *(PPCI_SLOT_NUMBER)&SlotNumber, 318 - Buffer, 319 - Offset, 320 - Length); 321 - } 322 - 323 - /* Invalid bus */ 324 - return 0; 325 - } 326 - 327 - /* 328 - * @implemented 329 - */ 330 - BOOLEAN 331 - NTAPI 332 - HalTranslateBusAddress(IN INTERFACE_TYPE InterfaceType, 333 - IN ULONG BusNumber, 334 - IN PHYSICAL_ADDRESS BusAddress, 335 - IN OUT PULONG AddressSpace, 336 - OUT PPHYSICAL_ADDRESS TranslatedAddress) 337 - { 338 - /* Look as the bus type */ 339 - if (InterfaceType == PCIBus) 340 - { 341 - /* Call the PCI registered function */ 342 - return HalPciTranslateBusAddress(PCIBus, 343 - BusNumber, 344 - BusAddress, 345 - AddressSpace, 346 - TranslatedAddress); 347 - } 348 - else 349 - { 350 - /* Translation is easy */ 351 - TranslatedAddress->QuadPart = BusAddress.QuadPart; 352 - return TRUE; 353 - } 354 - } 355 - 356 - /* EOF */
-291
hal/halppc/generic/cmos.c
··· 1 - /* 2 - * PROJECT: ReactOS HAL 3 - * LICENSE: GPL - See COPYING in the top level directory 4 - * FILE: hal/halppc/generic/cmos.c 5 - * PURPOSE: CMOS Access Routines (Real Time Clock and LastKnownGood) 6 - * PROGRAMMERS: Alex Ionescu (alex.ionescu@reactos.org) 7 - * Eric Kohl 8 - */ 9 - 10 - /* INCLUDES ******************************************************************/ 11 - 12 - #include <hal.h> 13 - #define NDEBUG 14 - #include <debug.h> 15 - 16 - /* GLOBALS *******************************************************************/ 17 - 18 - KSPIN_LOCK HalpSystemHardwareLock; 19 - 20 - /* PRIVATE FUNCTIONS *********************************************************/ 21 - 22 - UCHAR 23 - FORCEINLINE 24 - HalpReadCmos(IN UCHAR Reg) 25 - { 26 - /* Select the register */ 27 - WRITE_PORT_UCHAR(CMOS_CONTROL_PORT, Reg); 28 - 29 - /* Query the value */ 30 - return READ_PORT_UCHAR(CMOS_DATA_PORT); 31 - } 32 - 33 - VOID 34 - FORCEINLINE 35 - HalpWriteCmos(IN UCHAR Reg, 36 - IN UCHAR Value) 37 - { 38 - /* Select the register */ 39 - WRITE_PORT_UCHAR(CMOS_CONTROL_PORT, Reg); 40 - 41 - /* Write the value */ 42 - WRITE_PORT_UCHAR(CMOS_DATA_PORT, Value); 43 - } 44 - 45 - ULONG 46 - NTAPI 47 - HalpGetCmosData(IN ULONG BusNumber, 48 - IN ULONG SlotNumber, 49 - IN PVOID Buffer, 50 - IN ULONG Length) 51 - { 52 - PUCHAR Ptr = (PUCHAR)Buffer; 53 - ULONG Address = SlotNumber; 54 - ULONG Len = Length; 55 - 56 - /* FIXME: Acquire CMOS Lock */ 57 - 58 - /* Do nothing if we don't have a length */ 59 - if (!Length) return 0; 60 - 61 - /* Check if this is simple CMOS */ 62 - if (!BusNumber) 63 - { 64 - /* Loop the buffer up to 0xFF */ 65 - while ((Len > 0) && (Address < 0x100)) 66 - { 67 - /* Read the data */ 68 - *Ptr = HalpReadCmos((UCHAR)Address); 69 - 70 - /* Update position and length */ 71 - Ptr++; 72 - Address++; 73 - Len--; 74 - } 75 - } 76 - else if (BusNumber == 1) 77 - { 78 - /* Loop the buffer up to 0xFFFF */ 79 - while ((Len > 0) && (Address < 0x10000)) 80 - { 81 - /* Write the data */ 82 - *Ptr = HalpReadCmos((UCHAR)Address); 83 - 84 - /* Update position and length */ 85 - Ptr++; 86 - Address++; 87 - Len--; 88 - } 89 - } 90 - 91 - /* FIXME: Release the CMOS Lock */ 92 - 93 - /* Return length read */ 94 - return Length - Len; 95 - } 96 - 97 - ULONG 98 - NTAPI 99 - HalpSetCmosData(IN ULONG BusNumber, 100 - IN ULONG SlotNumber, 101 - IN PVOID Buffer, 102 - IN ULONG Length) 103 - { 104 - PUCHAR Ptr = (PUCHAR)Buffer; 105 - ULONG Address = SlotNumber; 106 - ULONG Len = Length; 107 - 108 - /* FIXME: Acquire CMOS Lock */ 109 - 110 - /* Do nothing if we don't have a length */ 111 - if (!Length) return 0; 112 - 113 - /* Check if this is simple CMOS */ 114 - if (!BusNumber) 115 - { 116 - /* Loop the buffer up to 0xFF */ 117 - while ((Len > 0) && (Address < 0x100)) 118 - { 119 - /* Write the data */ 120 - HalpWriteCmos((UCHAR)Address, *Ptr); 121 - 122 - /* Update position and length */ 123 - Ptr++; 124 - Address++; 125 - Len--; 126 - } 127 - } 128 - else if (BusNumber == 1) 129 - { 130 - /* Loop the buffer up to 0xFFFF */ 131 - while ((Len > 0) && (Address < 0x10000)) 132 - { 133 - /* Write the data */ 134 - HalpWriteCmos((UCHAR)Address, *Ptr); 135 - 136 - /* Update position and length */ 137 - Ptr++; 138 - Address++; 139 - Len--; 140 - } 141 - } 142 - 143 - /* FIXME: Release the CMOS Lock */ 144 - 145 - /* Return length read */ 146 - return Length - Len; 147 - } 148 - 149 - /* PUBLIC FUNCTIONS **********************************************************/ 150 - 151 - /* 152 - * @implemented 153 - */ 154 - ARC_STATUS 155 - NTAPI 156 - HalGetEnvironmentVariable(IN PCH Name, 157 - IN USHORT ValueLength, 158 - IN PCH Value) 159 - { 160 - UCHAR Val; 161 - 162 - /* Only variable supported on x86 */ 163 - if (_stricmp(Name, "LastKnownGood")) return ENOENT; 164 - 165 - /* FIXME: Acquire CMOS Lock */ 166 - 167 - /* Query the current value */ 168 - Val = HalpReadCmos(RTC_REGISTER_B) & 0x01; 169 - 170 - /* FIXME: Release CMOS lock */ 171 - 172 - /* Check the flag */ 173 - if (Val) 174 - { 175 - /* Return false */ 176 - strncpy(Value, "FALSE", ValueLength); 177 - } 178 - else 179 - { 180 - /* Return true */ 181 - strncpy(Value, "TRUE", ValueLength); 182 - } 183 - 184 - /* Return success */ 185 - return ESUCCESS; 186 - } 187 - 188 - /* 189 - * @implemented 190 - */ 191 - ARC_STATUS 192 - NTAPI 193 - HalSetEnvironmentVariable(IN PCH Name, 194 - IN PCH Value) 195 - { 196 - UCHAR Val; 197 - 198 - /* Only variable supported on x86 */ 199 - if (_stricmp(Name, "LastKnownGood")) return ENOMEM; 200 - 201 - /* Check if this is true or false */ 202 - if (!_stricmp(Value, "TRUE")) 203 - { 204 - /* It's true, acquire CMOS lock (FIXME) */ 205 - 206 - /* Read the current value and add the flag */ 207 - Val = HalpReadCmos(RTC_REGISTER_B) | 1; 208 - } 209 - else if (!_stricmp(Value, "FALSE")) 210 - { 211 - /* It's false, acquire CMOS lock (FIXME) */ 212 - 213 - /* Read the current value and mask out the flag */ 214 - Val = HalpReadCmos(RTC_REGISTER_B) & ~1; 215 - } 216 - else 217 - { 218 - /* Fail */ 219 - return ENOMEM; 220 - } 221 - 222 - /* Write new value */ 223 - HalpWriteCmos(RTC_REGISTER_B, Val); 224 - 225 - /* Release the lock and return success */ 226 - return ESUCCESS; 227 - } 228 - 229 - /* 230 - * @implemented 231 - */ 232 - BOOLEAN 233 - NTAPI 234 - HalQueryRealTimeClock(OUT PTIME_FIELDS Time) 235 - { 236 - /* FIXME: Acquire CMOS Lock */ 237 - 238 - /* Loop while update is in progress */ 239 - while ((HalpReadCmos(RTC_REGISTER_A)) & RTC_REG_A_UIP); 240 - 241 - /* Set the time data */ 242 - Time->Second = BCD_INT(HalpReadCmos(0)); 243 - Time->Minute = BCD_INT(HalpReadCmos(2)); 244 - Time->Hour = BCD_INT(HalpReadCmos(4)); 245 - Time->Weekday = BCD_INT(HalpReadCmos(6)); 246 - Time->Day = BCD_INT(HalpReadCmos(7)); 247 - Time->Month = BCD_INT(HalpReadCmos(8)); 248 - Time->Year = BCD_INT(HalpReadCmos(9)); 249 - Time->Milliseconds = 0; 250 - 251 - /* FIXME: Check century byte */ 252 - 253 - /* Compensate for the century field */ 254 - Time->Year += (Time->Year > 80) ? 1900: 2000; 255 - 256 - /* FIXME: Release CMOS Lock */ 257 - 258 - /* Always return TRUE */ 259 - return TRUE; 260 - } 261 - 262 - /* 263 - * @implemented 264 - */ 265 - BOOLEAN 266 - NTAPI 267 - HalSetRealTimeClock(IN PTIME_FIELDS Time) 268 - { 269 - /* FIXME: Acquire CMOS Lock */ 270 - 271 - /* Loop while update is in progress */ 272 - while ((HalpReadCmos(RTC_REGISTER_A)) & RTC_REG_A_UIP); 273 - 274 - /* Write time fields to CMOS RTC */ 275 - HalpWriteCmos(0, INT_BCD(Time->Second)); 276 - HalpWriteCmos(2, INT_BCD(Time->Minute)); 277 - HalpWriteCmos(4, INT_BCD(Time->Hour)); 278 - HalpWriteCmos(6, INT_BCD(Time->Weekday)); 279 - HalpWriteCmos(7, INT_BCD(Time->Day)); 280 - HalpWriteCmos(8, INT_BCD(Time->Month)); 281 - HalpWriteCmos(9, INT_BCD(Time->Year % 100)); 282 - 283 - /* FIXME: Set the century byte */ 284 - 285 - /* FIXME: Release the CMOS Lock */ 286 - 287 - /* Always return TRUE */ 288 - return TRUE; 289 - } 290 - 291 - /* EOF */
-383
hal/halppc/generic/display.c
··· 1 - /* 2 - * ReactOS kernel 3 - * Copyright (C) 1998, 1999, 2000, 2001, 2002 ReactOS Team 4 - * 5 - * This program is free software; you can redistribute it and/or modify 6 - * it under the terms of the GNU General Public License as published by 7 - * the Free Software Foundation; either version 2 of the License, or 8 - * (at your option) any later version. 9 - * 10 - * This program is distributed in the hope that it will be useful, 11 - * but WITHOUT ANY WARRANTY; without even the implied warranty of 12 - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13 - * GNU General Public License for more details. 14 - * 15 - * You should have received a copy of the GNU General Public License along 16 - * with this program; if not, write to the Free Software Foundation, Inc., 17 - * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. 18 - */ 19 - /* 20 - * COPYRIGHT: See COPYING in the top level directory 21 - * PROJECT: ReactOS kernel 22 - * FILE: hal/halppc/generic/display.c 23 - * PURPOSE: Blue screen display 24 - * PROGRAMMER: Eric Kohl 25 - * UPDATE HISTORY: 26 - * Created 08/10/99 27 - */ 28 - 29 - /* 30 - * Portions of this code are from the XFree86 Project and available from the 31 - * following license: 32 - * 33 - * Copyright (C) 1994-2003 The XFree86 Project, Inc. All Rights Reserved. 34 - * 35 - * Permission is hereby granted, free of charge, to any person obtaining a copy 36 - * of this software and associated documentation files (the "Software"), to 37 - * deal in the Software without restriction, including without limitation the 38 - * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or 39 - * sell copies of the Software, and to permit persons to whom the Software is 40 - * furnished to do so, subject to the following conditions: 41 - * 42 - * The above copyright notice and this permission notice shall be included in 43 - * all copies or substantial portions of the Software. 44 - * 45 - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 46 - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 47 - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE 48 - * XFREE86 PROJECT BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER 49 - * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CON- 50 - * NECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 51 - * 52 - * Except as contained in this notice, the name of the XFree86 Project shall 53 - * not be used in advertising or otherwise to promote the sale, use or other 54 - * dealings in this Software without prior written authorization from the 55 - * XFree86 Project. 56 - */ 57 - 58 - /* DISPLAY OWNERSHIP 59 - * 60 - * So, who owns the physical display and is allowed to write to it? 61 - * 62 - * In MS NT, upon boot HAL owns the display. Somewhere in the boot 63 - * sequence (haven't figured out exactly where or by who), some 64 - * component calls HalAcquireDisplayOwnership. From that moment on, 65 - * the display is owned by that component and is switched to graphics 66 - * mode. The display is not supposed to return to text mode, except 67 - * in case of a bug check. The bug check will call HalDisplayString 68 - * to output a string to the text screen. HAL will notice that it 69 - * currently doesn't own the display and will re-take ownership, by 70 - * calling the callback function passed to HalAcquireDisplayOwnership. 71 - * After the bugcheck, execution is halted. So, under NT, the only 72 - * possible sequence of display modes is text mode -> graphics mode -> 73 - * text mode (the latter hopefully happening very infrequently). 74 - * 75 - * Things are a little bit different in the current state of ReactOS. 76 - * We want to have a functional interactive text mode. We should be 77 - * able to switch from text mode to graphics mode when a GUI app is 78 - * started and switch back to text mode when it's finished. Then, when 79 - * another GUI app is started, another switch to and from graphics mode 80 - * is possible. Also, when the system bugchecks in graphics mode we want 81 - * to switch back to text mode to show the registers and stack trace. 82 - * Last but not least, HalDisplayString is used a lot more in ReactOS, 83 - * e.g. to print debug messages when the /DEBUGPORT=SCREEN boot option 84 - * is present. 85 - * 3 Components are involved in ReactOS: HAL, BLUE.SYS and VIDEOPRT.SYS. 86 - * As in NT, on boot HAL owns the display. When entering the text mode 87 - * command interpreter, BLUE.SYS kicks in. It will write directly to the 88 - * screen, more or less behind HALs back. 89 - * When a GUI app is started, WIN32K.SYS will open the DISPLAY device. 90 - * This open call will end up in VIDEOPRT.SYS. That component will then 91 - * take ownership of the display by calling HalAcquireDisplayOwnership. 92 - * When the GUI app terminates (WIN32K.SYS will close the DISPLAY device), 93 - * we want to give ownership of the display back to HAL. Using the 94 - * standard exported HAL functions, that's a bit of a problem, because 95 - * there is no function defined to do that. In NT, this is handled by 96 - * HalDisplayString, but that solution isn't satisfactory in ReactOS, 97 - * because HalDisplayString is (in some cases) also used to output debug 98 - * messages. If we do it the NT way, the first debug message output while 99 - * in graphics mode would switch the display back to text mode. 100 - * So, instead, if HalDisplayString detects that HAL doesn't have ownership 101 - * of the display, it doesn't do anything. 102 - * To return ownership to HAL, a new function is exported, 103 - * HalReleaseDisplayOwnership. This function is called by the DISPLAY 104 - * device Close routine in VIDEOPRT.SYS. It is also called at the beginning 105 - * of a bug check, so HalDisplayString is activated again. 106 - * Now, while the display is in graphics mode (not owned by HAL), BLUE.SYS 107 - * should also refrain from writing to the screen buffer. The text mode 108 - * screen buffer might overlap the graphics mode screen buffer, so changing 109 - * something in the text mode buffer might mess up the graphics screen. To 110 - * allow BLUE.SYS to detect if HAL owns the display, another new function is 111 - * exported, HalQueryDisplayOwnership. BLUE.SYS will call this function to 112 - * check if it's allowed to touch the text mode buffer. 113 - * 114 - * In an ideal world, when HAL takes ownership of the display, it should set 115 - * up the CRT using real-mode (actually V86 mode, but who cares) INT 0x10 116 - * calls. Unfortunately, this will require HAL to setup a real-mode interrupt 117 - * table etc. So, we chickened out of that by having the loader set up the 118 - * display before switching to protected mode. If HAL is given back ownership 119 - * after a GUI app terminates, the INT 0x10 calls are made by VIDEOPRT.SYS, 120 - * since there is already support for them via the VideoPortInt10 routine. 121 - */ 122 - 123 - #include <hal.h> 124 - #include <ppcboot.h> 125 - #include <ppcdebug.h> 126 - 127 - #define NDEBUG 128 - #include <debug.h> 129 - 130 - boot_infos_t PpcEarlybootInfo; 131 - 132 - #define SCREEN_SYNCHRONIZATION 133 - 134 - /* VARIABLES ****************************************************************/ 135 - 136 - static ULONG CursorX = 0; /* Cursor Position */ 137 - static ULONG CursorY = 0; 138 - static ULONG SizeX = 80; /* Display size */ 139 - static ULONG SizeY = 25; 140 - 141 - static BOOLEAN DisplayInitialized = FALSE; 142 - static BOOLEAN HalOwnsDisplay = TRUE; 143 - static ULONG GraphVideoBuffer = 0; 144 - static PHAL_RESET_DISPLAY_PARAMETERS HalResetDisplayParameters = NULL; 145 - 146 - extern UCHAR XboxFont8x16[]; 147 - extern void SetPhys( ULONG Addr, ULONG Data ); 148 - extern ULONG GetPhys( ULONG Addr ); 149 - extern void SetPhysByte( ULONG Addr, ULONG Data ); 150 - 151 - /* PRIVATE FUNCTIONS *********************************************************/ 152 - 153 - VOID FASTCALL 154 - HalClearDisplay (UCHAR CharAttribute) 155 - { 156 - ULONG i; 157 - ULONG deviceSize = 158 - PpcEarlybootInfo.dispDeviceRowBytes * 159 - PpcEarlybootInfo.dispDeviceRect[3]; 160 - for(i = 0; i < deviceSize; i += sizeof(int) ) 161 - SetPhys(GraphVideoBuffer + i, CharAttribute); 162 - 163 - CursorX = 0; 164 - CursorY = 0; 165 - } 166 - 167 - 168 - /* STATIC FUNCTIONS *********************************************************/ 169 - 170 - VOID STATIC 171 - HalScrollDisplay (VOID) 172 - { 173 - ULONG i, deviceSize = 174 - PpcEarlybootInfo.dispDeviceRowBytes * 175 - PpcEarlybootInfo.dispDeviceRect[3]; 176 - ULONG Dest = (ULONG)GraphVideoBuffer, 177 - Src = (ULONG)(GraphVideoBuffer + (16 * PpcEarlybootInfo.dispDeviceRowBytes)); 178 - ULONG End = (ULONG) 179 - GraphVideoBuffer + 180 - (PpcEarlybootInfo.dispDeviceRowBytes * 181 - (PpcEarlybootInfo.dispDeviceRect[3]-16)); 182 - 183 - while( Src < End ) 184 - { 185 - SetPhys((ULONG)Dest, GetPhys(Src)); 186 - Src += 4; Dest += 4; 187 - } 188 - 189 - /* Clear the bottom row */ 190 - for(i = End; i < deviceSize; i += sizeof(int) ) 191 - SetPhys(GraphVideoBuffer + i, 1); 192 - } 193 - 194 - VOID STATIC FASTCALL 195 - HalPutCharacter (CHAR Character) 196 - { 197 - WRITE_PORT_UCHAR((PVOID)0x3f8, Character); 198 - #if 0 199 - int i,j,k; 200 - ULONG Dest = 201 - (GraphVideoBuffer + 202 - (16 * PpcEarlybootInfo.dispDeviceRowBytes * CursorY) + 203 - (8 * (PpcEarlybootInfo.dispDeviceDepth / 8) * CursorX)), RowDest; 204 - UCHAR ByteToPlace; 205 - 206 - for( i = 0; i < 16; i++ ) { 207 - RowDest = Dest; 208 - for( j = 0; j < 8; j++ ) { 209 - ByteToPlace = ((128 >> j) & (XboxFont8x16[(16 * Character) + i])) ? 0xff : 1; 210 - for( k = 0; k < PpcEarlybootInfo.dispDeviceDepth / 8; k++, RowDest++ ) { 211 - SetPhysByte(RowDest, ByteToPlace); 212 - } 213 - } 214 - Dest += PpcEarlybootInfo.dispDeviceRowBytes; 215 - } 216 - #endif 217 - } 218 - 219 - /* PRIVATE FUNCTIONS ********************************************************/ 220 - 221 - VOID FASTCALL 222 - HalInitializeDisplay (PROS_LOADER_PARAMETER_BLOCK LoaderBlock) 223 - /* 224 - * FUNCTION: Initialize the display 225 - * ARGUMENTS: 226 - * InitParameters = Parameters setup by the boot loader 227 - */ 228 - { 229 - if (! DisplayInitialized) 230 - { 231 - boot_infos_t *XBootInfo = (boot_infos_t *)LoaderBlock->ArchExtra; 232 - GraphVideoBuffer = (ULONG)XBootInfo->dispDeviceBase; 233 - memcpy(&PpcEarlybootInfo, XBootInfo, sizeof(*XBootInfo)); 234 - 235 - /* Set cursor position */ 236 - CursorX = 0; 237 - CursorY = 0; 238 - 239 - SizeX = XBootInfo->dispDeviceRowBytes / XBootInfo->dispDeviceDepth; 240 - SizeY = XBootInfo->dispDeviceRect[3] / 16; 241 - 242 - HalClearDisplay(1); 243 - 244 - DisplayInitialized = TRUE; 245 - } 246 - } 247 - 248 - 249 - /* PUBLIC FUNCTIONS *********************************************************/ 250 - 251 - VOID NTAPI 252 - HalReleaseDisplayOwnership(VOID) 253 - /* 254 - * FUNCTION: Release ownership of display back to HAL 255 - */ 256 - { 257 - if (HalResetDisplayParameters == NULL) 258 - return; 259 - 260 - if (HalOwnsDisplay != FALSE) 261 - return; 262 - 263 - HalOwnsDisplay = TRUE; 264 - HalClearDisplay(0); 265 - } 266 - 267 - 268 - VOID NTAPI 269 - HalAcquireDisplayOwnership(IN PHAL_RESET_DISPLAY_PARAMETERS ResetDisplayParameters) 270 - /* 271 - * FUNCTION: 272 - * ARGUMENTS: 273 - * ResetDisplayParameters = Pointer to a driver specific 274 - * reset routine. 275 - */ 276 - { 277 - HalOwnsDisplay = FALSE; 278 - HalResetDisplayParameters = ResetDisplayParameters; 279 - } 280 - 281 - VOID NTAPI 282 - HalDisplayString(IN PCH String) 283 - /* 284 - * FUNCTION: Switches the screen to HAL console mode (BSOD) if not there 285 - * already and displays a string 286 - * ARGUMENT: 287 - * string = ASCII string to display 288 - * NOTE: Use with care because there is no support for returning from BSOD 289 - * mode 290 - */ 291 - { 292 - PCH pch; 293 - //static KSPIN_LOCK Lock; 294 - KIRQL OldIrql; 295 - BOOLEAN InterruptsEnabled = __readmsr(); 296 - 297 - /* See comment at top of file */ 298 - if (! HalOwnsDisplay || ! DisplayInitialized) 299 - { 300 - return; 301 - } 302 - 303 - pch = String; 304 - 305 - KeRaiseIrql(HIGH_LEVEL, &OldIrql); 306 - //KiAcquireSpinLock(&Lock); 307 - 308 - _disable(); 309 - 310 - while (*pch != 0) 311 - { 312 - if (*pch == '\n') 313 - { 314 - CursorY++; 315 - CursorX = 0; 316 - } 317 - else if (*pch == '\b') 318 - { 319 - if (CursorX > 0) 320 - { 321 - CursorX--; 322 - } 323 - } 324 - else if (*pch != '\r') 325 - { 326 - HalPutCharacter (*pch); 327 - CursorX++; 328 - 329 - if (CursorX >= SizeX) 330 - { 331 - CursorY++; 332 - CursorX = 0; 333 - } 334 - } 335 - 336 - if (CursorY >= SizeY) 337 - { 338 - HalScrollDisplay (); 339 - CursorY = SizeY - 1; 340 - } 341 - 342 - pch++; 343 - } 344 - 345 - __writemsr(InterruptsEnabled); 346 - 347 - //KiReleaseSpinLock(&Lock); 348 - KeLowerIrql(OldIrql); 349 - } 350 - 351 - VOID NTAPI 352 - HalQueryDisplayParameters(OUT PULONG DispSizeX, 353 - OUT PULONG DispSizeY, 354 - OUT PULONG CursorPosX, 355 - OUT PULONG CursorPosY) 356 - { 357 - if (DispSizeX) 358 - *DispSizeX = SizeX; 359 - if (DispSizeY) 360 - *DispSizeY = SizeY; 361 - if (CursorPosX) 362 - *CursorPosX = CursorX; 363 - if (CursorPosY) 364 - *CursorPosY = CursorY; 365 - } 366 - 367 - 368 - VOID NTAPI 369 - HalSetDisplayParameters(IN ULONG CursorPosX, 370 - IN ULONG CursorPosY) 371 - { 372 - CursorX = (CursorPosX < SizeX) ? CursorPosX : SizeX - 1; 373 - CursorY = (CursorPosY < SizeY) ? CursorPosY : SizeY - 1; 374 - } 375 - 376 - 377 - BOOLEAN NTAPI 378 - HalQueryDisplayOwnership(VOID) 379 - { 380 - return !HalOwnsDisplay; 381 - } 382 - 383 - /* EOF */
-2020
hal/halppc/generic/dma.c
··· 1 - /* 2 - * COPYRIGHT: See COPYING in the top level directory 3 - * PROJECT: ReactOS kernel 4 - * FILE: hal/halppc/generic/dma.c 5 - * PURPOSE: DMA functions 6 - * PROGRAMMERS: David Welch (welch@mcmail.com) 7 - * Filip Navara (navaraf@reactos.com) 8 - * UPDATE HISTORY: 9 - * Created 22/05/98 10 - */ 11 - 12 - /** 13 - * @page DMA Implementation Notes 14 - * 15 - * Concepts: 16 - * 17 - * - Map register 18 - * 19 - * Abstract encapsulation of physically contiguous buffer that resides 20 - * in memory accessible by both the DMA device / controller and the system. 21 - * The map registers are allocated and distributed on demand and are 22 - * scarce resource. 23 - * 24 - * The actual use of map registers is to allow transfers from/to buffer 25 - * located in physical memory at address inaccessible by the DMA device / 26 - * controller directly. For such transfers the map register buffers 27 - * are used as intermediate data storage. 28 - * 29 - * - Master adapter 30 - * 31 - * A container for map registers (typically corresponding to one physical 32 - * bus connection type). There can be master adapters for 24-bit address 33 - * ranges, 32-bit address ranges, etc. Every time a new DMA adapter is 34 - * created it's associated with a corresponding master adapter that 35 - * is used for any map register allocation requests. 36 - * 37 - * - Bus-master / Slave DMA 38 - * 39 - * Slave DMA is term used for DMA transfers done by the system (E)ISA 40 - * controller as opposed to transfers mastered by the device itself 41 - * (hence the name). 42 - * 43 - * For slave DMA special care is taken to actually access the system 44 - * controller and handle the transfers. The relevant code is in 45 - * HalpDmaInitializeEisaAdapter, HalReadDmaCounter, IoFlushAdapterBuffers 46 - * and IoMapTransfer. 47 - * 48 - * Implementation: 49 - * 50 - * - Allocation of map registers 51 - * 52 - * Initial set of map registers is allocated on the system start to 53 - * ensure that low memory won't get filled up later. Additional map 54 - * registers are allocated as needed by HalpGrowMapBuffers. This 55 - * routine is called on two places: 56 - * 57 - * - HalGetAdapter, since we're at PASSIVE_LEVEL and it's known that 58 - * more map registers will probably be needed. 59 - * - IoAllocateAdapterChannel (indirectly using HalpGrowMapBufferWorker 60 - * since we're at DISPATCH_LEVEL and call HalpGrowMapBuffers directly) 61 - * when no more map registers are free. 62 - * 63 - * Note that even if no more map registers can be allocated it's not 64 - * the end of the world. The adapters waiting for free map registers 65 - * are queued in the master adapter's queue and once one driver hands 66 - * back it's map registers (using IoFreeMapRegisters or indirectly using 67 - * the execution routine callback in IoAllocateAdapterChannel) the 68 - * queue gets processed and the map registers are reassigned. 69 - */ 70 - 71 - /* INCLUDES *****************************************************************/ 72 - 73 - #include <hal.h> 74 - #define NDEBUG 75 - #include <debug.h> 76 - 77 - static KEVENT HalpDmaLock; 78 - static LIST_ENTRY HalpDmaAdapterList; 79 - static PADAPTER_OBJECT HalpEisaAdapter[8]; 80 - static BOOLEAN HalpEisaDma; 81 - static PADAPTER_OBJECT HalpMasterAdapter; 82 - 83 - static const ULONG_PTR HalpEisaPortPage[8] = { 84 - FIELD_OFFSET(DMA_PAGE, Channel0), 85 - FIELD_OFFSET(DMA_PAGE, Channel1), 86 - FIELD_OFFSET(DMA_PAGE, Channel2), 87 - FIELD_OFFSET(DMA_PAGE, Channel3), 88 - 0, 89 - FIELD_OFFSET(DMA_PAGE, Channel5), 90 - FIELD_OFFSET(DMA_PAGE, Channel6), 91 - FIELD_OFFSET(DMA_PAGE, Channel7) 92 - }; 93 - 94 - static DMA_OPERATIONS HalpDmaOperations = { 95 - sizeof(DMA_OPERATIONS), 96 - (PPUT_DMA_ADAPTER)HalPutDmaAdapter, 97 - (PALLOCATE_COMMON_BUFFER)HalAllocateCommonBuffer, 98 - (PFREE_COMMON_BUFFER)HalFreeCommonBuffer, 99 - NULL, /* Initialized in HalpInitDma() */ 100 - NULL, /* Initialized in HalpInitDma() */ 101 - NULL, /* Initialized in HalpInitDma() */ 102 - NULL, /* Initialized in HalpInitDma() */ 103 - NULL, /* Initialized in HalpInitDma() */ 104 - (PGET_DMA_ALIGNMENT)HalpDmaGetDmaAlignment, 105 - (PREAD_DMA_COUNTER)HalReadDmaCounter, 106 - /* FIXME: Implement the S/G funtions. */ 107 - NULL /*(PGET_SCATTER_GATHER_LIST)HalGetScatterGatherList*/, 108 - NULL /*(PPUT_SCATTER_GATHER_LIST)HalPutScatterGatherList*/, 109 - NULL /*(PCALCULATE_SCATTER_GATHER_LIST_SIZE)HalCalculateScatterGatherListSize*/, 110 - NULL /*(PBUILD_SCATTER_GATHER_LIST)HalBuildScatterGatherList*/, 111 - NULL /*(PBUILD_MDL_FROM_SCATTER_GATHER_LIST)HalBuildMdlFromScatterGatherList*/ 112 - }; 113 - 114 - #define MAX_MAP_REGISTERS 64 115 - 116 - #define TAG_DMA ' AMD' 117 - 118 - /* FUNCTIONS *****************************************************************/ 119 - 120 - VOID 121 - HalpInitDma(VOID) 122 - { 123 - /* 124 - * Initialize the DMA Operation table 125 - */ 126 - HalpDmaOperations.AllocateAdapterChannel = (PALLOCATE_ADAPTER_CHANNEL)IoAllocateAdapterChannel; 127 - HalpDmaOperations.FlushAdapterBuffers = (PFLUSH_ADAPTER_BUFFERS)IoFlushAdapterBuffers; 128 - HalpDmaOperations.FreeAdapterChannel = (PFREE_ADAPTER_CHANNEL)IoFreeAdapterChannel; 129 - HalpDmaOperations.FreeMapRegisters = (PFREE_MAP_REGISTERS)IoFreeMapRegisters; 130 - HalpDmaOperations.MapTransfer = (PMAP_TRANSFER)IoMapTransfer; 131 - 132 - /* 133 - * Check if Extended DMA is available. We're just going to do a random 134 - * read and write. 135 - */ 136 - 137 - WRITE_PORT_UCHAR((PUCHAR)FIELD_OFFSET(EISA_CONTROL, DmaController2Pages.Channel2), 0x2A); 138 - if (READ_PORT_UCHAR((PUCHAR)FIELD_OFFSET(EISA_CONTROL, DmaController2Pages.Channel2)) == 0x2A) 139 - HalpEisaDma = TRUE; 140 - 141 - /* 142 - * Intialize all the global variables and allocate master adapter with 143 - * first map buffers. 144 - */ 145 - 146 - InitializeListHead(&HalpDmaAdapterList); 147 - KeInitializeEvent(&HalpDmaLock, NotificationEvent, TRUE); 148 - 149 - HalpMasterAdapter = HalpDmaAllocateMasterAdapter(); 150 - 151 - /* 152 - * Setup the HalDispatchTable callback for creating PnP DMA adapters. It's 153 - * used by IoGetDmaAdapter in the kernel. 154 - */ 155 - 156 - HalGetDmaAdapter = HalpGetDmaAdapter; 157 - } 158 - 159 - /** 160 - * @name HalpGetAdapterMaximumPhysicalAddress 161 - * 162 - * Get the maximum physical address acceptable by the device represented 163 - * by the passed DMA adapter. 164 - */ 165 - 166 - PHYSICAL_ADDRESS NTAPI 167 - HalpGetAdapterMaximumPhysicalAddress( 168 - IN PADAPTER_OBJECT AdapterObject) 169 - { 170 - PHYSICAL_ADDRESS HighestAddress; 171 - 172 - if (AdapterObject->MasterDevice) 173 - { 174 - if (AdapterObject->Dma64BitAddresses) 175 - { 176 - HighestAddress.QuadPart = 0xFFFFFFFFFFFFFFFFULL; 177 - return HighestAddress; 178 - } 179 - else if (AdapterObject->Dma32BitAddresses) 180 - { 181 - HighestAddress.QuadPart = 0xFFFFFFFF; 182 - return HighestAddress; 183 - } 184 - } 185 - 186 - HighestAddress.QuadPart = 0xFFFFFF; 187 - return HighestAddress; 188 - } 189 - 190 - /** 191 - * @name HalpGrowMapBuffers 192 - * 193 - * Allocate initial, or additional, map buffers for DMA master adapter. 194 - * 195 - * @param MasterAdapter 196 - * DMA master adapter to allocate buffers for. 197 - * @param SizeOfMapBuffers 198 - * Size of the map buffers to allocate (not including the size 199 - * already allocated). 200 - */ 201 - 202 - BOOLEAN NTAPI 203 - HalpGrowMapBuffers( 204 - IN PADAPTER_OBJECT AdapterObject, 205 - IN ULONG SizeOfMapBuffers) 206 - { 207 - PVOID VirtualAddress; 208 - PHYSICAL_ADDRESS PhysicalAddress; 209 - PHYSICAL_ADDRESS HighestAcceptableAddress; 210 - PHYSICAL_ADDRESS LowestAcceptableAddress; 211 - PHYSICAL_ADDRESS BoundryAddressMultiple; 212 - KIRQL OldIrql; 213 - ULONG MapRegisterCount; 214 - 215 - /* FIXME: Check if enough map register slots are available. */ 216 - 217 - MapRegisterCount = BYTES_TO_PAGES(SizeOfMapBuffers); 218 - 219 - /* 220 - * Allocate memory for the new map registers. For 32-bit adapters we use 221 - * two passes in order not to waste scare resource (low memory). 222 - */ 223 - 224 - HighestAcceptableAddress = 225 - HalpGetAdapterMaximumPhysicalAddress(AdapterObject); 226 - LowestAcceptableAddress.HighPart = 0; 227 - LowestAcceptableAddress.LowPart = 228 - HighestAcceptableAddress.LowPart == 0xFFFFFFFF ? 0x1000000 : 0; 229 - BoundryAddressMultiple.QuadPart = 0; 230 - 231 - VirtualAddress = MmAllocateContiguousMemorySpecifyCache( 232 - MapRegisterCount << PAGE_SHIFT, LowestAcceptableAddress, 233 - HighestAcceptableAddress, BoundryAddressMultiple, MmNonCached); 234 - 235 - if (VirtualAddress == NULL && LowestAcceptableAddress.LowPart != 0) 236 - { 237 - LowestAcceptableAddress.LowPart = 0; 238 - VirtualAddress = MmAllocateContiguousMemorySpecifyCache( 239 - MapRegisterCount << PAGE_SHIFT, LowestAcceptableAddress, 240 - HighestAcceptableAddress, BoundryAddressMultiple, MmNonCached); 241 - } 242 - 243 - if (VirtualAddress == NULL) 244 - return FALSE; 245 - 246 - PhysicalAddress = MmGetPhysicalAddress(VirtualAddress); 247 - 248 - /* 249 - * All the following must be done with the master adapter lock held 250 - * to prevent corruption. 251 - */ 252 - 253 - OldIrql = KfAcquireSpinLock(&AdapterObject->SpinLock); 254 - 255 - /* 256 - * Setup map register entries for the buffer allocated. Each entry has 257 - * a virtual and physical address and corresponds to PAGE_SIZE large 258 - * buffer. 259 - */ 260 - 261 - if (MapRegisterCount > 0) 262 - { 263 - PROS_MAP_REGISTER_ENTRY CurrentEntry, PreviousEntry; 264 - 265 - CurrentEntry = AdapterObject->MapRegisterBase + 266 - AdapterObject->NumberOfMapRegisters; 267 - do 268 - { 269 - /* 270 - * Leave one entry free for every non-contiguous memory region 271 - * in the map register bitmap. This ensures that we can search 272 - * using RtlFindClearBits for contiguous map register regions. 273 - * 274 - * Also for non-EISA DMA leave one free entry for every 64Kb 275 - * break, because the DMA controller can handle only coniguous 276 - * 64Kb regions. 277 - */ 278 - 279 - if (CurrentEntry != AdapterObject->MapRegisterBase) 280 - { 281 - PreviousEntry = CurrentEntry - 1; 282 - if (PreviousEntry->PhysicalAddress.LowPart + PAGE_SIZE == 283 - PhysicalAddress.LowPart) 284 - { 285 - if (!HalpEisaDma) 286 - { 287 - if ((PreviousEntry->PhysicalAddress.LowPart ^ 288 - PhysicalAddress.LowPart) & 0xFFFF0000) 289 - { 290 - CurrentEntry++; 291 - AdapterObject->NumberOfMapRegisters++; 292 - } 293 - } 294 - } 295 - else 296 - { 297 - CurrentEntry++; 298 - AdapterObject->NumberOfMapRegisters++; 299 - } 300 - } 301 - 302 - RtlClearBit(AdapterObject->MapRegisters, 303 - CurrentEntry - AdapterObject->MapRegisterBase); 304 - CurrentEntry->VirtualAddress = VirtualAddress; 305 - CurrentEntry->PhysicalAddress = PhysicalAddress; 306 - 307 - PhysicalAddress.LowPart += PAGE_SIZE; 308 - VirtualAddress = (PVOID)((ULONG_PTR)VirtualAddress + PAGE_SIZE); 309 - 310 - CurrentEntry++; 311 - AdapterObject->NumberOfMapRegisters++; 312 - MapRegisterCount--; 313 - } 314 - while (MapRegisterCount != 0); 315 - } 316 - 317 - KfReleaseSpinLock(&AdapterObject->SpinLock, OldIrql); 318 - 319 - return TRUE; 320 - } 321 - 322 - /** 323 - * @name HalpDmaAllocateMasterAdapter 324 - * 325 - * Helper routine to allocate and initialize master adapter object and it's 326 - * associated map register buffers. 327 - * 328 - * @see HalpInitDma 329 - */ 330 - 331 - PADAPTER_OBJECT NTAPI 332 - HalpDmaAllocateMasterAdapter(VOID) 333 - { 334 - PADAPTER_OBJECT MasterAdapter; 335 - ULONG Size, SizeOfBitmap; 336 - 337 - SizeOfBitmap = MAX_MAP_REGISTERS; 338 - Size = sizeof(ADAPTER_OBJECT); 339 - Size += sizeof(RTL_BITMAP); 340 - Size += (SizeOfBitmap + 7) >> 3; 341 - 342 - MasterAdapter = ExAllocatePoolWithTag(NonPagedPool, Size, TAG_DMA); 343 - if (MasterAdapter == NULL) 344 - return NULL; 345 - 346 - RtlZeroMemory(MasterAdapter, Size); 347 - 348 - KeInitializeSpinLock(&MasterAdapter->SpinLock); 349 - InitializeListHead(&MasterAdapter->AdapterQueue); 350 - 351 - MasterAdapter->MapRegisters = (PVOID)(MasterAdapter + 1); 352 - RtlInitializeBitMap( 353 - MasterAdapter->MapRegisters, 354 - (PULONG)(MasterAdapter->MapRegisters + 1), 355 - SizeOfBitmap); 356 - RtlSetAllBits(MasterAdapter->MapRegisters); 357 - MasterAdapter->NumberOfMapRegisters = 0; 358 - MasterAdapter->CommittedMapRegisters = 0; 359 - 360 - MasterAdapter->MapRegisterBase = ExAllocatePoolWithTag( 361 - NonPagedPool, 362 - SizeOfBitmap * sizeof(ROS_MAP_REGISTER_ENTRY), 363 - TAG_DMA); 364 - if (MasterAdapter->MapRegisterBase == NULL) 365 - { 366 - ExFreePool(MasterAdapter); 367 - return NULL; 368 - } 369 - 370 - RtlZeroMemory(MasterAdapter->MapRegisterBase, 371 - SizeOfBitmap * sizeof(ROS_MAP_REGISTER_ENTRY)); 372 - if (!HalpGrowMapBuffers(MasterAdapter, 0x10000)) 373 - { 374 - ExFreePool(MasterAdapter); 375 - return NULL; 376 - } 377 - 378 - return MasterAdapter; 379 - } 380 - 381 - /** 382 - * @name HalpDmaAllocateChildAdapter 383 - * 384 - * Helper routine of HalGetAdapter. Allocate child adapter object and 385 - * fill out some basic fields. 386 - * 387 - * @see HalGetAdapter 388 - */ 389 - 390 - PADAPTER_OBJECT NTAPI 391 - HalpDmaAllocateChildAdapter( 392 - ULONG NumberOfMapRegisters, 393 - PDEVICE_DESCRIPTION DeviceDescription) 394 - { 395 - PADAPTER_OBJECT AdapterObject; 396 - OBJECT_ATTRIBUTES ObjectAttributes; 397 - NTSTATUS Status; 398 - HANDLE Handle; 399 - 400 - InitializeObjectAttributes( 401 - &ObjectAttributes, 402 - NULL, 403 - OBJ_KERNEL_HANDLE | OBJ_PERMANENT, 404 - NULL, 405 - NULL); 406 - 407 - Status = ObCreateObject( 408 - KernelMode, 409 - IoAdapterObjectType, 410 - &ObjectAttributes, 411 - KernelMode, 412 - NULL, 413 - sizeof(ADAPTER_OBJECT), 414 - 0, 415 - 0, 416 - (PVOID)&AdapterObject); 417 - if (!NT_SUCCESS(Status)) 418 - return NULL; 419 - 420 - Status = ObReferenceObjectByPointer( 421 - AdapterObject, 422 - FILE_READ_DATA | FILE_WRITE_DATA, 423 - IoAdapterObjectType, 424 - KernelMode); 425 - if (!NT_SUCCESS(Status)) 426 - return NULL; 427 - 428 - RtlZeroMemory(AdapterObject, sizeof(ADAPTER_OBJECT)); 429 - 430 - Status = ObInsertObject( 431 - AdapterObject, 432 - NULL, 433 - FILE_READ_DATA | FILE_WRITE_DATA, 434 - 0, 435 - NULL, 436 - &Handle); 437 - if (!NT_SUCCESS(Status)) 438 - return NULL; 439 - 440 - ZwClose(Handle); 441 - 442 - AdapterObject->DmaHeader.Version = (USHORT)DeviceDescription->Version; 443 - AdapterObject->DmaHeader.Size = sizeof(ADAPTER_OBJECT); 444 - AdapterObject->DmaHeader.DmaOperations = &HalpDmaOperations; 445 - AdapterObject->MapRegistersPerChannel = 1; 446 - AdapterObject->Dma32BitAddresses = DeviceDescription->Dma32BitAddresses; 447 - AdapterObject->ChannelNumber = 0xFF; 448 - AdapterObject->MasterAdapter = HalpMasterAdapter; 449 - KeInitializeDeviceQueue(&AdapterObject->ChannelWaitQueue); 450 - 451 - return AdapterObject; 452 - } 453 - 454 - /** 455 - * @name HalpDmaInitializeEisaAdapter 456 - * 457 - * Setup DMA modes and extended modes for (E)ISA DMA adapter object. 458 - */ 459 - 460 - BOOLEAN NTAPI 461 - HalpDmaInitializeEisaAdapter( 462 - PADAPTER_OBJECT AdapterObject, 463 - PDEVICE_DESCRIPTION DeviceDescription) 464 - { 465 - UCHAR Controller; 466 - DMA_MODE DmaMode = {{0 }}; 467 - DMA_EXTENDED_MODE ExtendedMode = {{ 0 }}; 468 - PVOID AdapterBaseVa; 469 - 470 - Controller = (DeviceDescription->DmaChannel & 4) ? 2 : 1; 471 - 472 - if (Controller == 1) 473 - AdapterBaseVa = (PVOID)FIELD_OFFSET(EISA_CONTROL, DmaController1); 474 - else 475 - AdapterBaseVa = (PVOID)FIELD_OFFSET(EISA_CONTROL, DmaController2); 476 - 477 - AdapterObject->AdapterNumber = Controller; 478 - AdapterObject->ChannelNumber = (UCHAR)(DeviceDescription->DmaChannel & 3); 479 - AdapterObject->PagePort = (PUCHAR)HalpEisaPortPage[DeviceDescription->DmaChannel]; 480 - AdapterObject->Width16Bits = FALSE; 481 - AdapterObject->AdapterBaseVa = AdapterBaseVa; 482 - 483 - if (HalpEisaDma) 484 - { 485 - ExtendedMode.ChannelNumber = AdapterObject->ChannelNumber; 486 - 487 - switch (DeviceDescription->DmaSpeed) 488 - { 489 - case Compatible: ExtendedMode.TimingMode = COMPATIBLE_TIMING; break; 490 - case TypeA: ExtendedMode.TimingMode = TYPE_A_TIMING; break; 491 - case TypeB: ExtendedMode.TimingMode = TYPE_B_TIMING; break; 492 - case TypeC: ExtendedMode.TimingMode = BURST_TIMING; break; 493 - default: 494 - return FALSE; 495 - } 496 - 497 - switch (DeviceDescription->DmaWidth) 498 - { 499 - case Width8Bits: ExtendedMode.TransferSize = B_8BITS; break; 500 - case Width16Bits: ExtendedMode.TransferSize = B_16BITS; break; 501 - case Width32Bits: ExtendedMode.TransferSize = B_32BITS; break; 502 - default: 503 - return FALSE; 504 - } 505 - 506 - if (Controller == 1) 507 - WRITE_PORT_UCHAR((PUCHAR)FIELD_OFFSET(EISA_CONTROL, DmaExtendedMode1), 508 - ExtendedMode.Byte); 509 - else 510 - WRITE_PORT_UCHAR((PUCHAR)FIELD_OFFSET(EISA_CONTROL, DmaExtendedMode2), 511 - ExtendedMode.Byte); 512 - } 513 - else 514 - { 515 - /* 516 - * Validate setup for non-busmaster DMA adapter. Secondary controller 517 - * supports only 16-bit transfers and main controller supports only 518 - * 8-bit transfers. Anything else is invalid. 519 - */ 520 - 521 - if (!DeviceDescription->Master) 522 - { 523 - if (Controller == 2 && DeviceDescription->DmaWidth == Width16Bits) 524 - AdapterObject->Width16Bits = TRUE; 525 - else if (Controller != 1 || DeviceDescription->DmaWidth != Width8Bits) 526 - return FALSE; 527 - } 528 - } 529 - 530 - DmaMode.Channel = AdapterObject->ChannelNumber; 531 - DmaMode.AutoInitialize = DeviceDescription->AutoInitialize; 532 - 533 - /* 534 - * Set the DMA request mode. 535 - * 536 - * For (E)ISA bus master devices just unmask (enable) the DMA channel 537 - * and set it to cascade mode. Otherwise just select the right one 538 - * bases on the passed device description. 539 - */ 540 - 541 - if (DeviceDescription->Master) 542 - { 543 - DmaMode.RequestMode = CASCADE_REQUEST_MODE; 544 - if (Controller == 1) 545 - { 546 - /* Set the Request Data */ 547 - WRITE_PORT_UCHAR(&((PDMA1_CONTROL)AdapterBaseVa)->Mode, 548 - DmaMode.Byte); 549 - /* Unmask DMA Channel */ 550 - WRITE_PORT_UCHAR(&((PDMA1_CONTROL)AdapterBaseVa)->SingleMask, 551 - AdapterObject->ChannelNumber | DMA_CLEARMASK); 552 - } else { 553 - /* Set the Request Data */ 554 - WRITE_PORT_UCHAR(&((PDMA2_CONTROL)AdapterBaseVa)->Mode, 555 - DmaMode.Byte); 556 - /* Unmask DMA Channel */ 557 - WRITE_PORT_UCHAR(&((PDMA2_CONTROL)AdapterBaseVa)->SingleMask, 558 - AdapterObject->ChannelNumber | DMA_CLEARMASK); 559 - } 560 - } 561 - else 562 - { 563 - if (DeviceDescription->DemandMode) 564 - DmaMode.RequestMode = DEMAND_REQUEST_MODE; 565 - else 566 - DmaMode.RequestMode = SINGLE_REQUEST_MODE; 567 - } 568 - 569 - AdapterObject->AdapterMode = DmaMode; 570 - 571 - return TRUE; 572 - } 573 - 574 - /** 575 - * @name HalGetAdapter 576 - * 577 - * Allocate an adapter object for DMA device. 578 - * 579 - * @param DeviceDescription 580 - * Structure describing the attributes of the device. 581 - * @param NumberOfMapRegisters 582 - * On return filled with the maximum number of map registers the 583 - * device driver can allocate for DMA transfer operations. 584 - * 585 - * @return The DMA adapter on success, NULL otherwise. 586 - * 587 - * @implemented 588 - */ 589 - 590 - PADAPTER_OBJECT NTAPI 591 - HalGetAdapter( 592 - PDEVICE_DESCRIPTION DeviceDescription, 593 - PULONG NumberOfMapRegisters) 594 - { 595 - PADAPTER_OBJECT AdapterObject = NULL; 596 - PADAPTER_OBJECT MasterAdapter; 597 - BOOLEAN EisaAdapter; 598 - ULONG MapRegisters; 599 - ULONG MaximumLength; 600 - 601 - /* Validate parameters in device description */ 602 - if (DeviceDescription->Version > DEVICE_DESCRIPTION_VERSION2) 603 - return NULL; 604 - 605 - /* 606 - * See if we're going to use ISA/EISA DMA adapter. These adapters are 607 - * special since they're reused. 608 - * 609 - * Also note that we check for channel number since there are only 8 DMA 610 - * channels on ISA, so any request above this requires new adapter. 611 - */ 612 - 613 - if (DeviceDescription->InterfaceType == Isa || !DeviceDescription->Master) 614 - { 615 - if (DeviceDescription->InterfaceType == Isa && 616 - DeviceDescription->DmaChannel >= 8) 617 - EisaAdapter = FALSE; 618 - else 619 - EisaAdapter = TRUE; 620 - } 621 - else 622 - { 623 - EisaAdapter = FALSE; 624 - } 625 - 626 - /* 627 - * Disallow creating adapter for ISA/EISA DMA channel 4 since it's used 628 - * for cascading the controllers and it's not available for software use. 629 - */ 630 - 631 - if (EisaAdapter && DeviceDescription->DmaChannel == 4) 632 - return NULL; 633 - 634 - /* 635 - * Calculate the number of map registers. 636 - * 637 - * - For EISA and PCI scatter/gather no map registers are needed. 638 - * - For ISA slave scatter/gather one map register is needed. 639 - * - For all other cases the number of map registers depends on 640 - * DeviceDescription->MaximumLength. 641 - */ 642 - 643 - MaximumLength = DeviceDescription->MaximumLength & MAXLONG; 644 - if (DeviceDescription->ScatterGather && 645 - (DeviceDescription->InterfaceType == Eisa || 646 - DeviceDescription->InterfaceType == PCIBus)) 647 - { 648 - MapRegisters = 0; 649 - } 650 - else if (DeviceDescription->ScatterGather && 651 - !DeviceDescription->Master) 652 - { 653 - MapRegisters = 1; 654 - } 655 - else 656 - { 657 - /* 658 - * In the equation below the additional map register added by 659 - * the "+1" accounts for the case when a transfer does not start 660 - * at a page-aligned address. 661 - */ 662 - MapRegisters = BYTES_TO_PAGES(MaximumLength) + 1; 663 - if (MapRegisters > 16) 664 - MapRegisters = 16; 665 - } 666 - 667 - /* 668 - * Acquire the DMA lock that is used to protect adapter lists and 669 - * EISA adapter array. 670 - */ 671 - 672 - KeWaitForSingleObject(&HalpDmaLock, Executive, KernelMode, 673 - FALSE, NULL); 674 - 675 - /* 676 - * Now we must get ahold of the adapter object. For first eight ISA/EISA 677 - * channels there are static adapter objects that are reused and updated 678 - * on succesive HalGetAdapter calls. In other cases a new adapter object 679 - * is always created and it's to the DMA adapter list (HalpDmaAdapterList). 680 - */ 681 - 682 - if (EisaAdapter) 683 - { 684 - AdapterObject = HalpEisaAdapter[DeviceDescription->DmaChannel]; 685 - if (AdapterObject != NULL) 686 - { 687 - if (AdapterObject->NeedsMapRegisters && 688 - MapRegisters > AdapterObject->MapRegistersPerChannel) 689 - AdapterObject->MapRegistersPerChannel = MapRegisters; 690 - } 691 - } 692 - 693 - if (AdapterObject == NULL) 694 - { 695 - AdapterObject = HalpDmaAllocateChildAdapter( 696 - MapRegisters, DeviceDescription); 697 - if (AdapterObject == NULL) 698 - { 699 - KeSetEvent(&HalpDmaLock, 0, 0); 700 - return NULL; 701 - } 702 - 703 - if (EisaAdapter) 704 - { 705 - HalpEisaAdapter[DeviceDescription->DmaChannel] = AdapterObject; 706 - } 707 - 708 - if (MapRegisters > 0) 709 - { 710 - AdapterObject->NeedsMapRegisters = TRUE; 711 - MasterAdapter = HalpMasterAdapter; 712 - AdapterObject->MapRegistersPerChannel = MapRegisters; 713 - 714 - /* 715 - * FIXME: Verify that the following makes sense. Actually 716 - * MasterAdapter->NumberOfMapRegisters contains even the number 717 - * of gaps, so this will not work correctly all the time. It 718 - * doesn't matter much since it's only optimization to avoid 719 - * queuing work items in HalAllocateAdapterChannel. 720 - */ 721 - 722 - MasterAdapter->CommittedMapRegisters += MapRegisters; 723 - if (MasterAdapter->CommittedMapRegisters > MasterAdapter->NumberOfMapRegisters) 724 - HalpGrowMapBuffers(MasterAdapter, 0x10000); 725 - } 726 - else 727 - { 728 - AdapterObject->NeedsMapRegisters = FALSE; 729 - if (DeviceDescription->Master) 730 - AdapterObject->MapRegistersPerChannel = BYTES_TO_PAGES(MaximumLength) + 1; 731 - else 732 - AdapterObject->MapRegistersPerChannel = 1; 733 - } 734 - } 735 - 736 - if (!EisaAdapter) 737 - InsertTailList(&HalpDmaAdapterList, &AdapterObject->AdapterList); 738 - 739 - /* 740 - * Release the DMA lock. HalpDmaAdapterList and HalpEisaAdapter will 741 - * no longer be touched, so we don't need it. 742 - */ 743 - 744 - KeSetEvent(&HalpDmaLock, 0, 0); 745 - 746 - /* 747 - * Setup the values in the adapter object that are common for all 748 - * types of buses. 749 - */ 750 - 751 - if (DeviceDescription->Version >= DEVICE_DESCRIPTION_VERSION1) 752 - AdapterObject->IgnoreCount = DeviceDescription->IgnoreCount; 753 - else 754 - AdapterObject->IgnoreCount = 0; 755 - 756 - AdapterObject->Dma32BitAddresses = DeviceDescription->Dma32BitAddresses; 757 - AdapterObject->Dma64BitAddresses = DeviceDescription->Dma64BitAddresses; 758 - AdapterObject->ScatterGather = DeviceDescription->ScatterGather; 759 - AdapterObject->MasterDevice = DeviceDescription->Master; 760 - *NumberOfMapRegisters = AdapterObject->MapRegistersPerChannel; 761 - 762 - /* 763 - * For non-(E)ISA adapters we have already done all the work. On the 764 - * other hand for (E)ISA adapters we must still setup the DMA modes 765 - * and prepare the controller. 766 - */ 767 - 768 - if (EisaAdapter) 769 - { 770 - if (!HalpDmaInitializeEisaAdapter(AdapterObject, DeviceDescription)) 771 - { 772 - ObDereferenceObject(AdapterObject); 773 - return NULL; 774 - } 775 - } 776 - 777 - return AdapterObject; 778 - } 779 - 780 - /** 781 - * @name HalpGetDmaAdapter 782 - * 783 - * Internal routine to allocate PnP DMA adapter object. It's exported through 784 - * HalDispatchTable and used by IoGetDmaAdapter. 785 - * 786 - * @see HalGetAdapter 787 - */ 788 - 789 - PDMA_ADAPTER NTAPI 790 - HalpGetDmaAdapter( 791 - IN PVOID Context, 792 - IN PDEVICE_DESCRIPTION DeviceDescription, 793 - OUT PULONG NumberOfMapRegisters) 794 - { 795 - return &HalGetAdapter(DeviceDescription, NumberOfMapRegisters)->DmaHeader; 796 - } 797 - 798 - /** 799 - * @name HalPutDmaAdapter 800 - * 801 - * Internal routine to free DMA adapter and resources for reuse. It's exported 802 - * using the DMA_OPERATIONS interface by HalGetAdapter. 803 - * 804 - * @see HalGetAdapter 805 - */ 806 - 807 - VOID NTAPI 808 - HalPutDmaAdapter( 809 - PADAPTER_OBJECT AdapterObject) 810 - { 811 - if (AdapterObject->ChannelNumber == 0xFF) 812 - { 813 - KeWaitForSingleObject(&HalpDmaLock, Executive, KernelMode, 814 - FALSE, NULL); 815 - RemoveEntryList(&AdapterObject->AdapterList); 816 - KeSetEvent(&HalpDmaLock, 0, 0); 817 - } 818 - 819 - ObDereferenceObject(AdapterObject); 820 - } 821 - 822 - /** 823 - * @name HalAllocateCommonBuffer 824 - * 825 - * Allocates memory that is visible to both the processor(s) and the DMA 826 - * device. 827 - * 828 - * @param AdapterObject 829 - * Adapter object representing the bus master or system dma controller. 830 - * @param Length 831 - * Number of bytes to allocate. 832 - * @param LogicalAddress 833 - * Logical address the driver can use to access the buffer. 834 - * @param CacheEnabled 835 - * Specifies if the memory can be cached. 836 - * 837 - * @return The base virtual address of the memory allocated or NULL on failure. 838 - * 839 - * @remarks 840 - * On real NT x86 systems the CacheEnabled parameter is ignored, we honour 841 - * it. If it proves to cause problems change it. 842 - * 843 - * @see HalFreeCommonBuffer 844 - * 845 - * @implemented 846 - */ 847 - 848 - PVOID NTAPI 849 - HalAllocateCommonBuffer( 850 - PADAPTER_OBJECT AdapterObject, 851 - ULONG Length, 852 - PPHYSICAL_ADDRESS LogicalAddress, 853 - BOOLEAN CacheEnabled) 854 - { 855 - PHYSICAL_ADDRESS LowestAcceptableAddress; 856 - PHYSICAL_ADDRESS HighestAcceptableAddress; 857 - PHYSICAL_ADDRESS BoundryAddressMultiple; 858 - PVOID VirtualAddress; 859 - 860 - LowestAcceptableAddress.QuadPart = 0; 861 - HighestAcceptableAddress = 862 - HalpGetAdapterMaximumPhysicalAddress(AdapterObject); 863 - BoundryAddressMultiple.QuadPart = 0; 864 - 865 - /* 866 - * For bus-master DMA devices the buffer mustn't cross 4Gb boundary. For 867 - * slave DMA devices the 64Kb boundary mustn't be crossed since the 868 - * controller wouldn't be able to handle it. 869 - */ 870 - 871 - if (AdapterObject->MasterDevice) 872 - BoundryAddressMultiple.HighPart = 1; 873 - else 874 - BoundryAddressMultiple.LowPart = 0x10000; 875 - 876 - VirtualAddress = MmAllocateContiguousMemorySpecifyCache( 877 - Length, LowestAcceptableAddress, HighestAcceptableAddress, 878 - BoundryAddressMultiple, CacheEnabled ? MmCached : MmNonCached); 879 - if (VirtualAddress == NULL) 880 - return NULL; 881 - 882 - *LogicalAddress = MmGetPhysicalAddress(VirtualAddress); 883 - 884 - return VirtualAddress; 885 - } 886 - 887 - /** 888 - * @name HalFreeCommonBuffer 889 - * 890 - * Free common buffer allocated with HalAllocateCommonBuffer. 891 - * 892 - * @see HalAllocateCommonBuffer 893 - * 894 - * @implemented 895 - */ 896 - 897 - VOID NTAPI 898 - HalFreeCommonBuffer( 899 - PADAPTER_OBJECT AdapterObject, 900 - ULONG Length, 901 - PHYSICAL_ADDRESS LogicalAddress, 902 - PVOID VirtualAddress, 903 - BOOLEAN CacheEnabled) 904 - { 905 - MmFreeContiguousMemory(VirtualAddress); 906 - } 907 - 908 - /** 909 - * @name HalpDmaGetDmaAlignment 910 - * 911 - * Internal routine to return the DMA alignment requirement. It's exported 912 - * using the DMA_OPERATIONS interface by HalGetAdapter. 913 - * 914 - * @see HalGetAdapter 915 - */ 916 - 917 - ULONG NTAPI 918 - HalpDmaGetDmaAlignment( 919 - PADAPTER_OBJECT AdapterObject) 920 - { 921 - return 1; 922 - } 923 - 924 - /* 925 - * @name HalReadDmaCounter 926 - * 927 - * Read DMA operation progress counter. 928 - * 929 - * @implemented 930 - */ 931 - 932 - ULONG NTAPI 933 - HalReadDmaCounter( 934 - PADAPTER_OBJECT AdapterObject) 935 - { 936 - KIRQL OldIrql; 937 - ULONG Count, OldCount; 938 - 939 - ASSERT(!AdapterObject->MasterDevice); 940 - 941 - /* 942 - * Acquire the master adapter lock since we're going to mess with the 943 - * system DMA controller registers and we really don't want anyone 944 - * to do the same at the same time. 945 - */ 946 - 947 - KeAcquireSpinLock(&AdapterObject->MasterAdapter->SpinLock, &OldIrql); 948 - 949 - /* Send the request to the specific controller. */ 950 - if (AdapterObject->AdapterNumber == 1) 951 - { 952 - PDMA1_CONTROL DmaControl1 = AdapterObject->AdapterBaseVa; 953 - 954 - Count = 0xffff00; 955 - do 956 - { 957 - OldCount = Count; 958 - /* Send Reset */ 959 - WRITE_PORT_UCHAR(&DmaControl1->ClearBytePointer, 0); 960 - /* Read Count */ 961 - Count = READ_PORT_UCHAR(&DmaControl1->DmaAddressCount 962 - [AdapterObject->ChannelNumber].DmaBaseCount); 963 - Count |= READ_PORT_UCHAR(&DmaControl1->DmaAddressCount 964 - [AdapterObject->ChannelNumber].DmaBaseCount) << 8; 965 - } 966 - while (0xffff00 & (OldCount ^ Count)); 967 - } 968 - else 969 - { 970 - PDMA2_CONTROL DmaControl2 = AdapterObject->AdapterBaseVa; 971 - 972 - Count = 0xffff00; 973 - do 974 - { 975 - OldCount = Count; 976 - /* Send Reset */ 977 - WRITE_PORT_UCHAR(&DmaControl2->ClearBytePointer, 0); 978 - /* Read Count */ 979 - Count = READ_PORT_UCHAR(&DmaControl2->DmaAddressCount 980 - [AdapterObject->ChannelNumber].DmaBaseCount); 981 - Count |= READ_PORT_UCHAR(&DmaControl2->DmaAddressCount 982 - [AdapterObject->ChannelNumber].DmaBaseCount) << 8; 983 - } 984 - while (0xffff00 & (OldCount ^ Count)); 985 - } 986 - 987 - KeReleaseSpinLock(&AdapterObject->MasterAdapter->SpinLock, OldIrql); 988 - 989 - Count++; 990 - Count &= 0xffff; 991 - if (AdapterObject->Width16Bits) 992 - Count *= 2; 993 - 994 - return Count; 995 - } 996 - 997 - /** 998 - * @name HalpGrowMapBufferWorker 999 - * 1000 - * Helper routine of HalAllocateAdapterChannel for allocating map registers 1001 - * at PASSIVE_LEVEL in work item. 1002 - */ 1003 - 1004 - VOID NTAPI 1005 - HalpGrowMapBufferWorker(PVOID DeferredContext) 1006 - { 1007 - PGROW_WORK_ITEM WorkItem = (PGROW_WORK_ITEM)DeferredContext; 1008 - KIRQL OldIrql; 1009 - BOOLEAN Succeeded; 1010 - 1011 - /* 1012 - * Try to allocate new map registers for the adapter. 1013 - * 1014 - * NOTE: The NT implementation actually tries to allocate more map 1015 - * registers than needed as an optimization. 1016 - */ 1017 - 1018 - KeWaitForSingleObject(&HalpDmaLock, Executive, KernelMode, 1019 - FALSE, NULL); 1020 - Succeeded = HalpGrowMapBuffers(WorkItem->AdapterObject->MasterAdapter, 1021 - WorkItem->NumberOfMapRegisters); 1022 - KeSetEvent(&HalpDmaLock, 0, 0); 1023 - 1024 - if (Succeeded) 1025 - { 1026 - /* 1027 - * Flush the adapter queue now that new map registers are ready. The 1028 - * easiest way to do that is to call IoFreeMapRegisters to not free 1029 - * any registers. Note that we use the magic (PVOID)2 map register 1030 - * base to bypass the parameter checking. 1031 - */ 1032 - 1033 - KeRaiseIrql(DISPATCH_LEVEL, &OldIrql); 1034 - IoFreeMapRegisters(WorkItem->AdapterObject, (PVOID)2, 0); 1035 - KeLowerIrql(OldIrql); 1036 - } 1037 - 1038 - ExFreePool(WorkItem); 1039 - } 1040 - 1041 - /** 1042 - * @name HalAllocateAdapterChannel 1043 - * 1044 - * Setup map registers for an adapter object. 1045 - * 1046 - * @param AdapterObject 1047 - * Pointer to an ADAPTER_OBJECT to set up. 1048 - * @param WaitContextBlock 1049 - * Context block to be used with ExecutionRoutine. 1050 - * @param NumberOfMapRegisters 1051 - * Number of map registers requested. 1052 - * @param ExecutionRoutine 1053 - * Callback to call when map registers are allocated. 1054 - * 1055 - * @return 1056 - * If not enough map registers can be allocated then 1057 - * STATUS_INSUFFICIENT_RESOURCES is returned. If the function 1058 - * succeeds or the callback is queued for later delivering then 1059 - * STATUS_SUCCESS is returned. 1060 - * 1061 - * @see IoFreeAdapterChannel 1062 - * 1063 - * @implemented 1064 - */ 1065 - 1066 - NTSTATUS NTAPI 1067 - HalAllocateAdapterChannel( 1068 - PADAPTER_OBJECT AdapterObject, 1069 - PWAIT_CONTEXT_BLOCK WaitContextBlock, 1070 - ULONG NumberOfMapRegisters, 1071 - PDRIVER_CONTROL ExecutionRoutine) 1072 - { 1073 - PADAPTER_OBJECT MasterAdapter; 1074 - PGROW_WORK_ITEM WorkItem; 1075 - ULONG Index = MAXULONG; 1076 - ULONG Result; 1077 - KIRQL OldIrql; 1078 - 1079 - ASSERT(KeGetCurrentIrql() == DISPATCH_LEVEL); 1080 - 1081 - /* Set up the wait context block in case we can't run right away. */ 1082 - WaitContextBlock->DeviceRoutine = ExecutionRoutine; 1083 - WaitContextBlock->NumberOfMapRegisters = NumberOfMapRegisters; 1084 - 1085 - /* Returns true if queued, else returns false and sets the queue to busy */ 1086 - if (KeInsertDeviceQueue(&AdapterObject->ChannelWaitQueue, &WaitContextBlock->WaitQueueEntry)) 1087 - return STATUS_SUCCESS; 1088 - 1089 - MasterAdapter = AdapterObject->MasterAdapter; 1090 - 1091 - AdapterObject->NumberOfMapRegisters = NumberOfMapRegisters; 1092 - AdapterObject->CurrentWcb = WaitContextBlock; 1093 - 1094 - if (NumberOfMapRegisters && AdapterObject->NeedsMapRegisters) 1095 - { 1096 - if (NumberOfMapRegisters > AdapterObject->MapRegistersPerChannel) 1097 - { 1098 - AdapterObject->NumberOfMapRegisters = 0; 1099 - IoFreeAdapterChannel(AdapterObject); 1100 - return STATUS_INSUFFICIENT_RESOURCES; 1101 - } 1102 - 1103 - /* 1104 - * Get the map registers. This is partly complicated by the fact 1105 - * that new map registers can only be allocated at PASSIVE_LEVEL 1106 - * and we're currently at DISPATCH_LEVEL. The following code has 1107 - * two code paths: 1108 - * 1109 - * - If there is no adapter queued for map register allocation, 1110 - * try to see if enough contiguous map registers are present. 1111 - * In case they're we can just get them and proceed further. 1112 - * 1113 - * - If some adapter is already present in the queue we must 1114 - * respect the order of adapters asking for map registers and 1115 - * so the fast case described above can't take place. 1116 - * This case is also entered if not enough coniguous map 1117 - * registers are present. 1118 - * 1119 - * A work queue item is allocated and queued, the adapter is 1120 - * also queued into the master adapter queue. The worker 1121 - * routine does the job of allocating the map registers at 1122 - * PASSIVE_LEVEL and calling the ExecutionRoutine. 1123 - */ 1124 - 1125 - OldIrql = KfAcquireSpinLock(&MasterAdapter->SpinLock); 1126 - 1127 - if (IsListEmpty(&MasterAdapter->AdapterQueue)) 1128 - { 1129 - Index = RtlFindClearBitsAndSet( 1130 - MasterAdapter->MapRegisters, NumberOfMapRegisters, 0); 1131 - if (Index != MAXULONG) 1132 - { 1133 - AdapterObject->MapRegisterBase = 1134 - MasterAdapter->MapRegisterBase + Index; 1135 - if (!AdapterObject->ScatterGather) 1136 - { 1137 - AdapterObject->MapRegisterBase = 1138 - (PROS_MAP_REGISTER_ENTRY)( 1139 - (ULONG_PTR)AdapterObject->MapRegisterBase | 1140 - MAP_BASE_SW_SG); 1141 - } 1142 - } 1143 - } 1144 - 1145 - if (Index == MAXULONG) 1146 - { 1147 - WorkItem = ExAllocatePoolWithTag( 1148 - NonPagedPool, sizeof(GROW_WORK_ITEM), TAG_DMA); 1149 - if (WorkItem == NULL) 1150 - { 1151 - KfReleaseSpinLock(&MasterAdapter->SpinLock, OldIrql); 1152 - AdapterObject->NumberOfMapRegisters = 0; 1153 - IoFreeAdapterChannel(AdapterObject); 1154 - return STATUS_INSUFFICIENT_RESOURCES; 1155 - } 1156 - 1157 - InsertTailList(&MasterAdapter->AdapterQueue, &AdapterObject->AdapterQueue); 1158 - 1159 - ExInitializeWorkItem( 1160 - &WorkItem->WorkQueueItem, HalpGrowMapBufferWorker, WorkItem); 1161 - WorkItem->AdapterObject = AdapterObject; 1162 - WorkItem->NumberOfMapRegisters = NumberOfMapRegisters; 1163 - 1164 - ExQueueWorkItem(&WorkItem->WorkQueueItem, DelayedWorkQueue); 1165 - 1166 - KfReleaseSpinLock(&MasterAdapter->SpinLock, OldIrql); 1167 - 1168 - return STATUS_SUCCESS; 1169 - } 1170 - 1171 - KfReleaseSpinLock(&MasterAdapter->SpinLock, OldIrql); 1172 - } 1173 - else 1174 - { 1175 - AdapterObject->MapRegisterBase = NULL; 1176 - AdapterObject->NumberOfMapRegisters = 0; 1177 - } 1178 - 1179 - AdapterObject->CurrentWcb = WaitContextBlock; 1180 - 1181 - Result = ExecutionRoutine( 1182 - WaitContextBlock->DeviceObject, WaitContextBlock->CurrentIrp, 1183 - AdapterObject->MapRegisterBase, WaitContextBlock->DeviceContext); 1184 - 1185 - /* 1186 - * Possible return values: 1187 - * 1188 - * - KeepObject 1189 - * Don't free any resources, the ADAPTER_OBJECT is still in use and 1190 - * the caller will call IoFreeAdapterChannel later. 1191 - * 1192 - * - DeallocateObject 1193 - * Deallocate the map registers and release the ADAPTER_OBJECT, so 1194 - * someone else can use it. 1195 - * 1196 - * - DeallocateObjectKeepRegisters 1197 - * Release the ADAPTER_OBJECT, but hang on to the map registers. The 1198 - * client will later call IoFreeMapRegisters. 1199 - * 1200 - * NOTE: 1201 - * IoFreeAdapterChannel runs the queue, so it must be called unless 1202 - * the adapter object is not to be freed. 1203 - */ 1204 - 1205 - if (Result == DeallocateObject) 1206 - { 1207 - IoFreeAdapterChannel(AdapterObject); 1208 - } 1209 - else if (Result == DeallocateObjectKeepRegisters) 1210 - { 1211 - AdapterObject->NumberOfMapRegisters = 0; 1212 - IoFreeAdapterChannel(AdapterObject); 1213 - } 1214 - 1215 - return STATUS_SUCCESS; 1216 - } 1217 - 1218 - /** 1219 - * @name IoFreeAdapterChannel 1220 - * 1221 - * Free DMA resources allocated by IoAllocateAdapterChannel. 1222 - * 1223 - * @param AdapterObject 1224 - * Adapter object with resources to free. 1225 - * 1226 - * @remarks 1227 - * This function releases map registers registers assigned to the DMA 1228 - * adapter. After releasing the adapter, it checks the adapter's queue 1229 - * and runs each queued device object in series until the queue is 1230 - * empty. This is the only way the device queue is emptied. 1231 - * 1232 - * @see IoAllocateAdapterChannel 1233 - * 1234 - * @implemented 1235 - */ 1236 - 1237 - VOID NTAPI 1238 - IoFreeAdapterChannel( 1239 - PADAPTER_OBJECT AdapterObject) 1240 - { 1241 - PADAPTER_OBJECT MasterAdapter; 1242 - PKDEVICE_QUEUE_ENTRY DeviceQueueEntry; 1243 - PWAIT_CONTEXT_BLOCK WaitContextBlock; 1244 - ULONG Index = MAXULONG; 1245 - ULONG Result; 1246 - KIRQL OldIrql; 1247 - 1248 - MasterAdapter = AdapterObject->MasterAdapter; 1249 - 1250 - for (;;) 1251 - { 1252 - /* 1253 - * To keep map registers, call here with AdapterObject-> 1254 - * NumberOfMapRegisters set to zero. This trick is used in 1255 - * HalAllocateAdapterChannel for example. 1256 - */ 1257 - if (AdapterObject->NumberOfMapRegisters) 1258 - { 1259 - IoFreeMapRegisters( 1260 - AdapterObject, 1261 - AdapterObject->MapRegisterBase, 1262 - AdapterObject->NumberOfMapRegisters); 1263 - } 1264 - 1265 - DeviceQueueEntry = KeRemoveDeviceQueue(&AdapterObject->ChannelWaitQueue); 1266 - if (DeviceQueueEntry == NULL) 1267 - { 1268 - break; 1269 - } 1270 - 1271 - WaitContextBlock = CONTAINING_RECORD( 1272 - DeviceQueueEntry, 1273 - WAIT_CONTEXT_BLOCK, 1274 - WaitQueueEntry); 1275 - 1276 - AdapterObject->CurrentWcb = WaitContextBlock; 1277 - AdapterObject->NumberOfMapRegisters = WaitContextBlock->NumberOfMapRegisters; 1278 - 1279 - if (WaitContextBlock->NumberOfMapRegisters && 1280 - AdapterObject->MasterAdapter) 1281 - { 1282 - OldIrql = KfAcquireSpinLock(&MasterAdapter->SpinLock); 1283 - 1284 - if (IsListEmpty(&MasterAdapter->AdapterQueue)) 1285 - { 1286 - Index = RtlFindClearBitsAndSet( 1287 - MasterAdapter->MapRegisters, 1288 - WaitContextBlock->NumberOfMapRegisters, 0); 1289 - if (Index != MAXULONG) 1290 - { 1291 - AdapterObject->MapRegisterBase = 1292 - MasterAdapter->MapRegisterBase + Index; 1293 - if (!AdapterObject->ScatterGather) 1294 - { 1295 - AdapterObject->MapRegisterBase = 1296 - (PROS_MAP_REGISTER_ENTRY)( 1297 - (ULONG_PTR)AdapterObject->MapRegisterBase | 1298 - MAP_BASE_SW_SG); 1299 - } 1300 - } 1301 - } 1302 - 1303 - if (Index == MAXULONG) 1304 - { 1305 - InsertTailList(&MasterAdapter->AdapterQueue, &AdapterObject->AdapterQueue); 1306 - KfReleaseSpinLock(&MasterAdapter->SpinLock, OldIrql); 1307 - break; 1308 - } 1309 - 1310 - KfReleaseSpinLock(&MasterAdapter->SpinLock, OldIrql); 1311 - } 1312 - else 1313 - { 1314 - AdapterObject->MapRegisterBase = NULL; 1315 - AdapterObject->NumberOfMapRegisters = 0; 1316 - } 1317 - 1318 - /* Call the adapter control routine. */ 1319 - Result = ((PDRIVER_CONTROL)WaitContextBlock->DeviceRoutine)( 1320 - WaitContextBlock->DeviceObject, WaitContextBlock->CurrentIrp, 1321 - AdapterObject->MapRegisterBase, WaitContextBlock->DeviceContext); 1322 - 1323 - switch (Result) 1324 - { 1325 - case KeepObject: 1326 - /* 1327 - * We're done until the caller manually calls IoFreeAdapterChannel 1328 - * or IoFreeMapRegisters. 1329 - */ 1330 - return; 1331 - 1332 - case DeallocateObjectKeepRegisters: 1333 - /* 1334 - * Hide the map registers so they aren't deallocated next time 1335 - * around. 1336 - */ 1337 - AdapterObject->NumberOfMapRegisters = 0; 1338 - break; 1339 - 1340 - default: 1341 - break; 1342 - } 1343 - } 1344 - } 1345 - 1346 - /** 1347 - * @name IoFreeMapRegisters 1348 - * 1349 - * Free map registers reserved by the system for a DMA. 1350 - * 1351 - * @param AdapterObject 1352 - * DMA adapter to free map registers on. 1353 - * @param MapRegisterBase 1354 - * Handle to map registers to free. 1355 - * @param NumberOfRegisters 1356 - * Number of map registers to be freed. 1357 - * 1358 - * @implemented 1359 - */ 1360 - 1361 - VOID NTAPI 1362 - IoFreeMapRegisters( 1363 - IN PADAPTER_OBJECT AdapterObject, 1364 - IN PVOID MapRegisterBase, 1365 - IN ULONG NumberOfMapRegisters) 1366 - { 1367 - PADAPTER_OBJECT MasterAdapter = AdapterObject->MasterAdapter; 1368 - PLIST_ENTRY ListEntry; 1369 - KIRQL OldIrql; 1370 - ULONG Index; 1371 - ULONG Result; 1372 - 1373 - ASSERT(KeGetCurrentIrql() == DISPATCH_LEVEL); 1374 - 1375 - if (MasterAdapter == NULL || MapRegisterBase == NULL) 1376 - return; 1377 - 1378 - OldIrql = KfAcquireSpinLock(&MasterAdapter->SpinLock); 1379 - 1380 - if (NumberOfMapRegisters != 0) 1381 - { 1382 - PROS_MAP_REGISTER_ENTRY RealMapRegisterBase; 1383 - 1384 - RealMapRegisterBase = 1385 - (PROS_MAP_REGISTER_ENTRY)((ULONG_PTR)MapRegisterBase & ~MAP_BASE_SW_SG); 1386 - RtlClearBits(MasterAdapter->MapRegisters, 1387 - RealMapRegisterBase - MasterAdapter->MapRegisterBase, 1388 - NumberOfMapRegisters); 1389 - } 1390 - 1391 - /* 1392 - * Now that we freed few map registers it's time to look at the master 1393 - * adapter queue and see if there is someone waiting for map registers. 1394 - */ 1395 - 1396 - while (!IsListEmpty(&MasterAdapter->AdapterQueue)) 1397 - { 1398 - ListEntry = RemoveHeadList(&MasterAdapter->AdapterQueue); 1399 - AdapterObject = CONTAINING_RECORD( 1400 - ListEntry, struct _ADAPTER_OBJECT, AdapterQueue); 1401 - 1402 - Index = RtlFindClearBitsAndSet( 1403 - MasterAdapter->MapRegisters, 1404 - AdapterObject->NumberOfMapRegisters, 1405 - MasterAdapter->NumberOfMapRegisters); 1406 - if (Index == MAXULONG) 1407 - { 1408 - InsertHeadList(&MasterAdapter->AdapterQueue, ListEntry); 1409 - break; 1410 - } 1411 - 1412 - KfReleaseSpinLock(&MasterAdapter->SpinLock, OldIrql); 1413 - 1414 - AdapterObject->MapRegisterBase = 1415 - MasterAdapter->MapRegisterBase + Index; 1416 - if (!AdapterObject->ScatterGather) 1417 - { 1418 - AdapterObject->MapRegisterBase = 1419 - (PROS_MAP_REGISTER_ENTRY)( 1420 - (ULONG_PTR)AdapterObject->MapRegisterBase | 1421 - MAP_BASE_SW_SG); 1422 - } 1423 - 1424 - Result = ((PDRIVER_CONTROL)AdapterObject->CurrentWcb->DeviceRoutine)( 1425 - AdapterObject->CurrentWcb->DeviceObject, 1426 - AdapterObject->CurrentWcb->CurrentIrp, 1427 - AdapterObject->MapRegisterBase, 1428 - AdapterObject->CurrentWcb->DeviceContext); 1429 - 1430 - switch (Result) 1431 - { 1432 - case DeallocateObjectKeepRegisters: 1433 - AdapterObject->NumberOfMapRegisters = 0; 1434 - /* fall through */ 1435 - 1436 - case DeallocateObject: 1437 - if (AdapterObject->NumberOfMapRegisters) 1438 - { 1439 - OldIrql = KfAcquireSpinLock(&MasterAdapter->SpinLock); 1440 - RtlClearBits(MasterAdapter->MapRegisters, 1441 - AdapterObject->MapRegisterBase - 1442 - MasterAdapter->MapRegisterBase, 1443 - AdapterObject->NumberOfMapRegisters); 1444 - KfReleaseSpinLock(&MasterAdapter->SpinLock, OldIrql); 1445 - } 1446 - IoFreeAdapterChannel(AdapterObject); 1447 - break; 1448 - 1449 - default: 1450 - break; 1451 - } 1452 - 1453 - OldIrql = KfAcquireSpinLock(&MasterAdapter->SpinLock); 1454 - } 1455 - 1456 - KfReleaseSpinLock(&MasterAdapter->SpinLock, OldIrql); 1457 - } 1458 - 1459 - /** 1460 - * @name HalpCopyBufferMap 1461 - * 1462 - * Helper function for copying data from/to map register buffers. 1463 - * 1464 - * @see IoFlushAdapterBuffers, IoMapTransfer 1465 - */ 1466 - 1467 - VOID NTAPI 1468 - HalpCopyBufferMap( 1469 - PMDL Mdl, 1470 - PROS_MAP_REGISTER_ENTRY MapRegisterBase, 1471 - PVOID CurrentVa, 1472 - ULONG Length, 1473 - BOOLEAN WriteToDevice) 1474 - { 1475 - ULONG CurrentLength; 1476 - ULONG_PTR CurrentAddress; 1477 - ULONG ByteOffset; 1478 - PVOID VirtualAddress; 1479 - 1480 - VirtualAddress = MmGetSystemAddressForMdlSafe(Mdl, HighPagePriority); 1481 - if (VirtualAddress == NULL) 1482 - { 1483 - /* 1484 - * NOTE: On real NT a mechanism with reserved pages is implemented 1485 - * to handle this case in a slow, but graceful non-fatal way. 1486 - */ 1487 - KeBugCheckEx(HAL_MEMORY_ALLOCATION, PAGE_SIZE, 0, (ULONG_PTR)__FILE__, 0); 1488 - } 1489 - 1490 - CurrentAddress = (ULONG_PTR)VirtualAddress + 1491 - (ULONG_PTR)CurrentVa - 1492 - (ULONG_PTR)MmGetMdlVirtualAddress(Mdl); 1493 - 1494 - while (Length > 0) 1495 - { 1496 - ByteOffset = BYTE_OFFSET(CurrentAddress); 1497 - CurrentLength = PAGE_SIZE - ByteOffset; 1498 - if (CurrentLength > Length) 1499 - CurrentLength = Length; 1500 - 1501 - if (WriteToDevice) 1502 - { 1503 - RtlCopyMemory( 1504 - (PVOID)((ULONG_PTR)MapRegisterBase->VirtualAddress + ByteOffset), 1505 - (PVOID)CurrentAddress, 1506 - CurrentLength); 1507 - } 1508 - else 1509 - { 1510 - RtlCopyMemory( 1511 - (PVOID)CurrentAddress, 1512 - (PVOID)((ULONG_PTR)MapRegisterBase->VirtualAddress + ByteOffset), 1513 - CurrentLength); 1514 - } 1515 - 1516 - Length -= CurrentLength; 1517 - CurrentAddress += CurrentLength; 1518 - MapRegisterBase++; 1519 - } 1520 - } 1521 - 1522 - /** 1523 - * @name IoFlushAdapterBuffers 1524 - * 1525 - * Flush any data remaining in the DMA controller's memory into the host 1526 - * memory. 1527 - * 1528 - * @param AdapterObject 1529 - * The adapter object to flush. 1530 - * @param Mdl 1531 - * Original MDL to flush data into. 1532 - * @param MapRegisterBase 1533 - * Map register base that was just used by IoMapTransfer, etc. 1534 - * @param CurrentVa 1535 - * Offset into Mdl to be flushed into, same as was passed to 1536 - * IoMapTransfer. 1537 - * @param Length 1538 - * Length of the buffer to be flushed into. 1539 - * @param WriteToDevice 1540 - * TRUE if it's a write, FALSE if it's a read. 1541 - * 1542 - * @return TRUE in all cases. 1543 - * 1544 - * @remarks 1545 - * This copies data from the map register-backed buffer to the user's 1546 - * target buffer. Data are not in the user buffer until this function 1547 - * is called. 1548 - * For slave DMA transfers the controller channel is masked effectively 1549 - * stopping the current transfer. 1550 - * 1551 - * @unimplemented. 1552 - */ 1553 - 1554 - BOOLEAN NTAPI 1555 - IoFlushAdapterBuffers( 1556 - PADAPTER_OBJECT AdapterObject, 1557 - PMDL Mdl, 1558 - PVOID MapRegisterBase, 1559 - PVOID CurrentVa, 1560 - ULONG Length, 1561 - BOOLEAN WriteToDevice) 1562 - { 1563 - BOOLEAN SlaveDma = FALSE; 1564 - PROS_MAP_REGISTER_ENTRY RealMapRegisterBase; 1565 - PHYSICAL_ADDRESS HighestAcceptableAddress; 1566 - PHYSICAL_ADDRESS PhysicalAddress; 1567 - PPFN_NUMBER MdlPagesPtr; 1568 - 1569 - ASSERT_IRQL_LESS_OR_EQUAL(DISPATCH_LEVEL); 1570 - 1571 - if (AdapterObject != NULL && !AdapterObject->MasterDevice) 1572 - { 1573 - /* Mask out (disable) the DMA channel. */ 1574 - if (AdapterObject->AdapterNumber == 1) 1575 - { 1576 - PDMA1_CONTROL DmaControl1 = AdapterObject->AdapterBaseVa; 1577 - WRITE_PORT_UCHAR(&DmaControl1->SingleMask, 1578 - AdapterObject->ChannelNumber | DMA_SETMASK); 1579 - } 1580 - else 1581 - { 1582 - PDMA2_CONTROL DmaControl2 = AdapterObject->AdapterBaseVa; 1583 - WRITE_PORT_UCHAR(&DmaControl2->SingleMask, 1584 - AdapterObject->ChannelNumber | DMA_SETMASK); 1585 - } 1586 - SlaveDma = TRUE; 1587 - } 1588 - 1589 - /* This can happen if the device supports hardware scatter/gather. */ 1590 - if (MapRegisterBase == NULL) 1591 - return TRUE; 1592 - 1593 - RealMapRegisterBase = 1594 - (PROS_MAP_REGISTER_ENTRY)((ULONG_PTR)MapRegisterBase & ~MAP_BASE_SW_SG); 1595 - 1596 - if (!WriteToDevice) 1597 - { 1598 - if ((ULONG_PTR)MapRegisterBase & MAP_BASE_SW_SG) 1599 - { 1600 - if (RealMapRegisterBase->Counter != MAXULONG) 1601 - { 1602 - if (SlaveDma && !AdapterObject->IgnoreCount) 1603 - Length -= HalReadDmaCounter(AdapterObject); 1604 - HalpCopyBufferMap(Mdl, RealMapRegisterBase, CurrentVa, Length, FALSE); 1605 - } 1606 - } 1607 - else 1608 - { 1609 - MdlPagesPtr = MmGetMdlPfnArray(Mdl); 1610 - MdlPagesPtr += ((ULONG_PTR)CurrentVa - (ULONG_PTR)Mdl->StartVa) >> PAGE_SHIFT; 1611 - 1612 - PhysicalAddress.QuadPart = *MdlPagesPtr << PAGE_SHIFT; 1613 - PhysicalAddress.QuadPart += BYTE_OFFSET(CurrentVa); 1614 - 1615 - HighestAcceptableAddress = HalpGetAdapterMaximumPhysicalAddress(AdapterObject); 1616 - if (PhysicalAddress.QuadPart + Length > 1617 - HighestAcceptableAddress.QuadPart) 1618 - { 1619 - HalpCopyBufferMap(Mdl, RealMapRegisterBase, CurrentVa, Length, FALSE); 1620 - } 1621 - } 1622 - } 1623 - 1624 - RealMapRegisterBase->Counter = 0; 1625 - 1626 - return TRUE; 1627 - } 1628 - 1629 - /** 1630 - * @name IoMapTransfer 1631 - * 1632 - * Map a DMA for transfer and do the DMA if it's a slave. 1633 - * 1634 - * @param AdapterObject 1635 - * Adapter object to do the DMA on. Bus-master may pass NULL. 1636 - * @param Mdl 1637 - * Locked-down user buffer to DMA in to or out of. 1638 - * @param MapRegisterBase 1639 - * Handle to map registers to use for this dma. 1640 - * @param CurrentVa 1641 - * Index into Mdl to transfer into/out of. 1642 - * @param Length 1643 - * Length of transfer. Number of bytes actually transferred on 1644 - * output. 1645 - * @param WriteToDevice 1646 - * TRUE if it's an output DMA, FALSE otherwise. 1647 - * 1648 - * @return 1649 - * A logical address that can be used to program a DMA controller, it's 1650 - * not meaningful for slave DMA device. 1651 - * 1652 - * @remarks 1653 - * This function does a copyover to contiguous memory <16MB represented 1654 - * by the map registers if needed. If the buffer described by MDL can be 1655 - * used as is no copyover is done. 1656 - * If it's a slave transfer, this function actually performs it. 1657 - * 1658 - * @implemented 1659 - */ 1660 - 1661 - PHYSICAL_ADDRESS NTAPI 1662 - IoMapTransfer( 1663 - IN PADAPTER_OBJECT AdapterObject, 1664 - IN PMDL Mdl, 1665 - IN PVOID MapRegisterBase, 1666 - IN PVOID CurrentVa, 1667 - IN OUT PULONG Length, 1668 - IN BOOLEAN WriteToDevice) 1669 - { 1670 - PPFN_NUMBER MdlPagesPtr; 1671 - PFN_NUMBER MdlPage1, MdlPage2; 1672 - ULONG ByteOffset; 1673 - ULONG TransferOffset; 1674 - ULONG TransferLength; 1675 - BOOLEAN UseMapRegisters; 1676 - PROS_MAP_REGISTER_ENTRY RealMapRegisterBase; 1677 - PHYSICAL_ADDRESS PhysicalAddress; 1678 - PHYSICAL_ADDRESS HighestAcceptableAddress; 1679 - ULONG Counter; 1680 - DMA_MODE AdapterMode; 1681 - KIRQL OldIrql; 1682 - 1683 - /* 1684 - * Precalculate some values that are used in all cases. 1685 - * 1686 - * ByteOffset is offset inside the page at which the transfer starts. 1687 - * MdlPagesPtr is pointer inside the MDL page chain at the page where the 1688 - * transfer start. 1689 - * PhysicalAddress is physical address corresponding to the transfer 1690 - * start page and offset. 1691 - * TransferLength is the initial length of the transfer, which is reminder 1692 - * of the first page. The actual value is calculated below. 1693 - * 1694 - * Note that all the variables can change during the processing which 1695 - * takes place below. These are just initial values. 1696 - */ 1697 - 1698 - ByteOffset = BYTE_OFFSET(CurrentVa); 1699 - 1700 - MdlPagesPtr = MmGetMdlPfnArray(Mdl); 1701 - MdlPagesPtr += ((ULONG_PTR)CurrentVa - (ULONG_PTR)Mdl->StartVa) >> PAGE_SHIFT; 1702 - 1703 - PhysicalAddress.QuadPart = *MdlPagesPtr << PAGE_SHIFT; 1704 - PhysicalAddress.QuadPart += ByteOffset; 1705 - 1706 - TransferLength = PAGE_SIZE - ByteOffset; 1707 - 1708 - /* 1709 - * Special case for bus master adapters with S/G support. We can directly 1710 - * use the buffer specified by the MDL, so not much work has to be done. 1711 - * 1712 - * Just return the passed VA's corresponding physical address and update 1713 - * length to the number of physically contiguous bytes found. Also 1714 - * pages crossing the 4Gb boundary aren't considered physically contiguous. 1715 - */ 1716 - 1717 - if (MapRegisterBase == NULL) 1718 - { 1719 - while (TransferLength < *Length) 1720 - { 1721 - MdlPage1 = *MdlPagesPtr; 1722 - MdlPage2 = *(MdlPagesPtr + 1); 1723 - if (MdlPage1 + 1 != MdlPage2) 1724 - break; 1725 - if ((MdlPage1 ^ MdlPage2) & ~0xFFFFF) 1726 - break; 1727 - TransferLength += PAGE_SIZE; 1728 - MdlPagesPtr++; 1729 - } 1730 - 1731 - if (TransferLength < *Length) 1732 - *Length = TransferLength; 1733 - 1734 - return PhysicalAddress; 1735 - } 1736 - 1737 - /* 1738 - * The code below applies to slave DMA adapters and bus master adapters 1739 - * without hardward S/G support. 1740 - */ 1741 - 1742 - RealMapRegisterBase = 1743 - (PROS_MAP_REGISTER_ENTRY)((ULONG_PTR)MapRegisterBase & ~MAP_BASE_SW_SG); 1744 - 1745 - /* 1746 - * Try to calculate the size of the transfer. We can only transfer 1747 - * pages that are physically contiguous and that don't cross the 1748 - * 64Kb boundary (this limitation applies only for ISA controllers). 1749 - */ 1750 - 1751 - while (TransferLength < *Length) 1752 - { 1753 - MdlPage1 = *MdlPagesPtr; 1754 - MdlPage2 = *(MdlPagesPtr + 1); 1755 - if (MdlPage1 + 1 != MdlPage2) 1756 - break; 1757 - if (!HalpEisaDma && ((MdlPage1 ^ MdlPage2) & ~0xF)) 1758 - break; 1759 - TransferLength += PAGE_SIZE; 1760 - MdlPagesPtr++; 1761 - } 1762 - 1763 - if (TransferLength > *Length) 1764 - TransferLength = *Length; 1765 - 1766 - /* 1767 - * If we're about to simulate software S/G and not all the pages are 1768 - * physically contiguous then we must use the map registers to store 1769 - * the data and allow the whole transfer to proceed at once. 1770 - */ 1771 - 1772 - if ((ULONG_PTR)MapRegisterBase & MAP_BASE_SW_SG && 1773 - TransferLength < *Length) 1774 - { 1775 - UseMapRegisters = TRUE; 1776 - PhysicalAddress = RealMapRegisterBase->PhysicalAddress; 1777 - PhysicalAddress.QuadPart += ByteOffset; 1778 - TransferLength = *Length; 1779 - RealMapRegisterBase->Counter = MAXULONG; 1780 - Counter = 0; 1781 - } 1782 - else 1783 - { 1784 - /* 1785 - * This is ordinary DMA transfer, so just update the progress 1786 - * counters. These are used by IoFlushAdapterBuffers to track 1787 - * the transfer progress. 1788 - */ 1789 - 1790 - UseMapRegisters = FALSE; 1791 - Counter = RealMapRegisterBase->Counter; 1792 - RealMapRegisterBase->Counter += BYTES_TO_PAGES(ByteOffset + TransferLength); 1793 - 1794 - /* 1795 - * Check if the buffer doesn't exceed the highest physical address 1796 - * limit of the device. In that case we must use the map registers to 1797 - * store the data. 1798 - */ 1799 - 1800 - HighestAcceptableAddress = HalpGetAdapterMaximumPhysicalAddress(AdapterObject); 1801 - if (PhysicalAddress.QuadPart + TransferLength > 1802 - HighestAcceptableAddress.QuadPart) 1803 - { 1804 - UseMapRegisters = TRUE; 1805 - PhysicalAddress = RealMapRegisterBase[Counter].PhysicalAddress; 1806 - PhysicalAddress.QuadPart += ByteOffset; 1807 - if ((ULONG_PTR)MapRegisterBase & MAP_BASE_SW_SG) 1808 - { 1809 - RealMapRegisterBase->Counter = MAXULONG; 1810 - Counter = 0; 1811 - } 1812 - } 1813 - } 1814 - 1815 - /* 1816 - * If we decided to use the map registers (see above) and we're about 1817 - * to transfer data to the device then copy the buffers into the map 1818 - * register memory. 1819 - */ 1820 - 1821 - if (UseMapRegisters && WriteToDevice) 1822 - { 1823 - HalpCopyBufferMap(Mdl, RealMapRegisterBase + Counter, 1824 - CurrentVa, TransferLength, WriteToDevice); 1825 - } 1826 - 1827 - /* 1828 - * Return the length of transfer that actually takes place. 1829 - */ 1830 - 1831 - *Length = TransferLength; 1832 - 1833 - /* 1834 - * If we're doing slave (system) DMA then program the (E)ISA controller 1835 - * to actually start the transfer. 1836 - */ 1837 - 1838 - if (AdapterObject != NULL && !AdapterObject->MasterDevice) 1839 - { 1840 - AdapterMode = AdapterObject->AdapterMode; 1841 - 1842 - if (WriteToDevice) 1843 - { 1844 - AdapterMode.TransferType = WRITE_TRANSFER; 1845 - } 1846 - else 1847 - { 1848 - AdapterMode.TransferType = READ_TRANSFER; 1849 - if (AdapterObject->IgnoreCount) 1850 - { 1851 - RtlZeroMemory((PUCHAR)RealMapRegisterBase[Counter].VirtualAddress + 1852 - ByteOffset, TransferLength); 1853 - } 1854 - } 1855 - 1856 - TransferOffset = PhysicalAddress.LowPart & 0xFFFF; 1857 - if (AdapterObject->Width16Bits) 1858 - { 1859 - TransferLength >>= 1; 1860 - TransferOffset >>= 1; 1861 - } 1862 - 1863 - OldIrql = KfAcquireSpinLock(&AdapterObject->MasterAdapter->SpinLock); 1864 - 1865 - if (AdapterObject->AdapterNumber == 1) 1866 - { 1867 - PDMA1_CONTROL DmaControl1 = AdapterObject->AdapterBaseVa; 1868 - 1869 - /* Reset Register */ 1870 - WRITE_PORT_UCHAR(&DmaControl1->ClearBytePointer, 0); 1871 - /* Set the Mode */ 1872 - WRITE_PORT_UCHAR(&DmaControl1->Mode, AdapterMode.Byte); 1873 - /* Set the Offset Register */ 1874 - WRITE_PORT_UCHAR(&DmaControl1->DmaAddressCount[AdapterObject->ChannelNumber].DmaBaseAddress, 1875 - (UCHAR)(TransferOffset)); 1876 - WRITE_PORT_UCHAR(&DmaControl1->DmaAddressCount[AdapterObject->ChannelNumber].DmaBaseAddress, 1877 - (UCHAR)(TransferOffset >> 8)); 1878 - /* Set the Page Register */ 1879 - WRITE_PORT_UCHAR(AdapterObject->PagePort + 1880 - FIELD_OFFSET(EISA_CONTROL, DmaController1Pages), 1881 - (UCHAR)(PhysicalAddress.LowPart >> 16)); 1882 - if (HalpEisaDma) 1883 - { 1884 - WRITE_PORT_UCHAR(AdapterObject->PagePort + 1885 - FIELD_OFFSET(EISA_CONTROL, DmaController2Pages), 1886 - 0); 1887 - } 1888 - /* Set the Length */ 1889 - WRITE_PORT_UCHAR(&DmaControl1->DmaAddressCount[AdapterObject->ChannelNumber].DmaBaseCount, 1890 - (UCHAR)(TransferLength - 1)); 1891 - WRITE_PORT_UCHAR(&DmaControl1->DmaAddressCount[AdapterObject->ChannelNumber].DmaBaseCount, 1892 - (UCHAR)((TransferLength - 1) >> 8)); 1893 - /* Unmask the Channel */ 1894 - WRITE_PORT_UCHAR(&DmaControl1->SingleMask, 1895 - AdapterObject->ChannelNumber | DMA_CLEARMASK); 1896 - } 1897 - else 1898 - { 1899 - PDMA2_CONTROL DmaControl2 = AdapterObject->AdapterBaseVa; 1900 - 1901 - /* Reset Register */ 1902 - WRITE_PORT_UCHAR(&DmaControl2->ClearBytePointer, 0); 1903 - /* Set the Mode */ 1904 - WRITE_PORT_UCHAR(&DmaControl2->Mode, AdapterMode.Byte); 1905 - /* Set the Offset Register */ 1906 - WRITE_PORT_UCHAR(&DmaControl2->DmaAddressCount[AdapterObject->ChannelNumber].DmaBaseAddress, 1907 - (UCHAR)(TransferOffset)); 1908 - WRITE_PORT_UCHAR(&DmaControl2->DmaAddressCount[AdapterObject->ChannelNumber].DmaBaseAddress, 1909 - (UCHAR)(TransferOffset >> 8)); 1910 - /* Set the Page Register */ 1911 - WRITE_PORT_UCHAR(AdapterObject->PagePort + 1912 - FIELD_OFFSET(EISA_CONTROL, DmaController1Pages), 1913 - (UCHAR)(PhysicalAddress.u.LowPart >> 16)); 1914 - if (HalpEisaDma) 1915 - { 1916 - WRITE_PORT_UCHAR(AdapterObject->PagePort + 1917 - FIELD_OFFSET(EISA_CONTROL, DmaController2Pages), 1918 - 0); 1919 - } 1920 - /* Set the Length */ 1921 - WRITE_PORT_UCHAR(&DmaControl2->DmaAddressCount[AdapterObject->ChannelNumber].DmaBaseCount, 1922 - (UCHAR)(TransferLength - 1)); 1923 - WRITE_PORT_UCHAR(&DmaControl2->DmaAddressCount[AdapterObject->ChannelNumber].DmaBaseCount, 1924 - (UCHAR)((TransferLength - 1) >> 8)); 1925 - /* Unmask the Channel */ 1926 - WRITE_PORT_UCHAR(&DmaControl2->SingleMask, 1927 - AdapterObject->ChannelNumber | DMA_CLEARMASK); 1928 - } 1929 - 1930 - KfReleaseSpinLock(&AdapterObject->MasterAdapter->SpinLock, OldIrql); 1931 - } 1932 - 1933 - /* 1934 - * Return physical address of the buffer with data that is used for the 1935 - * transfer. It can either point inside the Mdl that was passed by the 1936 - * caller or into the map registers if the Mdl buffer can't be used 1937 - * directly. 1938 - */ 1939 - 1940 - return PhysicalAddress; 1941 - } 1942 - 1943 - /** 1944 - * @name HalFlushCommonBuffer 1945 - * 1946 - * @implemented 1947 - */ 1948 - BOOLEAN 1949 - NTAPI 1950 - HalFlushCommonBuffer(IN PADAPTER_OBJECT AdapterObject, 1951 - IN ULONG Length, 1952 - IN PHYSICAL_ADDRESS LogicalAddress, 1953 - IN PVOID VirtualAddress) 1954 - { 1955 - /* Function always returns true */ 1956 - return TRUE; 1957 - } 1958 - 1959 - /* 1960 - * @implemented 1961 - */ 1962 - PVOID 1963 - NTAPI 1964 - HalAllocateCrashDumpRegisters(IN PADAPTER_OBJECT AdapterObject, 1965 - IN OUT PULONG NumberOfMapRegisters) 1966 - { 1967 - PADAPTER_OBJECT MasterAdapter = AdapterObject->MasterAdapter; 1968 - ULONG MapRegisterNumber; 1969 - 1970 - /* Check if it needs map registers */ 1971 - if (AdapterObject->NeedsMapRegisters) 1972 - { 1973 - /* Check if we have enough */ 1974 - if (*NumberOfMapRegisters > AdapterObject->MapRegistersPerChannel) 1975 - { 1976 - /* We don't, fail */ 1977 - AdapterObject->NumberOfMapRegisters = 0; 1978 - return NULL; 1979 - } 1980 - 1981 - /* Try to find free map registers */ 1982 - MapRegisterNumber = RtlFindClearBitsAndSet(MasterAdapter->MapRegisters, 1983 - *NumberOfMapRegisters, 1984 - 0); 1985 - 1986 - /* Check if nothing was found */ 1987 - if (MapRegisterNumber == MAXULONG) 1988 - { 1989 - /* No free registers found, so use the base registers */ 1990 - RtlSetBits(MasterAdapter->MapRegisters, 1991 - 0, 1992 - *NumberOfMapRegisters); 1993 - MapRegisterNumber = 0; 1994 - } 1995 - 1996 - /* Calculate the new base */ 1997 - AdapterObject->MapRegisterBase = 1998 - (PROS_MAP_REGISTER_ENTRY)(MasterAdapter->MapRegisterBase + 1999 - MapRegisterNumber); 2000 - 2001 - /* Check if scatter gather isn't supported */ 2002 - if (!AdapterObject->ScatterGather) 2003 - { 2004 - /* Set the flag */ 2005 - AdapterObject->MapRegisterBase = 2006 - (PROS_MAP_REGISTER_ENTRY) 2007 - ((ULONG_PTR)AdapterObject->MapRegisterBase | MAP_BASE_SW_SG); 2008 - } 2009 - } 2010 - else 2011 - { 2012 - AdapterObject->MapRegisterBase = NULL; 2013 - AdapterObject->NumberOfMapRegisters = 0; 2014 - } 2015 - 2016 - /* Return the base */ 2017 - return AdapterObject->MapRegisterBase; 2018 - } 2019 - 2020 - /* EOF */
-74
hal/halppc/generic/drive.c
··· 1 - /* 2 - * PROJECT: ReactOS HAL 3 - * LICENSE: GPL - See COPYING in the top level directory 4 - * FILE: hal/halppc/generic/drive.c 5 - * PURPOSE: I/O HAL Routines for Disk Access 6 - * PROGRAMMERS: Alex Ionescu (alex.ionescu@reactos.org) 7 - */ 8 - 9 - /* INCLUDES ******************************************************************/ 10 - 11 - #include <hal.h> 12 - #define NDEBUG 13 - #include <debug.h> 14 - 15 - /* FUNCTIONS *****************************************************************/ 16 - 17 - VOID 18 - NTAPI 19 - HalpAssignDriveLetters(IN struct _LOADER_PARAMETER_BLOCK *LoaderBlock, 20 - IN PSTRING NtDeviceName, 21 - OUT PUCHAR NtSystemPath, 22 - OUT PSTRING NtSystemPathString) 23 - { 24 - /* Call the kernel */ 25 - IoAssignDriveLetters(LoaderBlock, 26 - NtDeviceName, 27 - NtSystemPath, 28 - NtSystemPathString); 29 - } 30 - 31 - NTSTATUS 32 - NTAPI 33 - HalpReadPartitionTable(IN PDEVICE_OBJECT DeviceObject, 34 - IN ULONG SectorSize, 35 - IN BOOLEAN ReturnRecognizedPartitions, 36 - IN OUT PDRIVE_LAYOUT_INFORMATION *PartitionBuffer) 37 - { 38 - /* Call the kernel */ 39 - return IoReadPartitionTable(DeviceObject, 40 - SectorSize, 41 - ReturnRecognizedPartitions, 42 - PartitionBuffer); 43 - } 44 - 45 - NTSTATUS 46 - NTAPI 47 - HalpWritePartitionTable(IN PDEVICE_OBJECT DeviceObject, 48 - IN ULONG SectorSize, 49 - IN ULONG SectorsPerTrack, 50 - IN ULONG NumberOfHeads, 51 - IN PDRIVE_LAYOUT_INFORMATION PartitionBuffer) 52 - { 53 - /* Call the kernel */ 54 - return IoWritePartitionTable(DeviceObject, 55 - SectorSize, 56 - SectorsPerTrack, 57 - NumberOfHeads, 58 - PartitionBuffer); 59 - } 60 - 61 - NTSTATUS 62 - NTAPI 63 - HalpSetPartitionInformation(IN PDEVICE_OBJECT DeviceObject, 64 - IN ULONG SectorSize, 65 - IN ULONG PartitionNumber, 66 - IN ULONG PartitionType) 67 - { 68 - /* Call the kernel */ 69 - return IoSetPartitionInformation(DeviceObject, 70 - SectorSize, 71 - PartitionNumber, 72 - PartitionType); 73 - } 74 - /* EOF */
-22
hal/halppc/generic/enum.c
··· 1 - /* 2 - * COPYRIGHT: See COPYING in the top level directory 3 - * PROJECT: ReactOS kernel 4 - * FILE: hal/halppc/generic/enum.c 5 - * PURPOSE: Motherboard device enumerator 6 - * PROGRAMMER: Casper S. Hornstrup (chorns@users.sourceforge.net) 7 - * UPDATE HISTORY: 8 - * Created 01/05/2001 9 - */ 10 - 11 - /* INCLUDES *****************************************************************/ 12 - 13 - #include <hal.h> 14 - #define NDEBUG 15 - #include <debug.h> 16 - 17 - VOID 18 - HalpStartEnumerator (VOID) 19 - { 20 - } 21 - 22 - /* EOF */
-100
hal/halppc/generic/fmutex.c
··· 1 - /* 2 - * COPYRIGHT: See COPYING in the top level directory 3 - * PROJECT: ReactOS HAL 4 - * FILE: hal/halppc/generic/fmutex.c 5 - * PURPOSE: Deprecated HAL Fast Mutex 6 - * PROGRAMMERS: Alex Ionescu (alex@relsoft.net) 7 - */ 8 - 9 - /* 10 - * NOTE: Even HAL itself has #defines to use the Exi* APIs inside NTOSKRNL. 11 - * These are only exported here for compatibility with really old 12 - * drivers. Also note that in theory, these can be made much faster 13 - * by using assembly and inlining all the operations, including 14 - * raising and lowering irql. 15 - */ 16 - 17 - /* INCLUDES *****************************************************************/ 18 - 19 - #include <hal.h> 20 - #define NDEBUG 21 - #include <debug.h> 22 - 23 - #undef ExAcquireFastMutex 24 - #undef ExReleaseFastMutex 25 - 26 - /* FUNCTIONS *****************************************************************/ 27 - 28 - VOID 29 - FASTCALL 30 - ExAcquireFastMutex(PFAST_MUTEX FastMutex) 31 - { 32 - KIRQL OldIrql; 33 - 34 - /* Raise IRQL to APC */ 35 - KeRaiseIrql(APC_LEVEL, &OldIrql); 36 - 37 - /* Decrease the count */ 38 - if (InterlockedDecrement(&FastMutex->Count)) 39 - { 40 - /* Someone is still holding it, use slow path */ 41 - FastMutex->Contention++; 42 - KeWaitForSingleObject(&FastMutex->Event, 43 - WrExecutive, 44 - KernelMode, 45 - FALSE, 46 - NULL); 47 - } 48 - 49 - /* Set the owner and IRQL */ 50 - FastMutex->Owner = KeGetCurrentThread(); 51 - FastMutex->OldIrql = OldIrql; 52 - } 53 - 54 - VOID 55 - FASTCALL 56 - ExReleaseFastMutex(PFAST_MUTEX FastMutex) 57 - { 58 - KIRQL OldIrql; 59 - 60 - /* Erase the owner */ 61 - FastMutex->Owner = (PVOID)1; 62 - OldIrql = FastMutex->OldIrql; 63 - 64 - /* Increase the count */ 65 - if (InterlockedIncrement(&FastMutex->Count) <= 0) 66 - { 67 - /* Someone was waiting for it, signal the waiter */ 68 - KeSetEventBoostPriority(&FastMutex->Event, IO_NO_INCREMENT); 69 - } 70 - 71 - /* Lower IRQL back */ 72 - KeLowerIrql(OldIrql); 73 - } 74 - 75 - BOOLEAN 76 - FASTCALL 77 - ExiTryToAcquireFastMutex(PFAST_MUTEX FastMutex) 78 - { 79 - KIRQL OldIrql; 80 - 81 - /* Raise to APC_LEVEL */ 82 - KeRaiseIrql(APC_LEVEL, &OldIrql); 83 - 84 - /* Check if we can quickly acquire it */ 85 - if (InterlockedCompareExchange(&FastMutex->Count, 0, 1) == 1) 86 - { 87 - /* We have, set us as owners */ 88 - FastMutex->Owner = KeGetCurrentThread(); 89 - FastMutex->OldIrql = OldIrql; 90 - return TRUE; 91 - } 92 - else 93 - { 94 - /* Acquire attempt failed */ 95 - KeLowerIrql(OldIrql); 96 - return FALSE; 97 - } 98 - } 99 - 100 - /* EOF */
-277
hal/halppc/generic/font.c
··· 1 - /* 2 - * COPYRIGHT: See COPYING in the top level directory 3 - * PROJECT: Xbox HAL 4 - * FILE: hal/halppc/generic/font.c 5 - * PURPOSE: Font glyphs 6 - * PROGRAMMER: Ge van Geldorp (gvg@reactos.com) 7 - * UPDATE HISTORY: 8 - * Created 2004/12/02 9 - * 10 - * Note: Converted from the XFree vga.bdf font 11 - */ 12 - 13 - #define NDEBUG 14 - #include <debug.h> 15 - 16 - unsigned char XboxFont8x16[256 * 16] = 17 - { 18 - 0x00,0x00,0x00,0x7c,0xc6,0xc6,0xde,0xde,0xde,0xdc,0xc0,0x7c,0x00,0x00,0x00,0x00, /* 0x00 */ 19 - 0x00,0x00,0x7e,0x81,0xa5,0x81,0x81,0xa5,0x99,0x81,0x81,0x7e,0x00,0x00,0x00,0x00, /* 0x01 */ 20 - 0x00,0x00,0x7e,0xff,0xdb,0xff,0xff,0xdb,0xe7,0xff,0xff,0x7e,0x00,0x00,0x00,0x00, /* 0x02 */ 21 - 0x00,0x00,0x00,0x00,0x6c,0xfe,0xfe,0xfe,0xfe,0x7c,0x38,0x10,0x00,0x00,0x00,0x00, /* 0x03 */ 22 - 0x00,0x00,0x00,0x00,0x10,0x38,0x7c,0xfe,0x7c,0x38,0x10,0x00,0x00,0x00,0x00,0x00, /* 0x04 */ 23 - 0x00,0x00,0x00,0x18,0x3c,0x3c,0xe7,0xe7,0xe7,0x18,0x18,0x3c,0x00,0x00,0x00,0x00, /* 0x05 */ 24 - 0x00,0x00,0x00,0x18,0x3c,0x7e,0xff,0xff,0x7e,0x18,0x18,0x3c,0x00,0x00,0x00,0x00, /* 0x06 */ 25 - 0x00,0x00,0x00,0x00,0x00,0x00,0x18,0x3c,0x3c,0x18,0x00,0x00,0x00,0x00,0x00,0x00, /* 0x07 */ 26 - 0xff,0xff,0xff,0xff,0xff,0xff,0xe7,0xc3,0xc3,0xe7,0xff,0xff,0xff,0xff,0xff,0xff, /* 0x08 */ 27 - 0x00,0x00,0x00,0x00,0x00,0x3c,0x66,0x42,0x42,0x66,0x3c,0x00,0x00,0x00,0x00,0x00, /* 0x09 */ 28 - 0xff,0xff,0xff,0xff,0xff,0xc3,0x99,0xbd,0xbd,0x99,0xc3,0xff,0xff,0xff,0xff,0xff, /* 0x0a */ 29 - 0x00,0x00,0x1e,0x06,0x0e,0x1a,0x78,0xcc,0xcc,0xcc,0xcc,0x78,0x00,0x00,0x00,0x00, /* 0x0b */ 30 - 0x00,0x00,0x3c,0x66,0x66,0x66,0x66,0x3c,0x18,0x7e,0x18,0x18,0x00,0x00,0x00,0x00, /* 0x0c */ 31 - 0x00,0x00,0x3f,0x33,0x3f,0x30,0x30,0x30,0x30,0x70,0xf0,0xe0,0x00,0x00,0x00,0x00, /* 0x0d */ 32 - 0x00,0x00,0x7f,0x63,0x7f,0x63,0x63,0x63,0x63,0x67,0xe7,0xe6,0xc0,0x00,0x00,0x00, /* 0x0e */ 33 - 0x00,0x00,0x00,0x18,0x18,0xdb,0x3c,0xe7,0x3c,0xdb,0x18,0x18,0x00,0x00,0x00,0x00, /* 0x0f */ 34 - 0x00,0x80,0xc0,0xe0,0xf0,0xf8,0xfe,0xf8,0xf0,0xe0,0xc0,0x80,0x00,0x00,0x00,0x00, /* 0x10 */ 35 - 0x00,0x02,0x06,0x0e,0x1e,0x3e,0xfe,0x3e,0x1e,0x0e,0x06,0x02,0x00,0x00,0x00,0x00, /* 0x11 */ 36 - 0x00,0x00,0x18,0x3c,0x7e,0x18,0x18,0x18,0x7e,0x3c,0x18,0x00,0x00,0x00,0x00,0x00, /* 0x12 */ 37 - 0x00,0x00,0x66,0x66,0x66,0x66,0x66,0x66,0x66,0x00,0x66,0x66,0x00,0x00,0x00,0x00, /* 0x13 */ 38 - 0x00,0x00,0x7f,0xdb,0xdb,0xdb,0x7b,0x1b,0x1b,0x1b,0x1b,0x1b,0x00,0x00,0x00,0x00, /* 0x14 */ 39 - 0x00,0x7c,0xc6,0x60,0x38,0x6c,0xc6,0xc6,0x6c,0x38,0x0c,0xc6,0x7c,0x00,0x00,0x00, /* 0x15 */ 40 - 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xfe,0xfe,0xfe,0xfe,0x00,0x00,0x00,0x00, /* 0x16 */ 41 - 0x00,0x00,0x18,0x3c,0x7e,0x18,0x18,0x18,0x7e,0x3c,0x18,0x7e,0x00,0x00,0x00,0x00, /* 0x17 */ 42 - 0x00,0x00,0x18,0x3c,0x7e,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x00,0x00,0x00,0x00, /* 0x18 */ 43 - 0x00,0x00,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x7e,0x3c,0x18,0x00,0x00,0x00,0x00, /* 0x19 */ 44 - 0x00,0x00,0x00,0x00,0x00,0x18,0x0c,0xfe,0x0c,0x18,0x00,0x00,0x00,0x00,0x00,0x00, /* 0x1a */ 45 - 0x00,0x00,0x00,0x00,0x00,0x30,0x60,0xfe,0x60,0x30,0x00,0x00,0x00,0x00,0x00,0x00, /* 0x1b */ 46 - 0x00,0x00,0x00,0x00,0x00,0x00,0xc0,0xc0,0xc0,0xfe,0x00,0x00,0x00,0x00,0x00,0x00, /* 0x1c */ 47 - 0x00,0x00,0x00,0x00,0x00,0x28,0x6c,0xfe,0x6c,0x28,0x00,0x00,0x00,0x00,0x00,0x00, /* 0x1d */ 48 - 0x00,0x00,0x00,0x00,0x10,0x38,0x38,0x7c,0x7c,0xfe,0xfe,0x00,0x00,0x00,0x00,0x00, /* 0x1e */ 49 - 0x00,0x00,0x00,0x00,0xfe,0xfe,0x7c,0x7c,0x38,0x38,0x10,0x00,0x00,0x00,0x00,0x00, /* 0x1f */ 50 - 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, /* */ 51 - 0x00,0x00,0x18,0x3c,0x3c,0x3c,0x18,0x18,0x18,0x00,0x18,0x18,0x00,0x00,0x00,0x00, /* ! */ 52 - 0x00,0x66,0x66,0x66,0x24,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, /* " */ 53 - 0x00,0x00,0x00,0x6c,0x6c,0xfe,0x6c,0x6c,0x6c,0xfe,0x6c,0x6c,0x00,0x00,0x00,0x00, /* # */ 54 - 0x18,0x18,0x7c,0xc6,0xc2,0xc0,0x7c,0x06,0x06,0x86,0xc6,0x7c,0x18,0x18,0x00,0x00, /* $ */ 55 - 0x00,0x00,0x00,0x00,0xc2,0xc6,0x0c,0x18,0x30,0x60,0xc6,0x86,0x00,0x00,0x00,0x00, /* % */ 56 - 0x00,0x00,0x38,0x6c,0x6c,0x38,0x76,0xdc,0xcc,0xcc,0xcc,0x76,0x00,0x00,0x00,0x00, /* & */ 57 - 0x00,0x30,0x30,0x30,0x60,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, /* ' */ 58 - 0x00,0x00,0x0c,0x18,0x30,0x30,0x30,0x30,0x30,0x30,0x18,0x0c,0x00,0x00,0x00,0x00, /* ( */ 59 - 0x00,0x00,0x30,0x18,0x0c,0x0c,0x0c,0x0c,0x0c,0x0c,0x18,0x30,0x00,0x00,0x00,0x00, /* ) */ 60 - 0x00,0x00,0x00,0x00,0x00,0x66,0x3c,0xff,0x3c,0x66,0x00,0x00,0x00,0x00,0x00,0x00, /* * */ 61 - 0x00,0x00,0x00,0x00,0x00,0x18,0x18,0x7e,0x18,0x18,0x00,0x00,0x00,0x00,0x00,0x00, /* + */ 62 - 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x18,0x18,0x18,0x30,0x00,0x00,0x00, /* , */ 63 - 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xfe,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, /* - */ 64 - 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x18,0x18,0x00,0x00,0x00,0x00, /* . */ 65 - 0x00,0x00,0x00,0x00,0x02,0x06,0x0c,0x18,0x30,0x60,0xc0,0x80,0x00,0x00,0x00,0x00, /* / */ 66 - 0x00,0x00,0x38,0x6c,0xc6,0xc6,0xd6,0xd6,0xc6,0xc6,0x6c,0x38,0x00,0x00,0x00,0x00, /* 0 */ 67 - 0x00,0x00,0x18,0x38,0x78,0x18,0x18,0x18,0x18,0x18,0x18,0x7e,0x00,0x00,0x00,0x00, /* 1 */ 68 - 0x00,0x00,0x7c,0xc6,0x06,0x0c,0x18,0x30,0x60,0xc0,0xc6,0xfe,0x00,0x00,0x00,0x00, /* 2 */ 69 - 0x00,0x00,0x7c,0xc6,0x06,0x06,0x3c,0x06,0x06,0x06,0xc6,0x7c,0x00,0x00,0x00,0x00, /* 3 */ 70 - 0x00,0x00,0x0c,0x1c,0x3c,0x6c,0xcc,0xfe,0x0c,0x0c,0x0c,0x1e,0x00,0x00,0x00,0x00, /* 4 */ 71 - 0x00,0x00,0xfe,0xc0,0xc0,0xc0,0xfc,0x06,0x06,0x06,0xc6,0x7c,0x00,0x00,0x00,0x00, /* 5 */ 72 - 0x00,0x00,0x38,0x60,0xc0,0xc0,0xfc,0xc6,0xc6,0xc6,0xc6,0x7c,0x00,0x00,0x00,0x00, /* 6 */ 73 - 0x00,0x00,0xfe,0xc6,0x06,0x06,0x0c,0x18,0x30,0x30,0x30,0x30,0x00,0x00,0x00,0x00, /* 7 */ 74 - 0x00,0x00,0x7c,0xc6,0xc6,0xc6,0x7c,0xc6,0xc6,0xc6,0xc6,0x7c,0x00,0x00,0x00,0x00, /* 8 */ 75 - 0x00,0x00,0x7c,0xc6,0xc6,0xc6,0x7e,0x06,0x06,0x06,0x0c,0x78,0x00,0x00,0x00,0x00, /* 9 */ 76 - 0x00,0x00,0x00,0x00,0x18,0x18,0x00,0x00,0x00,0x18,0x18,0x00,0x00,0x00,0x00,0x00, /* : */ 77 - 0x00,0x00,0x00,0x00,0x18,0x18,0x00,0x00,0x00,0x18,0x18,0x30,0x00,0x00,0x00,0x00, /* ; */ 78 - 0x00,0x00,0x00,0x06,0x0c,0x18,0x30,0x60,0x30,0x18,0x0c,0x06,0x00,0x00,0x00,0x00, /* < */ 79 - 0x00,0x00,0x00,0x00,0x00,0x7e,0x00,0x00,0x7e,0x00,0x00,0x00,0x00,0x00,0x00,0x00, /* = */ 80 - 0x00,0x00,0x00,0x60,0x30,0x18,0x0c,0x06,0x0c,0x18,0x30,0x60,0x00,0x00,0x00,0x00, /* > */ 81 - 0x00,0x00,0x7c,0xc6,0xc6,0x0c,0x18,0x18,0x18,0x00,0x18,0x18,0x00,0x00,0x00,0x00, /* ? */ 82 - 0x00,0x00,0x00,0x7c,0xc6,0xc6,0xde,0xde,0xde,0xdc,0xc0,0x7c,0x00,0x00,0x00,0x00, /* @ */ 83 - 0x00,0x00,0x10,0x38,0x6c,0xc6,0xc6,0xfe,0xc6,0xc6,0xc6,0xc6,0x00,0x00,0x00,0x00, /* A */ 84 - 0x00,0x00,0xfc,0x66,0x66,0x66,0x7c,0x66,0x66,0x66,0x66,0xfc,0x00,0x00,0x00,0x00, /* B */ 85 - 0x00,0x00,0x3c,0x66,0xc2,0xc0,0xc0,0xc0,0xc0,0xc2,0x66,0x3c,0x00,0x00,0x00,0x00, /* C */ 86 - 0x00,0x00,0xf8,0x6c,0x66,0x66,0x66,0x66,0x66,0x66,0x6c,0xf8,0x00,0x00,0x00,0x00, /* D */ 87 - 0x00,0x00,0xfe,0x66,0x62,0x68,0x78,0x68,0x60,0x62,0x66,0xfe,0x00,0x00,0x00,0x00, /* E */ 88 - 0x00,0x00,0xfe,0x66,0x62,0x68,0x78,0x68,0x60,0x60,0x60,0xf0,0x00,0x00,0x00,0x00, /* F */ 89 - 0x00,0x00,0x3c,0x66,0xc2,0xc0,0xc0,0xde,0xc6,0xc6,0x66,0x3a,0x00,0x00,0x00,0x00, /* G */ 90 - 0x00,0x00,0xc6,0xc6,0xc6,0xc6,0xfe,0xc6,0xc6,0xc6,0xc6,0xc6,0x00,0x00,0x00,0x00, /* H */ 91 - 0x00,0x00,0x3c,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x3c,0x00,0x00,0x00,0x00, /* I */ 92 - 0x00,0x00,0x1e,0x0c,0x0c,0x0c,0x0c,0x0c,0xcc,0xcc,0xcc,0x78,0x00,0x00,0x00,0x00, /* J */ 93 - 0x00,0x00,0xe6,0x66,0x66,0x6c,0x78,0x78,0x6c,0x66,0x66,0xe6,0x00,0x00,0x00,0x00, /* K */ 94 - 0x00,0x00,0xf0,0x60,0x60,0x60,0x60,0x60,0x60,0x62,0x66,0xfe,0x00,0x00,0x00,0x00, /* L */ 95 - 0x00,0x00,0xc6,0xee,0xfe,0xfe,0xd6,0xc6,0xc6,0xc6,0xc6,0xc6,0x00,0x00,0x00,0x00, /* M */ 96 - 0x00,0x00,0xc6,0xe6,0xf6,0xfe,0xde,0xce,0xc6,0xc6,0xc6,0xc6,0x00,0x00,0x00,0x00, /* N */ 97 - 0x00,0x00,0x7c,0xc6,0xc6,0xc6,0xc6,0xc6,0xc6,0xc6,0xc6,0x7c,0x00,0x00,0x00,0x00, /* O */ 98 - 0x00,0x00,0xfc,0x66,0x66,0x66,0x7c,0x60,0x60,0x60,0x60,0xf0,0x00,0x00,0x00,0x00, /* P */ 99 - 0x00,0x00,0x7c,0xc6,0xc6,0xc6,0xc6,0xc6,0xc6,0xd6,0xde,0x7c,0x0c,0x0e,0x00,0x00, /* Q */ 100 - 0x00,0x00,0xfc,0x66,0x66,0x66,0x7c,0x6c,0x66,0x66,0x66,0xe6,0x00,0x00,0x00,0x00, /* R */ 101 - 0x00,0x00,0x7c,0xc6,0xc6,0x60,0x38,0x0c,0x06,0xc6,0xc6,0x7c,0x00,0x00,0x00,0x00, /* S */ 102 - 0x00,0x00,0x7e,0x7e,0x5a,0x18,0x18,0x18,0x18,0x18,0x18,0x3c,0x00,0x00,0x00,0x00, /* T */ 103 - 0x00,0x00,0xc6,0xc6,0xc6,0xc6,0xc6,0xc6,0xc6,0xc6,0xc6,0x7c,0x00,0x00,0x00,0x00, /* U */ 104 - 0x00,0x00,0xc6,0xc6,0xc6,0xc6,0xc6,0xc6,0xc6,0x6c,0x38,0x10,0x00,0x00,0x00,0x00, /* V */ 105 - 0x00,0x00,0xc6,0xc6,0xc6,0xc6,0xd6,0xd6,0xd6,0xfe,0xee,0x6c,0x00,0x00,0x00,0x00, /* W */ 106 - 0x00,0x00,0xc6,0xc6,0x6c,0x7c,0x38,0x38,0x7c,0x6c,0xc6,0xc6,0x00,0x00,0x00,0x00, /* X */ 107 - 0x00,0x00,0x66,0x66,0x66,0x66,0x3c,0x18,0x18,0x18,0x18,0x3c,0x00,0x00,0x00,0x00, /* Y */ 108 - 0x00,0x00,0xfe,0xc6,0x86,0x0c,0x18,0x30,0x60,0xc2,0xc6,0xfe,0x00,0x00,0x00,0x00, /* Z */ 109 - 0x00,0x00,0x3c,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x3c,0x00,0x00,0x00,0x00, /* [ */ 110 - 0x00,0x00,0x00,0x80,0xc0,0xe0,0x70,0x38,0x1c,0x0e,0x06,0x02,0x00,0x00,0x00,0x00, /* \ */ 111 - 0x00,0x00,0x3c,0x0c,0x0c,0x0c,0x0c,0x0c,0x0c,0x0c,0x0c,0x3c,0x00,0x00,0x00,0x00, /* ] */ 112 - 0x10,0x38,0x6c,0xc6,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, /* ^ */ 113 - 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xff,0x00,0x00, /* _ */ 114 - 0x30,0x30,0x18,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, /* ` */ 115 - 0x00,0x00,0x00,0x00,0x00,0x78,0x0c,0x7c,0xcc,0xcc,0xcc,0x76,0x00,0x00,0x00,0x00, /* a */ 116 - 0x00,0x00,0xe0,0x60,0x60,0x78,0x6c,0x66,0x66,0x66,0x66,0x7c,0x00,0x00,0x00,0x00, /* b */ 117 - 0x00,0x00,0x00,0x00,0x00,0x7c,0xc6,0xc0,0xc0,0xc0,0xc6,0x7c,0x00,0x00,0x00,0x00, /* c */ 118 - 0x00,0x00,0x1c,0x0c,0x0c,0x3c,0x6c,0xcc,0xcc,0xcc,0xcc,0x76,0x00,0x00,0x00,0x00, /* d */ 119 - 0x00,0x00,0x00,0x00,0x00,0x7c,0xc6,0xfe,0xc0,0xc0,0xc6,0x7c,0x00,0x00,0x00,0x00, /* e */ 120 - 0x00,0x00,0x38,0x6c,0x64,0x60,0xf0,0x60,0x60,0x60,0x60,0xf0,0x00,0x00,0x00,0x00, /* f */ 121 - 0x00,0x00,0x00,0x00,0x00,0x76,0xcc,0xcc,0xcc,0xcc,0xcc,0x7c,0x0c,0xcc,0x78,0x00, /* g */ 122 - 0x00,0x00,0xe0,0x60,0x60,0x6c,0x76,0x66,0x66,0x66,0x66,0xe6,0x00,0x00,0x00,0x00, /* h */ 123 - 0x00,0x00,0x18,0x18,0x00,0x38,0x18,0x18,0x18,0x18,0x18,0x3c,0x00,0x00,0x00,0x00, /* i */ 124 - 0x00,0x00,0x06,0x06,0x00,0x0e,0x06,0x06,0x06,0x06,0x06,0x06,0x66,0x66,0x3c,0x00, /* j */ 125 - 0x00,0x00,0xe0,0x60,0x60,0x66,0x6c,0x78,0x78,0x6c,0x66,0xe6,0x00,0x00,0x00,0x00, /* k */ 126 - 0x00,0x00,0x38,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x3c,0x00,0x00,0x00,0x00, /* l */ 127 - 0x00,0x00,0x00,0x00,0x00,0xec,0xfe,0xd6,0xd6,0xd6,0xd6,0xc6,0x00,0x00,0x00,0x00, /* m */ 128 - 0x00,0x00,0x00,0x00,0x00,0xdc,0x66,0x66,0x66,0x66,0x66,0x66,0x00,0x00,0x00,0x00, /* n */ 129 - 0x00,0x00,0x00,0x00,0x00,0x7c,0xc6,0xc6,0xc6,0xc6,0xc6,0x7c,0x00,0x00,0x00,0x00, /* o */ 130 - 0x00,0x00,0x00,0x00,0x00,0xdc,0x66,0x66,0x66,0x66,0x66,0x7c,0x60,0x60,0xf0,0x00, /* p */ 131 - 0x00,0x00,0x00,0x00,0x00,0x76,0xcc,0xcc,0xcc,0xcc,0xcc,0x7c,0x0c,0x0c,0x1e,0x00, /* q */ 132 - 0x00,0x00,0x00,0x00,0x00,0xdc,0x76,0x66,0x60,0x60,0x60,0xf0,0x00,0x00,0x00,0x00, /* r */ 133 - 0x00,0x00,0x00,0x00,0x00,0x7c,0xc6,0x60,0x38,0x0c,0xc6,0x7c,0x00,0x00,0x00,0x00, /* s */ 134 - 0x00,0x00,0x10,0x30,0x30,0xfc,0x30,0x30,0x30,0x30,0x36,0x1c,0x00,0x00,0x00,0x00, /* t */ 135 - 0x00,0x00,0x00,0x00,0x00,0xcc,0xcc,0xcc,0xcc,0xcc,0xcc,0x76,0x00,0x00,0x00,0x00, /* u */ 136 - 0x00,0x00,0x00,0x00,0x00,0x66,0x66,0x66,0x66,0x66,0x3c,0x18,0x00,0x00,0x00,0x00, /* v */ 137 - 0x00,0x00,0x00,0x00,0x00,0xc6,0xc6,0xd6,0xd6,0xd6,0xfe,0x6c,0x00,0x00,0x00,0x00, /* w */ 138 - 0x00,0x00,0x00,0x00,0x00,0xc6,0x6c,0x38,0x38,0x38,0x6c,0xc6,0x00,0x00,0x00,0x00, /* x */ 139 - 0x00,0x00,0x00,0x00,0x00,0xc6,0xc6,0xc6,0xc6,0xc6,0xc6,0x7e,0x06,0x0c,0xf8,0x00, /* y */ 140 - 0x00,0x00,0x00,0x00,0x00,0xfe,0xcc,0x18,0x30,0x60,0xc6,0xfe,0x00,0x00,0x00,0x00, /* z */ 141 - 0x00,0x00,0x0e,0x18,0x18,0x18,0x70,0x18,0x18,0x18,0x18,0x0e,0x00,0x00,0x00,0x00, /* { */ 142 - 0x00,0x00,0x18,0x18,0x18,0x18,0x00,0x18,0x18,0x18,0x18,0x18,0x00,0x00,0x00,0x00, /* | */ 143 - 0x00,0x00,0x70,0x18,0x18,0x18,0x0e,0x18,0x18,0x18,0x18,0x70,0x00,0x00,0x00,0x00, /* } */ 144 - 0x00,0x00,0x76,0xdc,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, /* ~ */ 145 - 0x00,0x00,0x00,0x00,0x10,0x38,0x6c,0xc6,0xc6,0xc6,0xfe,0x00,0x00,0x00,0x00,0x00, /* 0x7f */ 146 - 0x00,0x00,0x3c,0x66,0xc2,0xc0,0xc0,0xc0,0xc2,0x66,0x3c,0x0c,0x06,0x7c,0x00,0x00, /* 0x80 */ 147 - 0x00,0x00,0xcc,0x00,0x00,0xcc,0xcc,0xcc,0xcc,0xcc,0xcc,0x76,0x00,0x00,0x00,0x00, /* 0x81 */ 148 - 0x00,0x0c,0x18,0x30,0x00,0x7c,0xc6,0xfe,0xc0,0xc0,0xc6,0x7c,0x00,0x00,0x00,0x00, /* 0x82 */ 149 - 0x00,0x10,0x38,0x6c,0x00,0x78,0x0c,0x7c,0xcc,0xcc,0xcc,0x76,0x00,0x00,0x00,0x00, /* 0x83 */ 150 - 0x00,0x00,0xcc,0x00,0x00,0x78,0x0c,0x7c,0xcc,0xcc,0xcc,0x76,0x00,0x00,0x00,0x00, /* 0x84 */ 151 - 0x00,0x60,0x30,0x18,0x00,0x78,0x0c,0x7c,0xcc,0xcc,0xcc,0x76,0x00,0x00,0x00,0x00, /* 0x85 */ 152 - 0x00,0x38,0x6c,0x38,0x00,0x78,0x0c,0x7c,0xcc,0xcc,0xcc,0x76,0x00,0x00,0x00,0x00, /* 0x86 */ 153 - 0x00,0x00,0x00,0x00,0x3c,0x66,0x60,0x60,0x66,0x3c,0x0c,0x06,0x3c,0x00,0x00,0x00, /* 0x87 */ 154 - 0x00,0x10,0x38,0x6c,0x00,0x7c,0xc6,0xfe,0xc0,0xc0,0xc6,0x7c,0x00,0x00,0x00,0x00, /* 0x88 */ 155 - 0x00,0x00,0xc6,0x00,0x00,0x7c,0xc6,0xfe,0xc0,0xc0,0xc6,0x7c,0x00,0x00,0x00,0x00, /* 0x89 */ 156 - 0x00,0x60,0x30,0x18,0x00,0x7c,0xc6,0xfe,0xc0,0xc0,0xc6,0x7c,0x00,0x00,0x00,0x00, /* 0x8a */ 157 - 0x00,0x00,0x66,0x00,0x00,0x38,0x18,0x18,0x18,0x18,0x18,0x3c,0x00,0x00,0x00,0x00, /* 0x8b */ 158 - 0x00,0x18,0x3c,0x66,0x00,0x38,0x18,0x18,0x18,0x18,0x18,0x3c,0x00,0x00,0x00,0x00, /* 0x8c */ 159 - 0x00,0x60,0x30,0x18,0x00,0x38,0x18,0x18,0x18,0x18,0x18,0x3c,0x00,0x00,0x00,0x00, /* 0x8d */ 160 - 0x00,0xc6,0x00,0x10,0x38,0x6c,0xc6,0xc6,0xfe,0xc6,0xc6,0xc6,0x00,0x00,0x00,0x00, /* 0x8e */ 161 - 0x38,0x6c,0x38,0x00,0x38,0x6c,0xc6,0xc6,0xfe,0xc6,0xc6,0xc6,0x00,0x00,0x00,0x00, /* 0x8f */ 162 - 0x18,0x30,0x60,0x00,0xfe,0x66,0x60,0x7c,0x60,0x60,0x66,0xfe,0x00,0x00,0x00,0x00, /* 0x90 */ 163 - 0x00,0x00,0x00,0x00,0x00,0xcc,0x76,0x36,0x7e,0xd8,0xd8,0x6e,0x00,0x00,0x00,0x00, /* 0x91 */ 164 - 0x00,0x00,0x3e,0x6c,0xcc,0xcc,0xfe,0xcc,0xcc,0xcc,0xcc,0xce,0x00,0x00,0x00,0x00, /* 0x92 */ 165 - 0x00,0x10,0x38,0x6c,0x00,0x7c,0xc6,0xc6,0xc6,0xc6,0xc6,0x7c,0x00,0x00,0x00,0x00, /* 0x93 */ 166 - 0x00,0x00,0xc6,0x00,0x00,0x7c,0xc6,0xc6,0xc6,0xc6,0xc6,0x7c,0x00,0x00,0x00,0x00, /* 0x94 */ 167 - 0x00,0x60,0x30,0x18,0x00,0x7c,0xc6,0xc6,0xc6,0xc6,0xc6,0x7c,0x00,0x00,0x00,0x00, /* 0x95 */ 168 - 0x00,0x30,0x78,0xcc,0x00,0xcc,0xcc,0xcc,0xcc,0xcc,0xcc,0x76,0x00,0x00,0x00,0x00, /* 0x96 */ 169 - 0x00,0x60,0x30,0x18,0x00,0xcc,0xcc,0xcc,0xcc,0xcc,0xcc,0x76,0x00,0x00,0x00,0x00, /* 0x97 */ 170 - 0x00,0x00,0xc6,0x00,0x00,0xc6,0xc6,0xc6,0xc6,0xc6,0xc6,0x7e,0x06,0x0c,0x78,0x00, /* 0x98 */ 171 - 0x00,0xc6,0x00,0x7c,0xc6,0xc6,0xc6,0xc6,0xc6,0xc6,0xc6,0x7c,0x00,0x00,0x00,0x00, /* 0x99 */ 172 - 0x00,0xc6,0x00,0xc6,0xc6,0xc6,0xc6,0xc6,0xc6,0xc6,0xc6,0x7c,0x00,0x00,0x00,0x00, /* 0x9a */ 173 - 0x00,0x18,0x18,0x3c,0x66,0x60,0x60,0x60,0x66,0x3c,0x18,0x18,0x00,0x00,0x00,0x00, /* 0x9b */ 174 - 0x00,0x38,0x6c,0x64,0x60,0xf0,0x60,0x60,0x60,0x60,0xe6,0xfc,0x00,0x00,0x00,0x00, /* 0x9c */ 175 - 0x00,0x00,0x66,0x66,0x3c,0x18,0x7e,0x18,0x7e,0x18,0x18,0x18,0x00,0x00,0x00,0x00, /* 0x9d */ 176 - 0x00,0xf8,0xcc,0xcc,0xf8,0xc4,0xcc,0xde,0xcc,0xcc,0xcc,0xc6,0x00,0x00,0x00,0x00, /* 0x9e */ 177 - 0x00,0x0e,0x1b,0x18,0x18,0x18,0x7e,0x18,0x18,0x18,0x18,0x18,0xd8,0x70,0x00,0x00, /* 0x9f */ 178 - 0x00,0x18,0x30,0x60,0x00,0x78,0x0c,0x7c,0xcc,0xcc,0xcc,0x76,0x00,0x00,0x00,0x00, /* 0xa0 */ 179 - 0x00,0x0c,0x18,0x30,0x00,0x38,0x18,0x18,0x18,0x18,0x18,0x3c,0x00,0x00,0x00,0x00, /* 0xa1 */ 180 - 0x00,0x18,0x30,0x60,0x00,0x7c,0xc6,0xc6,0xc6,0xc6,0xc6,0x7c,0x00,0x00,0x00,0x00, /* 0xa2 */ 181 - 0x00,0x18,0x30,0x60,0x00,0xcc,0xcc,0xcc,0xcc,0xcc,0xcc,0x76,0x00,0x00,0x00,0x00, /* 0xa3 */ 182 - 0x00,0x00,0x76,0xdc,0x00,0xdc,0x66,0x66,0x66,0x66,0x66,0x66,0x00,0x00,0x00,0x00, /* 0xa4 */ 183 - 0x76,0xdc,0x00,0xc6,0xe6,0xf6,0xfe,0xde,0xce,0xc6,0xc6,0xc6,0x00,0x00,0x00,0x00, /* 0xa5 */ 184 - 0x00,0x3c,0x6c,0x6c,0x3e,0x00,0x7e,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, /* 0xa6 */ 185 - 0x00,0x38,0x6c,0x6c,0x38,0x00,0x7c,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, /* 0xa7 */ 186 - 0x00,0x00,0x30,0x30,0x00,0x30,0x30,0x60,0xc0,0xc6,0xc6,0x7c,0x00,0x00,0x00,0x00, /* 0xa8 */ 187 - 0x00,0x00,0x00,0x00,0x00,0x00,0xfe,0xc0,0xc0,0xc0,0xc0,0x00,0x00,0x00,0x00,0x00, /* 0xa9 */ 188 - 0x00,0x00,0x00,0x00,0x00,0x00,0xfe,0x06,0x06,0x06,0x06,0x00,0x00,0x00,0x00,0x00, /* 0xaa */ 189 - 0x00,0xc0,0xc0,0xc2,0xc6,0xcc,0x18,0x30,0x60,0xdc,0x86,0x0c,0x18,0x3e,0x00,0x00, /* 0xab */ 190 - 0x00,0xc0,0xc0,0xc2,0xc6,0xcc,0x18,0x30,0x66,0xce,0x9e,0x3e,0x06,0x06,0x00,0x00, /* 0xac */ 191 - 0x00,0x00,0x18,0x18,0x00,0x18,0x18,0x18,0x3c,0x3c,0x3c,0x18,0x00,0x00,0x00,0x00, /* 0xad */ 192 - 0x00,0x00,0x00,0x00,0x00,0x36,0x6c,0xd8,0x6c,0x36,0x00,0x00,0x00,0x00,0x00,0x00, /* 0xae */ 193 - 0x00,0x00,0x00,0x00,0x00,0xd8,0x6c,0x36,0x6c,0xd8,0x00,0x00,0x00,0x00,0x00,0x00, /* 0xaf */ 194 - 0x11,0x44,0x11,0x44,0x11,0x44,0x11,0x44,0x11,0x44,0x11,0x44,0x11,0x44,0x11,0x44, /* 0xb0 */ 195 - 0x55,0xaa,0x55,0xaa,0x55,0xaa,0x55,0xaa,0x55,0xaa,0x55,0xaa,0x55,0xaa,0x55,0xaa, /* 0xb1 */ 196 - 0xdd,0x77,0xdd,0x77,0xdd,0x77,0xdd,0x77,0xdd,0x77,0xdd,0x77,0xdd,0x77,0xdd,0x77, /* 0xb2 */ 197 - 0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18, /* 0xb3 */ 198 - 0x18,0x18,0x18,0x18,0x18,0x18,0x18,0xf8,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18, /* 0xb4 */ 199 - 0x18,0x18,0x18,0x18,0x18,0xf8,0x18,0xf8,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18, /* 0xb5 */ 200 - 0x36,0x36,0x36,0x36,0x36,0x36,0x36,0xf6,0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x36, /* 0xb6 */ 201 - 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xfe,0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x36, /* 0xb7 */ 202 - 0x00,0x00,0x00,0x00,0x00,0xf8,0x18,0xf8,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18, /* 0xb8 */ 203 - 0x36,0x36,0x36,0x36,0x36,0xf6,0x06,0xf6,0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x36, /* 0xb9 */ 204 - 0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x36, /* 0xba */ 205 - 0x00,0x00,0x00,0x00,0x00,0xfe,0x06,0xf6,0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x36, /* 0xbb */ 206 - 0x36,0x36,0x36,0x36,0x36,0xf6,0x06,0xfe,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, /* 0xbc */ 207 - 0x36,0x36,0x36,0x36,0x36,0x36,0x36,0xfe,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, /* 0xbd */ 208 - 0x18,0x18,0x18,0x18,0x18,0xf8,0x18,0xf8,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, /* 0xbe */ 209 - 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xf8,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18, /* 0xbf */ 210 - 0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x1f,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, /* 0xc0 */ 211 - 0x18,0x18,0x18,0x18,0x18,0x18,0x18,0xff,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, /* 0xc1 */ 212 - 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xff,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18, /* 0xc2 */ 213 - 0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x1f,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18, /* 0xc3 */ 214 - 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xff,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, /* 0xc4 */ 215 - 0x18,0x18,0x18,0x18,0x18,0x18,0x18,0xff,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18, /* 0xc5 */ 216 - 0x18,0x18,0x18,0x18,0x18,0x1f,0x18,0x1f,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18, /* 0xc6 */ 217 - 0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x37,0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x36, /* 0xc7 */ 218 - 0x36,0x36,0x36,0x36,0x36,0x37,0x30,0x3f,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, /* 0xc8 */ 219 - 0x00,0x00,0x00,0x00,0x00,0x3f,0x30,0x37,0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x36, /* 0xc9 */ 220 - 0x36,0x36,0x36,0x36,0x36,0xf7,0x00,0xff,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, /* 0xca */ 221 - 0x00,0x00,0x00,0x00,0x00,0xff,0x00,0xf7,0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x36, /* 0xcb */ 222 - 0x36,0x36,0x36,0x36,0x36,0x37,0x30,0x37,0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x36, /* 0xcc */ 223 - 0x00,0x00,0x00,0x00,0x00,0xff,0x00,0xff,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, /* 0xcd */ 224 - 0x36,0x36,0x36,0x36,0x36,0xf7,0x00,0xf7,0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x36, /* 0xce */ 225 - 0x18,0x18,0x18,0x18,0x18,0xff,0x00,0xff,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, /* 0xcf */ 226 - 0x36,0x36,0x36,0x36,0x36,0x36,0x36,0xff,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, /* 0xd0 */ 227 - 0x00,0x00,0x00,0x00,0x00,0xff,0x00,0xff,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18, /* 0xd1 */ 228 - 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xff,0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x36, /* 0xd2 */ 229 - 0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x3f,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, /* 0xd3 */ 230 - 0x18,0x18,0x18,0x18,0x18,0x1f,0x18,0x1f,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, /* 0xd4 */ 231 - 0x00,0x00,0x00,0x00,0x00,0x1f,0x18,0x1f,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18, /* 0xd5 */ 232 - 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x3f,0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x36, /* 0xd6 */ 233 - 0x36,0x36,0x36,0x36,0x36,0x36,0x36,0xff,0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x36, /* 0xd7 */ 234 - 0x18,0x18,0x18,0x18,0x18,0xff,0x18,0xff,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18, /* 0xd8 */ 235 - 0x18,0x18,0x18,0x18,0x18,0x18,0x18,0xf8,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, /* 0xd9 */ 236 - 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x1f,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18, /* 0xda */ 237 - 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, /* 0xdb */ 238 - 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, /* 0xdc */ 239 - 0xf0,0xf0,0xf0,0xf0,0xf0,0xf0,0xf0,0xf0,0xf0,0xf0,0xf0,0xf0,0xf0,0xf0,0xf0,0xf0, /* 0xdd */ 240 - 0x0f,0x0f,0x0f,0x0f,0x0f,0x0f,0x0f,0x0f,0x0f,0x0f,0x0f,0x0f,0x0f,0x0f,0x0f,0x0f, /* 0xde */ 241 - 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, /* 0xdf */ 242 - 0x00,0x00,0x00,0x00,0x00,0x76,0xdc,0xd8,0xd8,0xd8,0xdc,0x76,0x00,0x00,0x00,0x00, /* 0xe0 */ 243 - 0x00,0x00,0x78,0xcc,0xcc,0xcc,0xd8,0xcc,0xc6,0xc6,0xc6,0xcc,0x00,0x00,0x00,0x00, /* 0xe1 */ 244 - 0x00,0x00,0xfe,0xc6,0xc6,0xc0,0xc0,0xc0,0xc0,0xc0,0xc0,0xc0,0x00,0x00,0x00,0x00, /* 0xe2 */ 245 - 0x00,0x00,0x00,0x00,0xfe,0x6c,0x6c,0x6c,0x6c,0x6c,0x6c,0x6c,0x00,0x00,0x00,0x00, /* 0xe3 */ 246 - 0x00,0x00,0x00,0xfe,0xc6,0x60,0x30,0x18,0x30,0x60,0xc6,0xfe,0x00,0x00,0x00,0x00, /* 0xe4 */ 247 - 0x00,0x00,0x00,0x00,0x00,0x7e,0xd8,0xd8,0xd8,0xd8,0xd8,0x70,0x00,0x00,0x00,0x00, /* 0xe5 */ 248 - 0x00,0x00,0x00,0x00,0x66,0x66,0x66,0x66,0x66,0x7c,0x60,0x60,0xc0,0x00,0x00,0x00, /* 0xe6 */ 249 - 0x00,0x00,0x00,0x00,0x76,0xdc,0x18,0x18,0x18,0x18,0x18,0x18,0x00,0x00,0x00,0x00, /* 0xe7 */ 250 - 0x00,0x00,0x00,0x7e,0x18,0x3c,0x66,0x66,0x66,0x3c,0x18,0x7e,0x00,0x00,0x00,0x00, /* 0xe8 */ 251 - 0x00,0x00,0x00,0x38,0x6c,0xc6,0xc6,0xfe,0xc6,0xc6,0x6c,0x38,0x00,0x00,0x00,0x00, /* 0xe9 */ 252 - 0x00,0x00,0x38,0x6c,0xc6,0xc6,0xc6,0x6c,0x6c,0x6c,0x6c,0xee,0x00,0x00,0x00,0x00, /* 0xea */ 253 - 0x00,0x00,0x1e,0x30,0x18,0x0c,0x3e,0x66,0x66,0x66,0x66,0x3c,0x00,0x00,0x00,0x00, /* 0xeb */ 254 - 0x00,0x00,0x00,0x00,0x00,0x7e,0xdb,0xdb,0xdb,0x7e,0x00,0x00,0x00,0x00,0x00,0x00, /* 0xec */ 255 - 0x00,0x00,0x00,0x03,0x06,0x7e,0xdb,0xdb,0xf3,0x7e,0x60,0xc0,0x00,0x00,0x00,0x00, /* 0xed */ 256 - 0x00,0x00,0x1c,0x30,0x60,0x60,0x7c,0x60,0x60,0x60,0x30,0x1c,0x00,0x00,0x00,0x00, /* 0xee */ 257 - 0x00,0x00,0x00,0x7c,0xc6,0xc6,0xc6,0xc6,0xc6,0xc6,0xc6,0xc6,0x00,0x00,0x00,0x00, /* 0xef */ 258 - 0x00,0x00,0x00,0x00,0xfe,0x00,0x00,0xfe,0x00,0x00,0xfe,0x00,0x00,0x00,0x00,0x00, /* 0xf0 */ 259 - 0x00,0x00,0x00,0x00,0x18,0x18,0x7e,0x18,0x18,0x00,0x00,0xff,0x00,0x00,0x00,0x00, /* 0xf1 */ 260 - 0x00,0x00,0x00,0x30,0x18,0x0c,0x06,0x0c,0x18,0x30,0x00,0x7e,0x00,0x00,0x00,0x00, /* 0xf2 */ 261 - 0x00,0x00,0x00,0x0c,0x18,0x30,0x60,0x30,0x18,0x0c,0x00,0x7e,0x00,0x00,0x00,0x00, /* 0xf3 */ 262 - 0x00,0x00,0x0e,0x1b,0x1b,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18, /* 0xf4 */ 263 - 0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0xd8,0xd8,0xd8,0x70,0x00,0x00,0x00,0x00, /* 0xf5 */ 264 - 0x00,0x00,0x00,0x00,0x18,0x18,0x00,0x7e,0x00,0x18,0x18,0x00,0x00,0x00,0x00,0x00, /* 0xf6 */ 265 - 0x00,0x00,0x00,0x00,0x00,0x76,0xdc,0x00,0x76,0xdc,0x00,0x00,0x00,0x00,0x00,0x00, /* 0xf7 */ 266 - 0x00,0x38,0x6c,0x6c,0x38,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, /* 0xf8 */ 267 - 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x18,0x18,0x00,0x00,0x00,0x00,0x00,0x00,0x00, /* 0xf9 */ 268 - 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x18,0x00,0x00,0x00,0x00,0x00,0x00,0x00, /* 0xfa */ 269 - 0x00,0x0f,0x0c,0x0c,0x0c,0x0c,0x0c,0xec,0x6c,0x6c,0x3c,0x1c,0x00,0x00,0x00,0x00, /* 0xfb */ 270 - 0x00,0xd8,0x6c,0x6c,0x6c,0x6c,0x6c,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, /* 0xfc */ 271 - 0x00,0x70,0xd8,0x30,0x60,0xc8,0xf8,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, /* 0xfd */ 272 - 0x00,0x00,0x00,0x00,0x7c,0x7c,0x7c,0x7c,0x7c,0x7c,0x7c,0x00,0x00,0x00,0x00,0x00, /* 0xfe */ 273 - 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 /* 0xff */ 274 - }; 275 - 276 - /* EOF */ 277 -
-158
hal/halppc/generic/halinit.c
··· 1 - /* 2 - * PROJECT: ReactOS HAL 3 - * LICENSE: GPL - See COPYING in the top level directory 4 - * FILE: hal/halppc/generic/halinit.c 5 - * PURPOSE: HAL Entrypoint and Initialization 6 - * PROGRAMMERS: Alex Ionescu (alex.ionescu@reactos.org) 7 - */ 8 - 9 - /* INCLUDES ******************************************************************/ 10 - 11 - #include <hal.h> 12 - #define NDEBUG 13 - #include <debug.h> 14 - 15 - /* GLOBALS *******************************************************************/ 16 - 17 - HALP_HOOKS HalpHooks; 18 - BOOLEAN HalpPciLockSettings; 19 - 20 - /* PRIVATE FUNCTIONS *********************************************************/ 21 - 22 - VOID 23 - NTAPI 24 - HalpGetParameters(IN PLOADER_PARAMETER_BLOCK LoaderBlock) 25 - { 26 - PCHAR CommandLine; 27 - 28 - /* Make sure we have a loader block and command line */ 29 - if ((LoaderBlock) && (LoaderBlock->LoadOptions)) 30 - { 31 - /* Read the command line */ 32 - CommandLine = LoaderBlock->LoadOptions; 33 - 34 - /* Check if PCI is locked */ 35 - if (strstr(CommandLine, "PCILOCK")) HalpPciLockSettings = TRUE; 36 - 37 - /* Check for initial breakpoint */ 38 - if (strstr(CommandLine, "BREAK")) DbgBreakPoint(); 39 - } 40 - } 41 - 42 - /* FUNCTIONS *****************************************************************/ 43 - 44 - /* 45 - * @implemented 46 - */ 47 - BOOLEAN 48 - NTAPI 49 - HalInitSystem(IN ULONG BootPhase, 50 - IN PLOADER_PARAMETER_BLOCK LoaderBlock) 51 - { 52 - KIRQL CurIrql; 53 - PKPRCB Prcb = KeGetCurrentPrcb(); 54 - 55 - DbgPrint("Prcb: %x BuildType %x\n", Prcb, Prcb->BuildType); 56 - 57 - /* Check the boot phase */ 58 - if (!BootPhase) 59 - { 60 - /* Phase 0... save bus type */ 61 - HalpBusType = LoaderBlock->u.I386.MachineType & 0xFF; 62 - 63 - /* Get command-line parameters */ 64 - HalpGetParameters(LoaderBlock); 65 - 66 - /* Checked HAL requires checked kernel */ 67 - #if DBG 68 - if (!(Prcb->BuildType & PRCB_BUILD_DEBUG)) 69 - { 70 - /* No match, bugcheck */ 71 - KeBugCheckEx(MISMATCHED_HAL, 2, Prcb->BuildType, 1, 0); 72 - } 73 - #else 74 - /* Release build requires release HAL */ 75 - if (Prcb->BuildType & PRCB_BUILD_DEBUG) 76 - { 77 - /* No match, bugcheck */ 78 - KeBugCheckEx(MISMATCHED_HAL, 2, Prcb->BuildType, 0, 0); 79 - } 80 - #endif 81 - 82 - #ifdef CONFIG_SMP 83 - /* SMP HAL requires SMP kernel */ 84 - if (Prcb->BuildType & PRCB_BUILD_UNIPROCESSOR) 85 - { 86 - /* No match, bugcheck */ 87 - KeBugCheckEx(MISMATCHED_HAL, 2, Prcb->BuildType, 0, 0); 88 - } 89 - #endif 90 - 91 - /* Validate the PRCB */ 92 - if (Prcb->MajorVersion != PRCB_MAJOR_VERSION) 93 - { 94 - /* Validation failed, bugcheck */ 95 - KeBugCheckEx(MISMATCHED_HAL, 1, Prcb->MajorVersion, 1, 0); 96 - } 97 - 98 - /* Initialize the PICs */ 99 - HalpInitPICs(); 100 - 101 - /* Force initial PIC state */ 102 - KeRaiseIrql(KeGetCurrentIrql(), &CurIrql); 103 - 104 - /* Initialize the clock */ 105 - HalpInitializeClock(); 106 - 107 - /* Setup busy waiting */ 108 - //HalpCalibrateStallExecution(); 109 - 110 - /* Fill out the dispatch tables */ 111 - HalQuerySystemInformation = HaliQuerySystemInformation; 112 - HalSetSystemInformation = HaliSetSystemInformation; 113 - HalInitPnpDriver = NULL; // FIXME: TODO 114 - HalGetDmaAdapter = HalpGetDmaAdapter; 115 - HalGetInterruptTranslator = NULL; // FIXME: TODO 116 - 117 - /* Initialize the hardware lock (CMOS) */ 118 - KeInitializeSpinLock(&HalpSystemHardwareLock); 119 - } 120 - else if (BootPhase == 1) 121 - { 122 - /* Initialize the default HAL stubs for bus handling functions */ 123 - HalpInitNonBusHandler(); 124 - 125 - #if 0 126 - /* Enable the clock interrupt */ 127 - ((PKIPCR)KeGetPcr())->IDT[0x30].ExtendedOffset = 128 - (USHORT)(((ULONG_PTR)HalpClockInterrupt >> 16) & 0xFFFF); 129 - ((PKIPCR)KeGetPcr())->IDT[0x30].Offset = 130 - (USHORT)((ULONG_PTR)HalpClockInterrupt); 131 - #endif 132 - HalEnableSystemInterrupt(0x30, CLOCK2_LEVEL, Latched); 133 - 134 - /* Initialize DMA. NT does this in Phase 0 */ 135 - HalpInitDma(); 136 - } 137 - 138 - /* All done, return */ 139 - return TRUE; 140 - } 141 - 142 - /* 143 - * @unimplemented 144 - */ 145 - VOID 146 - NTAPI 147 - HalReportResourceUsage(VOID) 148 - { 149 - /* Initialize PCI bus. */ 150 - HalpInitializePciBus(); 151 - 152 - /* FIXME: This is done in ReactOS MP HAL only*/ 153 - //HaliReconfigurePciInterrupts(); 154 - 155 - /* FIXME: Report HAL Usage to kernel */ 156 - } 157 - 158 - /* EOF */
-452
hal/halppc/generic/irql.c
··· 1 - /* 2 - * COPYRIGHT: See COPYING in the top level directory 3 - * PROJECT: ReactOS kernel 4 - * FILE: hal/halppc/generic/irql.c 5 - * PURPOSE: Implements IRQLs 6 - * PROGRAMMER: David Welch (welch@cwcom.net) 7 - */ 8 - 9 - /* INCLUDES *****************************************************************/ 10 - 11 - #include <hal.h> 12 - #define NDEBUG 13 - #include <debug.h> 14 - 15 - /* GLOBALS ******************************************************************/ 16 - 17 - /* 18 - * FIXME: Use EISA_CONTROL STRUCTURE INSTEAD OF HARD-CODED OFFSETS 19 - */ 20 - 21 - typedef union 22 - { 23 - USHORT both; 24 - struct 25 - { 26 - UCHAR master; 27 - UCHAR slave; 28 - }; 29 - } 30 - PIC_MASK; 31 - 32 - /* 33 - * PURPOSE: - Mask for HalEnableSystemInterrupt and HalDisableSystemInterrupt 34 - * - At startup enable timer and cascade 35 - */ 36 - #if defined(__GNUC__) 37 - static PIC_MASK pic_mask = {.both = 0xFFFA}; 38 - #else 39 - static PIC_MASK pic_mask = { 0xFFFA }; 40 - #endif 41 - 42 - 43 - /* 44 - * PURPOSE: Mask for disabling of acknowledged interrupts 45 - */ 46 - #if defined(__GNUC__) 47 - static PIC_MASK pic_mask_intr = {.both = 0x0000}; 48 - #else 49 - static PIC_MASK pic_mask_intr = { 0 }; 50 - #endif 51 - 52 - static ULONG HalpPendingInterruptCount[NR_IRQS]; 53 - 54 - #define DIRQL_TO_IRQ(x) (PROFILE_LEVEL - x) 55 - #define IRQ_TO_DIRQL(x) (PROFILE_LEVEL - x) 56 - 57 - #ifdef _MSC_VER 58 - 59 - #define KiInterruptDispatch2(x, y) 60 - 61 - #else 62 - 63 - VOID NTAPI 64 - KiInterruptDispatch2 (ULONG Irq, KIRQL old_level); 65 - 66 - #endif 67 - 68 - /* FUNCTIONS ****************************************************************/ 69 - 70 - #undef KeGetCurrentIrql 71 - KIRQL NTAPI KeGetCurrentIrql (VOID) 72 - /* 73 - * PURPOSE: Returns the current irq level 74 - * RETURNS: The current irq level 75 - */ 76 - { 77 - return(KeGetPcr()->Irql); 78 - } 79 - 80 - VOID NTAPI HalpInitPICs(VOID) 81 - { 82 - memset(HalpPendingInterruptCount, 0, sizeof(HalpPendingInterruptCount)); 83 - 84 - /* Initialization sequence */ 85 - WRITE_PORT_UCHAR((PUCHAR)0x20, 0x11); 86 - WRITE_PORT_UCHAR((PUCHAR)0xa0, 0x11); 87 - /* Start of hardware irqs (0x24) */ 88 - WRITE_PORT_UCHAR((PUCHAR)0x21, IRQ_BASE); 89 - WRITE_PORT_UCHAR((PUCHAR)0xa1, IRQ_BASE + 8); 90 - /* 8259-1 is master */ 91 - WRITE_PORT_UCHAR((PUCHAR)0x21, 0x4); 92 - /* 8259-2 is slave */ 93 - WRITE_PORT_UCHAR((PUCHAR)0xa1, 0x2); 94 - /* 8086 mode */ 95 - WRITE_PORT_UCHAR((PUCHAR)0x21, 0x1); 96 - WRITE_PORT_UCHAR((PUCHAR)0xa1, 0x1); 97 - /* Enable interrupts */ 98 - WRITE_PORT_UCHAR((PUCHAR)0x21, 0xFF); 99 - WRITE_PORT_UCHAR((PUCHAR)0xa1, 0xFF); 100 - 101 - /* We can now enable interrupts */ 102 - _enable(); 103 - } 104 - 105 - VOID HalpEndSystemInterrupt(KIRQL Irql) 106 - /* 107 - * FUNCTION: Enable all irqs with higher priority. 108 - */ 109 - { 110 - const USHORT mask[] = 111 - { 112 - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 113 - 0x0000, 0x0000, 0x0000, 0x0000, 0x8000, 0xc000, 0xe000, 0xf000, 114 - 0xf800, 0xfc00, 0xfe00, 0xff00, 0xff80, 0xffc0, 0xffe0, 0xfff0, 115 - 0xfff8, 0xfffc, 0xfffe, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 116 - }; 117 - 118 - /* Interrupts should be disable while enabling irqs of both pics */ 119 - _disable(); 120 - 121 - pic_mask_intr.both &= mask[Irql]; 122 - WRITE_PORT_UCHAR((PUCHAR)0x21, (UCHAR)(pic_mask.master|pic_mask_intr.master)); 123 - WRITE_PORT_UCHAR((PUCHAR)0xa1, (UCHAR)(pic_mask.slave|pic_mask_intr.slave)); 124 - 125 - /* restore ints */ 126 - _enable(); 127 - } 128 - 129 - VOID 130 - HalpExecuteIrqs(KIRQL NewIrql) 131 - { 132 - ULONG IrqLimit, i; 133 - IrqLimit = min(PROFILE_LEVEL - NewIrql, NR_IRQS); 134 - 135 - /* 136 - * For each irq if there have been any deferred interrupts then now 137 - * dispatch them. 138 - */ 139 - for (i = 0; i < IrqLimit; i++) 140 - { 141 - if (HalpPendingInterruptCount[i] > 0) 142 - { 143 - KeGetPcr()->Irql = (KIRQL)IRQ_TO_DIRQL(i); 144 - 145 - while (HalpPendingInterruptCount[i] > 0) 146 - { 147 - /* 148 - * For each deferred interrupt execute all the handlers at DIRQL. 149 - */ 150 - HalpPendingInterruptCount[i]--; 151 - //HalpHardwareInt[i](); 152 - } 153 - //KeGetPcr()->Irql--; 154 - //HalpEndSystemInterrupt(KeGetPcr()->Irql); 155 - } 156 - } 157 - 158 - } 159 - 160 - VOID 161 - HalpLowerIrql(KIRQL NewIrql) 162 - { 163 - if (NewIrql >= PROFILE_LEVEL) 164 - { 165 - KeGetPcr()->Irql = NewIrql; 166 - return; 167 - } 168 - HalpExecuteIrqs(NewIrql); 169 - if (NewIrql >= DISPATCH_LEVEL) 170 - { 171 - KeGetPcr()->Irql = NewIrql; 172 - return; 173 - } 174 - KeGetPcr()->Irql = DISPATCH_LEVEL; 175 - if (((PKIPCR)KeGetPcr())->HalReserved[HAL_DPC_REQUEST]) 176 - { 177 - ((PKIPCR)KeGetPcr())->HalReserved[HAL_DPC_REQUEST] = FALSE; 178 - KiDispatchInterrupt(); 179 - } 180 - KeGetPcr()->Irql = APC_LEVEL; 181 - if (NewIrql == APC_LEVEL) 182 - { 183 - return; 184 - } 185 - if (KeGetCurrentThread() != NULL && 186 - KeGetCurrentThread()->ApcState.KernelApcPending) 187 - { 188 - KiDeliverApc(KernelMode, NULL, NULL); 189 - } 190 - KeGetPcr()->Irql = PASSIVE_LEVEL; 191 - } 192 - 193 - /********************************************************************** 194 - * NAME EXPORTED 195 - * KfLowerIrql 196 - * 197 - * DESCRIPTION 198 - * Restores the irq level on the current processor 199 - * 200 - * ARGUMENTS 201 - * NewIrql = Irql to lower to 202 - * 203 - * RETURN VALUE 204 - * None 205 - * 206 - * NOTES 207 - * Uses fastcall convention 208 - */ 209 - VOID FASTCALL 210 - KfLowerIrql (KIRQL NewIrql) 211 - { 212 - DPRINT("KfLowerIrql(NewIrql %d)\n", NewIrql); 213 - 214 - if (NewIrql > KeGetPcr()->Irql) 215 - { 216 - DbgPrint ("(%s:%d) NewIrql %x CurrentIrql %x\n", 217 - __FILE__, __LINE__, NewIrql, KeGetPcr()->Irql); 218 - KeBugCheck(IRQL_NOT_LESS_OR_EQUAL); 219 - for(;;); 220 - } 221 - 222 - HalpLowerIrql(NewIrql); 223 - } 224 - 225 - /********************************************************************** 226 - * NAME EXPORTED 227 - * KfRaiseIrql 228 - * 229 - * DESCRIPTION 230 - * Raises the hardware priority (irql) 231 - * 232 - * ARGUMENTS 233 - * NewIrql = Irql to raise to 234 - * 235 - * RETURN VALUE 236 - * previous irq level 237 - * 238 - * NOTES 239 - * Uses fastcall convention 240 - */ 241 - 242 - KIRQL FASTCALL 243 - KfRaiseIrql (KIRQL NewIrql) 244 - { 245 - KIRQL OldIrql; 246 - 247 - DPRINT("KfRaiseIrql(NewIrql %d)\n", NewIrql); 248 - 249 - if (NewIrql < KeGetPcr()->Irql) 250 - { 251 - DbgPrint ("%s:%d CurrentIrql %x NewIrql %x\n", 252 - __FILE__,__LINE__,KeGetPcr()->Irql,NewIrql); 253 - KeBugCheck (IRQL_NOT_GREATER_OR_EQUAL); 254 - for(;;); 255 - } 256 - 257 - OldIrql = KeGetPcr()->Irql; 258 - KeGetPcr()->Irql = NewIrql; 259 - return OldIrql; 260 - } 261 - 262 - /********************************************************************** 263 - * NAME EXPORTED 264 - * KeRaiseIrqlToDpcLevel 265 - * 266 - * DESCRIPTION 267 - * Raises the hardware priority (irql) to DISPATCH level 268 - * 269 - * ARGUMENTS 270 - * None 271 - * 272 - * RETURN VALUE 273 - * Previous irq level 274 - * 275 - * NOTES 276 - * Calls KfRaiseIrql 277 - */ 278 - 279 - KIRQL NTAPI 280 - KeRaiseIrqlToDpcLevel (VOID) 281 - { 282 - return KfRaiseIrql (DISPATCH_LEVEL); 283 - } 284 - 285 - 286 - /********************************************************************** 287 - * NAME EXPORTED 288 - * KeRaiseIrqlToSynchLevel 289 - * 290 - * DESCRIPTION 291 - * Raises the hardware priority (irql) to CLOCK2 level 292 - * 293 - * ARGUMENTS 294 - * None 295 - * 296 - * RETURN VALUE 297 - * Previous irq level 298 - * 299 - * NOTES 300 - * Calls KfRaiseIrql 301 - */ 302 - 303 - KIRQL NTAPI 304 - KeRaiseIrqlToSynchLevel (VOID) 305 - { 306 - return KfRaiseIrql (DISPATCH_LEVEL); 307 - } 308 - 309 - 310 - BOOLEAN NTAPI 311 - HalBeginSystemInterrupt (KIRQL Irql, 312 - ULONG Vector, 313 - PKIRQL OldIrql) 314 - { 315 - ULONG irq; 316 - if (Vector < IRQ_BASE || Vector >= IRQ_BASE + NR_IRQS) 317 - { 318 - return(FALSE); 319 - } 320 - irq = Vector - IRQ_BASE; 321 - pic_mask_intr.both |= ((1 << irq) & 0xfffe); // do not disable the timer interrupt 322 - 323 - if (irq < 8) 324 - { 325 - WRITE_PORT_UCHAR((PUCHAR)0x21, (UCHAR)(pic_mask.master|pic_mask_intr.master)); 326 - WRITE_PORT_UCHAR((PUCHAR)0x20, 0x20); 327 - } 328 - else 329 - { 330 - WRITE_PORT_UCHAR((PUCHAR)0xa1, (UCHAR)(pic_mask.slave|pic_mask_intr.slave)); 331 - /* Send EOI to the PICs */ 332 - WRITE_PORT_UCHAR((PUCHAR)0x20,0x20); 333 - WRITE_PORT_UCHAR((PUCHAR)0xa0,0x20); 334 - } 335 - #if 0 336 - if (KeGetPcr()->Irql >= Irql) 337 - { 338 - HalpPendingInterruptCount[irq]++; 339 - return(FALSE); 340 - } 341 - #endif 342 - *OldIrql = KeGetPcr()->Irql; 343 - KeGetPcr()->Irql = Irql; 344 - 345 - return(TRUE); 346 - } 347 - 348 - 349 - VOID NTAPI HalEndSystemInterrupt (KIRQL Irql, ULONG Unknown2) 350 - /* 351 - * FUNCTION: Finish a system interrupt and restore the specified irq level. 352 - */ 353 - { 354 - HalpLowerIrql(Irql); 355 - HalpEndSystemInterrupt(Irql); 356 - } 357 - 358 - VOID 359 - NTAPI 360 - HalDisableSystemInterrupt( 361 - ULONG Vector, 362 - KIRQL Irql) 363 - { 364 - ULONG irq; 365 - 366 - if (Vector < IRQ_BASE || Vector >= IRQ_BASE + NR_IRQS) 367 - { 368 - ASSERT(FALSE); 369 - return; 370 - } 371 - 372 - irq = Vector - IRQ_BASE; 373 - pic_mask.both |= (1 << irq); 374 - if (irq < 8) 375 - { 376 - WRITE_PORT_UCHAR((PUCHAR)0x21, (UCHAR)(pic_mask.master|pic_mask_intr.slave)); 377 - } 378 - else 379 - { 380 - WRITE_PORT_UCHAR((PUCHAR)0xa1, (UCHAR)(pic_mask.slave|pic_mask_intr.slave)); 381 - } 382 - 383 - return; 384 - } 385 - 386 - 387 - BOOLEAN 388 - NTAPI 389 - HalEnableSystemInterrupt( 390 - ULONG Vector, 391 - KIRQL Irql, 392 - KINTERRUPT_MODE InterruptMode) 393 - { 394 - ULONG irq; 395 - 396 - if (Vector < IRQ_BASE || Vector >= IRQ_BASE + NR_IRQS) 397 - return FALSE; 398 - 399 - irq = Vector - IRQ_BASE; 400 - pic_mask.both &= ~(1 << irq); 401 - if (irq < 8) 402 - { 403 - WRITE_PORT_UCHAR((PUCHAR)0x21, (UCHAR)(pic_mask.master|pic_mask_intr.master)); 404 - } 405 - else 406 - { 407 - WRITE_PORT_UCHAR((PUCHAR)0xa1, (UCHAR)(pic_mask.slave|pic_mask_intr.slave)); 408 - } 409 - 410 - return TRUE; 411 - } 412 - 413 - 414 - VOID FASTCALL 415 - HalRequestSoftwareInterrupt( 416 - IN KIRQL Request) 417 - { 418 - switch (Request) 419 - { 420 - case APC_LEVEL: 421 - ((PKIPCR)KeGetPcr())->HalReserved[HAL_APC_REQUEST] = TRUE; 422 - break; 423 - 424 - case DISPATCH_LEVEL: 425 - ((PKIPCR)KeGetPcr())->HalReserved[HAL_DPC_REQUEST] = TRUE; 426 - break; 427 - 428 - default: 429 - DbgBreakPoint(); 430 - } 431 - } 432 - 433 - VOID FASTCALL 434 - HalClearSoftwareInterrupt( 435 - IN KIRQL Request) 436 - { 437 - switch (Request) 438 - { 439 - case APC_LEVEL: 440 - ((PKIPCR)KeGetPcr())->HalReserved[HAL_APC_REQUEST] = FALSE; 441 - break; 442 - 443 - case DISPATCH_LEVEL: 444 - ((PKIPCR)KeGetPcr())->HalReserved[HAL_DPC_REQUEST] = FALSE; 445 - break; 446 - 447 - default: 448 - DbgBreakPoint(); 449 - } 450 - } 451 - 452 - /* EOF */
-74
hal/halppc/generic/isa.c
··· 1 - /* 2 - * COPYRIGHT: See COPYING in the top level directory 3 - * PROJECT: ReactOS kernel 4 - * FILE: hal/halppc/generic/isa.c 5 - * PURPOSE: Interfaces to the ISA bus 6 - * PROGRAMMER: David Welch (welch@mcmail.com) 7 - * UPDATE HISTORY: 8 - * 05/06/98: Created 9 - */ 10 - 11 - /* INCLUDES ***************************************************************/ 12 - 13 - #include <hal.h> 14 - #define NDEBUG 15 - #include <debug.h> 16 - 17 - /* FUNCTIONS *****************************************************************/ 18 - 19 - BOOLEAN HalIsaProbe(VOID) 20 - /* 21 - * FUNCTION: Probes for an ISA bus 22 - * RETURNS: True if detected 23 - * NOTE: Since ISA is the default we are called last and always return 24 - * true 25 - */ 26 - { 27 - DbgPrint("Assuming ISA bus\n"); 28 - 29 - /* 30 - * Probe for plug and play support 31 - */ 32 - return(TRUE); 33 - } 34 - 35 - 36 - BOOLEAN NTAPI 37 - HalpTranslateIsaBusAddress(PBUS_HANDLER BusHandler, 38 - ULONG BusNumber, 39 - PHYSICAL_ADDRESS BusAddress, 40 - PULONG AddressSpace, 41 - PPHYSICAL_ADDRESS TranslatedAddress) 42 - { 43 - BOOLEAN Result; 44 - 45 - Result = HalTranslateBusAddress(PCIBus, 46 - BusNumber, 47 - BusAddress, 48 - AddressSpace, 49 - TranslatedAddress); 50 - if (Result != FALSE) 51 - return Result; 52 - 53 - Result = HalTranslateBusAddress(Internal, 54 - BusNumber, 55 - BusAddress, 56 - AddressSpace, 57 - TranslatedAddress); 58 - return Result; 59 - } 60 - 61 - ULONG NTAPI 62 - HalpGetIsaInterruptVector(PVOID BusHandler, 63 - ULONG BusNumber, 64 - ULONG BusInterruptLevel, 65 - ULONG BusInterruptVector, 66 - PKIRQL Irql, 67 - PKAFFINITY Affinity) 68 - { 69 - ULONG Vector = IRQ2VECTOR(BusInterruptVector); 70 - *Irql = VECTOR2IRQL(Vector); 71 - *Affinity = 0xFFFFFFFF; 72 - return Vector; 73 - } 74 - /* EOF */
-105
hal/halppc/generic/misc.c
··· 1 - /* 2 - * PROJECT: ReactOS HAL 3 - * LICENSE: GPL - See COPYING in the top level directory 4 - * FILE: hal/halppc/generic/misc.c 5 - * PURPOSE: Miscellanous Routines 6 - * PROGRAMMERS: Alex Ionescu (alex.ionescu@reactos.org) 7 - * Eric Kohl 8 - */ 9 - 10 - /* INCLUDES ******************************************************************/ 11 - 12 - #include <hal.h> 13 - #define NDEBUG 14 - #include <debug.h> 15 - 16 - /* PRIVATE FUNCTIONS *********************************************************/ 17 - 18 - VOID 19 - NTAPI 20 - HalpCheckPowerButton(VOID) 21 - { 22 - /* Nothing to do on non-ACPI */ 23 - return; 24 - } 25 - 26 - PVOID 27 - NTAPI 28 - HalpMapPhysicalMemory64(IN PHYSICAL_ADDRESS PhysicalAddress, 29 - IN ULONG NumberPage) 30 - { 31 - /* Use kernel memory manager I/O map facilities */ 32 - return MmMapIoSpace(PhysicalAddress, 33 - NumberPage << PAGE_SHIFT, 34 - MmNonCached); 35 - } 36 - 37 - VOID 38 - NTAPI 39 - HalpUnmapVirtualAddress(IN PVOID VirtualAddress, 40 - IN ULONG NumberPages) 41 - { 42 - /* Use kernel memory manager I/O map facilities */ 43 - MmUnmapIoSpace(VirtualAddress, NumberPages << PAGE_SHIFT); 44 - } 45 - 46 - /* FUNCTIONS *****************************************************************/ 47 - 48 - /* 49 - * @implemented 50 - */ 51 - VOID 52 - NTAPI 53 - HalHandleNMI(IN PVOID NmiInfo) 54 - { 55 - UCHAR ucStatus; 56 - 57 - /* Get the NMI Flag */ 58 - ucStatus = READ_PORT_UCHAR((PUCHAR)0x61); 59 - 60 - /* Display NMI failure string */ 61 - HalDisplayString ("\r\n*** Hardware Malfunction\r\n\r\n"); 62 - HalDisplayString ("Call your hardware vendor for support\r\n\r\n"); 63 - 64 - /* Check for parity error */ 65 - if (ucStatus & 0x80) 66 - { 67 - /* Display message */ 68 - HalDisplayString ("NMI: Parity Check / Memory Parity Error\r\n"); 69 - } 70 - 71 - /* Check for I/O failure */ 72 - if (ucStatus & 0x40) 73 - { 74 - /* Display message */ 75 - HalDisplayString ("NMI: Channel Check / IOCHK\r\n"); 76 - } 77 - 78 - /* Halt the system */ 79 - HalDisplayString("\r\n*** The system has halted ***\r\n"); 80 - //KeEnterKernelDebugger(); 81 - } 82 - 83 - /* 84 - * @implemented 85 - */ 86 - UCHAR 87 - FASTCALL 88 - HalSystemVectorDispatchEntry(IN ULONG Vector, 89 - OUT PKINTERRUPT_ROUTINE **FlatDispatch, 90 - OUT PKINTERRUPT_ROUTINE *NoConnection) 91 - { 92 - /* Not implemented on x86 */ 93 - return FALSE; 94 - } 95 - 96 - /* 97 - * @implemented 98 - */ 99 - VOID 100 - NTAPI 101 - KeFlushWriteBuffer(VOID) 102 - { 103 - /* Not implemented on x86 */ 104 - return; 105 - }
-778
hal/halppc/generic/pci.c
··· 1 - /* 2 - * PROJECT: ReactOS HAL 3 - * LICENSE: GPL - See COPYING in the top level directory 4 - * FILE: hal/halppc/generic/pci.c 5 - * PURPOSE: PCI Bus Support (Configuration Space, Resource Allocation) 6 - * PROGRAMMERS: Alex Ionescu (alex.ionescu@reactos.org) 7 - */ 8 - 9 - /* INCLUDES ******************************************************************/ 10 - 11 - #include <hal.h> 12 - #define NDEBUG 13 - #include <debug.h> 14 - 15 - /* GLOBALS *******************************************************************/ 16 - 17 - BOOLEAN HalpPCIConfigInitialized; 18 - ULONG HalpMinPciBus, HalpMaxPciBus; 19 - KSPIN_LOCK HalpPCIConfigLock; 20 - PCI_CONFIG_HANDLER PCIConfigHandler; 21 - 22 - /* PCI Operation Matrix */ 23 - UCHAR PCIDeref[4][4] = 24 - { 25 - {0, 1, 2, 2}, // ULONG-aligned offset 26 - {1, 1, 1, 1}, // UCHAR-aligned offset 27 - {2, 1, 2, 2}, // USHORT-aligned offset 28 - {1, 1, 1, 1} // UCHAR-aligned offset 29 - }; 30 - 31 - /* Type 1 PCI Bus */ 32 - PCI_CONFIG_HANDLER PCIConfigHandlerType1 = 33 - { 34 - /* Synchronization */ 35 - (FncSync)HalpPCISynchronizeType1, 36 - (FncReleaseSync)HalpPCIReleaseSynchronzationType1, 37 - 38 - /* Read */ 39 - { 40 - (FncConfigIO)HalpPCIReadUlongType1, 41 - (FncConfigIO)HalpPCIReadUcharType1, 42 - (FncConfigIO)HalpPCIReadUshortType1 43 - }, 44 - 45 - /* Write */ 46 - { 47 - (FncConfigIO)HalpPCIWriteUlongType1, 48 - (FncConfigIO)HalpPCIWriteUcharType1, 49 - (FncConfigIO)HalpPCIWriteUshortType1 50 - } 51 - }; 52 - 53 - /* Type 2 PCI Bus */ 54 - PCI_CONFIG_HANDLER PCIConfigHandlerType2 = 55 - { 56 - /* Synchronization */ 57 - (FncSync)HalpPCISynchronizeType2, 58 - (FncReleaseSync)HalpPCIReleaseSynchronzationType2, 59 - 60 - /* Read */ 61 - { 62 - (FncConfigIO)HalpPCIReadUlongType2, 63 - (FncConfigIO)HalpPCIReadUcharType2, 64 - (FncConfigIO)HalpPCIReadUshortType2 65 - }, 66 - 67 - /* Write */ 68 - { 69 - (FncConfigIO)HalpPCIWriteUlongType2, 70 - (FncConfigIO)HalpPCIWriteUcharType2, 71 - (FncConfigIO)HalpPCIWriteUshortType2 72 - } 73 - }; 74 - 75 - PCIPBUSDATA HalpFakePciBusData = 76 - { 77 - { 78 - PCI_DATA_TAG, 79 - PCI_DATA_VERSION, 80 - HalpReadPCIConfig, 81 - HalpWritePCIConfig, 82 - NULL, 83 - NULL, 84 - {{{0}}}, 85 - {0, 0, 0, 0} 86 - }, 87 - {{0}}, 88 - 32, 89 - }; 90 - 91 - BUS_HANDLER HalpFakePciBusHandler = 92 - { 93 - 1, 94 - PCIBus, 95 - PCIConfiguration, 96 - 0, 97 - NULL, 98 - NULL, 99 - &HalpFakePciBusData, 100 - 0, 101 - {0, 0, 0, 0}, 102 - HalpGetPCIData, 103 - HalpSetPCIData, 104 - NULL, 105 - HalpAssignPCISlotResources, 106 - NULL, 107 - NULL 108 - }; 109 - 110 - /* TYPE 1 FUNCTIONS **********************************************************/ 111 - 112 - VOID 113 - NTAPI 114 - HalpPCISynchronizeType1(IN PBUS_HANDLER BusHandler, 115 - IN PCI_SLOT_NUMBER Slot, 116 - IN PKIRQL Irql, 117 - IN PPCI_TYPE1_CFG_BITS PciCfg1) 118 - { 119 - /* Setup the PCI Configuration Register */ 120 - PciCfg1->u.AsULONG = 0; 121 - PciCfg1->u.bits.BusNumber = BusHandler->BusNumber; 122 - PciCfg1->u.bits.DeviceNumber = Slot.u.bits.DeviceNumber; 123 - PciCfg1->u.bits.FunctionNumber = Slot.u.bits.FunctionNumber; 124 - PciCfg1->u.bits.Enable = TRUE; 125 - 126 - /* Acquire the lock */ 127 - KeRaiseIrql(HIGH_LEVEL, Irql); 128 - KiAcquireSpinLock(&HalpPCIConfigLock); 129 - } 130 - 131 - VOID 132 - NTAPI 133 - HalpPCIReleaseSynchronzationType1(IN PBUS_HANDLER BusHandler, 134 - IN KIRQL Irql) 135 - { 136 - PCI_TYPE1_CFG_BITS PciCfg1; 137 - 138 - /* Clear the PCI Configuration Register */ 139 - PciCfg1.u.AsULONG = 0; 140 - WRITE_PORT_ULONG(((PPCIPBUSDATA)BusHandler->BusData)->Config.Type1.Address, 141 - PciCfg1.u.AsULONG); 142 - 143 - /* Release the lock */ 144 - KiReleaseSpinLock(&HalpPCIConfigLock); 145 - KeLowerIrql(Irql); 146 - } 147 - 148 - TYPE1_READ(HalpPCIReadUcharType1, UCHAR) 149 - TYPE1_READ(HalpPCIReadUshortType1, USHORT) 150 - TYPE1_READ(HalpPCIReadUlongType1, ULONG) 151 - TYPE1_WRITE(HalpPCIWriteUcharType1, UCHAR) 152 - TYPE1_WRITE(HalpPCIWriteUshortType1, USHORT) 153 - TYPE1_WRITE(HalpPCIWriteUlongType1, ULONG) 154 - 155 - /* TYPE 2 FUNCTIONS **********************************************************/ 156 - 157 - VOID 158 - NTAPI 159 - HalpPCISynchronizeType2(IN PBUS_HANDLER BusHandler, 160 - IN PCI_SLOT_NUMBER Slot, 161 - IN PKIRQL Irql, 162 - IN PPCI_TYPE2_ADDRESS_BITS PciCfg) 163 - { 164 - PCI_TYPE2_CSE_BITS PciCfg2Cse; 165 - PPCIPBUSDATA BusData = (PPCIPBUSDATA)BusHandler->BusData; 166 - 167 - /* Setup the configuration register */ 168 - PciCfg->u.AsUSHORT = 0; 169 - PciCfg->u.bits.Agent = (USHORT)Slot.u.bits.DeviceNumber; 170 - PciCfg->u.bits.AddressBase = (USHORT)BusData->Config.Type2.Base; 171 - 172 - /* Acquire the lock */ 173 - KeRaiseIrql(HIGH_LEVEL, Irql); 174 - KiAcquireSpinLock(&HalpPCIConfigLock); 175 - 176 - /* Setup the CSE Register */ 177 - PciCfg2Cse.u.AsUCHAR = 0; 178 - PciCfg2Cse.u.bits.Enable = TRUE; 179 - PciCfg2Cse.u.bits.FunctionNumber = (UCHAR)Slot.u.bits.FunctionNumber; 180 - PciCfg2Cse.u.bits.Key = -1; 181 - 182 - /* Write the bus number and CSE */ 183 - WRITE_PORT_UCHAR(BusData->Config.Type2.Forward, 184 - (UCHAR)BusHandler->BusNumber); 185 - WRITE_PORT_UCHAR(BusData->Config.Type2.CSE, PciCfg2Cse.u.AsUCHAR); 186 - } 187 - 188 - VOID 189 - NTAPI 190 - HalpPCIReleaseSynchronzationType2(IN PBUS_HANDLER BusHandler, 191 - IN KIRQL Irql) 192 - { 193 - PCI_TYPE2_CSE_BITS PciCfg2Cse; 194 - PPCIPBUSDATA BusData = (PPCIPBUSDATA)BusHandler->BusData; 195 - 196 - /* Clear CSE and bus number */ 197 - PciCfg2Cse.u.AsUCHAR = 0; 198 - WRITE_PORT_UCHAR(BusData->Config.Type2.CSE, PciCfg2Cse.u.AsUCHAR); 199 - WRITE_PORT_UCHAR(BusData->Config.Type2.Forward, 0); 200 - 201 - /* Release the lock */ 202 - KiReleaseSpinLock(&HalpPCIConfigLock); 203 - KeLowerIrql(Irql); 204 - } 205 - 206 - TYPE2_READ(HalpPCIReadUcharType2, UCHAR) 207 - TYPE2_READ(HalpPCIReadUshortType2, USHORT) 208 - TYPE2_READ(HalpPCIReadUlongType2, ULONG) 209 - TYPE2_WRITE(HalpPCIWriteUcharType2, UCHAR) 210 - TYPE2_WRITE(HalpPCIWriteUshortType2, USHORT) 211 - TYPE2_WRITE(HalpPCIWriteUlongType2, ULONG) 212 - 213 - /* PCI CONFIGURATION SPACE ***************************************************/ 214 - 215 - VOID 216 - NTAPI 217 - HalpPCIConfig(IN PBUS_HANDLER BusHandler, 218 - IN PCI_SLOT_NUMBER Slot, 219 - IN PUCHAR Buffer, 220 - IN ULONG Offset, 221 - IN ULONG Length, 222 - IN FncConfigIO *ConfigIO) 223 - { 224 - KIRQL OldIrql; 225 - ULONG i; 226 - UCHAR State[20]; 227 - 228 - /* Synchronize the operation */ 229 - PCIConfigHandler.Synchronize(BusHandler, Slot, &OldIrql, State); 230 - 231 - /* Loop every increment */ 232 - while (Length) 233 - { 234 - /* Find out the type of read/write we need to do */ 235 - i = PCIDeref[Offset % sizeof(ULONG)][Length % sizeof(ULONG)]; 236 - 237 - /* Do the read/write and return the number of bytes */ 238 - i = ConfigIO[i]((PPCIPBUSDATA)BusHandler->BusData, 239 - State, 240 - Buffer, 241 - Offset); 242 - 243 - /* Increment the buffer position and offset, and decrease the length */ 244 - Offset += i; 245 - Buffer += i; 246 - Length -= i; 247 - } 248 - 249 - /* Release the lock and PCI bus */ 250 - PCIConfigHandler.ReleaseSynchronzation(BusHandler, OldIrql); 251 - } 252 - 253 - VOID 254 - NTAPI 255 - HalpReadPCIConfig(IN PBUS_HANDLER BusHandler, 256 - IN PCI_SLOT_NUMBER Slot, 257 - IN PVOID Buffer, 258 - IN ULONG Offset, 259 - IN ULONG Length) 260 - { 261 - /* Validate the PCI Slot */ 262 - if (!HalpValidPCISlot(BusHandler, Slot)) 263 - { 264 - /* Fill the buffer with invalid data */ 265 - RtlFillMemory(Buffer, Length, -1); 266 - } 267 - else 268 - { 269 - /* Send the request */ 270 - HalpPCIConfig(BusHandler, 271 - Slot, 272 - Buffer, 273 - Offset, 274 - Length, 275 - PCIConfigHandler.ConfigRead); 276 - } 277 - } 278 - 279 - VOID 280 - NTAPI 281 - HalpWritePCIConfig(IN PBUS_HANDLER BusHandler, 282 - IN PCI_SLOT_NUMBER Slot, 283 - IN PVOID Buffer, 284 - IN ULONG Offset, 285 - IN ULONG Length) 286 - { 287 - /* Validate the PCI Slot */ 288 - if (HalpValidPCISlot(BusHandler, Slot)) 289 - { 290 - /* Send the request */ 291 - HalpPCIConfig(BusHandler, 292 - Slot, 293 - Buffer, 294 - Offset, 295 - Length, 296 - PCIConfigHandler.ConfigWrite); 297 - } 298 - } 299 - 300 - BOOLEAN 301 - NTAPI 302 - HalpValidPCISlot(IN PBUS_HANDLER BusHandler, 303 - IN PCI_SLOT_NUMBER Slot) 304 - { 305 - PCI_SLOT_NUMBER MultiSlot; 306 - PPCIPBUSDATA BusData = (PPCIPBUSDATA)BusHandler->BusData; 307 - UCHAR HeaderType; 308 - ULONG Device; 309 - 310 - /* Simple validation */ 311 - if (Slot.u.bits.Reserved) return FALSE; 312 - if (Slot.u.bits.DeviceNumber >= BusData->MaxDevice) return FALSE; 313 - 314 - /* Function 0 doesn't need checking */ 315 - if (!Slot.u.bits.FunctionNumber) return TRUE; 316 - 317 - /* Functions 0+ need Multi-Function support, so check the slot */ 318 - Device = Slot.u.bits.DeviceNumber; 319 - MultiSlot = Slot; 320 - MultiSlot.u.bits.FunctionNumber = 0; 321 - 322 - /* Send function 0 request to get the header back */ 323 - HalpReadPCIConfig(BusHandler, 324 - MultiSlot, 325 - &HeaderType, 326 - FIELD_OFFSET(PCI_COMMON_CONFIG, HeaderType), 327 - sizeof(UCHAR)); 328 - 329 - /* Now make sure the header is multi-function */ 330 - if (!(HeaderType & PCI_MULTIFUNCTION) || (HeaderType == 0xFF)) return FALSE; 331 - return TRUE; 332 - } 333 - 334 - /* HAL PCI CALLBACKS *********************************************************/ 335 - 336 - ULONG 337 - NTAPI 338 - HalpGetPCIData(IN PBUS_HANDLER BusHandler, 339 - IN PBUS_HANDLER RootHandler, 340 - IN PCI_SLOT_NUMBER Slot, 341 - IN PUCHAR Buffer, 342 - IN ULONG Offset, 343 - IN ULONG Length) 344 - { 345 - UCHAR PciBuffer[PCI_COMMON_HDR_LENGTH]; 346 - PPCI_COMMON_CONFIG PciConfig = (PPCI_COMMON_CONFIG)PciBuffer; 347 - ULONG Len = 0; 348 - 349 - /* Normalize the length */ 350 - if (Length > sizeof(PCI_COMMON_CONFIG)) Length = sizeof(PCI_COMMON_CONFIG); 351 - 352 - /* Check if this is a vendor-specific read */ 353 - if (Offset >= PCI_COMMON_HDR_LENGTH) 354 - { 355 - /* Read the header */ 356 - HalpReadPCIConfig(BusHandler, Slot, PciConfig, 0, sizeof(ULONG)); 357 - 358 - /* Make sure the vendor is valid */ 359 - if (PciConfig->VendorID == PCI_INVALID_VENDORID) return 0; 360 - } 361 - else 362 - { 363 - /* Read the entire header */ 364 - Len = PCI_COMMON_HDR_LENGTH; 365 - HalpReadPCIConfig(BusHandler, Slot, PciConfig, 0, Len); 366 - 367 - /* Validate the vendor ID */ 368 - if (PciConfig->VendorID == PCI_INVALID_VENDORID) 369 - { 370 - /* It's invalid, but we want to return this much */ 371 - PciConfig->VendorID = PCI_INVALID_VENDORID; 372 - Len = sizeof(USHORT); 373 - } 374 - 375 - /* Now check if there's space left */ 376 - if (Len < Offset) return 0; 377 - 378 - /* There is, so return what's after the offset and normalize */ 379 - Len -= Offset; 380 - if (Len > Length) Len = Length; 381 - 382 - /* Copy the data into the caller's buffer */ 383 - RtlMoveMemory(Buffer, PciBuffer + Offset, Len); 384 - 385 - /* Update buffer and offset, decrement total length */ 386 - Offset += Len; 387 - Buffer += Len; 388 - Length -= Len; 389 - } 390 - 391 - /* Now we still have something to copy */ 392 - if (Length) 393 - { 394 - /* Check if it's vendor-specific data */ 395 - if (Offset >= PCI_COMMON_HDR_LENGTH) 396 - { 397 - /* Read it now */ 398 - HalpReadPCIConfig(BusHandler, Slot, Buffer, Offset, Length); 399 - Len += Length; 400 - } 401 - } 402 - 403 - /* Update the total length read */ 404 - return Len; 405 - } 406 - 407 - ULONG 408 - NTAPI 409 - HalpSetPCIData(IN PBUS_HANDLER BusHandler, 410 - IN PBUS_HANDLER RootHandler, 411 - IN PCI_SLOT_NUMBER Slot, 412 - IN PUCHAR Buffer, 413 - IN ULONG Offset, 414 - IN ULONG Length) 415 - { 416 - UCHAR PciBuffer[PCI_COMMON_HDR_LENGTH]; 417 - PPCI_COMMON_CONFIG PciConfig = (PPCI_COMMON_CONFIG)PciBuffer; 418 - ULONG Len = 0; 419 - 420 - /* Normalize the length */ 421 - if (Length > sizeof(PCI_COMMON_CONFIG)) Length = sizeof(PCI_COMMON_CONFIG); 422 - 423 - /* Check if this is a vendor-specific read */ 424 - if (Offset >= PCI_COMMON_HDR_LENGTH) 425 - { 426 - /* Read the header */ 427 - HalpReadPCIConfig(BusHandler, Slot, PciConfig, 0, sizeof(ULONG)); 428 - 429 - /* Make sure the vendor is valid */ 430 - if (PciConfig->VendorID == PCI_INVALID_VENDORID) return 0; 431 - } 432 - else 433 - { 434 - /* Read the entire header and validate the vendor ID */ 435 - Len = PCI_COMMON_HDR_LENGTH; 436 - HalpReadPCIConfig(BusHandler, Slot, PciConfig, 0, Len); 437 - if (PciConfig->VendorID == PCI_INVALID_VENDORID) return 0; 438 - 439 - /* Return what's after the offset and normalize */ 440 - Len -= Offset; 441 - if (Len > Length) Len = Length; 442 - 443 - /* Copy the specific caller data */ 444 - RtlMoveMemory(PciBuffer + Offset, Buffer, Len); 445 - 446 - /* Write the actual configuration data */ 447 - HalpWritePCIConfig(BusHandler, Slot, PciBuffer + Offset, Offset, Len); 448 - 449 - /* Update buffer and offset, decrement total length */ 450 - Offset += Len; 451 - Buffer += Len; 452 - Length -= Len; 453 - } 454 - 455 - /* Now we still have something to copy */ 456 - if (Length) 457 - { 458 - /* Check if it's vendor-specific data */ 459 - if (Offset >= PCI_COMMON_HDR_LENGTH) 460 - { 461 - /* Read it now */ 462 - HalpWritePCIConfig(BusHandler, Slot, Buffer, Offset, Length); 463 - Len += Length; 464 - } 465 - } 466 - 467 - /* Update the total length read */ 468 - return Len; 469 - } 470 - 471 - NTSTATUS 472 - NTAPI 473 - HalpSetupPciDeviceForDebugging(IN PVOID LoaderBlock, 474 - IN OUT PDEBUG_DEVICE_DESCRIPTOR PciDevice) 475 - { 476 - DPRINT1("Unimplemented!\n"); 477 - return STATUS_NOT_IMPLEMENTED; 478 - } 479 - 480 - NTSTATUS 481 - NTAPI 482 - HalpReleasePciDeviceForDebugging(IN OUT PDEBUG_DEVICE_DESCRIPTOR PciDevice) 483 - { 484 - DPRINT1("Unimplemented!\n"); 485 - return STATUS_NOT_IMPLEMENTED; 486 - } 487 - 488 - NTSTATUS 489 - NTAPI 490 - HalpAssignPCISlotResources(IN PBUS_HANDLER BusHandler, 491 - IN PBUS_HANDLER RootHandler, 492 - IN PUNICODE_STRING RegistryPath, 493 - IN PUNICODE_STRING DriverClassName OPTIONAL, 494 - IN PDRIVER_OBJECT DriverObject, 495 - IN PDEVICE_OBJECT DeviceObject OPTIONAL, 496 - IN ULONG Slot, 497 - IN OUT PCM_RESOURCE_LIST *pAllocatedResources) 498 - { 499 - KeBugCheck(0); 500 - return STATUS_SUCCESS; 501 - } 502 - 503 - ULONG 504 - NTAPI 505 - HaliPciInterfaceReadConfig(IN PBUS_HANDLER RootBusHandler, 506 - IN ULONG BusNumber, 507 - IN PCI_SLOT_NUMBER SlotNumber, 508 - IN PVOID Buffer, 509 - IN ULONG Offset, 510 - IN ULONG Length) 511 - { 512 - BUS_HANDLER BusHandler; 513 - PPCI_COMMON_CONFIG PciData = (PPCI_COMMON_CONFIG)Buffer; 514 - 515 - /* Setup fake PCI Bus handler */ 516 - RtlCopyMemory(&BusHandler, &HalpFakePciBusHandler, sizeof(BUS_HANDLER)); 517 - BusHandler.BusNumber = BusNumber; 518 - 519 - /* Read configuration data */ 520 - HalpReadPCIConfig(&BusHandler, SlotNumber, Buffer, Offset, Length); 521 - 522 - /* Check if caller only wanted at least Vendor ID */ 523 - if (Length >= 2) 524 - { 525 - /* Validate it */ 526 - if (PciData->VendorID != PCI_INVALID_VENDORID) 527 - { 528 - /* Check if this is the new maximum bus number */ 529 - if (HalpMaxPciBus < BusHandler.BusNumber) 530 - { 531 - /* Set it */ 532 - HalpMaxPciBus = BusHandler.BusNumber; 533 - } 534 - } 535 - } 536 - 537 - /* Return length */ 538 - return Length; 539 - } 540 - 541 - PPCI_REGISTRY_INFO_INTERNAL 542 - NTAPI 543 - HalpQueryPciRegistryInfo(VOID) 544 - { 545 - WCHAR NameBuffer[8]; 546 - OBJECT_ATTRIBUTES ObjectAttributes; 547 - UNICODE_STRING KeyName, ConfigName, IdentName; 548 - HANDLE KeyHandle, BusKeyHandle; 549 - NTSTATUS Status; 550 - UCHAR KeyBuffer[sizeof(PPCI_REGISTRY_INFO) + 100]; 551 - PKEY_VALUE_FULL_INFORMATION ValueInfo = (PVOID)KeyBuffer; 552 - ULONG ResultLength; 553 - PWSTR Tag; 554 - ULONG i; 555 - PCM_FULL_RESOURCE_DESCRIPTOR FullDescriptor; 556 - PCM_PARTIAL_RESOURCE_DESCRIPTOR PartialDescriptor; 557 - PPCI_REGISTRY_INFO PciRegInfo; 558 - PPCI_REGISTRY_INFO_INTERNAL PciRegistryInfo; 559 - 560 - /* Setup the object attributes for the key */ 561 - RtlInitUnicodeString(&KeyName, 562 - L"\\Registry\\Machine\\Hardware\\Description\\" 563 - L"System\\MultiFunctionAdapter"); 564 - InitializeObjectAttributes(&ObjectAttributes, 565 - &KeyName, 566 - OBJ_CASE_INSENSITIVE, 567 - NULL, 568 - NULL); 569 - 570 - /* Open the key */ 571 - Status = ZwOpenKey(&KeyHandle, KEY_READ, &ObjectAttributes); 572 - if (!NT_SUCCESS(Status)) return NULL; 573 - 574 - /* Setup the receiving string */ 575 - KeyName.Buffer = NameBuffer; 576 - KeyName.MaximumLength = sizeof(NameBuffer); 577 - 578 - /* Setup the configuration and identifier key names */ 579 - RtlInitUnicodeString(&ConfigName, L"ConfigurationData"); 580 - RtlInitUnicodeString(&IdentName, L"Identifier"); 581 - 582 - /* Keep looping for each ID */ 583 - for (i = 0; TRUE; i++) 584 - { 585 - /* Setup the key name */ 586 - RtlIntegerToUnicodeString(i, 10, &KeyName); 587 - InitializeObjectAttributes(&ObjectAttributes, 588 - &KeyName, 589 - OBJ_CASE_INSENSITIVE, 590 - KeyHandle, 591 - NULL); 592 - 593 - /* Open it */ 594 - Status = ZwOpenKey(&BusKeyHandle, KEY_READ, &ObjectAttributes); 595 - if (!NT_SUCCESS(Status)) 596 - { 597 - /* None left, fail */ 598 - ZwClose(KeyHandle); 599 - return NULL; 600 - } 601 - 602 - /* Read the registry data */ 603 - Status = ZwQueryValueKey(BusKeyHandle, 604 - &IdentName, 605 - KeyValueFullInformation, 606 - ValueInfo, 607 - sizeof(KeyBuffer), 608 - &ResultLength); 609 - if (!NT_SUCCESS(Status)) 610 - { 611 - /* Failed, try the next one */ 612 - ZwClose(BusKeyHandle); 613 - continue; 614 - } 615 - 616 - /* Get the PCI Tag and validate it */ 617 - Tag = (PWSTR)((ULONG_PTR)ValueInfo + ValueInfo->DataOffset); 618 - if ((Tag[0] != L'P') || 619 - (Tag[1] != L'C') || 620 - (Tag[2] != L'I') || 621 - (Tag[3])) 622 - { 623 - /* Not a valid PCI entry, skip it */ 624 - ZwClose(BusKeyHandle); 625 - continue; 626 - } 627 - 628 - /* Now read our PCI structure */ 629 - Status = ZwQueryValueKey(BusKeyHandle, 630 - &ConfigName, 631 - KeyValueFullInformation, 632 - ValueInfo, 633 - sizeof(KeyBuffer), 634 - &ResultLength); 635 - ZwClose(BusKeyHandle); 636 - if (!NT_SUCCESS(Status)) continue; 637 - 638 - /* We read it OK! Get the actual resource descriptors */ 639 - FullDescriptor = (PCM_FULL_RESOURCE_DESCRIPTOR) 640 - ((ULONG_PTR)ValueInfo + ValueInfo->DataOffset); 641 - PartialDescriptor = (PCM_PARTIAL_RESOURCE_DESCRIPTOR) 642 - ((ULONG_PTR)FullDescriptor-> 643 - PartialResourceList.PartialDescriptors); 644 - 645 - /* Check if this is our PCI Registry Information */ 646 - if (PartialDescriptor->Type == CmResourceTypeDeviceSpecific) 647 - { 648 - /* Close the key */ 649 - ZwClose(KeyHandle); 650 - 651 - /* FIXME: Check PnP\PCI\CardList */ 652 - 653 - /* Get the PCI information */ 654 - PciRegInfo = (PPCI_REGISTRY_INFO)(PartialDescriptor + 1); 655 - 656 - /* Allocate the return structure */ 657 - PciRegistryInfo = ExAllocatePoolWithTag(NonPagedPool, 658 - sizeof(PCI_REGISTRY_INFO_INTERNAL), 659 - TAG_HAL); 660 - if (!PciRegistryInfo) return NULL; 661 - 662 - /* Fill it out */ 663 - PciRegistryInfo->HardwareMechanism = PciRegInfo->HardwareMechanism; 664 - PciRegistryInfo->NoBuses = PciRegInfo->NoBuses; 665 - PciRegistryInfo->MajorRevision = PciRegInfo->MajorRevision; 666 - PciRegistryInfo->MinorRevision = PciRegInfo->MinorRevision; 667 - PciRegistryInfo->ElementCount = 0; 668 - } 669 - } 670 - } 671 - 672 - VOID 673 - NTAPI 674 - HalpInitializePciStubs(VOID) 675 - { 676 - PPCI_REGISTRY_INFO_INTERNAL PciRegistryInfo; 677 - UCHAR PciType; 678 - PPCIPBUSDATA BusData = (PPCIPBUSDATA)HalpFakePciBusHandler.BusData; 679 - ULONG i; 680 - PCI_SLOT_NUMBER j; 681 - ULONG VendorId = 0; 682 - 683 - /* Query registry information */ 684 - PciRegistryInfo = HalpQueryPciRegistryInfo(); 685 - if (!PciRegistryInfo) 686 - { 687 - /* Assume type 1 */ 688 - PciType = 1; 689 - } 690 - else 691 - { 692 - /* Get the type and free the info structure */ 693 - PciType = PciRegistryInfo->HardwareMechanism & 0xF; 694 - ExFreePool(PciRegistryInfo); 695 - } 696 - 697 - /* Initialize the PCI lock */ 698 - KeInitializeSpinLock(&HalpPCIConfigLock); 699 - 700 - /* Check the type of PCI bus */ 701 - switch (PciType) 702 - { 703 - /* Type 1 PCI Bus */ 704 - case 1: 705 - 706 - /* Copy the Type 1 handler data */ 707 - RtlCopyMemory(&PCIConfigHandler, 708 - &PCIConfigHandlerType1, 709 - sizeof(PCIConfigHandler)); 710 - 711 - /* Set correct I/O Ports */ 712 - BusData->Config.Type1.Address = PCI_TYPE1_ADDRESS_PORT; 713 - BusData->Config.Type1.Data = PCI_TYPE1_DATA_PORT; 714 - break; 715 - 716 - /* Type 2 PCI Bus */ 717 - case 2: 718 - 719 - /* Copy the Type 1 handler data */ 720 - RtlCopyMemory(&PCIConfigHandler, 721 - &PCIConfigHandlerType2, 722 - sizeof (PCIConfigHandler)); 723 - 724 - /* Set correct I/O Ports */ 725 - BusData->Config.Type2.CSE = PCI_TYPE2_CSE_PORT; 726 - BusData->Config.Type2.Forward = PCI_TYPE2_FORWARD_PORT; 727 - BusData->Config.Type2.Base = PCI_TYPE2_ADDRESS_BASE; 728 - 729 - /* Only 16 devices supported, not 32 */ 730 - BusData->MaxDevice = 16; 731 - break; 732 - 733 - default: 734 - 735 - /* Invalid type */ 736 - DbgPrint("HAL: Unnkown PCI type\n"); 737 - } 738 - 739 - /* Loop all possible buses */ 740 - for (i = 0; i < 256; i++) 741 - { 742 - /* Loop all devices */ 743 - for (j.u.AsULONG = 0; j.u.AsULONG < 32; j.u.AsULONG++) 744 - { 745 - /* Query the interface */ 746 - if (HaliPciInterfaceReadConfig(NULL, 747 - i, 748 - j, 749 - &VendorId, 750 - 0, 751 - sizeof(ULONG))) 752 - { 753 - /* Validate the vendor ID */ 754 - if ((USHORT)VendorId != PCI_INVALID_VENDORID) 755 - { 756 - /* Set this as the maximum ID */ 757 - HalpMaxPciBus = i; 758 - break; 759 - } 760 - } 761 - } 762 - } 763 - 764 - /* We're done */ 765 - HalpPCIConfigInitialized = TRUE; 766 - } 767 - 768 - VOID 769 - NTAPI 770 - HalpInitializePciBus(VOID) 771 - { 772 - /* Initialize the stubs */ 773 - HalpInitializePciStubs(); 774 - 775 - /* FIXME: Initialize NMI Crash Flag */ 776 - } 777 - 778 - /* EOF */
-282
hal/halppc/generic/portio.c
··· 1 - /* 2 - * COPYRIGHT: See COPYING in the top level directory 3 - * PROJECT: ReactOS kernel 4 - * FILE: hal/halppc/generic/portio.c 5 - * PURPOSE: Port I/O functions 6 - * PROGRAMMER: Eric Kohl 7 - * UPDATE HISTORY: 8 - * Created 18/10/99 9 - */ 10 - 11 - #include <hal.h> 12 - #define NDEBUG 13 - #include <debug.h> 14 - 15 - /* FUNCTIONS ****************************************************************/ 16 - 17 - /* 18 - * This file contains the definitions for the x86 IO instructions 19 - * inb/inw/inl/outb/outw/outl and the "string versions" of the same 20 - * (insb/insw/insl/outsb/outsw/outsl). You can also use "pausing" 21 - * versions of the single-IO instructions (inb_p/inw_p/..). 22 - * 23 - * This file is not meant to be obfuscating: it's just complicated 24 - * to (a) handle it all in a way that makes gcc able to optimize it 25 - * as well as possible and (b) trying to avoid writing the same thing 26 - * over and over again with slight variations and possibly making a 27 - * mistake somewhere. 28 - */ 29 - 30 - /* 31 - * Thanks to James van Artsdalen for a better timing-fix than 32 - * the two short jumps: using outb's to a nonexistent port seems 33 - * to guarantee better timings even on fast machines. 34 - * 35 - * On the other hand, I'd like to be sure of a non-existent port: 36 - * I feel a bit unsafe about using 0x80 (should be safe, though) 37 - * 38 - * Linus 39 - */ 40 - 41 - #if defined(__GNUC__) 42 - 43 - #ifdef SLOW_IO_BY_JUMPING 44 - #define __SLOW_DOWN_IO __asm__ __volatile__("jmp 1f\n1:\tjmp 1f\n1:") 45 - #else 46 - #define __SLOW_DOWN_IO __asm__ __volatile__("outb %al,$0x80") 47 - #endif 48 - 49 - #elif defined(_MSC_VER) 50 - 51 - #ifdef SLOW_IO_BY_JUMPING 52 - #define __SLOW_DOWN_IO __asm jmp 1f __asm jmp 1f 1f: 53 - #else 54 - #define __SLOW_DOWN_IO __asm out 0x80, al 55 - #endif 56 - 57 - #else 58 - #error Unknown compiler for inline assembler 59 - #endif 60 - 61 - 62 - #ifdef REALLY_SLOW_IO 63 - #define SLOW_DOWN_IO { __SLOW_DOWN_IO; __SLOW_DOWN_IO; __SLOW_DOWN_IO; __SLOW_DOWN_IO; } 64 - #else 65 - #define SLOW_DOWN_IO __SLOW_DOWN_IO 66 - #endif 67 - 68 - extern int GetPhysByte(int Addr); 69 - extern void SetPhysByte(int Addr, int Val); 70 - extern int GetPhysWord(int Addr); 71 - extern void SetPhysWord(int Addr, int Val); 72 - extern int GetPhys(int Addr); 73 - extern void SetPhys(int Addr, int Val); 74 - 75 - __asm__("\t.globl GetPhys\n" 76 - "GetPhys:\t\n" 77 - "mflr 0\n\t" 78 - "stwu 0,-16(1)\n\t" 79 - "mfmsr 5\n\t" 80 - "andi. 6,5,0xffef\n\t"/* turn off MSR[DR] */ 81 - "mtmsr 6\n\t" 82 - "isync\n\t" 83 - "sync\n\t" 84 - "lwz 3,0(3)\n\t" /* Get actual value at phys addr r3 */ 85 - "mtmsr 5\n\t" 86 - "isync\n\t" 87 - "sync\n\t" 88 - "lwz 0,0(1)\n\t" 89 - "addi 1,1,16\n\t" 90 - "mtlr 0\n\t" 91 - "blr" 92 - ); 93 - 94 - __asm__("\t.globl GetPhysWord\n" 95 - "GetPhysWord:\t\n" 96 - "mflr 0\n\t" 97 - "stwu 0,-16(1)\n\t" 98 - "mfmsr 5\n\t" 99 - "andi. 6,5,0xffef\n\t"/* turn off MSR[DR] */ 100 - "mtmsr 6\n\t" 101 - "isync\n\t" 102 - "sync\n\t" 103 - "lhz 3,0(3)\n\t" /* Get actual value at phys addr r3 */ 104 - "mtmsr 5\n\t" 105 - "isync\n\t" 106 - "sync\n\t" 107 - "lwz 0,0(1)\n\t" 108 - "addi 1,1,16\n\t" 109 - "mtlr 0\n\t" 110 - "blr" 111 - ); 112 - 113 - __asm__("\t.globl GetPhysByte\n" 114 - "GetPhysByte:\t\n" 115 - "mflr 0\n\t" 116 - "stwu 0,-16(1)\n\t" 117 - "mfmsr 5\n\t" 118 - "andi. 6,5,0xffef\n\t"/* turn off MSR[DR] */ 119 - "mtmsr 6\n\t" 120 - "isync\n\t" 121 - "sync\n\t" 122 - "lbz 3,0(3)\n\t" /* Get actual value at phys addr r3 */ 123 - "mtmsr 5\n\t" 124 - "isync\n\t" 125 - "sync\n\t" 126 - "lwz 0,0(1)\n\t" 127 - "addi 1,1,16\n\t" 128 - "mtlr 0\n\t" 129 - "blr" 130 - ); 131 - 132 - __asm__("\t.globl SetPhys\n" 133 - "SetPhys:\t\n" 134 - "mflr 0\n\t" 135 - "stwu 0,-16(1)\n\t" 136 - "mfmsr 5\n\t" 137 - "andi. 6,5,0xffef\n\t"/* turn off MSR[DR] */ 138 - "mtmsr 6\n\t" 139 - "sync\n\t" 140 - "eieio\n\t" 141 - "stw 4,0(3)\n\t" /* Set actual value at phys addr r3 */ 142 - "dcbst 0,3\n\t" 143 - "mtmsr 5\n\t" 144 - "sync\n\t" 145 - "eieio\n\t" 146 - "mr 3,4\n\t" 147 - "lwz 0,0(1)\n\t" 148 - "addi 1,1,16\n\t" 149 - "mtlr 0\n\t" 150 - "blr" 151 - ); 152 - 153 - __asm__("\t.globl SetPhysWord\n" 154 - "SetPhysWord:\t\n" 155 - "mflr 0\n\t" 156 - "stwu 0,-16(1)\n\t" 157 - "mfmsr 5\n\t" 158 - "andi. 6,5,0xffef\n\t"/* turn off MSR[DR] */ 159 - "mtmsr 6\n\t" 160 - "sync\n\t" 161 - "eieio\n\t" 162 - "sth 4,0(3)\n\t" /* Set actual value at phys addr r3 */ 163 - "dcbst 0,3\n\t" 164 - "mtmsr 5\n\t" 165 - "sync\n\t" 166 - "eieio\n\t" 167 - "mr 3,4\n\t" 168 - "lwz 0,0(1)\n\t" 169 - "addi 1,1,16\n\t" 170 - "mtlr 0\n\t" 171 - "blr" 172 - ); 173 - 174 - __asm__("\t.globl SetPhysByte\n" 175 - "SetPhysByte:\t\n" 176 - "mflr 0\n\t" 177 - "stwu 0,-16(1)\n\t" 178 - "mfmsr 5\n\t" 179 - "andi. 6,5,0xffef\n\t"/* turn off MSR[DR] */ 180 - "mtmsr 6\n\t" 181 - "sync\n\t" 182 - "eieio\n\t" 183 - "stb 4,0(3)\n\t" /* Set actual value at phys addr r3 */ 184 - "dcbst 0,3\n\t" 185 - "mtmsr 5\n\t" 186 - "sync\n\t" 187 - "eieio\n\t" 188 - "mr 3,4\n\t" 189 - "lwz 0,0(1)\n\t" 190 - "addi 1,1,16\n\t" 191 - "mtlr 0\n\t" 192 - "blr" 193 - ); 194 - 195 - VOID NTAPI 196 - READ_PORT_BUFFER_UCHAR (PUCHAR Port, 197 - PUCHAR Buffer, 198 - ULONG Count) 199 - { 200 - while(Count--) { *Buffer++ = GetPhysByte((ULONG)Port); } 201 - } 202 - 203 - VOID NTAPI 204 - READ_PORT_BUFFER_USHORT (PUSHORT Port, 205 - PUSHORT Buffer, 206 - ULONG Count) 207 - { 208 - while(Count--) { *Buffer++ = GetPhysWord((ULONG)Port); } 209 - } 210 - 211 - VOID NTAPI 212 - READ_PORT_BUFFER_ULONG (PULONG Port, 213 - PULONG Buffer, 214 - ULONG Count) 215 - { 216 - while(Count--) { *Buffer++ = GetPhys((ULONG)Port); } 217 - } 218 - 219 - UCHAR NTAPI 220 - READ_PORT_UCHAR (PUCHAR Port) 221 - { 222 - return GetPhys((ULONG)Port); 223 - } 224 - 225 - USHORT NTAPI 226 - READ_PORT_USHORT (PUSHORT Port) 227 - { 228 - return GetPhysWord((ULONG)Port); 229 - } 230 - 231 - ULONG NTAPI 232 - READ_PORT_ULONG (PULONG Port) 233 - { 234 - return GetPhys((ULONG)Port); 235 - } 236 - 237 - VOID NTAPI 238 - WRITE_PORT_BUFFER_UCHAR (PUCHAR Port, 239 - PUCHAR Buffer, 240 - ULONG Count) 241 - { 242 - while(Count--) { SetPhysByte((ULONG)Port, *Buffer++); } 243 - } 244 - 245 - VOID NTAPI 246 - WRITE_PORT_BUFFER_USHORT (PUSHORT Port, 247 - PUSHORT Buffer, 248 - ULONG Count) 249 - { 250 - while(Count--) { SetPhysWord((ULONG)Port, *Buffer++); } 251 - } 252 - 253 - VOID NTAPI 254 - WRITE_PORT_BUFFER_ULONG (PULONG Port, 255 - PULONG Buffer, 256 - ULONG Count) 257 - { 258 - while(Count--) { SetPhys((ULONG)Port, *Buffer++); } 259 - } 260 - 261 - VOID NTAPI 262 - WRITE_PORT_UCHAR (PUCHAR Port, 263 - UCHAR Value) 264 - { 265 - SetPhysByte((ULONG)Port, Value); 266 - } 267 - 268 - VOID NTAPI 269 - WRITE_PORT_USHORT (PUSHORT Port, 270 - USHORT Value) 271 - { 272 - SetPhysWord((ULONG)Port, Value); 273 - } 274 - 275 - VOID NTAPI 276 - WRITE_PORT_ULONG (PULONG Port, 277 - ULONG Value) 278 - { 279 - SetPhys((ULONG)Port, Value); 280 - } 281 - 282 - /* EOF */
-75
hal/halppc/generic/processor.c
··· 1 - /* 2 - * COPYRIGHT: See COPYING in the top level directory 3 - * PROJECT: ReactOS kernel 4 - * FILE: hal/halppc/generic/processor.c 5 - * PURPOSE: Intel MultiProcessor specification support 6 - * PROGRAMMER: David Welch (welch@cwcom.net) 7 - * Casper S. Hornstrup (chorns@users.sourceforge.net) 8 - * NOTES: Parts adapted from linux SMP code 9 - * UPDATE HISTORY: 10 - * 22/05/1998 DW Created 11 - * 12/04/2001 CSH Added MultiProcessor specification support 12 - */ 13 - 14 - /* INCLUDES *****************************************************************/ 15 - 16 - #include <hal.h> 17 - #define NDEBUG 18 - #include <debug.h> 19 - 20 - /* FUNCTIONS *****************************************************************/ 21 - 22 - #define INITIAL_STALL_COUNT 0x10000 23 - 24 - VOID NTAPI 25 - HalInitializeProcessor(ULONG ProcessorNumber, 26 - PLOADER_PARAMETER_BLOCK LoaderBlock) 27 - { 28 - DPRINT("HalInitializeProcessor(%lu %p)\n", ProcessorNumber, LoaderBlock); 29 - KeGetPcr()->StallScaleFactor = INITIAL_STALL_COUNT; 30 - } 31 - 32 - BOOLEAN NTAPI 33 - HalAllProcessorsStarted (VOID) 34 - { 35 - DPRINT("HalAllProcessorsStarted()\n"); 36 - 37 - return TRUE; 38 - } 39 - 40 - NTHALAPI 41 - BOOLEAN 42 - NTAPI 43 - HalStartNextProcessor( 44 - IN struct _LOADER_PARAMETER_BLOCK *LoaderBlock, 45 - IN PKPROCESSOR_STATE ProcessorState 46 - ) 47 - { 48 - DPRINT("HalStartNextProcessor(0x%lx 0x%lx)\n", LoaderBlock, ProcessorState); 49 - 50 - return TRUE; 51 - } 52 - 53 - /* 54 - * @implemented 55 - */ 56 - VOID 57 - NTAPI 58 - HalProcessorIdle(VOID) 59 - { 60 - /* Enable interrupts and halt the processor */ 61 - _enable(); 62 - } 63 - 64 - /* 65 - * @implemented 66 - */ 67 - VOID 68 - NTAPI 69 - HalRequestIpi(ULONG Reserved) 70 - { 71 - /* Not implemented on NT */ 72 - __debugbreak(); 73 - } 74 - 75 - /* EOF */
-61
hal/halppc/generic/profil.c
··· 1 - /* 2 - * PROJECT: ReactOS HAL 3 - * LICENSE: GPL - See COPYING in the top level directory 4 - * FILE: hal/halppc/generic/profil.c 5 - * PURPOSE: System Profiling 6 - * PROGRAMMERS: Alex Ionescu (alex.ionescu@reactos.org) 7 - */ 8 - 9 - /* INCLUDES ******************************************************************/ 10 - 11 - #include <hal.h> 12 - #define NDEBUG 13 - #include <debug.h> 14 - 15 - /* FUNCTIONS *****************************************************************/ 16 - 17 - /* 18 - * @unimplemented 19 - */ 20 - VOID 21 - NTAPI 22 - HalStopProfileInterrupt(IN KPROFILE_SOURCE ProfileSource) 23 - { 24 - UNIMPLEMENTED; 25 - return; 26 - } 27 - 28 - /* 29 - * @unimplemented 30 - */ 31 - VOID 32 - NTAPI 33 - HalStartProfileInterrupt(IN KPROFILE_SOURCE ProfileSource) 34 - { 35 - UNIMPLEMENTED; 36 - return; 37 - } 38 - 39 - /* 40 - * @unimplemented 41 - */ 42 - ULONG_PTR 43 - NTAPI 44 - HalSetProfileInterval(IN ULONG_PTR Interval) 45 - { 46 - UNIMPLEMENTED; 47 - return Interval; 48 - } 49 - 50 - ULONG HalpDecrementerRoll = 0; 51 - 52 - LARGE_INTEGER 53 - KeQueryPerformanceCounter(PLARGE_INTEGER PerformanceFrequency) 54 - { 55 - LARGE_INTEGER Result; 56 - /* for now */ 57 - if(PerformanceFrequency) PerformanceFrequency->QuadPart = 100000000; 58 - Result.HighPart = HalpDecrementerRoll; 59 - Result.LowPart = __rdtsc(); 60 - return Result; 61 - }
-40
hal/halppc/generic/reboot.c
··· 1 - /* 2 - * COPYRIGHT: See COPYING in the top level directory 3 - * PROJECT: ReactOS kernel 4 - * FILE: hal/halppc/generic/reboot.c 5 - * PURPOSE: Reboot functions. 6 - * PROGRAMMER: Eric Kohl 7 - * UPDATE HISTORY: 8 - * Created 11/10/99 9 - */ 10 - 11 - #include <hal.h> 12 - #define NDEBUG 13 - #include <debug.h> 14 - 15 - typedef void (*void_fun)(); 16 - static VOID 17 - HalReboot (VOID) 18 - { 19 - void_fun reset_vector = (void_fun)0xfff00100; 20 - reset_vector(); 21 - } 22 - 23 - 24 - VOID NTAPI 25 - HalReturnToFirmware ( 26 - FIRMWARE_REENTRY Action 27 - ) 28 - { 29 - if (Action == HalHaltRoutine) 30 - { 31 - DbgPrint ("HalReturnToFirmware called!\n"); 32 - DbgBreakPoint (); 33 - } 34 - else if (Action == HalRebootRoutine) 35 - { 36 - HalReboot (); 37 - } 38 - } 39 - 40 - /* EOF */
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hal/halppc/generic/spinlock.c
··· 1 - /* 2 - * PROJECT: ReactOS HAL 3 - * LICENSE: GPL - See COPYING in the top level directory 4 - * FILE: hal/halppc/generic/spinlock.c 5 - * PURPOSE: Spinlock and Queued Spinlock Support 6 - * PROGRAMMERS: Alex Ionescu (alex.ionescu@reactos.org) 7 - */ 8 - 9 - /* INCLUDES ******************************************************************/ 10 - 11 - #include <hal.h> 12 - #define NDEBUG 13 - #include <debug.h> 14 - 15 - #undef KeAcquireSpinLock 16 - #undef KeReleaseSpinLock 17 - #undef KeLowerIrql 18 - #undef KeRaiseIrql 19 - 20 - 21 - KIRQL FASTCALL 22 - KfRaiseIrql (KIRQL NewIrql); 23 - 24 - VOID FASTCALL 25 - KfLowerIrql (KIRQL NewIrql); 26 - 27 - /* FUNCTIONS *****************************************************************/ 28 - 29 - /* 30 - * @implemented 31 - */ 32 - VOID 33 - NTAPI 34 - KeLowerIrql(KIRQL NewIrql) 35 - { 36 - /* Call the fastcall function */ 37 - KfLowerIrql(NewIrql); 38 - } 39 - 40 - /* 41 - * @implemented 42 - */ 43 - NTKERNELAPI 44 - KIRQL 45 - NTAPI 46 - KeRaiseIrql(KIRQL NewIrql, 47 - PKIRQL OldIrql) 48 - { 49 - /* Call the fastcall function */ 50 - return *OldIrql = KfRaiseIrql(NewIrql); 51 - } 52 - 53 - /* 54 - * @implemented 55 - */ 56 - VOID 57 - NTAPI 58 - KeAcquireSpinLock(PKSPIN_LOCK SpinLock, 59 - PKIRQL OldIrql) 60 - { 61 - /* Call the fastcall function */ 62 - *OldIrql = KfAcquireSpinLock(SpinLock); 63 - } 64 - 65 - /* 66 - * @implemented 67 - */ 68 - KIRQL 69 - FASTCALL 70 - KeAcquireSpinLockRaiseToSynch(PKSPIN_LOCK SpinLock) 71 - { 72 - /* Simply raise to dispatch */ 73 - return KfRaiseIrql(DISPATCH_LEVEL); 74 - } 75 - 76 - /* 77 - * @implemented 78 - */ 79 - VOID 80 - NTAPI 81 - KeReleaseSpinLock(PKSPIN_LOCK SpinLock, 82 - KIRQL NewIrql) 83 - { 84 - /* Call the fastcall function */ 85 - KfReleaseSpinLock(SpinLock, NewIrql); 86 - } 87 - 88 - /* 89 - * @implemented 90 - */ 91 - KIRQL 92 - FASTCALL 93 - KfAcquireSpinLock(PKSPIN_LOCK SpinLock) 94 - { 95 - /* Simply raise to dispatch */ 96 - return KfRaiseIrql(DISPATCH_LEVEL); 97 - } 98 - 99 - /* 100 - * @implemented 101 - */ 102 - VOID 103 - FASTCALL 104 - KfReleaseSpinLock(PKSPIN_LOCK SpinLock, 105 - KIRQL OldIrql) 106 - { 107 - /* Simply lower IRQL back */ 108 - KfLowerIrql(OldIrql); 109 - } 110 - 111 - /* 112 - * @implemented 113 - */ 114 - KIRQL 115 - FASTCALL 116 - KeAcquireQueuedSpinLock(IN KSPIN_LOCK_QUEUE_NUMBER LockNumber) 117 - { 118 - /* Simply raise to dispatch */ 119 - return KfRaiseIrql(DISPATCH_LEVEL); 120 - } 121 - 122 - /* 123 - * @implemented 124 - */ 125 - KIRQL 126 - FASTCALL 127 - KeAcquireQueuedSpinLockRaiseToSynch(IN KSPIN_LOCK_QUEUE_NUMBER LockNumber) 128 - { 129 - /* Simply raise to dispatch */ 130 - return KfRaiseIrql(DISPATCH_LEVEL); 131 - } 132 - 133 - /* 134 - * @implemented 135 - */ 136 - VOID 137 - FASTCALL 138 - KeAcquireInStackQueuedSpinLock(IN PKSPIN_LOCK SpinLock, 139 - IN PKLOCK_QUEUE_HANDLE LockHandle) 140 - { 141 - /* Simply raise to dispatch */ 142 - LockHandle->OldIrql = KfRaiseIrql(DISPATCH_LEVEL); 143 - } 144 - 145 - /* 146 - * @implemented 147 - */ 148 - VOID 149 - FASTCALL 150 - KeAcquireInStackQueuedSpinLockRaiseToSynch(IN PKSPIN_LOCK SpinLock, 151 - IN PKLOCK_QUEUE_HANDLE LockHandle) 152 - { 153 - /* Simply raise to synch */ 154 - LockHandle->OldIrql = KfRaiseIrql(SYNCH_LEVEL); 155 - } 156 - 157 - /* 158 - * @implemented 159 - */ 160 - VOID 161 - FASTCALL 162 - KeReleaseQueuedSpinLock(IN KSPIN_LOCK_QUEUE_NUMBER LockNumber, 163 - IN KIRQL OldIrql) 164 - { 165 - /* Simply lower IRQL back */ 166 - KfLowerIrql(OldIrql); 167 - } 168 - 169 - /* 170 - * @implemented 171 - */ 172 - VOID 173 - FASTCALL 174 - KeReleaseInStackQueuedSpinLock(IN PKLOCK_QUEUE_HANDLE LockHandle) 175 - { 176 - /* Simply lower IRQL back */ 177 - KfLowerIrql(LockHandle->OldIrql); 178 - } 179 - 180 - /* 181 - * @implemented 182 - */ 183 - BOOLEAN 184 - FASTCALL 185 - KeTryToAcquireQueuedSpinLockRaiseToSynch(IN KSPIN_LOCK_QUEUE_NUMBER LockNumber, 186 - IN PKIRQL OldIrql) 187 - { 188 - /* Simply raise to dispatch */ 189 - *OldIrql = KfRaiseIrql(DISPATCH_LEVEL); 190 - 191 - /* Always return true on UP Machines */ 192 - return TRUE; 193 - } 194 - 195 - /* 196 - * @implemented 197 - */ 198 - LOGICAL 199 - FASTCALL 200 - KeTryToAcquireQueuedSpinLock(IN KSPIN_LOCK_QUEUE_NUMBER LockNumber, 201 - OUT PKIRQL OldIrql) 202 - { 203 - /* Simply raise to dispatch */ 204 - *OldIrql = KfRaiseIrql(DISPATCH_LEVEL); 205 - 206 - /* Always return true on UP Machines */ 207 - return TRUE; 208 - } 209 - 210 - /* EOF */
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hal/halppc/generic/sysinfo.c
··· 1 - /* 2 - * PROJECT: ReactOS HA: 3 - * LICENSE: GPL - See COPYING in the top level directory 4 - * FILE: hal/halppc/generic/sysinfo.c 5 - * PURPOSE: HAL Information Routines 6 - * PROGRAMMERS: Alex Ionescu (alex.ionescu@reactos.org) 7 - */ 8 - 9 - /* INCLUDES ******************************************************************/ 10 - 11 - #include <hal.h> 12 - #define NDEBUG 13 - #include <debug.h> 14 - 15 - PUCHAR KdComPortInUse; 16 - 17 - /* FUNCTIONS *****************************************************************/ 18 - 19 - NTSTATUS 20 - NTAPI 21 - HaliQuerySystemInformation(IN HAL_QUERY_INFORMATION_CLASS InformationClass, 22 - IN ULONG BufferSize, 23 - IN OUT PVOID Buffer, 24 - OUT PULONG ReturnedLength) 25 - { 26 - UNIMPLEMENTED; 27 - return STATUS_NOT_IMPLEMENTED; 28 - } 29 - 30 - NTSTATUS 31 - NTAPI 32 - HaliSetSystemInformation(IN HAL_SET_INFORMATION_CLASS InformationClass, 33 - IN ULONG BufferSize, 34 - IN OUT PVOID Buffer) 35 - { 36 - UNIMPLEMENTED; 37 - return STATUS_NOT_IMPLEMENTED; 38 - } 39 - 40 - /* EOF */
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hal/halppc/generic/timer.c
··· 1 - /* 2 - * PROJECT: ReactOS HAL 3 - * LICENSE: GPL - See COPYING in the top level directory 4 - * FILE: hal/halppc/generic/timer.c 5 - * PURPOSE: HAL Timer Routines 6 - * PROGRAMMERS: Alex Ionescu (alex.ionescu@reactos.org) 7 - */ 8 - 9 - /* INCLUDES ******************************************************************/ 10 - 11 - #include <hal.h> 12 - #define NDEBUG 13 - #include <debug.h> 14 - 15 - /* GLOBALS *******************************************************************/ 16 - 17 - BOOLEAN HalpClockSetMSRate; 18 - ULONG HalpCurrentTimeIncrement; 19 - ULONG HalpCurrentRollOver; 20 - ULONG HalpNextMSRate = 14; 21 - ULONG HalpLargestClockMS = 15; 22 - 23 - LARGE_INTEGER HalpRolloverTable[15] = 24 - { 25 - {{1197, 10032}}, 26 - {{2394, 20064}}, 27 - {{3591, 30096}}, 28 - {{4767, 39952}}, 29 - {{5964, 49984}}, 30 - {{7161, 60016}}, 31 - {{8358, 70048}}, 32 - {{9555, 80080}}, 33 - {{10731, 89936}}, 34 - {{11949, 100144}}, 35 - {{13125, 110000}}, 36 - {{14322, 120032}}, 37 - {{15519, 130064}}, 38 - {{16695, 139920}}, 39 - {{17892, 149952}} 40 - }; 41 - 42 - /* PRIVATE FUNCTIONS *********************************************************/ 43 - 44 - VOID 45 - NTAPI 46 - HalpInitializeClock(VOID) 47 - { 48 - //PKPRCB Prcb = KeGetCurrentPrcb(); 49 - ULONG Increment; 50 - USHORT RollOver; 51 - ULONG Flags = 0; 52 - 53 - /* Get increment and rollover for the largest time clock ms possible */ 54 - Increment = HalpRolloverTable[HalpLargestClockMS - 1].HighPart; 55 - RollOver = (USHORT)HalpRolloverTable[HalpLargestClockMS - 1].LowPart; 56 - 57 - /* Set the maximum and minimum increment with the kernel */ 58 - HalpCurrentTimeIncrement = Increment; 59 - KeSetTimeIncrement(Increment, HalpRolloverTable[0].HighPart); 60 - 61 - /* Disable interrupts */ 62 - Flags = __readmsr(); 63 - _disable(); 64 - 65 - /* Set the rollover */ 66 - __outbyte(TIMER_CONTROL_PORT, TIMER_SC0 | TIMER_BOTH | TIMER_MD2); 67 - __outbyte(TIMER_DATA_PORT0, RollOver & 0xFF); 68 - __outbyte(TIMER_DATA_PORT0, RollOver >> 8); 69 - 70 - /* Restore interrupts if they were previously enabled */ 71 - __writemsr(Flags); 72 - 73 - /* Save rollover and return */ 74 - HalpCurrentRollOver = RollOver; 75 - } 76 - 77 - /* PUBLIC FUNCTIONS ***********************************************************/ 78 - 79 - /* 80 - * @implemented 81 - */ 82 - VOID 83 - NTAPI 84 - HalCalibratePerformanceCounter(IN volatile PLONG Count, 85 - IN ULONGLONG NewCount) 86 - { 87 - ULONG Flags = 0; 88 - 89 - /* Disable interrupts */ 90 - Flags = __readmsr(); 91 - _disable(); 92 - 93 - /* Do a decrement for this CPU */ 94 - _InterlockedDecrement(Count); 95 - 96 - /* Wait for other CPUs */ 97 - while (*Count); 98 - 99 - /* Restore interrupts if they were previously enabled */ 100 - __writemsr(Flags); 101 - } 102 - 103 - /* 104 - * @implemented 105 - */ 106 - ULONG 107 - NTAPI 108 - HalSetTimeIncrement(IN ULONG Increment) 109 - { 110 - /* Round increment to ms */ 111 - Increment /= 10000; 112 - 113 - /* Normalize between our minimum (1 ms) and maximum (variable) setting */ 114 - if (Increment > HalpLargestClockMS) Increment = HalpLargestClockMS; 115 - if (Increment <= 0) Increment = 1; 116 - 117 - /* Set the rate and tell HAL we want to change it */ 118 - HalpNextMSRate = Increment; 119 - HalpClockSetMSRate = TRUE; 120 - 121 - /* Return the increment */ 122 - return HalpRolloverTable[Increment - 1].HighPart; 123 - } 124 - 125 - VOID 126 - NTHALAPI 127 - KeStallExecutionProcessor(ULONG USec) 128 - { 129 - LARGE_INTEGER Freq, Start = KeQueryPerformanceCounter(&Freq), End; 130 - LARGE_INTEGER Timebase, Remainder; 131 - Timebase.QuadPart = 1000000; 132 - Freq.QuadPart *= USec; 133 - End = RtlLargeIntegerDivide(Freq, Timebase, &Remainder); 134 - End.QuadPart += Start.QuadPart; 135 - while(End.QuadPart > __rdtsc()); 136 - } 137 - 138 - /* EOF */
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hal/halppc/include/apic.h
··· 1 - /* 2 - * 3 - */ 4 - 5 - #pragma once 6 - 7 - #define APIC_DEFAULT_BASE 0xFEE00000 /* Default Local APIC Base Register Address */ 8 - 9 - /* APIC Register Address Map */ 10 - #define APIC_ID 0x0020 /* Local APIC ID Register (R/W) */ 11 - #define APIC_VER 0x0030 /* Local APIC Version Register (R) */ 12 - #define APIC_TPR 0x0080 /* Task Priority Register (R/W) */ 13 - #define APIC_APR 0x0090 /* Arbitration Priority Register (R) */ 14 - #define APIC_PPR 0x00A0 /* Processor Priority Register (R) */ 15 - #define APIC_EOI 0x00B0 /* EOI Register (W) */ 16 - #define APIC_LDR 0x00D0 /* Logical Destination Register (R/W) */ 17 - #define APIC_DFR 0x00E0 /* Destination Format Register (0-27 R, 28-31 R/W) */ 18 - #define APIC_SIVR 0x00F0 /* Spurious Interrupt Vector Register (0-3 R, 4-9 R/W) */ 19 - #define APIC_ISR 0x0100 /* Interrupt Service Register 0-255 (R) */ 20 - #define APIC_TMR 0x0180 /* Trigger Mode Register 0-255 (R) */ 21 - #define APIC_IRR 0x0200 /* Interrupt Request Register 0-255 (r) */ 22 - #define APIC_ESR 0x0280 /* Error Status Register (R) */ 23 - #define APIC_ICR0 0x0300 /* Interrupt Command Register 0-31 (R/W) */ 24 - #define APIC_ICR1 0x0310 /* Interrupt Command Register 32-63 (R/W) */ 25 - #define APIC_LVTT 0x0320 /* Local Vector Table (Timer) (R/W) */ 26 - #define APIC_LVTTHMR 0x0330 27 - #define APIC_LVTPC 0x0340 /* Performance Counter LVT (R/W) */ 28 - #define APIC_LINT0 0x0350 /* Local Vector Table (LINT0) (R/W) */ 29 - #define APIC_LINT1 0x0360 /* Local Vector Table (LINT1) (R/W) */ 30 - #define APIC_LVT3 0x0370 /* Local Vector Table (Error) (R/W) */ 31 - #define APIC_ICRT 0x0380 /* Initial Count Register for Timer (R/W) */ 32 - #define APIC_CCRT 0x0390 /* Current Count Register for Timer (R) */ 33 - #define APIC_TDCR 0x03E0 /* Timer Divide Configuration Register (R/W) */ 34 - 35 - #define APIC_ID_MASK (0xF << 24) 36 - #define GET_APIC_ID(x) (((x) & APIC_ID_MASK) >> 24) 37 - #define GET_APIC_LOGICAL_ID(x) (((x)>>24)&0xFF) 38 - #define APIC_VER_MASK 0xFF00FF 39 - #define GET_APIC_VERSION(x) ((x) & 0xFF) 40 - #define GET_APIC_MAXLVT(x) (((x) >> 16) & 0xFF) 41 - 42 - #define APIC_TPR_PRI 0xFF 43 - #define APIC_TPR_INT 0xF0 44 - #define APIC_TPR_SUB 0xF 45 - #define APIC_TPR_MAX 0xFF /* Maximum priority */ 46 - #define APIC_TPR_MIN 0x20 /* Minimum priority */ 47 - 48 - #define APIC_LDR_MASK (0xFF << 24) 49 - 50 - #define APIC_SIVR_ENABLE (0x1 << 8) 51 - #define APIC_SIVR_FOCUS (0x1 << 9) 52 - 53 - #define APIC_ESR_MASK (0xFE << 0) /* Error Mask */ 54 - 55 - #define APIC_ICR0_VECTOR (0xFF << 0) /* Vector */ 56 - #define APIC_ICR0_DM (0x7 << 8) /* Delivery Mode */ 57 - #define APIC_ICR0_DESTM (0x1 << 11) /* Destination Mode */ 58 - #define APIC_ICR0_DS (0x1 << 12) /* Delivery Status */ 59 - #define APIC_ICR0_LEVEL (0x1 << 14) /* Level */ 60 - #define APIC_ICR0_TM (0x1 << 15) /* Trigger Mode */ 61 - #define APIC_ICR0_DESTS (0x3 << 18) /* Destination Shorthand */ 62 - 63 - /* Delivery Modes */ 64 - #define APIC_DM_FIXED (0x0 << 8) 65 - #define APIC_DM_LOWEST (0x1 << 8) 66 - #define APIC_DM_SMI (0x2 << 8) 67 - #define APIC_DM_REMRD (0x3 << 8) 68 - #define APIC_DM_NMI (0x4 << 8) 69 - #define APIC_DM_INIT (0x5 << 8) 70 - #define APIC_DM_STARTUP (0x6 << 8) 71 - #define APIC_DM_EXTINT (0x7 << 8) 72 - #define GET_APIC_DELIVERY_MODE(x) (((x) >> 8) & 0x7) 73 - #define SET_APIC_DELIVERY_MODE(x,y) (((x) & ~0x700) | ((y) << 8)) 74 - 75 - /* Destination Shorthand values */ 76 - #define APIC_ICR0_DESTS_FIELD (0x0 << 0) 77 - #define APIC_ICR0_DESTS_SELF (0x1 << 18) 78 - #define APIC_ICR0_DESTS_ALL (0x2 << 18) 79 - #define APIC_ICR0_DESTS_ALL_BUT_SELF (0x3 << 18) 80 - 81 - #define APIC_ICR0_LEVEL_DEASSERT (0x0 << 14) /* Deassert level */ 82 - #define APIC_ICR0_LEVEL_ASSERT (0x1 << 14) /* Assert level */ 83 - 84 - #define GET_APIC_DEST_FIELD(x) (((x) >> 24) & 0xFF) 85 - #define SET_APIC_DEST_FIELD(x) (((x) & 0xFF) << 24) 86 - 87 - #define GET_APIC_TIMER_BASE(x) (((x) >> 18) & 0x3) 88 - #define SET_APIC_TIMER_BASE(x) ((x) << 18) 89 - #define APIC_TIMER_BASE_CLKIN 0x0 90 - #define APIC_TIMER_BASE_TMBASE 0x1 91 - #define APIC_TIMER_BASE_DIV 0x2 92 - 93 - #define APIC_LVT_VECTOR (0xFF << 0) /* Vector */ 94 - #define APIC_LVT_DS (0x1 << 12) /* Delivery Status */ 95 - #define APIC_LVT_REMOTE_IRR (0x1 << 14) /* Remote IRR */ 96 - #define APIC_LVT_LEVEL_TRIGGER (0x1 << 15) /* Lvel Triggered */ 97 - #define APIC_LVT_MASKED (0x1 << 16) /* Mask */ 98 - #define APIC_LVT_PERIODIC (0x1 << 17) /* Timer Mode */ 99 - 100 - #define APIC_LVT3_DM (0x7 << 8) 101 - #define APIC_LVT3_IIPP (0x1 << 13) 102 - #define APIC_LVT3_TM (0x1 << 15) 103 - #define APIC_LVT3_MASKED (0x1 << 16) 104 - #define APIC_LVT3_OS (0x1 << 17) 105 - 106 - #define APIC_TDCR_TMBASE (0x1 << 2) 107 - #define APIC_TDCR_MASK 0x0F 108 - #define APIC_TDCR_2 0x00 109 - #define APIC_TDCR_4 0x01 110 - #define APIC_TDCR_8 0x02 111 - #define APIC_TDCR_16 0x03 112 - #define APIC_TDCR_32 0x08 113 - #define APIC_TDCR_64 0x09 114 - #define APIC_TDCR_128 0x0A 115 - #define APIC_TDCR_1 0x0B 116 - 117 - #define APIC_LVT_VECTOR (0xFF << 0) /* Vector */ 118 - #define APIC_LVT_DS (0x1 << 12) /* Delivery Status */ 119 - #define APIC_LVT_REMOTE_IRR (0x1 << 14) /* Remote IRR */ 120 - #define APIC_LVT_LEVEL_TRIGGER (0x1 << 15) /* Lvel Triggered */ 121 - #define APIC_LVT_MASKED (0x1 << 16) /* Mask */ 122 - #define APIC_LVT_PERIODIC (0x1 << 17) /* Timer Mode */ 123 - 124 - #define APIC_LVT3_DM (0x7 << 8) 125 - #define APIC_LVT3_IIPP (0x1 << 13) 126 - #define APIC_LVT3_TM (0x1 << 15) 127 - #define APIC_LVT3_MASKED (0x1 << 16) 128 - #define APIC_LVT3_OS (0x1 << 17) 129 - 130 - #define APIC_TDCR_TMBASE (0x1 << 2) 131 - #define APIC_TDCR_MASK 0x0F 132 - #define APIC_TDCR_2 0x00 133 - #define APIC_TDCR_4 0x01 134 - #define APIC_TDCR_8 0x02 135 - #define APIC_TDCR_16 0x03 136 - #define APIC_TDCR_32 0x08 137 - #define APIC_TDCR_64 0x09 138 - #define APIC_TDCR_128 0x0A 139 - #define APIC_TDCR_1 0x0B 140 - 141 - #define APIC_TARGET_SELF 0x100 142 - #define APIC_TARGET_ALL 0x200 143 - #define APIC_TARGET_ALL_BUT_SELF 0x300 144 - 145 - #define APIC_INTEGRATED(version) (version & 0xF0) 146 - 147 - typedef enum { 148 - amPIC = 0, /* IMCR and PIC compatibility mode */ 149 - amVWIRE /* Virtual Wire compatibility mode */ 150 - } APIC_MODE; 151 - 152 - #ifdef CONFIG_SMP 153 - #define MAX_CPU 32 154 - #else 155 - #define MAX_CPU 1 156 - #endif 157 - 158 - /* 159 - * Local APIC timer IRQ vector is on a different priority level, 160 - * to work around the 'lost local interrupt if more than 2 IRQ 161 - * sources per level' errata. 162 - */ 163 - #define LOCAL_TIMER_VECTOR 0xEF 164 - 165 - #define IPI_VECTOR 0xFB 166 - #define ERROR_VECTOR 0xFE 167 - #define SPURIOUS_VECTOR 0xFF /* Must be 0xXF */ 168 - 169 - /* CPU flags */ 170 - #define CPU_USABLE 0x01 /* 1 if the CPU is usable (ie. can be used) */ 171 - #define CPU_ENABLED 0x02 /* 1 if the CPU is enabled */ 172 - #define CPU_BSP 0x04 /* 1 if the CPU is the bootstrap processor */ 173 - #define CPU_TSC 0x08 /* 1 if the CPU has a time stamp counter */ 174 - 175 - typedef struct _CPU_INFO 176 - { 177 - UCHAR Flags; /* CPU flags */ 178 - UCHAR APICId; /* Local APIC ID */ 179 - UCHAR APICVersion; /* Local APIC version */ 180 - // UCHAR MaxLVT; /* Number of LVT registers */ 181 - ULONG BusSpeed; /* BUS speed */ 182 - ULONG CoreSpeed; /* Core speed */ 183 - UCHAR Padding[16-12]; /* Padding to 16-byte */ 184 - } CPU_INFO, *PCPU_INFO; 185 - 186 - extern ULONG CPUCount; /* Total number of CPUs */ 187 - extern ULONG BootCPU; /* Bootstrap processor */ 188 - extern ULONG OnlineCPUs; /* Bitmask of online CPUs */ 189 - extern CPU_INFO CPUMap[MAX_CPU]; /* Map of all CPUs in the system */ 190 - 191 - /* Prototypes */ 192 - 193 - __inline VOID APICWrite(ULONG Offset, ULONG Value); 194 - __inline ULONG APICRead(ULONG Offset); 195 - VOID APICSendIPI(ULONG Target, ULONG Mode); 196 - VOID APICSetup(VOID); 197 - VOID HaliInitBSP(VOID); 198 - VOID APICSyncArbIDs(VOID); 199 - __inline VOID APICSendEOI(VOID); 200 - VOID APICCalibrateTimer(ULONG CPU); 201 - VOID HaliStartApplicationProcessor(ULONG Cpu, ULONG Stack); 202 - 203 - static __inline ULONG ThisCPU(VOID) 204 - { 205 - return (APICRead(APIC_ID) & APIC_ID_MASK) >> 24; 206 - } 207 - 208 - /* EOF */
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hal/halppc/include/bus.h
··· 1 - #pragma once 2 - 3 - // 4 - // Helper Macros 5 - // 6 - #define PASTE2(x,y) x ## y 7 - #define POINTER_TO_(x) PASTE2(P,x) 8 - #define READ_FROM(x) PASTE2(READ_PORT_, x) 9 - #define WRITE_TO(x) PASTE2(WRITE_PORT_, x) 10 - 11 - // 12 - // Declares a PCI Register Read/Write Routine 13 - // 14 - #define TYPE_DEFINE(x, y) \ 15 - ULONG \ 16 - NTAPI \ 17 - x( \ 18 - IN PPCIPBUSDATA BusData, \ 19 - IN y PciCfg, \ 20 - IN PUCHAR Buffer, \ 21 - IN ULONG Offset \ 22 - ) 23 - #define TYPE1_DEFINE(x) TYPE_DEFINE(x, PPCI_TYPE1_CFG_BITS); 24 - #define TYPE2_DEFINE(x) TYPE_DEFINE(x, PPCI_TYPE2_ADDRESS_BITS); 25 - 26 - // 27 - // Defines a PCI Register Read/Write Type 1 Routine Prologue and Epilogue 28 - // 29 - #define TYPE1_START(x, y) \ 30 - TYPE_DEFINE(x, PPCI_TYPE1_CFG_BITS) \ 31 - { \ 32 - ULONG i = Offset % sizeof(ULONG); \ 33 - PciCfg->u.bits.RegisterNumber = Offset / sizeof(ULONG); \ 34 - WRITE_PORT_ULONG(BusData->Config.Type1.Address, PciCfg->u.AsULONG); 35 - #define TYPE1_END(y) \ 36 - return sizeof(y); } 37 - #define TYPE2_END TYPE1_END 38 - 39 - // 40 - // PCI Register Read Type 1 Routine 41 - // 42 - #define TYPE1_READ(x, y) \ 43 - TYPE1_START(x, y) \ 44 - *((POINTER_TO_(y))Buffer) = \ 45 - READ_FROM(y)((POINTER_TO_(y))(BusData->Config.Type1.Data + i)); \ 46 - TYPE1_END(y) 47 - 48 - // 49 - // PCI Register Write Type 1 Routine 50 - // 51 - #define TYPE1_WRITE(x, y) \ 52 - TYPE1_START(x, y) \ 53 - WRITE_TO(y)((POINTER_TO_(y))(BusData->Config.Type1.Data + i), \ 54 - *((POINTER_TO_(y))Buffer)); \ 55 - TYPE1_END(y) 56 - 57 - // 58 - // Defines a PCI Register Read/Write Type 2 Routine Prologue and Epilogue 59 - // 60 - #define TYPE2_START(x, y) \ 61 - TYPE_DEFINE(x, PPCI_TYPE2_ADDRESS_BITS) \ 62 - { \ 63 - PciCfg->u.bits.RegisterNumber = (USHORT)Offset; 64 - 65 - // 66 - // PCI Register Read Type 2 Routine 67 - // 68 - #define TYPE2_READ(x, y) \ 69 - TYPE2_START(x, y) \ 70 - *((POINTER_TO_(y))Buffer) = \ 71 - READ_FROM(y)((POINTER_TO_(y))(ULONG)PciCfg->u.AsUSHORT); \ 72 - TYPE2_END(y) 73 - 74 - // 75 - // PCI Register Write Type 2 Routine 76 - // 77 - #define TYPE2_WRITE(x, y) \ 78 - TYPE2_START(x, y) \ 79 - WRITE_TO(y)((POINTER_TO_(y))(ULONG)PciCfg->u.AsUSHORT, \ 80 - *((POINTER_TO_(y))Buffer)); \ 81 - TYPE2_END(y) 82 - 83 - typedef struct _PCIPBUSDATA 84 - { 85 - PCIBUSDATA CommonData; 86 - union 87 - { 88 - struct 89 - { 90 - PULONG Address; 91 - ULONG Data; 92 - } Type1; 93 - struct 94 - { 95 - PUCHAR CSE; 96 - PUCHAR Forward; 97 - ULONG Base; 98 - } Type2; 99 - } Config; 100 - ULONG MaxDevice; 101 - } PCIPBUSDATA, *PPCIPBUSDATA; 102 - 103 - typedef ULONG 104 - (NTAPI *FncConfigIO)( 105 - IN PPCIPBUSDATA BusData, 106 - IN PVOID State, 107 - IN PUCHAR Buffer, 108 - IN ULONG Offset 109 - ); 110 - 111 - typedef VOID 112 - (NTAPI *FncSync)( 113 - IN PBUS_HANDLER BusHandler, 114 - IN PCI_SLOT_NUMBER Slot, 115 - IN PKIRQL Irql, 116 - IN PVOID State 117 - ); 118 - 119 - typedef VOID 120 - (NTAPI *FncReleaseSync)( 121 - IN PBUS_HANDLER BusHandler, 122 - IN KIRQL Irql 123 - ); 124 - 125 - typedef struct _PCI_CONFIG_HANDLER 126 - { 127 - FncSync Synchronize; 128 - FncReleaseSync ReleaseSynchronzation; 129 - FncConfigIO ConfigRead[3]; 130 - FncConfigIO ConfigWrite[3]; 131 - } PCI_CONFIG_HANDLER, *PPCI_CONFIG_HANDLER; 132 - 133 - typedef struct _PCI_REGISTRY_INFO_INTERNAL 134 - { 135 - UCHAR MajorRevision; 136 - UCHAR MinorRevision; 137 - UCHAR NoBuses; 138 - UCHAR HardwareMechanism; 139 - ULONG ElementCount; 140 - PCI_CARD_DESCRIPTOR CardList[ANYSIZE_ARRAY]; 141 - } PCI_REGISTRY_INFO_INTERNAL, *PPCI_REGISTRY_INFO_INTERNAL; 142 - 143 - /* FUNCTIONS *****************************************************************/ 144 - 145 - VOID 146 - NTAPI 147 - HalpPCISynchronizeType1( 148 - IN PBUS_HANDLER BusHandler, 149 - IN PCI_SLOT_NUMBER Slot, 150 - IN PKIRQL Irql, 151 - IN PPCI_TYPE1_CFG_BITS PciCfg 152 - ); 153 - 154 - VOID 155 - NTAPI 156 - HalpPCIReleaseSynchronzationType1( 157 - IN PBUS_HANDLER BusHandler, 158 - IN KIRQL Irql 159 - ); 160 - 161 - VOID 162 - NTAPI 163 - HalpPCISynchronizeType2( 164 - IN PBUS_HANDLER BusHandler, 165 - IN PCI_SLOT_NUMBER Slot, 166 - IN PKIRQL Irql, 167 - IN PPCI_TYPE2_ADDRESS_BITS PciCfg 168 - ); 169 - 170 - VOID 171 - NTAPI 172 - HalpPCIReleaseSynchronzationType2( 173 - IN PBUS_HANDLER BusHandler, 174 - IN KIRQL Irql 175 - ); 176 - 177 - TYPE1_DEFINE(HalpPCIReadUcharType1); 178 - TYPE1_DEFINE(HalpPCIReadUshortType1); 179 - TYPE1_DEFINE(HalpPCIReadUlongType1); 180 - TYPE2_DEFINE(HalpPCIReadUcharType2); 181 - TYPE2_DEFINE(HalpPCIReadUshortType2); 182 - TYPE2_DEFINE(HalpPCIReadUlongType2); 183 - TYPE1_DEFINE(HalpPCIWriteUcharType1); 184 - TYPE1_DEFINE(HalpPCIWriteUshortType1); 185 - TYPE1_DEFINE(HalpPCIWriteUlongType1); 186 - TYPE2_DEFINE(HalpPCIWriteUcharType2); 187 - TYPE2_DEFINE(HalpPCIWriteUshortType2); 188 - TYPE2_DEFINE(HalpPCIWriteUlongType2); 189 - 190 - BOOLEAN 191 - NTAPI 192 - HalpValidPCISlot( 193 - IN PBUS_HANDLER BusHandler, 194 - IN PCI_SLOT_NUMBER Slot 195 - ); 196 - 197 - VOID 198 - NTAPI 199 - HalpReadPCIConfig( 200 - IN PBUS_HANDLER BusHandler, 201 - IN PCI_SLOT_NUMBER Slot, 202 - IN PVOID Buffer, 203 - IN ULONG Offset, 204 - IN ULONG Length 205 - ); 206 - 207 - VOID 208 - NTAPI 209 - HalpWritePCIConfig( 210 - IN PBUS_HANDLER BusHandler, 211 - IN PCI_SLOT_NUMBER Slot, 212 - IN PVOID Buffer, 213 - IN ULONG Offset, 214 - IN ULONG Length 215 - ); 216 - 217 - ULONG 218 - NTAPI 219 - HalpGetSystemInterruptVector( 220 - ULONG BusNumber, 221 - ULONG BusInterruptLevel, 222 - ULONG BusInterruptVector, 223 - PKIRQL Irql, 224 - PKAFFINITY Affinity 225 - ); 226 - 227 - ULONG 228 - NTAPI 229 - HalpGetCmosData( 230 - IN ULONG BusNumber, 231 - IN ULONG SlotNumber, 232 - IN PVOID Buffer, 233 - IN ULONG Length 234 - ); 235 - 236 - ULONG 237 - NTAPI 238 - HalpSetCmosData( 239 - IN ULONG BusNumber, 240 - IN ULONG SlotNumber, 241 - IN PVOID Buffer, 242 - IN ULONG Length 243 - ); 244 - 245 - ULONG 246 - NTAPI 247 - HalpGetPCIData( 248 - IN PBUS_HANDLER BusHandler, 249 - IN PBUS_HANDLER RootBusHandler, 250 - IN PCI_SLOT_NUMBER SlotNumber, 251 - IN PUCHAR Buffer, 252 - IN ULONG Offset, 253 - IN ULONG Length 254 - ); 255 - 256 - ULONG 257 - NTAPI 258 - HalpSetPCIData( 259 - IN PBUS_HANDLER BusHandler, 260 - IN PBUS_HANDLER RootBusHandler, 261 - IN PCI_SLOT_NUMBER SlotNumber, 262 - IN PUCHAR Buffer, 263 - IN ULONG Offset, 264 - IN ULONG Length 265 - ); 266 - 267 - NTSTATUS 268 - NTAPI 269 - HalpAssignPCISlotResources( 270 - IN PBUS_HANDLER BusHandler, 271 - IN PBUS_HANDLER RootHandler, 272 - IN PUNICODE_STRING RegistryPath, 273 - IN PUNICODE_STRING DriverClassName OPTIONAL, 274 - IN PDRIVER_OBJECT DriverObject, 275 - IN PDEVICE_OBJECT DeviceObject OPTIONAL, 276 - IN ULONG Slot, 277 - IN OUT PCM_RESOURCE_LIST *pAllocatedResources 278 - ); 279 - 280 - VOID 281 - NTAPI 282 - HalpInitializePciBus( 283 - VOID 284 - ); 285 - 286 - extern ULONG HalpBusType; 287 - extern BOOLEAN HalpPCIConfigInitialized; 288 - extern BUS_HANDLER HalpFakePciBusHandler; 289 - extern ULONG HalpMinPciBus, HalpMaxPciBus; 290 - 291 - /* EOF */
-49
hal/halppc/include/hal.h
··· 1 - /* 2 - * COPYRIGHT: See COPYING in the top level directory 3 - * PROJECT: ReactOS Hardware Abstraction Layer 4 - * FILE: hal/halppc/include/hal.h 5 - * PURPOSE: HAL Header 6 - * PROGRAMMER: Alex Ionescu (alex@relsoft.net) 7 - */ 8 - 9 - /* INCLUDES ******************************************************************/ 10 - 11 - /* C Headers */ 12 - #include <stdio.h> 13 - 14 - /* WDK HAL Compilation hack */ 15 - #include <excpt.h> 16 - #include <ntdef.h> 17 - #undef _NTHAL_ 18 - #undef DECLSPEC_IMPORT 19 - #define DECLSPEC_IMPORT 20 - #undef NTSYSAPI 21 - #define NTSYSAPI __declspec(dllimport) 22 - 23 - /* IFS/DDK/NDK Headers */ 24 - #include <ntifs.h> 25 - #include <bugcodes.h> 26 - #include <ntdddisk.h> 27 - #include <arc/arc.h> 28 - #include <iotypes.h> 29 - #include <kefuncs.h> 30 - #include <intrin.h> 31 - #include <halfuncs.h> 32 - #include <iofuncs.h> 33 - #include <ldrtypes.h> 34 - #include <obfuncs.h> 35 - 36 - /* Internal kernel headers */ 37 - #include "internal/pci.h" 38 - #include "internal/powerpc/intrin_i.h" 39 - 40 - /* Internal HAL Headers */ 41 - #include "apic.h" 42 - #include "bus.h" 43 - #include "halirq.h" 44 - #include "haldma.h" 45 - #include "halp.h" 46 - #include "mps.h" 47 - #include "ioapic.h" 48 - 49 - /* EOF */
-380
hal/halppc/include/haldma.h
··· 1 - #pragma once 2 - 3 - /* 4 - * DMA Page Register Structure 5 - * 080 DMA RESERVED 6 - * 081 DMA Page Register (channel 2) 7 - * 082 DMA Page Register (channel 3) 8 - * 083 DMA Page Register (channel 1) 9 - * 084 DMA RESERVED 10 - * 085 DMA RESERVED 11 - * 086 DMA RESERVED 12 - * 087 DMA Page Register (channel 0) 13 - * 088 DMA RESERVED 14 - * 089 PS/2-DMA Page Register (channel 6) 15 - * 08A PS/2-DMA Page Register (channel 7) 16 - * 08B PS/2-DMA Page Register (channel 5) 17 - * 08C PS/2-DMA RESERVED 18 - * 08D PS/2-DMA RESERVED 19 - * 08E PS/2-DMA RESERVED 20 - * 08F PS/2-DMA Page Register (channel 4) 21 - */ 22 - 23 - typedef struct _DMA_PAGE 24 - { 25 - UCHAR Reserved1; 26 - UCHAR Channel2; 27 - UCHAR Channel3; 28 - UCHAR Channel1; 29 - UCHAR Reserved2[3]; 30 - UCHAR Channel0; 31 - UCHAR Reserved3; 32 - UCHAR Channel6; 33 - UCHAR Channel7; 34 - UCHAR Channel5; 35 - UCHAR Reserved4[3]; 36 - UCHAR Channel4; 37 - } DMA_PAGE, *PDMA_PAGE; 38 - 39 - /* 40 - * DMA Channel Mask Register Structure 41 - * 42 - * MSB LSB 43 - * x x x x x x x x 44 - * ------------------- - ----- 45 - * | | | 00 - Select channel 0 mask bit 46 - * | | \---- 01 - Select channel 1 mask bit 47 - * | | 10 - Select channel 2 mask bit 48 - * | | 11 - Select channel 3 mask bit 49 - * | | 50 - * | \---------- 0 - Clear mask bit 51 - * | 1 - Set mask bit 52 - * | 53 - * \----------------------- xx - Reserved 54 - */ 55 - 56 - typedef struct _DMA_CHANNEL_MASK 57 - { 58 - UCHAR Channel: 2; 59 - UCHAR SetMask: 1; 60 - UCHAR Reserved: 5; 61 - } DMA_CHANNEL_MASK, *PDMA_CHANNEL_MASK; 62 - 63 - /* 64 - * DMA Mask Register Structure 65 - * 66 - * MSB LSB 67 - * x x x x x x x x 68 - * \---/ - - ----- ----- 69 - * | | | | | 00 - Channel 0 select 70 - * | | | | \---- 01 - Channel 1 select 71 - * | | | | 10 - Channel 2 select 72 - * | | | | 11 - Channel 3 select 73 - * | | | | 74 - * | | | | 00 - Verify transfer 75 - * | | | \------------ 01 - Write transfer 76 - * | | | 10 - Read transfer 77 - * | | | 78 - * | | \-------------------- 0 - Autoinitialized 79 - * | | 1 - Non-autoinitialized 80 - * | | 81 - * | \------------------------ 0 - Address increment select 82 - * | 83 - * | 00 - Demand mode 84 - * \------------------------------ 01 - Single mode 85 - * 10 - Block mode 86 - * 11 - Cascade mode 87 - */ 88 - 89 - typedef union _DMA_MODE 90 - { 91 - struct 92 - { 93 - UCHAR Channel: 2; 94 - UCHAR TransferType: 2; 95 - UCHAR AutoInitialize: 1; 96 - UCHAR AddressDecrement: 1; 97 - UCHAR RequestMode: 2; 98 - }; 99 - UCHAR Byte; 100 - } DMA_MODE, *PDMA_MODE; 101 - 102 - /* 103 - * DMA Extended Mode Register Structure 104 - * 105 - * MSB LSB 106 - * x x x x x x x x 107 - * - - ----- ----- ----- 108 - * | | | | | 00 - Channel 0 select 109 - * | | | | \---- 01 - Channel 1 select 110 - * | | | | 10 - Channel 2 select 111 - * | | | | 11 - Channel 3 select 112 - * | | | | 113 - * | | | | 00 - 8-bit I/O, by bytes 114 - * | | | \------------ 01 - 16-bit I/O, by words, address shifted 115 - * | | | 10 - 32-bit I/O, by bytes 116 - * | | | 11 - 16-bit I/O, by bytes 117 - * | | | 118 - * | | \---------------------- 00 - Compatible 119 - * | | 01 - Type A 120 - * | | 10 - Type B 121 - * | | 11 - Burst 122 - * | | 123 - * | \---------------------------- 0 - Terminal Count is Output 124 - * | 125 - * \---------------------------------0 - Disable Stop Register 126 - * 1 - Enable Stop Register 127 - */ 128 - 129 - typedef union _DMA_EXTENDED_MODE 130 - { 131 - struct 132 - { 133 - UCHAR ChannelNumber: 2; 134 - UCHAR TransferSize: 2; 135 - UCHAR TimingMode: 2; 136 - UCHAR TerminalCountIsOutput: 1; 137 - UCHAR EnableStopRegister: 1; 138 - }; 139 - UCHAR Byte; 140 - } DMA_EXTENDED_MODE, *PDMA_EXTENDED_MODE; 141 - 142 - /* DMA Extended Mode Register Transfer Sizes */ 143 - #define B_8BITS 0 144 - #define W_16BITS 1 145 - #define B_32BITS 2 146 - #define B_16BITS 3 147 - 148 - /* DMA Extended Mode Register Timing */ 149 - #define COMPATIBLE_TIMING 0 150 - #define TYPE_A_TIMING 1 151 - #define TYPE_B_TIMING 2 152 - #define BURST_TIMING 3 153 - 154 - /* Channel Stop Registers for each Channel */ 155 - typedef struct _DMA_CHANNEL_STOP 156 - { 157 - UCHAR ChannelLow; 158 - UCHAR ChannelMid; 159 - UCHAR ChannelHigh; 160 - UCHAR Reserved; 161 - } DMA_CHANNEL_STOP, *PDMA_CHANNEL_STOP; 162 - 163 - /* Transfer Types */ 164 - #define VERIFY_TRANSFER 0x00 165 - #define READ_TRANSFER 0x01 166 - #define WRITE_TRANSFER 0x02 167 - 168 - /* Request Modes */ 169 - #define DEMAND_REQUEST_MODE 0x00 170 - #define SINGLE_REQUEST_MODE 0x01 171 - #define BLOCK_REQUEST_MODE 0x02 172 - #define CASCADE_REQUEST_MODE 0x03 173 - 174 - #define DMA_SETMASK 4 175 - #define DMA_CLEARMASK 0 176 - #define DMA_READ 4 177 - #define DMA_WRITE 8 178 - #define DMA_SINGLE_TRANSFER 0x40 179 - #define DMA_AUTO_INIT 0x10 180 - 181 - typedef struct _DMA1_ADDRESS_COUNT 182 - { 183 - UCHAR DmaBaseAddress; 184 - UCHAR DmaBaseCount; 185 - } DMA1_ADDRESS_COUNT, *PDMA1_ADDRESS_COUNT; 186 - 187 - typedef struct _DMA2_ADDRESS_COUNT 188 - { 189 - UCHAR DmaBaseAddress; 190 - UCHAR Reserved1; 191 - UCHAR DmaBaseCount; 192 - UCHAR Reserved2; 193 - } DMA2_ADDRESS_COUNT, *PDMA2_ADDRESS_COUNT; 194 - 195 - typedef struct _DMA1_CONTROL 196 - { 197 - DMA1_ADDRESS_COUNT DmaAddressCount[4]; 198 - UCHAR DmaStatus; 199 - UCHAR DmaRequest; 200 - UCHAR SingleMask; 201 - UCHAR Mode; 202 - UCHAR ClearBytePointer; 203 - UCHAR MasterClear; 204 - UCHAR ClearMask; 205 - UCHAR AllMask; 206 - } DMA1_CONTROL, *PDMA1_CONTROL; 207 - 208 - typedef struct _DMA2_CONTROL 209 - { 210 - DMA2_ADDRESS_COUNT DmaAddressCount[4]; 211 - UCHAR DmaStatus; 212 - UCHAR Reserved1; 213 - UCHAR DmaRequest; 214 - UCHAR Reserved2; 215 - UCHAR SingleMask; 216 - UCHAR Reserved3; 217 - UCHAR Mode; 218 - UCHAR Reserved4; 219 - UCHAR ClearBytePointer; 220 - UCHAR Reserved5; 221 - UCHAR MasterClear; 222 - UCHAR Reserved6; 223 - UCHAR ClearMask; 224 - UCHAR Reserved7; 225 - UCHAR AllMask; 226 - UCHAR Reserved8; 227 - } DMA2_CONTROL, *PDMA2_CONTROL; 228 - 229 - /* This structure defines the I/O Map of the 82537 controller. */ 230 - typedef struct _EISA_CONTROL 231 - { 232 - /* DMA Controller 1 */ 233 - DMA1_CONTROL DmaController1; /* 00h-0Fh */ 234 - UCHAR Reserved1[16]; /* 0Fh-1Fh */ 235 - 236 - /* Interrupt Controller 1 (PIC) */ 237 - UCHAR Pic1Operation; /* 20h */ 238 - UCHAR Pic1Interrupt; /* 21h */ 239 - UCHAR Reserved2[30]; /* 22h-3Fh */ 240 - 241 - /* Timer */ 242 - UCHAR TimerCounter; /* 40h */ 243 - UCHAR TimerMemoryRefresh; /* 41h */ 244 - UCHAR Speaker; /* 42h */ 245 - UCHAR TimerOperation; /* 43h */ 246 - UCHAR TimerMisc; /* 44h */ 247 - UCHAR Reserved3[2]; /* 45-46h */ 248 - UCHAR TimerCounterControl; /* 47h */ 249 - UCHAR TimerFailSafeCounter; /* 48h */ 250 - UCHAR Reserved4; /* 49h */ 251 - UCHAR TimerCounter2; /* 4Ah */ 252 - UCHAR TimerOperation2; /* 4Bh */ 253 - UCHAR Reserved5[20]; /* 4Ch-5Fh */ 254 - 255 - /* NMI / Keyboard / RTC */ 256 - UCHAR Keyboard; /* 60h */ 257 - UCHAR NmiStatus; /* 61h */ 258 - UCHAR Reserved6[14]; /* 62h-6Fh */ 259 - UCHAR NmiEnable; /* 70h */ 260 - UCHAR Reserved7[15]; /* 71h-7Fh */ 261 - 262 - /* DMA Page Registers Controller 1 */ 263 - DMA_PAGE DmaController1Pages; /* 80h-8Fh */ 264 - UCHAR Reserved8[16]; /* 90h-9Fh */ 265 - 266 - /* Interrupt Controller 2 (PIC) */ 267 - UCHAR Pic2Operation; /* 0A0h */ 268 - UCHAR Pic2Interrupt; /* 0A1h */ 269 - UCHAR Reserved9[30]; /* 0A2h-0BFh */ 270 - 271 - /* DMA Controller 2 */ 272 - DMA1_CONTROL DmaController2; /* 0C0h-0CFh */ 273 - 274 - /* System Reserved Ports */ 275 - UCHAR SystemReserved[816]; /* 0D0h-3FFh */ 276 - 277 - /* Extended DMA Registers, Controller 1 */ 278 - UCHAR DmaHighByteCount1[8]; /* 400h-407h */ 279 - UCHAR Reserved10[2]; /* 408h-409h */ 280 - UCHAR DmaChainMode1; /* 40Ah */ 281 - UCHAR DmaExtendedMode1; /* 40Bh */ 282 - UCHAR DmaBufferControl; /* 40Ch */ 283 - UCHAR Reserved11[84]; /* 40Dh-460h */ 284 - UCHAR ExtendedNmiControl; /* 461h */ 285 - UCHAR NmiCommand; /* 462h */ 286 - UCHAR Reserved12; /* 463h */ 287 - UCHAR BusMaster; /* 464h */ 288 - UCHAR Reserved13[27]; /* 465h-47Fh */ 289 - 290 - /* DMA Page Registers Controller 2 */ 291 - DMA_PAGE DmaController2Pages; /* 480h-48Fh */ 292 - UCHAR Reserved14[48]; /* 490h-4BFh */ 293 - 294 - /* Extended DMA Registers, Controller 2 */ 295 - UCHAR DmaHighByteCount2[16]; /* 4C0h-4CFh */ 296 - 297 - /* Edge/Level Control Registers */ 298 - UCHAR Pic1EdgeLevel; /* 4D0h */ 299 - UCHAR Pic2EdgeLevel; /* 4D1h */ 300 - UCHAR Reserved15[2]; /* 4D2h-4D3h */ 301 - 302 - /* Extended DMA Registers, Controller 2 */ 303 - UCHAR DmaChainMode2; /* 4D4h */ 304 - UCHAR Reserved16; /* 4D5h */ 305 - UCHAR DmaExtendedMode2; /* 4D6h */ 306 - UCHAR Reserved17[9]; /* 4D7h-4DFh */ 307 - 308 - /* DMA Stop Registers */ 309 - DMA_CHANNEL_STOP DmaChannelStop[8]; /* 4E0h-4FFh */ 310 - } EISA_CONTROL, *PEISA_CONTROL; 311 - 312 - typedef struct _ROS_MAP_REGISTER_ENTRY 313 - { 314 - PVOID VirtualAddress; 315 - PHYSICAL_ADDRESS PhysicalAddress; 316 - ULONG Counter; 317 - } ROS_MAP_REGISTER_ENTRY, *PROS_MAP_REGISTER_ENTRY; 318 - 319 - typedef struct _ADAPTER_OBJECT { 320 - /* 321 - * New style DMA object definition. The fact that it is at the beginning 322 - * of the ADAPTER_OBJECT structure allows us to easily implement the 323 - * fallback implementation of IoGetDmaAdapter. 324 - */ 325 - DMA_ADAPTER DmaHeader; 326 - 327 - /* 328 - * For normal adapter objects pointer to master adapter that takes care 329 - * of channel allocation. For master adapter set to NULL. 330 - */ 331 - struct _ADAPTER_OBJECT *MasterAdapter; 332 - 333 - ULONG MapRegistersPerChannel; 334 - PVOID AdapterBaseVa; 335 - PROS_MAP_REGISTER_ENTRY MapRegisterBase; 336 - 337 - ULONG NumberOfMapRegisters; 338 - ULONG CommittedMapRegisters; 339 - 340 - PWAIT_CONTEXT_BLOCK CurrentWcb; 341 - KDEVICE_QUEUE ChannelWaitQueue; 342 - PKDEVICE_QUEUE RegisterWaitQueue; 343 - LIST_ENTRY AdapterQueue; 344 - KSPIN_LOCK SpinLock; 345 - PRTL_BITMAP MapRegisters; 346 - PUCHAR PagePort; 347 - UCHAR ChannelNumber; 348 - UCHAR AdapterNumber; 349 - USHORT DmaPortAddress; 350 - DMA_MODE AdapterMode; 351 - BOOLEAN NeedsMapRegisters; 352 - BOOLEAN MasterDevice; 353 - BOOLEAN Width16Bits; 354 - BOOLEAN ScatterGather; 355 - BOOLEAN IgnoreCount; 356 - BOOLEAN Dma32BitAddresses; 357 - BOOLEAN Dma64BitAddresses; 358 - LIST_ENTRY AdapterList; 359 - } ADAPTER_OBJECT; 360 - 361 - typedef struct _GROW_WORK_ITEM { 362 - WORK_QUEUE_ITEM WorkQueueItem; 363 - PADAPTER_OBJECT AdapterObject; 364 - ULONG NumberOfMapRegisters; 365 - } GROW_WORK_ITEM, *PGROW_WORK_ITEM; 366 - 367 - #define MAP_BASE_SW_SG 1 368 - 369 - PADAPTER_OBJECT NTAPI 370 - HalpDmaAllocateMasterAdapter(VOID); 371 - 372 - PDMA_ADAPTER NTAPI 373 - HalpGetDmaAdapter( 374 - IN PVOID Context, 375 - IN PDEVICE_DESCRIPTION DeviceDescription, 376 - OUT PULONG NumberOfMapRegisters); 377 - 378 - ULONG NTAPI 379 - HalpDmaGetDmaAlignment( 380 - PADAPTER_OBJECT AdapterObject);
-29
hal/halppc/include/halirq.h
··· 1 - 2 - #pragma once 3 - 4 - #ifdef CONFIG_SMP 5 - 6 - #define FIRST_DEVICE_VECTOR (0x30) 7 - #define FIRST_SYSTEM_VECTOR (0xef) 8 - 9 - #define IRQ_BASE FIRST_DEVICE_VECTOR 10 - #define NR_IRQS (FIRST_SYSTEM_VECTOR - FIRST_DEVICE_VECTOR) 11 - 12 - /* 13 - * FIXME: 14 - * This does not work if we have more than 24 IRQs (ie. more than one I/O APIC) 15 - */ 16 - #define VECTOR2IRQ(vector) (23 - (vector - IRQ_BASE) / 8) 17 - #define VECTOR2IRQL(vector) (PROFILE_LEVEL - VECTOR2IRQ(vector)) 18 - #define IRQ2VECTOR(irq) (((23 - (irq)) * 8) + FIRST_DEVICE_VECTOR) 19 - 20 - #else 21 - 22 - #define IRQ_BASE (0x30) 23 - #define NR_IRQS (16) 24 - 25 - #define VECTOR2IRQ(vector) ((vector) - IRQ_BASE) 26 - #define VECTOR2IRQL(vector) (PROFILE_LEVEL - VECTOR2IRQ(vector)) 27 - #define IRQ2VECTOR(irq) ((irq) + IRQ_BASE) 28 - 29 - #endif
-126
hal/halppc/include/halp.h
··· 1 - /* 2 - * 3 - */ 4 - 5 - #pragma once 6 - 7 - /* Temporary hack */ 8 - #define KPCR_BASE 0xFF000000 9 - 10 - #define HAL_APC_REQUEST 0 11 - #define HAL_DPC_REQUEST 1 12 - 13 - /* CMOS Registers and Ports */ 14 - #define CMOS_CONTROL_PORT (PUCHAR)0x70 15 - #define CMOS_DATA_PORT (PUCHAR)0x71 16 - #define RTC_REGISTER_A 0x0A 17 - #define RTC_REGISTER_B 0x0B 18 - #define RTC_REG_A_UIP 0x80 19 - #define RTC_REGISTER_CENTURY 0x32 20 - 21 - /* Timer Registers and Ports */ 22 - #define TIMER_CONTROL_PORT 0x43 23 - #define TIMER_DATA_PORT0 0x40 24 - #define TIMER_SC0 0 25 - #define TIMER_BOTH 0x30 26 - #define TIMER_MD2 0x4 27 - 28 - /* Conversion functions */ 29 - #define BCD_INT(bcd) \ 30 - (((bcd & 0xF0) >> 4) * 10 + (bcd & 0x0F)) 31 - #define INT_BCD(int) \ 32 - (UCHAR)(((int / 10) << 4) + (int % 10)) 33 - 34 - /* adapter.c */ 35 - PADAPTER_OBJECT NTAPI HalpAllocateAdapterEx(ULONG NumberOfMapRegisters,BOOLEAN IsMaster, BOOLEAN Dma32BitAddresses); 36 - 37 - /* bus.c */ 38 - VOID NTAPI HalpInitNonBusHandler (VOID); 39 - 40 - /* irql.c */ 41 - VOID NTAPI HalpInitPICs(VOID); 42 - 43 - /* udelay.c */ 44 - VOID NTAPI HalpInitializeClock(VOID); 45 - 46 - /* pci.c */ 47 - VOID HalpInitPciBus (VOID); 48 - 49 - /* dma.c */ 50 - VOID HalpInitDma (VOID); 51 - 52 - /* Non-generic initialization */ 53 - VOID HalpInitPhase0 (PLOADER_PARAMETER_BLOCK LoaderBlock); 54 - VOID HalpInitPhase1(VOID); 55 - VOID NTAPI HalpClockInterrupt(VOID); 56 - 57 - // 58 - // KD Support 59 - // 60 - VOID 61 - NTAPI 62 - HalpCheckPowerButton( 63 - VOID 64 - ); 65 - 66 - VOID 67 - NTAPI 68 - HalpRegisterKdSupportFunctions( 69 - VOID 70 - ); 71 - 72 - NTSTATUS 73 - NTAPI 74 - HalpSetupPciDeviceForDebugging( 75 - IN PVOID LoaderBlock, 76 - IN OUT PDEBUG_DEVICE_DESCRIPTOR PciDevice 77 - ); 78 - 79 - NTSTATUS 80 - NTAPI 81 - HalpReleasePciDeviceForDebugging( 82 - IN OUT PDEBUG_DEVICE_DESCRIPTOR PciDevice 83 - ); 84 - 85 - // 86 - // Memory routines 87 - // 88 - PVOID 89 - NTAPI 90 - HalpMapPhysicalMemory64( 91 - IN PHYSICAL_ADDRESS PhysicalAddress, 92 - IN ULONG NumberPage 93 - ); 94 - 95 - VOID 96 - NTAPI 97 - HalpUnmapVirtualAddress( 98 - IN PVOID VirtualAddress, 99 - IN ULONG NumberPages 100 - ); 101 - 102 - /* sysinfo.c */ 103 - NTSTATUS 104 - NTAPI 105 - HaliQuerySystemInformation( 106 - IN HAL_QUERY_INFORMATION_CLASS InformationClass, 107 - IN ULONG BufferSize, 108 - IN OUT PVOID Buffer, 109 - OUT PULONG ReturnedLength 110 - ); 111 - 112 - NTSTATUS 113 - NTAPI 114 - HaliSetSystemInformation( 115 - IN HAL_SET_INFORMATION_CLASS InformationClass, 116 - IN ULONG BufferSize, 117 - IN OUT PVOID Buffer 118 - ); 119 - 120 - typedef struct tagHALP_HOOKS 121 - { 122 - void (*InitPciBus)(ULONG BusNumber, PBUS_HANDLER BusHandler); 123 - } HALP_HOOKS, *PHALP_HOOKS; 124 - 125 - extern HALP_HOOKS HalpHooks; 126 - extern KSPIN_LOCK HalpSystemHardwareLock;
-97
hal/halppc/include/ioapic.h
··· 1 - /* 2 - * 3 - */ 4 - 5 - #pragma once 6 - 7 - /* I/O APIC Register Address Map */ 8 - #define IOAPIC_IOREGSEL 0x0000 /* I/O Register Select (index) (R/W) */ 9 - #define IOAPIC_IOWIN 0x0010 /* I/O window (data) (R/W) */ 10 - 11 - #define IOAPIC_ID 0x0000 /* IO APIC ID (R/W) */ 12 - #define IOAPIC_VER 0x0001 /* IO APIC Version (R) */ 13 - #define IOAPIC_ARB 0x0002 /* IO APIC Arbitration ID (R) */ 14 - #define IOAPIC_REDTBL 0x0010 /* Redirection Table (0-23 64-bit registers) (R/W) */ 15 - 16 - #define IOAPIC_ID_MASK (0xF << 24) 17 - #define GET_IOAPIC_ID(x) (((x) & IOAPIC_ID_MASK) >> 24) 18 - #define SET_IOAPIC_ID(x) ((x) << 24) 19 - 20 - #define IOAPIC_VER_MASK (0xFF) 21 - #define GET_IOAPIC_VERSION(x) (((x) & IOAPIC_VER_MASK)) 22 - #define IOAPIC_MRE_MASK (0xFF << 16) /* Maximum Redirection Entry */ 23 - #define GET_IOAPIC_MRE(x) (((x) & IOAPIC_MRE_MASK) >> 16) 24 - 25 - #define IOAPIC_ARB_MASK (0xF << 24) 26 - #define GET_IOAPIC_ARB(x) (((x) & IOAPIC_ARB_MASK) >> 24) 27 - 28 - #define IOAPIC_TBL_DELMOD (0x7 << 10) /* Delivery Mode (see APIC_DM_*) */ 29 - #define IOAPIC_TBL_DM (0x1 << 11) /* Destination Mode */ 30 - #define IOAPIC_TBL_DS (0x1 << 12) /* Delivery Status */ 31 - #define IOAPIC_TBL_INTPOL (0x1 << 13) /* Interrupt Input Pin Polarity */ 32 - #define IOAPIC_TBL_RIRR (0x1 << 14) /* Remote IRR */ 33 - #define IOAPIC_TBL_TM (0x1 << 15) /* Trigger Mode */ 34 - #define IOAPIC_TBL_IM (0x1 << 16) /* Interrupt Mask */ 35 - #define IOAPIC_TBL_DF0 (0xF << 56) /* Destination Field (physical mode) */ 36 - #define IOAPIC_TBL_DF1 (0xFF<< 56) /* Destination Field (logical mode) */ 37 - #define IOAPIC_TBL_VECTOR (0xFF << 0) /* Vector (10h - FEh) */ 38 - 39 - #include <pshpack1.h> 40 - typedef struct _IOAPIC_ROUTE_ENTRY { 41 - ULONG vector : 8, 42 - delivery_mode : 3, /* 000: FIXED 43 - * 001: lowest priority 44 - * 111: ExtINT 45 - */ 46 - dest_mode : 1, /* 0: physical, 1: logical */ 47 - delivery_status : 1, 48 - polarity : 1, 49 - irr : 1, 50 - trigger : 1, /* 0: edge, 1: level */ 51 - mask : 1, /* 0: enabled, 1: disabled */ 52 - __reserved_2 : 15; 53 - 54 - union { 55 - struct { 56 - ULONG __reserved_1 : 24, 57 - physical_dest : 4, 58 - __reserved_2 : 4; 59 - } physical; 60 - struct { 61 - ULONG __reserved_1 : 24, 62 - logical_dest : 8; 63 - } logical; 64 - } dest; 65 - } IOAPIC_ROUTE_ENTRY, *PIOAPIC_ROUTE_ENTRY; 66 - #include <poppack.h> 67 - 68 - typedef struct _IOAPIC_INFO 69 - { 70 - ULONG ApicId; /* APIC ID */ 71 - ULONG ApicVersion; /* APIC version */ 72 - ULONG ApicAddress; /* APIC address */ 73 - ULONG EntryCount; /* Number of redirection entries */ 74 - } IOAPIC_INFO, *PIOAPIC_INFO; 75 - 76 - #define IOAPIC_DEFAULT_BASE 0xFEC00000 /* Default I/O APIC Base Register Address */ 77 - 78 - extern ULONG IRQCount; /* Number of IRQs */ 79 - extern UCHAR BUSMap[MAX_BUS]; /* Map of all buses in the system */ 80 - extern UCHAR PCIBUSMap[MAX_BUS]; /* Map of all PCI buses in the system */ 81 - extern IOAPIC_INFO IOAPICMap[MAX_IOAPIC]; /* Map of all I/O APICs in the system */ 82 - extern ULONG IOAPICCount; /* Number of I/O APICs in the system */ 83 - extern ULONG APICMode; /* APIC mode at startup */ 84 - extern MP_CONFIGURATION_INTSRC IRQMap[MAX_IRQ_SOURCE]; /* Map of all IRQs */ 85 - 86 - VOID IOAPICSetupIrqs(VOID); 87 - VOID IOAPICEnable(VOID); 88 - VOID IOAPICSetupIds(VOID); 89 - VOID IOAPICMaskIrq(ULONG Irq); 90 - VOID IOAPICUnmaskIrq(ULONG Irq); 91 - 92 - VOID HaliReconfigurePciInterrupts(VOID); 93 - 94 - /* For debugging */ 95 - VOID IOAPICDump(VOID); 96 - 97 - /* EOF */
-200
hal/halppc/include/mps.h
··· 1 - #pragma once 2 - 3 - /* 4 - * FIXME: This does not work if we have more than 24 IRQs (ie. more than one 5 - * I/O APIC) 6 - */ 7 - #define IRQL2VECTOR(irql) (IRQ2VECTOR(PROFILE_LEVEL - (irql))) 8 - 9 - #define IRQL2TPR(irql) ((irql) >= IPI_LEVEL ? IPI_VECTOR : ((irql) >= PROFILE_LEVEL ? LOCAL_TIMER_VECTOR : ((irql) > DISPATCH_LEVEL ? IRQL2VECTOR(irql) : 0))) 10 - 11 - typedef struct _KIRQ_TRAPFRAME 12 - { 13 - ULONG Magic; 14 - ULONG Gs; 15 - ULONG Fs; 16 - ULONG Es; 17 - ULONG Ds; 18 - ULONG Eax; 19 - ULONG Ecx; 20 - ULONG Edx; 21 - ULONG Ebx; 22 - ULONG Esp; 23 - ULONG Ebp; 24 - ULONG Esi; 25 - ULONG Edi; 26 - ULONG Eip; 27 - ULONG Cs; 28 - ULONG Eflags; 29 - } KIRQ_TRAPFRAME, *PKIRQ_TRAPFRAME; 30 - 31 - #if 0 32 - /* This values are defined in halirql.h */ 33 - #define FIRST_DEVICE_VECTOR 0x30 34 - #define FIRST_SYSTEM_VECTOR 0xEF 35 - #endif 36 - 37 - #define NUMBER_DEVICE_VECTORS (FIRST_SYSTEM_VECTOR - FIRST_DEVICE_VECTOR) 38 - 39 - 40 - /* MP Floating Pointer Structure */ 41 - #define MPF_SIGNATURE (('_' << 24) | ('P' << 16) | ('M' << 8) | '_') 42 - 43 - #include <pshpack1.h> 44 - typedef struct _MP_FLOATING_POINTER 45 - { 46 - ULONG Signature; /* _MP_ */ 47 - ULONG Address; /* Physical Address Pointer (0 means no configuration table exist) */ 48 - UCHAR Length; /* Structure length in 16-byte paragraphs */ 49 - UCHAR Specification; /* Specification revision */ 50 - UCHAR Checksum; /* Checksum */ 51 - UCHAR Feature1; /* MP System Configuration Type */ 52 - UCHAR Feature2; /* Bit 7 set for IMCR|PIC */ 53 - UCHAR Feature3; /* Unused (0) */ 54 - UCHAR Feature4; /* Unused (0) */ 55 - UCHAR Feature5; /* Unused (0) */ 56 - } MP_FLOATING_POINTER, *PMP_FLOATING_POINTER; 57 - 58 - 59 - #define FEATURE2_IMCRP 0x80 60 - 61 - /* MP Configuration Table Header */ 62 - #define MPC_SIGNATURE (('P' << 24) | ('M' << 16) | ('C' << 8) | 'P') 63 - 64 - typedef struct _MP_CONFIGURATION_TABLE 65 - { 66 - ULONG Signature; /* PCMP */ 67 - USHORT Length; /* Size of configuration table */ 68 - CHAR Specification; /* Specification Revision */ 69 - CHAR Checksum; /* Checksum */ 70 - CHAR Oem[8]; /* OEM ID */ 71 - CHAR ProductId[12]; /* Product ID */ 72 - ULONG OemTable; /* 0 if not present */ 73 - USHORT OemTableSize; /* 0 if not present */ 74 - USHORT EntryCount; /* Number of entries */ 75 - ULONG LocalAPICAddress; /* Local APIC address */ 76 - USHORT ExtTableLength; /* Extended Table Length */ 77 - UCHAR ExtTableChecksum; /* Extended Table Checksum */ 78 - UCHAR Reserved; /* Reserved */ 79 - } MP_CONFIGURATION_TABLE, *PMP_CONFIGURATION_TABLE; 80 - 81 - /* MP Configuration Table Entries */ 82 - #define MPCTE_PROCESSOR 0 /* One entry per processor */ 83 - #define MPCTE_BUS 1 /* One entry per bus */ 84 - #define MPCTE_IOAPIC 2 /* One entry per I/O APIC */ 85 - #define MPCTE_INTSRC 3 /* One entry per bus interrupt source */ 86 - #define MPCTE_LINTSRC 4 /* One entry per system interrupt source */ 87 - 88 - 89 - typedef struct _MP_CONFIGURATION_PROCESSOR 90 - { 91 - UCHAR Type; /* 0 */ 92 - UCHAR ApicId; /* Local APIC ID for the processor */ 93 - UCHAR ApicVersion; /* Local APIC version */ 94 - UCHAR CpuFlags; /* CPU flags */ 95 - ULONG CpuSignature; /* CPU signature */ 96 - ULONG FeatureFlags; /* CPUID feature value */ 97 - ULONG Reserved[2]; /* Reserved (0) */ 98 - } MP_CONFIGURATION_PROCESSOR, *PMP_CONFIGURATION_PROCESSOR; 99 - 100 - 101 - 102 - typedef struct _MP_CONFIGURATION_BUS 103 - { 104 - UCHAR Type; /* 1 */ 105 - UCHAR BusId; /* Bus ID */ 106 - CHAR BusType[6]; /* Bus type */ 107 - } MP_CONFIGURATION_BUS, *PMP_CONFIGURATION_BUS; 108 - 109 - #define MAX_BUS 32 110 - 111 - #define MP_BUS_ISA 1 112 - #define MP_BUS_EISA 2 113 - #define MP_BUS_PCI 3 114 - #define MP_BUS_MCA 4 115 - 116 - #define BUSTYPE_EISA "EISA" 117 - #define BUSTYPE_ISA "ISA" 118 - #define BUSTYPE_INTERN "INTERN" /* Internal BUS */ 119 - #define BUSTYPE_MCA "MCA" 120 - #define BUSTYPE_VL "VL" /* Local bus */ 121 - #define BUSTYPE_PCI "PCI" 122 - #define BUSTYPE_PCMCIA "PCMCIA" 123 - #define BUSTYPE_CBUS "CBUS" 124 - #define BUSTYPE_CBUSII "CBUSII" 125 - #define BUSTYPE_FUTURE "FUTURE" 126 - #define BUSTYPE_MBI "MBI" 127 - #define BUSTYPE_MBII "MBII" 128 - #define BUSTYPE_MPI "MPI" 129 - #define BUSTYPE_MPSA "MPSA" 130 - #define BUSTYPE_NUBUS "NUBUS" 131 - #define BUSTYPE_TC "TC" 132 - #define BUSTYPE_VME "VME" 133 - #define BUSTYPE_XPRESS "XPRESS" 134 - 135 - 136 - typedef struct _MP_CONFIGURATION_IOAPIC 137 - { 138 - UCHAR Type; /* 2 */ 139 - UCHAR ApicId; /* I/O APIC ID */ 140 - UCHAR ApicVersion; /* I/O APIC version */ 141 - UCHAR ApicFlags; /* I/O APIC flags */ 142 - ULONG ApicAddress; /* I/O APIC base address */ 143 - } MP_CONFIGURATION_IOAPIC, *PMP_CONFIGURATION_IOAPIC; 144 - 145 - #define MAX_IOAPIC 2 146 - 147 - #define MP_IOAPIC_USABLE 0x01 148 - 149 - 150 - typedef struct _MP_CONFIGURATION_INTSRC 151 - { 152 - UCHAR Type; /* 3 */ 153 - UCHAR IrqType; /* Interrupt type */ 154 - USHORT IrqFlag; /* Interrupt flags */ 155 - UCHAR SrcBusId; /* Source bus ID */ 156 - UCHAR SrcBusIrq; /* Source bus interrupt */ 157 - UCHAR DstApicId; /* Destination APIC ID */ 158 - UCHAR DstApicInt; /* Destination interrupt */ 159 - } MP_CONFIGURATION_INTSRC, *PMP_CONFIGURATION_INTSRC; 160 - 161 - #define MAX_IRQ_SOURCE 128 162 - 163 - #define INT_VECTORED 0 164 - #define INT_NMI 1 165 - #define INT_SMI 2 166 - #define INT_EXTINT 3 167 - 168 - #define IRQDIR_DEFAULT 0 169 - #define IRQDIR_HIGH 1 170 - #define IRQDIR_LOW 3 171 - 172 - 173 - typedef struct _MP_CONFIGURATION_INTLOCAL 174 - { 175 - UCHAR Type; /* 4 */ 176 - UCHAR IrqType; /* Interrupt type */ 177 - USHORT IrqFlag; /* Interrupt flags */ 178 - UCHAR SrcBusId; /* Source bus ID */ 179 - UCHAR SrcBusIrq; /* Source bus interrupt */ 180 - UCHAR DstApicId; /* Destination local APIC ID */ 181 - UCHAR DstApicLInt; /* Destination local APIC interrupt */ 182 - } MP_CONFIGURATION_INTLOCAL, *PMP_CONFIGURATION_INTLOCAL; 183 - #include <poppack.h> 184 - 185 - #define MP_APIC_ALL 0xFF 186 - 187 - #define CPU_FLAG_ENABLED 1 /* Processor is available */ 188 - #define CPU_FLAG_BSP 2 /* Processor is the bootstrap processor */ 189 - 190 - #define CPU_STEPPING_MASK 0x0F 191 - #define CPU_MODEL_MASK 0xF0 192 - #define CPU_FAMILY_MASK 0xF00 193 - 194 - #define PIC_IRQS 16 195 - 196 - /* Prototypes */ 197 - 198 - VOID HalpInitMPS(VOID); 199 - 200 - /* EOF */
-31
hal/halppc/up/halinit_up.c
··· 1 - /* 2 - * COPYRIGHT: See COPYING in the top level directory 3 - * PROJECT: ReactOS kernel 4 - * FILE: hal/halppc/up/halinit_up.c 5 - * PURPOSE: Initialize the x86 hal 6 - * PROGRAMMER: David Welch (welch@cwcom.net) 7 - * UPDATE HISTORY: 8 - * 11/06/98: Created 9 - */ 10 - 11 - /* INCLUDES *****************************************************************/ 12 - 13 - #include <hal.h> 14 - #define NDEBUG 15 - #include <debug.h> 16 - 17 - /* FUNCTIONS ***************************************************************/ 18 - 19 - VOID 20 - HalpInitPhase0(IN PLOADER_PARAMETER_BLOCK LoaderBlock) 21 - { 22 - 23 - } 24 - 25 - VOID 26 - HalpInitPhase1(VOID) 27 - { 28 - 29 - } 30 - 31 - /* EOF */
-5
hal/halppc/up/halup.rc
··· 1 - #define REACTOS_VERSION_DLL 2 - #define REACTOS_STR_FILE_DESCRIPTION "X86 Uniprocessor Hardware Abstraction Layer" 3 - #define REACTOS_STR_INTERNAL_NAME "halup" 4 - #define REACTOS_STR_ORIGINAL_FILENAME "halup.dll" 5 - #include <reactos/version.rc>
-851
ntoskrnl/config/powerpc/cmhardwr.c
··· 1 - /* 2 - * PROJECT: ReactOS Kernel 3 - * LICENSE: GPL - See COPYING in the top level directory 4 - * FILE: ntoskrnl/config/powerpc/cmhardwr.c 5 - * PURPOSE: Configuration Manager - Hardware-Specific Code 6 - * PROGRAMMERS: Alex Ionescu (alex.ionescu@reactos.org) 7 - */ 8 - 9 - /* INCLUDES ******************************************************************/ 10 - 11 - #include "ntoskrnl.h" 12 - #define NDEBUG 13 - #include "debug.h" 14 - 15 - /* GLOBALS *******************************************************************/ 16 - 17 - PCHAR CmpID1 = "PowerPC %u"; 18 - PCHAR CmpID2 = "No Data"; 19 - PCHAR CmpBiosStrings[] = 20 - { 21 - "Ver", 22 - "Rev", 23 - "Rel", 24 - "v0", "v1", "v2", "v3", "v4", "v5", "v6", "v7", "v8", "v9", 25 - "v 0", "v 1", "v 2", "v 3", "v 4", "v 5", "v 6", "v 7", "v 8", "v 9", 26 - NULL 27 - }; 28 - 29 - PCHAR CmpBiosBegin, CmpBiosSearchStart, CmpBiosSearchEnd; 30 - 31 - /* FUNCTIONS *****************************************************************/ 32 - 33 - BOOLEAN 34 - NTAPI 35 - CmpGetBiosDate(IN PCHAR BiosStart, 36 - IN ULONG BiosLength, 37 - IN PCHAR BiosDate, 38 - IN BOOLEAN FromBios) 39 - { 40 - CHAR LastDate[11] = {0}, CurrentDate[11]; 41 - PCHAR p, pp; 42 - 43 - /* Skip the signature and the magic, and loop the BIOS ROM */ 44 - p = BiosStart + 2; 45 - pp = BiosStart + BiosLength - 5; 46 - while (p < pp) 47 - { 48 - /* Check for xx/yy/zz which we assume to be a date */ 49 - if ((p[0] == '/') && 50 - (p[3] == '/') && 51 - (isdigit(p[-1])) && 52 - (isdigit(p[1])) && 53 - (isdigit(p[2])) && 54 - (isdigit(p[4])) && 55 - (isdigit(p[5]))) 56 - { 57 - /* Copy the string proper */ 58 - RtlMoveMemory(&CurrentDate[5], p - 2, 5); 59 - 60 - /* Add a 0 if the month only has one digit */ 61 - if (!isdigit(CurrentDate[5])) CurrentDate[5] = '0'; 62 - 63 - /* Now copy the year */ 64 - CurrentDate[2] = p[4]; 65 - CurrentDate[3] = p[5]; 66 - CurrentDate[4] = CurrentDate[7] = CurrentDate[10] = ANSI_NULL; 67 - 68 - /* If the date comes from the BIOS, check if it's a 4-digit year */ 69 - if ((FromBios) && 70 - (isdigit(p[6])) && 71 - (isdigit(p[7])) && 72 - ((RtlEqualMemory(&p[4], "19", 2)) || 73 - (RtlEqualMemory(&p[4], "20", 2)))) 74 - { 75 - /* Copy the year proper */ 76 - CurrentDate[0] = p[4]; 77 - CurrentDate[1] = p[5]; 78 - CurrentDate[2] = p[6]; 79 - CurrentDate[3] = p[7]; 80 - } 81 - else 82 - { 83 - /* Otherwise, we'll just assume anything under 80 is 2000 */ 84 - if (strtoul(&CurrentDate[2], NULL, 10) < 80) 85 - { 86 - /* Hopefully your BIOS wasn't made in 1979 */ 87 - CurrentDate[0] = '2'; 88 - CurrentDate[1] = '0'; 89 - } 90 - else 91 - { 92 - /* Anything over 80, was probably made in the 1900s... */ 93 - CurrentDate[0] = '1'; 94 - CurrentDate[1] = '9'; 95 - } 96 - } 97 - 98 - /* Add slashes where we previously had NULLs */ 99 - CurrentDate[4] = CurrentDate[7] = '/'; 100 - 101 - /* Check which date is newer */ 102 - if (memcmp(LastDate, CurrentDate, 10) < 0) 103 - { 104 - /* Found a newer date, select it */ 105 - RtlMoveMemory(LastDate, CurrentDate, 10); 106 - } 107 - 108 - p += 2; 109 - } 110 - p++; 111 - } 112 - 113 - /* Make sure we found a date */ 114 - if (LastDate[0]) 115 - { 116 - /* Copy the year at the pp, and keep only the last two digits */ 117 - RtlMoveMemory(BiosDate, &LastDate[5], 5); 118 - BiosDate[5] = '/'; 119 - BiosDate[6] = LastDate[2]; 120 - BiosDate[7] = LastDate[3]; 121 - BiosDate[8] = ANSI_NULL; 122 - return TRUE; 123 - } 124 - 125 - /* No date found, return empty string */ 126 - BiosDate[0] = ANSI_NULL; 127 - return FALSE; 128 - } 129 - 130 - BOOLEAN 131 - NTAPI 132 - CmpGetBiosVersion(IN PCHAR BiosStart, 133 - IN ULONG BiosLength, 134 - IN PCHAR BiosVersion) 135 - { 136 - CHAR Buffer[128]; 137 - PCHAR p, pp; 138 - USHORT i; 139 - 140 - /* Check if we were given intitial data for the search */ 141 - if (BiosStart) 142 - { 143 - /* Save it for later use */ 144 - CmpBiosBegin = BiosStart; 145 - CmpBiosSearchStart = BiosStart + 1; 146 - CmpBiosSearchEnd = BiosStart + BiosLength - 2; 147 - } 148 - 149 - /* Now loop the BIOS area */ 150 - for (;;) 151 - { 152 - /* Start an initial search looking for numbers and periods */ 153 - pp = NULL; 154 - while (CmpBiosSearchStart <= CmpBiosSearchEnd) 155 - { 156 - /* Check if we have an "x.y" version string */ 157 - if ((*CmpBiosSearchStart == '.') && 158 - (*(CmpBiosSearchStart + 1) >= '0') && 159 - (*(CmpBiosSearchStart + 1) <= '9') && 160 - (*(CmpBiosSearchStart - 1) >= '0') && 161 - (*(CmpBiosSearchStart - 1) <= '9')) 162 - { 163 - /* Start looking in this area for the actual BIOS Version */ 164 - pp = CmpBiosSearchStart; 165 - break; 166 - } 167 - else 168 - { 169 - /* Keep searching */ 170 - CmpBiosSearchStart++; 171 - } 172 - } 173 - 174 - /* Break out if we're went past the BIOS area */ 175 - if (CmpBiosSearchStart > CmpBiosSearchEnd) return FALSE; 176 - 177 - /* Move to the next 2 bytes */ 178 - CmpBiosSearchStart += 2; 179 - 180 - /* Null-terminate our scratch buffer and start the string here */ 181 - Buffer[127] = ANSI_NULL; 182 - p = &Buffer[127]; 183 - 184 - /* Go back one character since we're doing this backwards */ 185 - pp--; 186 - 187 - /* Loop the identifier we found as long as it's valid */ 188 - i = 0; 189 - while ((i++ < 127) && 190 - (pp >= CmpBiosBegin) && 191 - (*pp >= ' ') && 192 - (*pp != '$')) 193 - { 194 - /* Copy the character */ 195 - *--p = *pp--; 196 - } 197 - 198 - /* Go past the last character since we went backwards */ 199 - pp++; 200 - 201 - /* Loop the strings we recognize */ 202 - for (i = 0; CmpBiosStrings[i]; i++) 203 - { 204 - /* Check if a match was found */ 205 - if (strstr(p, CmpBiosStrings[i])) goto Match; 206 - } 207 - } 208 - 209 - Match: 210 - /* Skip until we find a space */ 211 - for (; *pp == ' '; pp++); 212 - 213 - /* Loop the final string */ 214 - i = 0; 215 - do 216 - { 217 - /* Copy the character into the final string */ 218 - BiosVersion[i] = *pp++; 219 - } while ((++i < 127) && 220 - (pp <= (CmpBiosSearchEnd + 1)) && 221 - (*pp >= ' ') && 222 - (*pp != '$')); 223 - 224 - /* Null-terminate the version string */ 225 - BiosVersion[i] = ANSI_NULL; 226 - return TRUE; 227 - } 228 - 229 - NTSTATUS 230 - NTAPI 231 - CmpInitializeMachineDependentConfiguration(IN PLOADER_PARAMETER_BLOCK LoaderBlock) 232 - { 233 - UNICODE_STRING KeyName, ValueName, Data, SectionName; 234 - OBJECT_ATTRIBUTES ObjectAttributes; 235 - ULONG HavePae, CacheSize, ViewSize, Length, TotalLength = 0, i, Disposition; 236 - NTSTATUS Status; 237 - HANDLE KeyHandle, BiosHandle, SystemHandle, FpuHandle, SectionHandle; 238 - CONFIGURATION_COMPONENT_DATA ConfigData; 239 - CHAR Buffer[128]; 240 - ULONG ExtendedId = 0; //, Dummy; 241 - PKPRCB Prcb; 242 - USHORT IndexTable[MaximumType + 1] = {0}; 243 - ANSI_STRING TempString; 244 - PCHAR PartialString = NULL, BiosVersion; 245 - CHAR CpuString[48]; 246 - PVOID BaseAddress = NULL; 247 - LARGE_INTEGER ViewBase = {{0, 0}}; 248 - ULONG_PTR VideoRomBase; 249 - PCHAR CurrentVersion; 250 - extern UNICODE_STRING KeRosProcessorName, KeRosBiosDate, KeRosBiosVersion; 251 - extern UNICODE_STRING KeRosVideoBiosDate, KeRosVideoBiosVersion; 252 - 253 - /* Open the SMSS Memory Management key */ 254 - RtlInitUnicodeString(&KeyName, 255 - L"\\Registry\\Machine\\SYSTEM\\CurrentControlSet\\" 256 - L"Control\\Session Manager\\Memory Management"); 257 - InitializeObjectAttributes(&ObjectAttributes, 258 - &KeyName, 259 - OBJ_CASE_INSENSITIVE, 260 - NULL, 261 - NULL); 262 - Status = NtOpenKey(&KeyHandle, KEY_READ | KEY_WRITE, &ObjectAttributes); 263 - if (NT_SUCCESS(Status)) 264 - { 265 - /* Detect if PAE is enabled */ 266 - HavePae = SharedUserData->ProcessorFeatures[PF_PAE_ENABLED]; 267 - 268 - /* Set the value */ 269 - RtlInitUnicodeString(&ValueName, L"PhysicalAddressExtension"); 270 - NtSetValueKey(KeyHandle, 271 - &ValueName, 272 - 0, 273 - REG_DWORD, 274 - &HavePae, 275 - sizeof(HavePae)); 276 - 277 - /* Close the key */ 278 - NtClose(KeyHandle); 279 - } 280 - 281 - /* Open the hardware description key */ 282 - RtlInitUnicodeString(&KeyName, 283 - L"\\Registry\\Machine\\Hardware\\Description\\System"); 284 - InitializeObjectAttributes(&ObjectAttributes, 285 - &KeyName, 286 - OBJ_CASE_INSENSITIVE, 287 - NULL, 288 - NULL); 289 - Status = NtOpenKey(&SystemHandle, KEY_READ | KEY_WRITE, &ObjectAttributes); 290 - if (!NT_SUCCESS(Status)) 291 - return Status; 292 - 293 - /* Create the BIOS Information key */ 294 - RtlInitUnicodeString(&KeyName, 295 - L"\\Registry\\Machine\\SYSTEM\\CurrentControlSet\\" 296 - L"Control\\BIOSINFO"); 297 - InitializeObjectAttributes(&ObjectAttributes, 298 - &KeyName, 299 - OBJ_CASE_INSENSITIVE, 300 - NULL, 301 - NULL); 302 - Status = NtCreateKey(&BiosHandle, 303 - KEY_ALL_ACCESS, 304 - &ObjectAttributes, 305 - 0, 306 - NULL, 307 - REG_OPTION_NON_VOLATILE, 308 - &Disposition); 309 - if (!NT_SUCCESS(Status)) 310 - { 311 - NtClose(SystemHandle); 312 - return Status; 313 - } 314 - 315 - /* Create the CPU Key, and check if it already existed */ 316 - RtlInitUnicodeString(&KeyName, L"CentralProcessor"); 317 - InitializeObjectAttributes(&ObjectAttributes, 318 - &KeyName, 319 - OBJ_CASE_INSENSITIVE, 320 - SystemHandle, 321 - NULL); 322 - Status = NtCreateKey(&KeyHandle, 323 - KEY_READ | KEY_WRITE, 324 - &ObjectAttributes, 325 - 0, 326 - NULL, 327 - 0, 328 - &Disposition); 329 - NtClose(KeyHandle); 330 - 331 - /* The key shouldn't already exist */ 332 - if (Disposition == REG_CREATED_NEW_KEY) 333 - { 334 - /* Allocate the configuration data for cmconfig.c */ 335 - CmpConfigurationData = ExAllocatePoolWithTag(PagedPool, 336 - CmpConfigurationAreaSize, 337 - TAG_CM); 338 - if (!CmpConfigurationData) 339 - { 340 - // FIXME: Cleanup stuff!! 341 - return STATUS_INSUFFICIENT_RESOURCES; 342 - } 343 - 344 - /* Loop all CPUs */ 345 - for (i = 0; i < KeNumberProcessors; i++) 346 - { 347 - /* Get the PRCB */ 348 - Prcb = KiProcessorBlock[i]; 349 - 350 - /* Setup the Configuration Entry for the Processor */ 351 - RtlZeroMemory(&ConfigData, sizeof(ConfigData)); 352 - ConfigData.ComponentEntry.Class = ProcessorClass; 353 - ConfigData.ComponentEntry.Type = CentralProcessor; 354 - ConfigData.ComponentEntry.Key = i; 355 - ConfigData.ComponentEntry.AffinityMask = AFFINITY_MASK(i); 356 - ConfigData.ComponentEntry.Identifier = Buffer; 357 - 358 - /* Check if the CPU doesn't support CPUID */ 359 - if (!Prcb->CpuID) 360 - { 361 - /* Build ID1-style string for older CPUs */ 362 - sprintf(Buffer, 363 - CmpID1, 364 - Prcb->CpuType, 365 - (Prcb->CpuStep >> 8) + 'A', 366 - Prcb->CpuStep & 0xff); 367 - } 368 - else 369 - { 370 - /* Build ID2-style string for newer CPUs */ 371 - sprintf(Buffer, 372 - CmpID2, 373 - Prcb->CpuType, 374 - (Prcb->CpuStep >> 8), 375 - Prcb->CpuStep & 0xff); 376 - } 377 - 378 - /* Save the ID string length now that we've created it */ 379 - ConfigData.ComponentEntry.IdentifierLength = strlen(Buffer) + 1; 380 - 381 - /* Initialize the registry configuration node for it */ 382 - Status = CmpInitializeRegistryNode(&ConfigData, 383 - SystemHandle, 384 - &KeyHandle, 385 - InterfaceTypeUndefined, 386 - 0xFFFFFFFF, 387 - IndexTable); 388 - if (!NT_SUCCESS(Status)) 389 - { 390 - NtClose(BiosHandle); 391 - NtClose(SystemHandle); 392 - return Status; 393 - } 394 - 395 - { 396 - /* Setup the Configuration Entry for the FPU */ 397 - RtlZeroMemory(&ConfigData, sizeof(ConfigData)); 398 - ConfigData.ComponentEntry.Class = ProcessorClass; 399 - ConfigData.ComponentEntry.Type = FloatingPointProcessor; 400 - ConfigData.ComponentEntry.Key = i; 401 - ConfigData.ComponentEntry.AffinityMask = AFFINITY_MASK(i); 402 - ConfigData.ComponentEntry.Identifier = Buffer; 403 - 404 - /* For 386 cpus, the CPU pp is the identifier */ 405 - if (Prcb->CpuType == 3) strcpy(Buffer, "80387"); 406 - 407 - /* Save the ID string length now that we've created it */ 408 - ConfigData.ComponentEntry.IdentifierLength = strlen(Buffer) + 1; 409 - 410 - /* Initialize the registry configuration node for it */ 411 - Status = CmpInitializeRegistryNode(&ConfigData, 412 - SystemHandle, 413 - &FpuHandle, 414 - InterfaceTypeUndefined, 415 - 0xFFFFFFFF, 416 - IndexTable); 417 - if (!NT_SUCCESS(Status)) 418 - { 419 - /* We failed, close all the opened handles and return */ 420 - NtClose(KeyHandle); 421 - NtClose(BiosHandle); 422 - NtClose(SystemHandle); 423 - return Status; 424 - } 425 - 426 - /* Close this new handle */ 427 - NtClose(FpuHandle); 428 - 429 - /* Stay on this CPU only */ 430 - KeSetSystemAffinityThread(Prcb->SetMember); 431 - if (!Prcb->CpuID) 432 - { 433 - /* Uh oh, no CPUID! */ 434 - } 435 - else 436 - { 437 - /* Check if we have extended CPUID that supports name ID */ 438 - //Ki386Cpuid(0x80000000, &ExtendedId, &Dummy, &Dummy, &Dummy); 439 - if (ExtendedId >= 0x80000004) 440 - { 441 - /* Do all the CPUIDs required to get the full name */ 442 - PartialString = CpuString; 443 - for (ExtendedId = 2; ExtendedId <= 4; ExtendedId++) 444 - { 445 - #if 0 446 - /* Do the CPUID and save the name string */ 447 - Ki386Cpuid(0x80000000 | ExtendedId, 448 - (PULONG)PartialString, 449 - (PULONG)PartialString + 1, 450 - (PULONG)PartialString + 2, 451 - (PULONG)PartialString + 3); 452 - #endif 453 - 454 - /* Go to the next name string */ 455 - PartialString += 16; 456 - } 457 - 458 - /* Null-terminate it */ 459 - CpuString[47] = ANSI_NULL; 460 - } 461 - } 462 - 463 - /* Get the cache size while we're still localized */ 464 - CacheSize = 0; //((PKIPCR)KeGetPcr())->SecondLevelCacheSize; 465 - 466 - /* Go back to user affinity */ 467 - KeRevertToUserAffinityThread(); 468 - 469 - /* Check if we have a CPU Name */ 470 - if (PartialString) 471 - { 472 - /* Convert it to Unicode */ 473 - RtlInitAnsiString(&TempString, CpuString); 474 - RtlAnsiStringToUnicodeString(&Data, &TempString, TRUE); 475 - 476 - /* Add it to the registry */ 477 - RtlInitUnicodeString(&ValueName, L"ProcessorNameString"); 478 - Status = NtSetValueKey(KeyHandle, 479 - &ValueName, 480 - 0, 481 - REG_SZ, 482 - Data.Buffer, 483 - Data.Length + sizeof(UNICODE_NULL)); 484 - 485 - /* ROS: Save a copy for bugzilla reporting */ 486 - RtlCreateUnicodeString(&KeRosProcessorName, Data.Buffer); 487 - 488 - /* Free the temporary buffer */ 489 - RtlFreeUnicodeString(&Data); 490 - } 491 - 492 - /* Check if we had a Vendor ID */ 493 - if (Prcb->VendorString) 494 - { 495 - /* Convert it to Unicode */ 496 - RtlInitAnsiString(&TempString, Prcb->VendorString); 497 - RtlAnsiStringToUnicodeString(&Data, &TempString, TRUE); 498 - 499 - /* Add it to the registry */ 500 - RtlInitUnicodeString(&ValueName, L"VendorIdentifier"); 501 - Status = NtSetValueKey(KeyHandle, 502 - &ValueName, 503 - 0, 504 - REG_SZ, 505 - Data.Buffer, 506 - Data.Length + sizeof(UNICODE_NULL)); 507 - 508 - /* Free the temporary buffer */ 509 - RtlFreeUnicodeString(&Data); 510 - } 511 - 512 - /* Check if we have features bits */ 513 - if (Prcb->FeatureBits) 514 - { 515 - /* Add them to the registry */ 516 - RtlInitUnicodeString(&ValueName, L"FeatureSet"); 517 - Status = NtSetValueKey(KeyHandle, 518 - &ValueName, 519 - 0, 520 - REG_DWORD, 521 - &Prcb->FeatureBits, 522 - sizeof(Prcb->FeatureBits)); 523 - } 524 - 525 - /* Check if we detected the CPU Speed */ 526 - if (Prcb->MHz) 527 - { 528 - /* Add it to the registry */ 529 - RtlInitUnicodeString(&ValueName, L"~MHz"); 530 - Status = NtSetValueKey(KeyHandle, 531 - &ValueName, 532 - 0, 533 - REG_DWORD, 534 - &Prcb->MHz, 535 - sizeof(Prcb->MHz)); 536 - } 537 - 538 - /* Check if we have an update signature */ 539 - if (Prcb->UpdateSignature.QuadPart) 540 - { 541 - /* Add it to the registry */ 542 - RtlInitUnicodeString(&ValueName, L"Update Signature"); 543 - Status = NtSetValueKey(KeyHandle, 544 - &ValueName, 545 - 0, 546 - REG_BINARY, 547 - &Prcb->UpdateSignature, 548 - sizeof(Prcb->UpdateSignature)); 549 - } 550 - 551 - /* Close the processor handle */ 552 - NtClose(KeyHandle); 553 - 554 - /* FIXME: Detect CPU mismatches */ 555 - } 556 - } 557 - 558 - /* Free the configuration data */ 559 - ExFreePoolWithTag(CmpConfigurationData, TAG_CM); 560 - } 561 - 562 - /* Open physical memory */ 563 - RtlInitUnicodeString(&SectionName, L"\\Device\\PhysicalMemory"); 564 - InitializeObjectAttributes(&ObjectAttributes, 565 - &SectionName, 566 - OBJ_CASE_INSENSITIVE, 567 - NULL, 568 - NULL); 569 - Status = ZwOpenSection(&SectionHandle, 570 - SECTION_ALL_ACCESS, 571 - &ObjectAttributes); 572 - if (!NT_SUCCESS(Status)) 573 - { 574 - /* We failed, close all the opened handles and return */ 575 - // NtClose(KeyHandle); 576 - NtClose(BiosHandle); 577 - NtClose(SystemHandle); 578 - /* 'Quickie' closes KeyHandle */ 579 - goto Quickie; 580 - } 581 - 582 - /* Map the first 1KB of memory to get the IVT */ 583 - ViewSize = PAGE_SIZE; 584 - Status = ZwMapViewOfSection(SectionHandle, 585 - NtCurrentProcess(), 586 - &BaseAddress, 587 - 0, 588 - ViewSize, 589 - &ViewBase, 590 - &ViewSize, 591 - ViewUnmap, 592 - MEM_DOS_LIM, 593 - PAGE_READWRITE); 594 - if (!NT_SUCCESS(Status)) 595 - { 596 - /* Assume default */ 597 - VideoRomBase = 0xC0000; 598 - } 599 - else 600 - { 601 - /* Calculate the base address from the vector */ 602 - VideoRomBase = (*((PULONG)BaseAddress + 0x10) >> 12) & 0xFFFF0; 603 - VideoRomBase += *((PULONG)BaseAddress + 0x10) & 0xFFF0; 604 - 605 - /* Now get to the actual ROM Start and make sure it's not invalid*/ 606 - VideoRomBase &= 0xFFFF8000; 607 - if (VideoRomBase < 0xC0000) VideoRomBase = 0xC0000; 608 - 609 - /* And unmap the section */ 610 - ZwUnmapViewOfSection(NtCurrentProcess(), BaseAddress); 611 - } 612 - 613 - /* Allocate BIOS Version pp Buffer */ 614 - BiosVersion = ExAllocatePoolWithTag(PagedPool, PAGE_SIZE, TAG_CM); 615 - 616 - /* Setup settings to map the 64K BIOS ROM */ 617 - BaseAddress = 0; 618 - ViewSize = 16 * PAGE_SIZE; 619 - ViewBase.LowPart = 0xF0000; 620 - ViewBase.HighPart = 0; 621 - 622 - /* Map it */ 623 - Status = ZwMapViewOfSection(SectionHandle, 624 - NtCurrentProcess(), 625 - &BaseAddress, 626 - 0, 627 - ViewSize, 628 - &ViewBase, 629 - &ViewSize, 630 - ViewUnmap, 631 - MEM_DOS_LIM, 632 - PAGE_READWRITE); 633 - if (NT_SUCCESS(Status)) 634 - { 635 - /* Scan the ROM to get the BIOS Date */ 636 - if (CmpGetBiosDate(BaseAddress, 16 * PAGE_SIZE, Buffer, TRUE)) 637 - { 638 - /* Convert it to Unicode */ 639 - RtlInitAnsiString(&TempString, Buffer); 640 - RtlAnsiStringToUnicodeString(&Data, &TempString, TRUE); 641 - 642 - /* Write the date into the registry */ 643 - RtlInitUnicodeString(&ValueName, L"SystemBiosDate"); 644 - Status = NtSetValueKey(SystemHandle, 645 - &ValueName, 646 - 0, 647 - REG_SZ, 648 - Data.Buffer, 649 - Data.Length + sizeof(UNICODE_NULL)); 650 - 651 - /* Free the string */ 652 - RtlFreeUnicodeString(&Data); 653 - 654 - if (BiosHandle) 655 - { 656 - /* Get the BIOS Date Identifier */ 657 - RtlCopyMemory(Buffer, (PCHAR)BaseAddress + (16*PAGE_SIZE - 11), 8); 658 - Buffer[8] = ANSI_NULL; 659 - 660 - /* Convert it to unicode */ 661 - RtlInitAnsiString(&TempString, Buffer); 662 - Status = RtlAnsiStringToUnicodeString(&Data, &TempString, TRUE); 663 - if (NT_SUCCESS(Status)) 664 - { 665 - /* Save it to the registry */ 666 - Status = NtSetValueKey(BiosHandle, 667 - &ValueName, 668 - 0, 669 - REG_SZ, 670 - Data.Buffer, 671 - Data.Length + sizeof(UNICODE_NULL)); 672 - 673 - /* ROS: Save a copy for bugzilla reporting */ 674 - RtlCreateUnicodeString(&KeRosBiosDate, Data.Buffer); 675 - 676 - /* Free the string */ 677 - RtlFreeUnicodeString(&Data); 678 - } 679 - 680 - /* Close the bios information handle */ 681 - NtClose(BiosHandle); 682 - } 683 - } 684 - 685 - /* Get the BIOS Version */ 686 - if (CmpGetBiosVersion(BaseAddress, 16* PAGE_SIZE, Buffer)) 687 - { 688 - /* Start at the beginning of our buffer */ 689 - CurrentVersion = BiosVersion; 690 - do 691 - { 692 - /* Convert to Unicode */ 693 - RtlInitAnsiString(&TempString, Buffer); 694 - RtlAnsiStringToUnicodeString(&Data, &TempString, TRUE); 695 - 696 - /* Calculate the length of this string and copy it in */ 697 - Length = Data.Length + sizeof(UNICODE_NULL); 698 - RtlMoveMemory(CurrentVersion, Data.Buffer, Length); 699 - 700 - /* Free the unicode string */ 701 - RtlFreeUnicodeString(&Data); 702 - 703 - /* Update the total length and see if we're out of space */ 704 - TotalLength += Length; 705 - if (TotalLength + 256 + sizeof(UNICODE_NULL) > PAGE_SIZE) 706 - { 707 - /* One more string would push us out, so stop here */ 708 - break; 709 - } 710 - 711 - /* Go to the next string inside the multi-string buffer */ 712 - CurrentVersion += Length; 713 - 714 - /* Query the next BIOS Version */ 715 - } while (CmpGetBiosVersion(NULL, 0, Buffer)); 716 - 717 - /* Check if we found any strings at all */ 718 - if (TotalLength) 719 - { 720 - /* Add the final null-terminator */ 721 - *(PWSTR)CurrentVersion = UNICODE_NULL; 722 - TotalLength += sizeof(UNICODE_NULL); 723 - 724 - /* Write the BIOS Version to the registry */ 725 - RtlInitUnicodeString(&ValueName, L"SystemBiosVersion"); 726 - Status = NtSetValueKey(SystemHandle, 727 - &ValueName, 728 - 0, 729 - REG_MULTI_SZ, 730 - BiosVersion, 731 - TotalLength); 732 - 733 - /* ROS: Save a copy for bugzilla reporting */ 734 - RtlCreateUnicodeString(&KeRosBiosVersion, (PWCH)BiosVersion); 735 - } 736 - } 737 - 738 - /* Unmap the section */ 739 - ZwUnmapViewOfSection(NtCurrentProcess(), BaseAddress); 740 - } 741 - 742 - /* Now prepare for Video BIOS Mapping of 32KB */ 743 - BaseAddress = 0; 744 - ViewSize = 8 * PAGE_SIZE; 745 - ViewBase.LowPart = VideoRomBase; 746 - ViewBase.HighPart = 0; 747 - 748 - /* Map it */ 749 - Status = ZwMapViewOfSection(SectionHandle, 750 - NtCurrentProcess(), 751 - &BaseAddress, 752 - 0, 753 - ViewSize, 754 - &ViewBase, 755 - &ViewSize, 756 - ViewUnmap, 757 - MEM_DOS_LIM, 758 - PAGE_READWRITE); 759 - if (NT_SUCCESS(Status)) 760 - { 761 - /* Scan the ROM to get the BIOS Date */ 762 - if (CmpGetBiosDate(BaseAddress, 8 * PAGE_SIZE, Buffer, FALSE)) 763 - { 764 - /* Convert it to Unicode */ 765 - RtlInitAnsiString(&TempString, Buffer); 766 - RtlAnsiStringToUnicodeString(&Data, &TempString, TRUE); 767 - 768 - /* Write the date into the registry */ 769 - RtlInitUnicodeString(&ValueName, L"VideoBiosDate"); 770 - Status = NtSetValueKey(SystemHandle, 771 - &ValueName, 772 - 0, 773 - REG_SZ, 774 - Data.Buffer, 775 - Data.Length + sizeof(UNICODE_NULL)); 776 - 777 - /* ROS: Save a copy for bugzilla reporting */ 778 - RtlCreateUnicodeString(&KeRosVideoBiosDate, Data.Buffer); 779 - 780 - /* Free the string */ 781 - RtlFreeUnicodeString(&Data); 782 - } 783 - 784 - /* Get the Video BIOS Version */ 785 - if (CmpGetBiosVersion(BaseAddress, 8* PAGE_SIZE, Buffer)) 786 - { 787 - /* Start at the beginning of our buffer */ 788 - CurrentVersion = BiosVersion; 789 - do 790 - { 791 - /* Convert to Unicode */ 792 - RtlInitAnsiString(&TempString, Buffer); 793 - RtlAnsiStringToUnicodeString(&Data, &TempString, TRUE); 794 - 795 - /* Calculate the length of this string and copy it in */ 796 - Length = Data.Length + sizeof(UNICODE_NULL); 797 - RtlMoveMemory(CurrentVersion, Data.Buffer, Length); 798 - 799 - /* Free the unicode string */ 800 - RtlFreeUnicodeString(&Data); 801 - 802 - /* Update the total length and see if we're out of space */ 803 - TotalLength += Length; 804 - if (TotalLength + 256 + sizeof(UNICODE_NULL) > PAGE_SIZE) 805 - { 806 - /* One more string would push us out, so stop here */ 807 - break; 808 - } 809 - 810 - /* Go to the next string inside the multi-string buffer */ 811 - CurrentVersion += Length; 812 - 813 - /* Query the next BIOS Version */ 814 - } while (CmpGetBiosVersion(NULL, 0, Buffer)); 815 - 816 - /* Check if we found any strings at all */ 817 - if (TotalLength) 818 - { 819 - /* Add the final null-terminator */ 820 - *(PWSTR)CurrentVersion = UNICODE_NULL; 821 - TotalLength += sizeof(UNICODE_NULL); 822 - 823 - /* Write the BIOS Version to the registry */ 824 - RtlInitUnicodeString(&ValueName, L"VideoBiosVersion"); 825 - Status = NtSetValueKey(SystemHandle, 826 - &ValueName, 827 - 0, 828 - REG_MULTI_SZ, 829 - BiosVersion, 830 - TotalLength); 831 - 832 - /* ROS: Save a copy for bugzilla reporting */ 833 - RtlCreateUnicodeString(&KeRosVideoBiosVersion, (PWCH)BiosVersion); 834 - } 835 - } 836 - 837 - /* Unmap the section */ 838 - ZwUnmapViewOfSection(NtCurrentProcess(), BaseAddress); 839 - } 840 - 841 - /* Close the section */ 842 - ZwClose(SectionHandle); 843 - 844 - /* Free the BIOS version string buffer */ 845 - if (BiosVersion) ExFreePoolWithTag(BiosVersion, TAG_CM); 846 - 847 - Quickie: 848 - /* Close the processor handle */ 849 - NtClose(KeyHandle); 850 - return STATUS_SUCCESS; 851 - }
-171
ntoskrnl/ex/powerpc/ioport.s
··· 1 - /* 2 - * COPYRIGHT: See COPYING in the top level directory 3 - * PROJECT: ReactOS kernel 4 - * FILE: ntoskrnl/ex/powerpc/ioport.s 5 - * PURPOSE: FASTCALL Interlocked Functions 6 - * PROGRAMMERS: Alex Ionescu (alex@relsoft.net) 7 - */ 8 - 9 - /* INCLUDES ******************************************************************/ 10 - 11 - #include <ndk/asm.h> 12 - 13 - /* GLOBALS *******************************************************************/ 14 - 15 - .globl READ_REGISTER_UCHAR 16 - .globl READ_REGISTER_USHORT 17 - .globl READ_REGISTER_ULONG 18 - .globl READ_REGISTER_BUFFER_UCHAR 19 - .globl READ_REGISTER_BUFFER_USHORT 20 - .globl READ_REGISTER_BUFFER_ULONG 21 - .globl WRITE_REGISTER_UCHAR 22 - .globl WRITE_REGISTER_USHORT 23 - .globl WRITE_REGISTER_ULONG 24 - .globl WRITE_REGISTER_BUFFER_UCHAR 25 - .globl WRITE_REGISTER_BUFFER_USHORT 26 - .globl WRITE_REGISTER_BUFFER_ULONG 27 - 28 - /* FUNCTIONS *****************************************************************/ 29 - 30 - READ_REGISTER_UCHAR: 31 - /* Return the requested memory location */ 32 - sync 33 - eieio 34 - lbz 3,0(3) 35 - blr 36 - 37 - READ_REGISTER_USHORT: 38 - /* Return the requested memory location */ 39 - sync 40 - eieio 41 - lhz 3,0(3) 42 - blr 43 - 44 - READ_REGISTER_ULONG: 45 - /* Return the requested memory location */ 46 - sync 47 - eieio 48 - lwz 3,0(3) 49 - blr 50 - 51 - READ_REGISTER_BUFFER_UCHAR: 52 - 1: 53 - cmpwi 0,5,0 54 - beq 2f 55 - 56 - lbz 0,0(4) 57 - stb 0,0(3) 58 - 59 - addi 3,3,1 60 - addi 4,4,1 61 - subi 5,5,1 62 - b 1b 63 - 2: 64 - eieio 65 - sync 66 - blr 67 - 68 - READ_REGISTER_BUFFER_USHORT: 69 - 1: 70 - cmpwi 0,5,0 71 - beq 2f 72 - 73 - lhz 0,0(4) 74 - sth 0,0(3) 75 - 76 - addi 3,3,2 77 - addi 4,4,2 78 - subi 5,5,2 79 - b 1b 80 - 2: 81 - eieio 82 - sync 83 - blr 84 - 85 - READ_REGISTER_BUFFER_ULONG: 86 - 1: 87 - cmpwi 0,5,0 88 - beq 2f 89 - 90 - lwz 0,0(4) 91 - stw 0,0(3) 92 - 93 - addi 3,3,4 94 - addi 4,4,4 95 - subi 5,5,4 96 - b 1b 97 - 2: 98 - eieio 99 - sync 100 - blr 101 - 102 - WRITE_REGISTER_UCHAR: 103 - stb 4,0(3) 104 - eieio 105 - sync 106 - blr 107 - 108 - WRITE_REGISTER_USHORT: 109 - sth 4,0(3) 110 - eieio 111 - sync 112 - blr 113 - 114 - WRITE_REGISTER_ULONG: 115 - stw 4,0(3) 116 - eieio 117 - sync 118 - blr 119 - 120 - WRITE_REGISTER_BUFFER_UCHAR: 121 - sync 122 - eieio 123 - 1: 124 - cmpwi 0,5,0 125 - beq 2f 126 - 127 - lbz 0,0(4) 128 - stb 0,0(3) 129 - 130 - addi 3,3,1 131 - addi 4,4,1 132 - subi 5,5,1 133 - b 1b 134 - 2: 135 - blr 136 - 137 - WRITE_REGISTER_BUFFER_USHORT: 138 - sync 139 - eieio 140 - 1: 141 - cmpwi 0,5,0 142 - beq 2f 143 - 144 - lhz 0,0(4) 145 - sth 0,0(3) 146 - 147 - addi 3,3,2 148 - addi 4,4,2 149 - subi 5,5,2 150 - b 1b 151 - 2: 152 - blr 153 - 154 - WRITE_REGISTER_BUFFER_ULONG: 155 - sync 156 - eieio 157 - 1: 158 - cmpwi 0,5,0 159 - beq 2f 160 - 161 - lwz 0,0(4) 162 - stw 0,0(3) 163 - 164 - addi 3,3,4 165 - addi 4,4,4 166 - subi 5,5,4 167 - b 1b 168 - 2: 169 - blr 170 - 171 - /* EOF */
-5
ntoskrnl/include/internal/powerpc/intrin_i.h
··· 1 - #pragma once 2 - 3 - #define Ke386SaveFlags(x) __asm__ __volatile__("mfmsr %0" : "=r" (x) :) 4 - 5 - /* EOF */
-132
ntoskrnl/include/internal/powerpc/ke.h
··· 1 - /* 2 - * ReactOS kernel 3 - * Copyright (C) 1998, 1999, 2000, 2001 ReactOS Team 4 - * 5 - * This program is free software; you can redistribute it and/or modify 6 - * it under the terms of the GNU General Public License as published by 7 - * the Free Software Foundation; either version 2 of the License, or 8 - * (at your option) any later version. 9 - * 10 - * This program is distributed in the hope that it will be useful, 11 - * but WITHOUT ANY WARRANTY; without even the implied warranty of 12 - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13 - * GNU General Public License for more details. 14 - * 15 - * You should have received a copy of the GNU General Public License along 16 - * with this program; if not, write to the Free Software Foundation, Inc., 17 - * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. 18 - */ 19 - 20 - #pragma once 21 - 22 - #include <ndk/powerpc/ketypes.h> 23 - 24 - /* Possible values for KTHREAD's NpxState */ 25 - #define KPCR_BASE 0xff000000 26 - #define NPX_STATE_INVALID 0x01 27 - #define NPX_STATE_VALID 0x02 28 - #define NPX_STATE_DIRTY 0x04 29 - 30 - #ifndef __ASM__ 31 - 32 - typedef struct _KIRQ_TRAPFRAME 33 - { 34 - } KIRQ_TRAPFRAME, *PKIRQ_TRAPFRAME; 35 - 36 - extern ULONG KePPCCacheAlignment; 37 - 38 - //#define KD_BREAKPOINT_TYPE 39 - //#define KD_BREAKPOINT_SIZE 40 - //#define KD_BREAKPOINT_VALUE 41 - 42 - // 43 - // Macro to get the second level cache size field name which differs between 44 - // CISC and RISC architectures, as the former has unified I/D cache 45 - // 46 - #define KiGetSecondLevelDCacheSize() ((PKIPCR)KeGetPcr())->SecondLevelDcacheSize 47 - 48 - // 49 - // Macros for getting and setting special purpose registers in portable code 50 - // 51 - #define KeGetContextPc(Context) \ 52 - ((Context)->Dr0) 53 - 54 - #define KeSetContextPc(Context, ProgramCounter) \ 55 - ((Context)->Dr0 = (ProgramCounter)) 56 - 57 - #define KeGetTrapFramePc(TrapFrame) \ 58 - ((TrapFrame)->Dr0) 59 - 60 - #define KeGetContextReturnRegister(Context) \ 61 - ((Context)->Gpr3) 62 - 63 - #define KeSetContextReturnRegister(Context, ReturnValue) \ 64 - ((Context)->Gpr3 = (ReturnValue)) 65 - 66 - // 67 - // Returns the Interrupt State from a Trap Frame. 68 - // ON = TRUE, OFF = FALSE 69 - // 70 - //#define KeGetTrapFrameInterruptState(TrapFrame) \ 71 - 72 - #define KePPCRdmsr(msr,val1,val2) __asm__ __volatile__("mfmsr 3") 73 - 74 - #define KePPCWrmsr(msr,val1,val2) __asm__ __volatile__("mtmsr 3") 75 - 76 - #define PPC_MIN_CACHE_LINE_SIZE 32 77 - 78 - FORCEINLINE struct _KPCR * NTHALAPI KeGetCurrentKPCR( 79 - VOID) 80 - { 81 - return (struct _KPCR *)__readfsdword(0x1c); 82 - } 83 - 84 - FORCEINLINE 85 - VOID 86 - KeFlushProcessTb(VOID) 87 - { 88 - /* Flush the TLB */ 89 - __asm__("sync\n\tisync\n\t"); 90 - } 91 - 92 - FORCEINLINE 93 - VOID 94 - KeSweepICache(IN PVOID BaseAddress, 95 - IN SIZE_T FlushSize) 96 - { 97 - // 98 - // Always sweep the whole cache 99 - // 100 - UNREFERENCED_PARAMETER(BaseAddress); 101 - UNREFERENCED_PARAMETER(FlushSize); 102 - __asm__ __volatile__("tlbsync"); 103 - } 104 - 105 - FORCEINLINE 106 - PRKTHREAD 107 - KeGetCurrentThread(VOID) 108 - { 109 - /* Return the current thread */ 110 - return KeGetCurrentPrcb()->CurrentThread; 111 - } 112 - 113 - FORCEINLINE 114 - VOID 115 - KiRundownThread(IN PKTHREAD Thread) 116 - { 117 - /* FIXME */ 118 - } 119 - 120 - #ifdef _NTOSKRNL_ /* FIXME: Move flags above to NDK instead of here */ 121 - VOID 122 - NTAPI 123 - KiThreadStartup(PKSYSTEM_ROUTINE SystemRoutine, 124 - PKSTART_ROUTINE StartRoutine, 125 - PVOID StartContext, 126 - BOOLEAN UserThread, 127 - KTRAP_FRAME TrapFrame); 128 - #endif 129 - 130 - #endif /* __ASM__ */ 131 - 132 - /* EOF */
-271
ntoskrnl/ke/powerpc/cpu.c
··· 1 - /* 2 - * PROJECT: ReactOS Kernel 3 - * LICENSE: GPL - See COPYING in the top level directory 4 - * FILE: ntoskrnl/ke/powerpc/cpu.c 5 - * PURPOSE: Routines for CPU-level support 6 - * PROGRAMMERS: Alex Ionescu (alex.ionescu@reactos.org) 7 - */ 8 - 9 - /* INCLUDES *****************************************************************/ 10 - 11 - #include <ntoskrnl.h> 12 - #define NDEBUG 13 - #include <debug.h> 14 - 15 - /* GLOBALS *******************************************************************/ 16 - 17 - /* CPU Features and Flags */ 18 - ULONG KeLargestCacheLine = 0x40; 19 - ULONG KeDcacheFlushCount = 0; 20 - ULONG KeIcacheFlushCount = 0; 21 - ULONG KiDmaIoCoherency = 0; 22 - BOOLEAN KiSMTProcessorsPresent; 23 - 24 - /* CPU Signatures */ 25 - #if 0 26 - CHAR CmpIntelID[] = "GenuineIntel"; 27 - CHAR CmpAmdID[] = "AuthenticAMD"; 28 - CHAR CmpCyrixID[] = "CyrixInstead"; 29 - CHAR CmpTransmetaID[] = "GenuineTMx86"; 30 - CHAR CmpCentaurID[] = "CentaurHauls"; 31 - CHAR CmpRiseID[] = "RiseRiseRise"; 32 - #endif 33 - 34 - /* SUPPORT ROUTINES FOR MSVC COMPATIBILITY ***********************************/ 35 - 36 - VOID 37 - NTAPI 38 - CPUID(IN ULONG CpuInfo[4], 39 - IN ULONG InfoType) 40 - { 41 - RtlZeroMemory(CpuInfo, 4 * sizeof(ULONG)); 42 - } 43 - 44 - VOID 45 - WRMSR(IN ULONG Register, 46 - IN LONGLONG Value) 47 - { 48 - } 49 - 50 - LONGLONG 51 - RDMSR(IN ULONG Register) 52 - { 53 - LARGE_INTEGER LargeVal; 54 - LargeVal.QuadPart = 0; 55 - return LargeVal.QuadPart; 56 - } 57 - 58 - /* FUNCTIONS *****************************************************************/ 59 - 60 - VOID 61 - NTAPI 62 - KiSetProcessorType(VOID) 63 - { 64 - } 65 - 66 - ULONG 67 - NTAPI 68 - KiGetCpuVendor(VOID) 69 - { 70 - return 0; 71 - } 72 - 73 - ULONG 74 - NTAPI 75 - KiGetFeatureBits(VOID) 76 - { 77 - ULONG FeatureBits = 0; 78 - /* Return the Feature Bits */ 79 - return FeatureBits; 80 - } 81 - 82 - VOID 83 - NTAPI 84 - KiGetCacheInformation(VOID) 85 - { 86 - } 87 - 88 - VOID 89 - NTAPI 90 - KiSetCR0Bits(VOID) 91 - { 92 - } 93 - 94 - VOID 95 - NTAPI 96 - KiInitializeTSS2(IN PKTSS Tss, 97 - IN PKGDTENTRY TssEntry OPTIONAL) 98 - { 99 - } 100 - 101 - VOID 102 - NTAPI 103 - KiInitializeTSS(IN PKTSS Tss) 104 - { 105 - } 106 - 107 - VOID 108 - FASTCALL 109 - Ki386InitializeTss(IN PKTSS Tss, 110 - IN PKIDTENTRY Idt, 111 - IN PKGDTENTRY Gdt) 112 - { 113 - } 114 - 115 - VOID 116 - NTAPI 117 - KeFlushCurrentTb(VOID) 118 - { 119 - } 120 - 121 - VOID 122 - NTAPI 123 - KiSaveProcessorControlState(OUT PKPROCESSOR_STATE ProcessorState) 124 - { 125 - } 126 - 127 - VOID 128 - NTAPI 129 - KiInitializeMachineType(VOID) 130 - { 131 - } 132 - 133 - ULONG_PTR 134 - NTAPI 135 - KiLoadFastSyscallMachineSpecificRegisters(IN ULONG_PTR Context) 136 - { 137 - return 0; 138 - } 139 - 140 - VOID 141 - NTAPI 142 - KiRestoreFastSyscallReturnState(VOID) 143 - { 144 - } 145 - 146 - ULONG_PTR 147 - NTAPI 148 - Ki386EnableDE(IN ULONG_PTR Context) 149 - { 150 - return 0; 151 - } 152 - 153 - ULONG_PTR 154 - NTAPI 155 - Ki386EnableFxsr(IN ULONG_PTR Context) 156 - { 157 - return 0; 158 - } 159 - 160 - ULONG_PTR 161 - NTAPI 162 - Ki386EnableXMMIExceptions(IN ULONG_PTR Context) 163 - { 164 - /* FIXME: Support this */ 165 - DPRINT1("Your machine supports XMMI exceptions but ReactOS doesn't\n"); 166 - return 0; 167 - } 168 - 169 - VOID 170 - NTAPI 171 - KiI386PentiumLockErrataFixup(VOID) 172 - { 173 - /* FIXME: Support this */ 174 - DPRINT1("WARNING: Your machine has a CPU bug that ReactOS can't bypass!\n"); 175 - } 176 - 177 - /* PUBLIC FUNCTIONS **********************************************************/ 178 - 179 - /* 180 - * @implemented 181 - */ 182 - NTSTATUS 183 - NTAPI 184 - KeSaveFloatingPointState(OUT PKFLOATING_SAVE Save) 185 - { 186 - return STATUS_SUCCESS; 187 - } 188 - 189 - /* 190 - * @implemented 191 - */ 192 - NTSTATUS 193 - NTAPI 194 - KeRestoreFloatingPointState(IN PKFLOATING_SAVE Save) 195 - { 196 - return STATUS_SUCCESS; 197 - } 198 - 199 - /* 200 - * @implemented 201 - */ 202 - ULONG 203 - NTAPI 204 - KeGetRecommendedSharedDataAlignment(VOID) 205 - { 206 - /* Return the global variable */ 207 - return KeLargestCacheLine; 208 - } 209 - 210 - /* 211 - * @implemented 212 - */ 213 - VOID 214 - NTAPI 215 - KeFlushEntireTb(IN BOOLEAN Invalid, 216 - IN BOOLEAN AllProcessors) 217 - { 218 - KIRQL OldIrql; 219 - 220 - /* Raise the IRQL for the TB Flush */ 221 - OldIrql = KeRaiseIrqlToSynchLevel(); 222 - 223 - #ifdef CONFIG_SMP 224 - /* FIXME: Support IPI Flush */ 225 - #error Not yet implemented! 226 - #endif 227 - 228 - /* Flush the TB for the Current CPU */ 229 - //KeFlushCurrentTb(); 230 - 231 - /* Return to Original IRQL */ 232 - KeLowerIrql(OldIrql); 233 - } 234 - 235 - /* 236 - * @implemented 237 - */ 238 - VOID 239 - NTAPI 240 - KeSetDmaIoCoherency(IN ULONG Coherency) 241 - { 242 - /* Save the coherency globally */ 243 - KiDmaIoCoherency = Coherency; 244 - } 245 - 246 - /* 247 - * @implemented 248 - */ 249 - KAFFINITY 250 - NTAPI 251 - KeQueryActiveProcessors(VOID) 252 - { 253 - PAGED_CODE(); 254 - 255 - /* Simply return the number of active processors */ 256 - return KeActiveProcessors; 257 - } 258 - 259 - /* 260 - * @implemented 261 - */ 262 - VOID 263 - __cdecl 264 - KeSaveStateForHibernate(IN PKPROCESSOR_STATE State) 265 - { 266 - /* Capture the context */ 267 - RtlCaptureContext(&State->ContextFrame); 268 - 269 - /* Capture the control state */ 270 - KiSaveProcessorControlState(State); 271 - }
-252
ntoskrnl/ke/powerpc/ctxhelp.S
··· 1 - /* 2 - * COPYRIGHT: See COPYING in the top level directory 3 - * PROJECT: ReactOS kernel 4 - * FILE: ntoskrnl/ke/powerpc/ctxhelp.S 5 - * PURPOSE: Thread Context Switching 6 - * 7 - * PROGRAMMERS: arty 8 - (i386 implementation by Alex Ionescu) 9 - */ 10 - 11 - /* INCLUDES ******************************************************************/ 12 - 13 - .text 14 - .globl syscall_start 15 - .globl syscall_end 16 - .globl KiSystemService 17 - syscall_start: 18 - mtsprg0 0 19 - mtsprg1 1 20 - /* Save and modify srr0 */ 21 - /* Make a place to store the old srr0 and srr1 ... we may fault 22 - * getting KiSystemService1 which will clobber them. */ 23 - lis 1,1 24 - mfsrr0 0 25 - stw 0,-16(1) 26 - mfsrr1 0 27 - stw 0,-12(1) 28 - /* Load the target address */ 29 - lis 1,KiSystemService1@ha 30 - addi 1,1,KiSystemService1@l 31 - mtsrr0 1 32 - mfsprg0 0 33 - mfsprg1 1 34 - rfi 35 - syscall_end: 36 - .space 4 37 - 38 - .globl KiSystemService 39 - .globl KiSystemService1 40 - .globl kiss_proceed 41 - .globl kiss_end 42 - .align 8 43 - KiSystemService1: 44 - stwu 1,-256(1) 45 - stw 0,16(1) 46 - mflr 0 47 - stw 0,264(1) 48 - addi 1,1,16 49 - stw 2,8(1) 50 - stw 3,12(1) 51 - stw 4,16(1) 52 - stw 5,20(1) 53 - stw 6,24(1) 54 - stw 7,28(1) 55 - stw 8,32(1) 56 - stw 9,36(1) 57 - stw 10,40(1) 58 - stw 11,44(1) 59 - stw 12,48(1) 60 - stw 13,52(1) 61 - stw 14,56(1) 62 - stw 15,60(1) 63 - stw 16,64(1) 64 - stw 17,68(1) 65 - stw 18,72(1) 66 - stw 19,76(1) 67 - stw 20,80(1) 68 - stw 21,84(1) 69 - stw 22,88(1) 70 - stw 23,92(1) 71 - stw 24,96(1) 72 - stw 25,100(1) 73 - stw 26,104(1) 74 - stw 27,108(1) 75 - stw 28,112(1) 76 - stw 29,116(1) 77 - stw 30,120(1) 78 - stw 31,124(1) 79 - mflr 0 80 - stw 0,128(1) 81 - mfctr 0 82 - stw 0,136(1) 83 - mfmsr 0 84 - andi. 0,0,0xffef 85 - mtmsr 0 86 - lis 2,1 87 - lwz 30,-12(2) 88 - lwz 31,-16(2) 89 - mfmsr 0 90 - ori 0,0,0x10 91 - mtmsr 0 92 - stw 31,140(1) 93 - stw 30,144(1) 94 - mfdsisr 0 95 - stw 0,148(1) 96 - mfdar 0 97 - stw 0,152(1) 98 - lis 3,KiSystemService@ha 99 - addi 3,3,KiSystemService@l 100 - mtctr 3 101 - mr 3,1 102 - subi 1,1,16 103 - bctrl 104 - addi 1,1,16 105 - /* Return from kernel */ 106 - lwz 3,32(1) /* Result */ 107 - lwz 0,128(1) 108 - mtlr 0 109 - lwz 0,140(1) 110 - mtsrr0 0 111 - lwz 0,144(1) 112 - mtsrr1 0 113 - addi 1,1,0x100 - 16 114 - rfi 115 - 116 - .globl KiDecrementerTrapHandler 117 - .globl KiDecrementerTrapHandlerEnd 118 - .globl KiDecrementerTrap 119 - KiDecrementerTrapHandler: 120 - mtsprg0 0 121 - mtsprg1 1 122 - /* Save and modify srr0 */ 123 - /* Make a place to store the old srr0 and srr1 ... we may fault 124 - * getting KiSystemService1 which will clobber them. */ 125 - lis 1,1 126 - mfsprg1 0 127 - stw 0,-24(1) 128 - mfsrr1 0 129 - stw 0,-28(1) 130 - mfsrr0 0 131 - stw 0,-32(1) 132 - /* Load the target address */ 133 - lis 1,KiDecrementerTrapUpper@ha 134 - addi 1,1,KiDecrementerTrapUpper@l 135 - mtsrr0 1 136 - mfsprg0 0 137 - mfsprg1 1 138 - rfi 139 - KiDecrementerTrapHandlerEnd: 140 - .long 0 141 - 142 - /* Decrementer needs to restore the full CPU state */ 143 - .globl KiDecrementerTrapUpper 144 - .align 8 145 - KiDecrementerTrapUpper: 146 - lis 1,_kernel_trap_stack@ha 147 - addi 1,1,_kernel_trap_stack@l 148 - subi 1,1,0x200 149 - stw 0,0x5c(1) 150 - /* Stack handled a bit later */ 151 - stw 2,0x64(1) 152 - stw 3,0x68(1) 153 - stw 4,0x6c(1) 154 - stw 5,0x70(1) 155 - stw 6,0x74(1) 156 - stw 7,0x78(1) 157 - stw 8,0x7c(1) 158 - stw 9,0x80(1) 159 - stw 10,0x84(1) 160 - stw 11,0x88(1) 161 - stw 12,0x8c(1) 162 - stw 13,0x90(1) 163 - stw 14,0x94(1) 164 - stw 15,0x98(1) 165 - stw 16,0x9c(1) 166 - stw 17,0xa0(1) 167 - stw 18,0xa4(1) 168 - stw 19,0xa8(1) 169 - stw 20,0xac(1) 170 - stw 21,0xb0(1) 171 - stw 22,0xb4(1) 172 - stw 23,0xb8(1) 173 - stw 24,0xbc(1) 174 - stw 25,0xc0(1) 175 - stw 26,0xc4(1) 176 - stw 27,0xc8(1) 177 - stw 28,0xcc(1) 178 - stw 29,0xd0(1) 179 - stw 30,0xd4(1) 180 - stw 31,0xd8(1) 181 - mfcr 0 182 - stw 0,0x108(1) 183 - mfxer 0 184 - stw 0,0x10c(1) 185 - mflr 0 186 - stw 0,0x118(1) 187 - mfctr 0 188 - stw 0,0x11c(1) 189 - mfmsr 0 190 - andi. 0,0,0x7fef 191 - mtmsr 0 192 - lis 2,1 193 - lwz 29,-24(2) // Stack 194 - lwz 30,-28(2) // srr1 195 - lwz 31,-32(2) // srr0 196 - mfmsr 0 197 - ori 0,0,0x30 198 - mtmsr 0 199 - stw 29,0x60(1) // Stack 200 - stw 30,0x110(1) // srr1 201 - stw 31,0x114(1) // srr0 202 - mr 3,1 203 - subi 1,1,16 204 - bl KiDecrementerTrap 205 - addi 1,1,16 206 - lwz 2,0x64(1) 207 - lwz 3,0x68(1) 208 - lwz 4,0x6c(1) 209 - lwz 5,0x70(1) 210 - lwz 6,0x74(1) 211 - lwz 7,0x78(1) 212 - lwz 8,0x7c(1) 213 - lwz 9,0x80(1) 214 - lwz 10,0x84(1) 215 - lwz 11,0x88(1) 216 - lwz 12,0x8c(1) 217 - lwz 13,0x90(1) 218 - lwz 14,0x94(1) 219 - lwz 15,0x98(1) 220 - lwz 16,0x9c(1) 221 - lwz 17,0xa0(1) 222 - lwz 18,0xa4(1) 223 - lwz 19,0xa8(1) 224 - lwz 20,0xac(1) 225 - lwz 21,0xb0(1) 226 - lwz 22,0xb4(1) 227 - lwz 23,0xb8(1) 228 - lwz 24,0xbc(1) 229 - lwz 25,0xc0(1) 230 - lwz 26,0xc4(1) 231 - lwz 27,0xc8(1) 232 - lwz 28,0xcc(1) 233 - lwz 29,0xd0(1) 234 - lwz 30,0xd4(1) 235 - lwz 31,0xd8(1) 236 - lwz 0,0x108(1) 237 - mtcr 0 238 - lwz 0,0x10c(1) 239 - mtxer 0 240 - lwz 0,0x110(1) 241 - mtsrr1 0 242 - lwz 0,0x114(1) 243 - mtsrr0 0 244 - lwz 0,0x118(1) 245 - mtlr 0 246 - lwz 0,0x11c(1) 247 - mtctr 0 248 - // back out r0 and r1 249 - lwz 0,0x5c(1) 250 - lwz 1,0x60(1) 251 - // Bye!!1 252 - rfi
-124
ntoskrnl/ke/powerpc/ctxswitch.c
··· 1 - /* 2 - * COPYRIGHT: See COPYING in the top level directory 3 - * PROJECT: ReactOS kernel 4 - * FILE: ntoskrnl/ke/powerpc/ctxswitch.c 5 - * PURPOSE: Thread Context Switching 6 - * 7 - * PROGRAMMERS: arty 8 - (i386 implementation by Alex Ionescu) 9 - */ 10 - 11 - /* INCLUDES ******************************************************************/ 12 - 13 - #include <ntoskrnl.h> 14 - #define NDEBUG 15 - #include <debug.h> 16 - #include <ppcmmu/mmu.h> 17 - 18 - /*++ 19 - * KiThreadStartup 20 - * 21 - * The KiThreadStartup routine is the beginning of any thread. 22 - * 23 - * Params: 24 - * SystemRoutine - Pointer to the System Startup Routine. Either 25 - * PspUserThreadStartup or PspSystemThreadStartup 26 - * 27 - * StartRoutine - For Kernel Threads only, specifies the starting execution 28 - * point of the new thread. 29 - * 30 - * StartContext - For Kernel Threads only, specifies a pointer to variable 31 - * context data to be sent to the StartRoutine above. 32 - * 33 - * UserThread - Indicates whether or not this is a user thread. This tells 34 - * us if the thread has a context or not. 35 - * 36 - * TrapFrame - Pointer to the KTHREAD to which the caller wishes to 37 - * switch from. 38 - * 39 - * Returns: 40 - * Should never return for a system thread. Returns through the System Call 41 - * Exit Dispatcher for a user thread. 42 - * 43 - * Remarks: 44 - * If a return from a system thread is detected, a bug check will occur. 45 - * 46 - *--*/ 47 - 48 - VOID 49 - NTAPI 50 - KiThreadStartup(PKSYSTEM_ROUTINE SystemRoutine, 51 - PKSTART_ROUTINE StartRoutine, 52 - PVOID StartContext, 53 - BOOLEAN UserThread, 54 - KTRAP_FRAME TrapFrame) 55 - { 56 - KeLowerIrql(APC_LEVEL); 57 - __asm__("mr 0,%0\n\t" 58 - "mr 3,%1\n\t" 59 - "mr 4,%2\n\t" 60 - "mr 5,%3\n\t" 61 - "mr 6,%4\n\t" 62 - "sc" : : 63 - "r" (0xf0000), /* Thread start function */ 64 - "r" (SystemRoutine), 65 - "r" (StartRoutine), 66 - "r" (StartContext), 67 - "r" (UserThread)); 68 - PspTerminateThreadByPointer(PsGetCurrentThread(), STATUS_THREAD_IS_TERMINATING, TRUE); 69 - } 70 - 71 - /* Take a decrementer trap, and prepare the given trap frame, swapping 72 - * process and thread context as appropriate. */ 73 - VOID KiDecrementerTrapFinish(PKTRAP_FRAME TrapFrame); 74 - 75 - VOID 76 - FASTCALL 77 - KiQueueReadyThread(IN PKTHREAD Thread, 78 - IN PKPRCB Prcb); 79 - 80 - PKTHREAD KiLastThread = NULL; 81 - PKTRAP_FRAME KiLastThreadTrapFrame = NULL; 82 - 83 - VOID 84 - NTAPI 85 - KiDecrementerTrap(PKTRAP_FRAME TrapFrame) 86 - { 87 - KIRQL Irql; 88 - PKPRCB Prcb = KeGetPcr()->Prcb; 89 - if (!KiLastThread) 90 - KiLastThread = KeGetCurrentThread(); 91 - 92 - if (KiLastThread->State == Running) 93 - KiQueueReadyThread(KiLastThread, Prcb); 94 - 95 - if (!KiLastThreadTrapFrame) 96 - KiLastThreadTrapFrame = Prcb->IdleThread->TrapFrame; 97 - 98 - TrapFrame->OldIrql = KeGetCurrentIrql(); 99 - *KiLastThreadTrapFrame = *TrapFrame; 100 - 101 - if (Prcb->NextThread) 102 - { 103 - Prcb->CurrentThread = Prcb->NextThread; 104 - Prcb->NextThread = NULL; 105 - } 106 - else 107 - Prcb->CurrentThread = Prcb->IdleThread; 108 - 109 - Prcb->CurrentThread->State = Running; 110 - 111 - KiLastThreadTrapFrame = Prcb->CurrentThread->TrapFrame; 112 - KiLastThread = Prcb->CurrentThread; 113 - 114 - *TrapFrame = *KiLastThreadTrapFrame; 115 - Irql = KeGetCurrentIrql(); 116 - 117 - if (Irql > TrapFrame->OldIrql) 118 - KfRaiseIrql(Irql); 119 - else if (Irql < TrapFrame->OldIrql) 120 - KfLowerIrql(Irql); 121 - 122 - /* When we return, we'll go through rfi and be in new thread land */ 123 - __asm__("mtdec %0" : : "r" (0x1000000)); // Reset the trap 124 - }
-103
ntoskrnl/ke/powerpc/exp.c
··· 1 - /* 2 - * PROJECT: ReactOS Kernel 3 - * LICENSE: GPL - See COPYING in the top level directory 4 - * FILE: ntoskrnl/ke/powerpc/exp.c 5 - * PURPOSE: Exception Dispatching and Context<->Trap Frame Conversion 6 - * PROGRAMMERS: Alex Ionescu (alex.ionescu@reactos.org) 7 - * Gregor Anich 8 - * Skywing (skywing@valhallalegends.com) 9 - */ 10 - 11 - /* INCLUDES ******************************************************************/ 12 - 13 - #include <ntoskrnl.h> 14 - #define NDEBUG 15 - #include <debug.h> 16 - #include <ppcmmu/mmu.h> 17 - 18 - /* FUNCTIONS *****************************************************************/ 19 - 20 - CODE_SEG("INIT") 21 - VOID 22 - NTAPI 23 - KeInitExceptions(VOID) 24 - { 25 - } 26 - 27 - ULONG 28 - NTAPI 29 - KiEspFromTrapFrame(IN PKTRAP_FRAME TrapFrame) 30 - { 31 - return 0; 32 - } 33 - 34 - VOID 35 - NTAPI 36 - KiEspToTrapFrame(IN PKTRAP_FRAME TrapFrame, 37 - IN ULONG Esp) 38 - { 39 - } 40 - 41 - ULONG 42 - NTAPI 43 - KiSsFromTrapFrame(IN PKTRAP_FRAME TrapFrame) 44 - { 45 - return 0; 46 - } 47 - 48 - VOID 49 - NTAPI 50 - KiSsToTrapFrame(IN PKTRAP_FRAME TrapFrame, 51 - IN ULONG Ss) 52 - { 53 - } 54 - 55 - USHORT 56 - NTAPI 57 - KiTagWordFnsaveToFxsave(USHORT TagWord) 58 - { 59 - return 0; 60 - } 61 - 62 - VOID 63 - NTAPI 64 - KeContextToTrapFrame(IN PCONTEXT Context, 65 - IN OUT PKEXCEPTION_FRAME ExceptionFrame, 66 - IN OUT PKTRAP_FRAME TrapFrame, 67 - IN ULONG ContextFlags, 68 - IN KPROCESSOR_MODE PreviousMode) 69 - { 70 - } 71 - 72 - VOID 73 - NTAPI 74 - KeTrapFrameToContext(IN PKTRAP_FRAME TrapFrame, 75 - IN PKEXCEPTION_FRAME ExceptionFrame, 76 - IN OUT PCONTEXT Context) 77 - { 78 - } 79 - 80 - VOID 81 - NTAPI 82 - KiDispatchException(IN PEXCEPTION_RECORD ExceptionRecord, 83 - IN PKEXCEPTION_FRAME ExceptionFrame, 84 - IN PKTRAP_FRAME TrapFrame, 85 - IN KPROCESSOR_MODE PreviousMode, 86 - IN BOOLEAN FirstChance) 87 - { 88 - DbgPrint("EXCEPTION! Record %08x Frame %08x\n", 89 - ExceptionRecord, ExceptionFrame); 90 - MmuDumpMap(); 91 - KeBugCheck(KMODE_EXCEPTION_NOT_HANDLED); 92 - } 93 - 94 - /* 95 - * @implemented 96 - */ 97 - NTSTATUS 98 - NTAPI 99 - KeRaiseUserException(IN NTSTATUS ExceptionCode) 100 - { 101 - return STATUS_SUCCESS; 102 - } 103 -
-356
ntoskrnl/ke/powerpc/kiinit.c
··· 1 - /* 2 - * PROJECT: ReactOS Kernel 3 - * LICENSE: GPL - See COPYING in the top level directory 4 - * FILE: ntoskrnl/ke/powerpc/kiinit.c 5 - * PURPOSE: Kernel Initialization for x86 CPUs 6 - * PROGRAMMERS: Alex Ionescu (alex.ionescu@reactos.org) 7 - * Art Yerkes (ayerkes@speakeasy.net) 8 - */ 9 - 10 - /* INCLUDES *****************************************************************/ 11 - 12 - #include <ntoskrnl.h> 13 - 14 - //#define NDEBUG 15 - #include <debug.h> 16 - #include "ppcmmu/mmu.h" 17 - 18 - /* GLOBALS *******************************************************************/ 19 - 20 - /* Ku bit should be set, so that we get the best options for page protection */ 21 - #define PPC_SEG_Ku 0x40000000 22 - #define PPC_SEG_Ks 0x20000000 23 - 24 - extern LOADER_MODULE KeLoaderModules[64]; 25 - extern ULONG KeLoaderModuleCount; 26 - extern ULONG_PTR MmFreeLdrLastKernelAddress; 27 - KPRCB PrcbData[MAXIMUM_PROCESSORS]; 28 - /* BIOS Memory Map. Not NTLDR-compliant yet */ 29 - extern ULONG KeMemoryMapRangeCount; 30 - extern ADDRESS_RANGE KeMemoryMap[64]; 31 - 32 - /* FUNCTIONS *****************************************************************/ 33 - /* 34 - * Trap frame: 35 - * r0 .. r32 36 - * lr, ctr, srr0, srr1, dsisr 37 - */ 38 - 39 - extern int syscall_start[], syscall_end, KiDecrementerTrapHandler[], 40 - KiDecrementerTrapHandlerEnd; 41 - 42 - VOID 43 - NTAPI 44 - KiSetupSyscallHandler(VOID) 45 - { 46 - paddr_t handler_target; 47 - int *source; 48 - for(source = syscall_start, handler_target = 0xc00; 49 - source < &syscall_end; 50 - source++, handler_target += sizeof(int)) 51 - { 52 - SetPhys(handler_target, *source); 53 - } 54 - } 55 - 56 - VOID 57 - NTAPI 58 - KiSetupDecrementerTrap(VOID) 59 - { 60 - paddr_t handler_target; 61 - int *source; 62 - 63 - /* Turn off EE bit while redefining dec trap */ 64 - _disable(); 65 - 66 - for(source = KiDecrementerTrapHandler, handler_target = 0x900; 67 - source != &KiDecrementerTrapHandlerEnd; 68 - source++, handler_target += sizeof(int)) 69 - SetPhys(handler_target, *source); 70 - 71 - DPRINT("CurrentThread %08x IdleThread %08x\n", 72 - KeGetCurrentThread(), KeGetCurrentPrcb()->IdleThread); 73 - 74 - /* Kick decmrenter! */ 75 - __asm__("mtdec %0" : : "r" (0)); 76 - 77 - /* Enable interrupts! */ 78 - _enable(); 79 - } 80 - 81 - VOID 82 - NTAPI 83 - KiInitializePcr(IN ULONG ProcessorNumber, 84 - IN PKIPCR Pcr, 85 - IN PKTHREAD IdleThread, 86 - IN PVOID DpcStack) 87 - { 88 - Pcr->MajorVersion = PCR_MAJOR_VERSION; 89 - Pcr->MinorVersion = PCR_MINOR_VERSION; 90 - Pcr->CurrentIrql = PASSIVE_LEVEL; 91 - Pcr->PrcbData = &PrcbData[ProcessorNumber]; 92 - Pcr->PrcbData->MajorVersion = PRCB_MAJOR_VERSION; 93 - Pcr->PrcbData->MinorVersion = 0; 94 - Pcr->PrcbData->Number = 0; /* UP for now */ 95 - Pcr->PrcbData->SetMember = 1; 96 - #if DBG 97 - Pcr->PrcbData->BuildType = PRCB_BUILD_DEBUG; 98 - #else 99 - Pcr->PrcbData->BuildType = 0; 100 - #endif 101 - Pcr->PrcbData->DpcStack = DpcStack; 102 - KeGetPcr()->Prcb = Pcr->PrcbData; 103 - KiProcessorBlock[ProcessorNumber] = Pcr->PrcbData; 104 - } 105 - 106 - extern ULONG KiGetFeatureBits(); 107 - extern VOID KiSetProcessorType(); 108 - extern VOID KiGetCacheInformation(); 109 - 110 - VOID 111 - NTAPI 112 - KiInitializeKernel(IN PKPROCESS InitProcess, 113 - IN PKTHREAD InitThread, 114 - IN PVOID IdleStack, 115 - IN PKPRCB Prcb, 116 - IN CCHAR Number, 117 - IN PLOADER_PARAMETER_BLOCK LoaderBlock) 118 - { 119 - ULONG FeatureBits; 120 - LARGE_INTEGER PageDirectory; 121 - PVOID DpcStack; 122 - 123 - /* Detect and set the CPU Type */ 124 - KiSetProcessorType(); 125 - 126 - /* Initialize the Power Management Support for this PRCB */ 127 - PoInitializePrcb(Prcb); 128 - 129 - /* Get the processor features for the CPU */ 130 - FeatureBits = KiGetFeatureBits(); 131 - 132 - /* Save feature bits */ 133 - Prcb->FeatureBits = FeatureBits; 134 - 135 - /* Get cache line information for this CPU */ 136 - KiGetCacheInformation(); 137 - 138 - /* Initialize spinlocks and DPC data */ 139 - KiInitSpinLocks(Prcb, Number); 140 - 141 - /* Check if this is the Boot CPU */ 142 - if (!Number) 143 - { 144 - /* Set Node Data */ 145 - KeNodeBlock[0] = &KiNode0; 146 - Prcb->ParentNode = KeNodeBlock[0]; 147 - KeNodeBlock[0]->ProcessorMask = Prcb->SetMember; 148 - 149 - /* Set boot-level flags */ 150 - KeProcessorArchitecture = 0; 151 - KeProcessorLevel = (USHORT)Prcb->CpuType; 152 - KeFeatureBits = FeatureBits; 153 - 154 - /* Set the current MP Master KPRCB to the Boot PRCB */ 155 - Prcb->MultiThreadSetMaster = Prcb; 156 - 157 - /* Lower to APC_LEVEL */ 158 - KeLowerIrql(APC_LEVEL); 159 - 160 - /* Initialize portable parts of the OS */ 161 - KiInitSystem(); 162 - 163 - /* Initialize the Idle Process and the Process Listhead */ 164 - InitializeListHead(&KiProcessListHead); 165 - PageDirectory.QuadPart = 0; 166 - KeInitializeProcess(InitProcess, 167 - 0, 168 - 0xFFFFFFFF, 169 - &PageDirectory, 170 - TRUE); 171 - InitProcess->QuantumReset = MAXCHAR; 172 - } 173 - else 174 - { 175 - /* FIXME */ 176 - DPRINT1("SMP Boot support not yet present\n"); 177 - } 178 - 179 - /* Setup the Idle Thread */ 180 - KeInitializeThread(InitProcess, 181 - InitThread, 182 - NULL, 183 - NULL, 184 - NULL, 185 - NULL, 186 - NULL, 187 - IdleStack); 188 - InitThread->NextProcessor = Number; 189 - InitThread->Priority = HIGH_PRIORITY; 190 - InitThread->State = Running; 191 - InitThread->Affinity = 1 << Number; 192 - InitThread->WaitIrql = DISPATCH_LEVEL; 193 - InitProcess->ActiveProcessors = 1 << Number; 194 - 195 - /* HACK for MmUpdatePageDir */ 196 - ((PETHREAD)InitThread)->ThreadsProcess = (PEPROCESS)InitProcess; 197 - 198 - /* Set up the thread-related fields in the PRCB */ 199 - Prcb->CurrentThread = InitThread; 200 - Prcb->NextThread = NULL; 201 - Prcb->IdleThread = InitThread; 202 - 203 - /* Initialize Kernel Memory Address Space */ 204 - MmInit1(MmFreeLdrFirstKrnlPhysAddr, 205 - MmFreeLdrLastKrnlPhysAddr, 206 - MmFreeLdrLastKernelAddress, 207 - KeMemoryMap, 208 - KeMemoryMapRangeCount, 209 - 4096); 210 - 211 - /* Initialize the Kernel Executive */ 212 - ExpInitializeExecutive(0, LoaderBlock); 213 - 214 - /* Only do this on the boot CPU */ 215 - if (!Number) 216 - { 217 - /* Calculate the time reciprocal */ 218 - KiTimeIncrementReciprocal = 219 - KiComputeReciprocal(KeMaximumIncrement, 220 - &KiTimeIncrementShiftCount); 221 - 222 - /* Update DPC Values in case they got updated by the executive */ 223 - Prcb->MaximumDpcQueueDepth = KiMaximumDpcQueueDepth; 224 - Prcb->MinimumDpcRate = KiMinimumDpcRate; 225 - Prcb->AdjustDpcThreshold = KiAdjustDpcThreshold; 226 - 227 - /* Allocate the DPC Stack */ 228 - DpcStack = MmCreateKernelStack(FALSE, 0); 229 - if (!DpcStack) KeBugCheckEx(NO_PAGES_AVAILABLE, 1, 0, 0, 0); 230 - Prcb->DpcStack = DpcStack; 231 - } 232 - 233 - KfRaiseIrql(DISPATCH_LEVEL); 234 - 235 - KeSetPriorityThread(InitThread, 0); 236 - /* Setup decrementer exception */ 237 - KiSetupDecrementerTrap(); 238 - 239 - KfLowerIrql(PASSIVE_LEVEL); 240 - 241 - /* Should not return */ 242 - while(1) 243 - { 244 - NtYieldExecution(); 245 - } 246 - } 247 - 248 - extern int KiPageFaultTrap(); 249 - KTRAP_FRAME KiInitialTrapFrame; 250 - 251 - /* Use this for early boot additions to the page table */ 252 - VOID 253 - NTAPI 254 - KiSystemStartupReal(IN PLOADER_PARAMETER_BLOCK LoaderBlock) 255 - { 256 - ULONG Cpu; 257 - ppc_map_info_t info[4]; 258 - PKIPCR Pcr = (PKIPCR)KPCR_BASE; 259 - PKPRCB Prcb; 260 - 261 - __asm__("mr 13,%0" : : "r" (KPCR_BASE)); 262 - 263 - /* Set the page fault handler to the kernel */ 264 - MmuSetTrapHandler(3,KiPageFaultTrap); 265 - MmuSetTrapHandler(4,KiPageFaultTrap); 266 - 267 - // Make 0xf... special 268 - MmuAllocVsid(2, 0x8000); 269 - MmuSetVsid(15,16,2); 270 - 271 - /* Get the current CPU */ 272 - Cpu = KeNumberProcessors; 273 - if (!Cpu) 274 - { 275 - /* We'll allocate a page from the end of the kernel area for KPCR. This code will probably 276 - * change when we get SMP support. 277 - */ 278 - info[0].phys = 0; 279 - info[0].proc = 2; 280 - info[0].addr = (vaddr_t)Pcr; 281 - info[0].flags = MMU_KRW_UR; 282 - info[1].phys = 0; 283 - info[1].proc = 2; 284 - info[1].addr = ((vaddr_t)Pcr) + (1 << PAGE_SHIFT); 285 - info[1].flags = MMU_KRW_UR; 286 - info[2].phys = 0; 287 - info[2].proc = 2; 288 - info[2].addr = (vaddr_t)KI_USER_SHARED_DATA; 289 - info[2].flags = MMU_KRW_UR; 290 - info[3].phys = 0; 291 - info[3].proc = 2; 292 - info[3].addr = (vaddr_t)KIP0PCRADDRESS; 293 - info[3].flags = MMU_KRW_UR; 294 - MmuMapPage(info, 4); 295 - } 296 - 297 - /* Skip initial setup if this isn't the Boot CPU */ 298 - if (Cpu) goto AppCpuInit; 299 - 300 - /* Initialize the PCR */ 301 - RtlZeroMemory(Pcr, PAGE_SIZE); 302 - KiInitializePcr(Cpu, 303 - Pcr, 304 - &KiInitialThread.Tcb, 305 - KiDoubleFaultStack); 306 - 307 - /* Set us as the current process */ 308 - KiInitialThread.Tcb.ApcState.Process = &KiInitialProcess.Pcb; 309 - KiInitialThread.Tcb.TrapFrame = &KiInitialTrapFrame; 310 - 311 - /* Setup CPU-related fields */ 312 - AppCpuInit: 313 - Pcr->Number = Cpu; 314 - Pcr->SetMember = 1 << Cpu; 315 - Prcb = KeGetCurrentPrcb(); 316 - Prcb->SetMember = 1 << Cpu; 317 - 318 - /* Initialize the Processor with HAL */ 319 - HalInitializeProcessor(Cpu, LoaderBlock); 320 - 321 - /* Set active processors */ 322 - KeActiveProcessors |= Pcr->SetMember; 323 - KeNumberProcessors++; 324 - 325 - /* Initialize the Debugger for the Boot CPU */ 326 - if (!Cpu) KdInitSystem (0, LoaderBlock); 327 - 328 - /* Check for break-in */ 329 - if (KdPollBreakIn()) 330 - { 331 - DbgBreakPointWithStatus(DBG_STATUS_CONTROL_C); 332 - } 333 - 334 - /* Raise to HIGH_LEVEL */ 335 - KfRaiseIrql(HIGH_LEVEL); 336 - 337 - /* Call main kernel intialization */ 338 - KiInitializeKernel(&KiInitialProcess.Pcb, 339 - &KiInitialThread.Tcb, 340 - P0BootStack, 341 - Prcb, 342 - Cpu, 343 - (PVOID)LoaderBlock); 344 - } 345 - 346 - VOID 347 - NTAPI 348 - KiInitMachineDependent(VOID) 349 - { 350 - } 351 - 352 - void abort(VOID) 353 - { 354 - KeBugCheck(KMODE_EXCEPTION_NOT_HANDLED); 355 - while(1); 356 - }
-76
ntoskrnl/ke/powerpc/main_asm.S
··· 1 - #include <ndk/asm.h> 2 - 3 - #define AP_MAGIC (0x12481020) 4 - 5 - .global P0BootStack 6 - .global KiDoubleFaultStack 7 - .global _kernel_stack 8 - .global _kernel_stack_top 9 - .global _kernel_trap_stack 10 - .global _kernel_trap_stack_top 11 - 12 - .section .bss 13 - .align 12 14 - 15 - 16 - /* guard page for the kernel stack */ 17 - .fill 4096, 1, 0 18 - 19 - _kernel_stack: 20 - .fill 3*4096, 1, 0 21 - P0BootStack: 22 - _kernel_stack_top: 23 - 24 - /* guard page for the trap stack */ 25 - .fill 4096, 1, 0 26 - 27 - _kernel_trap_stack: 28 - .fill 3*4096, 1, 0 29 - _kernel_trap_stack_top: 30 - 31 - .fill 3*4096, 1, 0 32 - KiDoubleFaultStack: 33 - 34 - .text 35 - .globl KiSystemStartup 36 - .globl KiRosPrepareForSystemStartup 37 - .globl DrawNumber 38 - 39 - KiSystemStartup: 40 - /* 41 - * Set a normal MSR value 42 - */ 43 - xor 0,0,0 44 - ori 30,0,0x3030 45 - mtmsr 30 46 - 47 - /* 48 - * Reserve space for the floating point save area. 49 - */ 50 - addi 1,1,-SIZEOF_FX_SAVE_AREA 51 - 52 - /* Bye bye asm land! */ 53 - mr 4,3 54 - 55 - /* Load the initial kernel stack */ 56 - lis 1,_kernel_stack_top@ha 57 - ori 1,1,_kernel_stack_top@l 58 - addi 1,1,-SIZEOF_FX_SAVE_AREA 59 - 60 - /* Call the main kernel initialization */ 61 - bl KiRosPrepareForSystemStartup 62 - 63 - .global NtCurrentTeb 64 - NtCurrentTeb: 65 - mr 3,12 66 - blr 67 - 68 - .globl KeSynchronizeExecution 69 - 70 - KeSynchronizeExecution: 71 - blr 72 - 73 - .globl PearPCDebug 74 - PearPCDebug: 75 - // .long 0x00333303 76 - blr
-805
ntoskrnl/ke/powerpc/ppc_irq.c
··· 1 - /* 2 - * COPYRIGHT: See COPYING in the top level directory 3 - * PROJECT: ReactOS kernel 4 - * FILE: ntoskrnl/ke/powerpc/ppc_irq.c 5 - * PURPOSE: IRQ handling 6 - * 7 - * PROGRAMMERS: David Welch (welch@mcmail.com) 8 - */ 9 - 10 - /* 11 - * NOTE: In general the PIC interrupt priority facilities are used to 12 - * preserve the NT IRQL semantics, global interrupt disables are only used 13 - * to keep the PIC in a consistent state 14 - * 15 - */ 16 - 17 - /* INCLUDES ****************************************************************/ 18 - 19 - #include <ntoskrnl.h> 20 - #include <ppcmmu/mmu.h> 21 - 22 - #define NDEBUG 23 - #include <debug.h> 24 - 25 - KDPC KiExpireTimerDpc; 26 - extern ULONG KiMaximumDpcQueueDepth; 27 - extern ULONG KiMinimumDpcRate; 28 - extern ULONG KiAdjustDpcThreshold; 29 - extern ULONG KiIdealDpcRate; 30 - extern LONG KiTickOffset; 31 - extern ULONG KeMaximumIncrement; 32 - extern ULONG KeMinimumIncrement; 33 - extern ULONG KeTimeAdjustment; 34 - 35 - extern void PearPCDebug(int ch); 36 - 37 - /* GLOBALS *****************************************************************/ 38 - 39 - /* Interrupt handler list */ 40 - 41 - #define NR_TRAPS 16 42 - #ifdef CONFIG_SMP 43 - 44 - #define INT_NAME2(intnum) KiUnexpectedInterrupt##intnum 45 - 46 - #define BUILD_INTERRUPT_HANDLER(intnum) \ 47 - VOID INT_NAME2(intnum)(VOID); 48 - 49 - #define D(x,y) \ 50 - BUILD_INTERRUPT_HANDLER(x##y) 51 - 52 - #define D16(x) \ 53 - D(x,0) D(x,1) D(x,2) D(x,3) \ 54 - D(x,4) D(x,5) D(x,6) D(x,7) \ 55 - D(x,8) D(x,9) D(x,A) D(x,B) \ 56 - D(x,C) D(x,D) D(x,E) D(x,F) 57 - 58 - D16(3) D16(4) D16(5) D16(6) 59 - D16(7) D16(8) D16(9) D16(A) 60 - D16(B) D16(C) D16(D) D16(E) 61 - D16(F) 62 - 63 - #define L(x,y) \ 64 - (ULONG)& INT_NAME2(x##y) 65 - 66 - #define L16(x) \ 67 - L(x,0), L(x,1), L(x,2), L(x,3), \ 68 - L(x,4), L(x,5), L(x,6), L(x,7), \ 69 - L(x,8), L(x,9), L(x,A), L(x,B), \ 70 - L(x,C), L(x,D), L(x,E), L(x,F) 71 - 72 - static ULONG irq_handler[ROUND_UP(NR_TRAPS, 16)] = { 73 - L16(3), L16(4), L16(5), L16(6), 74 - L16(7), L16(8), L16(9), L16(A), 75 - L16(B), L16(C), L16(D), L16(E) 76 - }; 77 - 78 - #undef L 79 - #undef L16 80 - #undef D 81 - #undef D16 82 - 83 - #else /* CONFIG_SMP */ 84 - 85 - void trap_handler_0(void); 86 - void trap_handler_1(void); 87 - void trap_handler_2(void); 88 - void trap_handler_3(void); 89 - void trap_handler_4(void); 90 - void trap_handler_5(void); 91 - void trap_handler_6(void); 92 - void trap_handler_7(void); 93 - void trap_handler_8(void); 94 - void trap_handler_9(void); 95 - void trap_handler_10(void); 96 - void trap_handler_11(void); 97 - void trap_handler_12(void); 98 - void trap_handler_13(void); 99 - void trap_handler_14(void); 100 - void trap_handler_15(void); 101 - 102 - static unsigned int trap_handler[NR_TRAPS] __attribute__((unused)) = 103 - { 104 - (int)&trap_handler_0, 105 - (int)&trap_handler_1, 106 - (int)&trap_handler_2, 107 - (int)&trap_handler_3, 108 - (int)&trap_handler_4, 109 - (int)&trap_handler_5, 110 - (int)&trap_handler_6, 111 - (int)&trap_handler_7, 112 - (int)&trap_handler_8, 113 - (int)&trap_handler_9, 114 - (int)&trap_handler_10, 115 - (int)&trap_handler_11, 116 - (int)&trap_handler_12, 117 - (int)&trap_handler_13, 118 - (int)&trap_handler_14, 119 - (int)&trap_handler_15, 120 - }; 121 - 122 - #endif /* CONFIG_SMP */ 123 - 124 - /* 125 - * PURPOSE: Object describing each isr 126 - * NOTE: The data in this table is only modified at passsive level but can 127 - * be accessed at any irq level. 128 - */ 129 - 130 - typedef struct 131 - { 132 - LIST_ENTRY ListHead; 133 - KSPIN_LOCK Lock; 134 - ULONG Count; 135 - } 136 - ISR_TABLE, *PISR_TABLE; 137 - 138 - #ifdef CONFIG_SMP 139 - static ISR_TABLE IsrTable[NR_TRAPS][MAXIMUM_PROCESSORS]; 140 - #else 141 - static ISR_TABLE IsrTable[NR_TRAPS][1]; 142 - #endif 143 - 144 - #define TAG_ISR_LOCK 'LRSI' 145 - 146 - /* FUNCTIONS ****************************************************************/ 147 - 148 - CODE_SEG("INIT") 149 - VOID 150 - NTAPI 151 - KeInitInterrupts (VOID) 152 - { 153 - int i, j; 154 - 155 - /* 156 - * Setup the IDT entries to point to the interrupt handlers 157 - */ 158 - for (i=0;i<NR_TRAPS;i++) 159 - { 160 - #ifdef CONFIG_SMP 161 - for (j = 0; j < MAXIMUM_PROCESSORS; j++) 162 - #else 163 - j = 0; 164 - #endif 165 - { 166 - InitializeListHead(&IsrTable[i][j].ListHead); 167 - KeInitializeSpinLock(&IsrTable[i][j].Lock); 168 - IsrTable[i][j].Count = 0; 169 - } 170 - } 171 - } 172 - 173 - static VOID 174 - KeIRQTrapFrameToTrapFrame(PKIRQ_TRAPFRAME IrqTrapFrame, 175 - PKTRAP_FRAME TrapFrame) 176 - { 177 - } 178 - 179 - static VOID 180 - KeTrapFrameToIRQTrapFrame(PKTRAP_FRAME TrapFrame, 181 - PKIRQ_TRAPFRAME IrqTrapFrame) 182 - { 183 - } 184 - 185 - /* 186 - * NOTE: On Windows this function takes exactly one parameter and EBP is 187 - * guaranteed to point to KTRAP_FRAME. The function is used only 188 - * by HAL, so there's no point in keeping that prototype. 189 - * 190 - * @implemented 191 - */ 192 - VOID 193 - NTAPI 194 - KeUpdateRunTime(IN PKTRAP_FRAME TrapFrame, 195 - IN KIRQL Irql) 196 - { 197 - PKPRCB Prcb = KeGetCurrentPrcb(); 198 - PKTHREAD CurrentThread; 199 - PKPROCESS CurrentProcess; 200 - 201 - /* Make sure we don't go further if we're in early boot phase. */ 202 - if (!(Prcb) || !(Prcb->CurrentThread)) return; 203 - 204 - /* Get the current thread and process */ 205 - CurrentThread = Prcb->CurrentThread; 206 - CurrentProcess = CurrentThread->ApcState.Process; 207 - 208 - /* Check if we came from user mode */ 209 - if (TrapFrame->PreviousMode != KernelMode) 210 - { 211 - /* Update user times */ 212 - CurrentThread->UserTime++; 213 - InterlockedIncrement((PLONG)&CurrentProcess->UserTime); 214 - Prcb->UserTime++; 215 - } 216 - else 217 - { 218 - /* Check IRQ */ 219 - if (Irql > DISPATCH_LEVEL) 220 - { 221 - /* This was an interrupt */ 222 - Prcb->InterruptTime++; 223 - } 224 - else if ((Irql < DISPATCH_LEVEL) || !(Prcb->DpcRoutineActive)) 225 - { 226 - /* This was normal kernel time */ 227 - CurrentThread->KernelTime++; 228 - InterlockedIncrement((PLONG)&CurrentProcess->KernelTime); 229 - } 230 - else if (Irql == DISPATCH_LEVEL) 231 - { 232 - /* This was DPC time */ 233 - Prcb->DpcTime++; 234 - } 235 - 236 - /* Update CPU kernel time in all cases */ 237 - Prcb->KernelTime++; 238 - } 239 - 240 - /* Set the last DPC Count and request rate */ 241 - Prcb->DpcLastCount = Prcb->DpcData[0].DpcCount; 242 - Prcb->DpcRequestRate = ((Prcb->DpcData[0].DpcCount - Prcb->DpcLastCount) + 243 - Prcb->DpcRequestRate) / 2; 244 - 245 - /* Check if we should request a DPC */ 246 - if ((Prcb->DpcData[0].DpcQueueDepth) && !(Prcb->DpcRoutineActive)) 247 - { 248 - /* Request one */ 249 - HalRequestSoftwareInterrupt(DISPATCH_LEVEL); 250 - 251 - /* Update the depth if needed */ 252 - if ((Prcb->DpcRequestRate < KiIdealDpcRate) && 253 - (Prcb->MaximumDpcQueueDepth > 1)) 254 - { 255 - /* Decrease the maximum depth by one */ 256 - Prcb->MaximumDpcQueueDepth--; 257 - } 258 - } 259 - else 260 - { 261 - /* Decrease the adjustment threshold */ 262 - if (!(--Prcb->AdjustDpcThreshold)) 263 - { 264 - /* We've hit 0, reset it */ 265 - Prcb->AdjustDpcThreshold = KiAdjustDpcThreshold; 266 - 267 - /* Check if we've hit queue maximum */ 268 - if (KiMaximumDpcQueueDepth != Prcb->MaximumDpcQueueDepth) 269 - { 270 - /* Increase maximum by one */ 271 - Prcb->MaximumDpcQueueDepth++; 272 - } 273 - } 274 - } 275 - 276 - /* 277 - * If we're at end of quantum request software interrupt. The rest 278 - * is handled in KiDispatchInterrupt. 279 - * 280 - * NOTE: If one stays at DISPATCH_LEVEL for a long time the DPC routine 281 - * which checks for quantum end will not be executed and decrementing 282 - * the quantum here can result in overflow. This is not a problem since 283 - * we don't care about the quantum value anymore after the QuantumEnd 284 - * flag is set. 285 - */ 286 - if ((CurrentThread->Quantum -= 3) <= 0) 287 - { 288 - Prcb->QuantumEnd = TRUE; 289 - HalRequestSoftwareInterrupt(DISPATCH_LEVEL); 290 - } 291 - } 292 - 293 - 294 - /* 295 - * NOTE: On Windows this function takes exactly zero parameters and EBP is 296 - * guaranteed to point to KTRAP_FRAME. Also [esp+0] contains an IRQL. 297 - * The function is used only by HAL, so there's no point in keeping 298 - * that prototype. 299 - * 300 - * @implemented 301 - */ 302 - VOID 303 - NTAPI 304 - KeUpdateSystemTime(IN PKTRAP_FRAME TrapFrame, 305 - IN KIRQL Irql, 306 - IN ULONG Increment) 307 - { 308 - LONG OldOffset; 309 - LARGE_INTEGER Time; 310 - ASSERT(KeGetCurrentIrql() == PROFILE_LEVEL); 311 - 312 - /* Update interrupt time */ 313 - Time.LowPart = SharedUserData->InterruptTime.LowPart; 314 - Time.HighPart = SharedUserData->InterruptTime.High1Time; 315 - Time.QuadPart += Increment; 316 - SharedUserData->InterruptTime.High2Time = Time.u.HighPart; 317 - SharedUserData->InterruptTime.LowPart = Time.u.LowPart; 318 - SharedUserData->InterruptTime.High1Time = Time.u.HighPart; 319 - 320 - /* Increase the tick offset */ 321 - KiTickOffset -= Increment; 322 - OldOffset = KiTickOffset; 323 - 324 - /* Check if this isn't a tick yet */ 325 - if (KiTickOffset > 0) 326 - { 327 - /* Expire timers */ 328 - KeInsertQueueDpc(&KiExpireTimerDpc, 0, 0); 329 - } 330 - else 331 - { 332 - /* Setup time structure for system time */ 333 - Time.LowPart = SharedUserData->SystemTime.LowPart; 334 - Time.HighPart = SharedUserData->SystemTime.High1Time; 335 - Time.QuadPart += KeTimeAdjustment; 336 - SharedUserData->SystemTime.High2Time = Time.HighPart; 337 - SharedUserData->SystemTime.LowPart = Time.LowPart; 338 - SharedUserData->SystemTime.High1Time = Time.HighPart; 339 - 340 - /* Setup time structure for tick time */ 341 - Time.LowPart = KeTickCount.LowPart; 342 - Time.HighPart = KeTickCount.High1Time; 343 - Time.QuadPart += 1; 344 - KeTickCount.High2Time = Time.HighPart; 345 - KeTickCount.LowPart = Time.LowPart; 346 - KeTickCount.High1Time = Time.HighPart; 347 - SharedUserData->TickCount.High2Time = Time.HighPart; 348 - SharedUserData->TickCount.LowPart = Time.LowPart; 349 - SharedUserData->TickCount.High1Time = Time.HighPart; 350 - 351 - /* Queue a DPC that will expire timers */ 352 - KeInsertQueueDpc(&KiExpireTimerDpc, 0, 0); 353 - } 354 - 355 - /* Update process and thread times */ 356 - if (OldOffset <= 0) 357 - { 358 - /* This was a tick, calculate the next one */ 359 - KiTickOffset += KeMaximumIncrement; 360 - KeUpdateRunTime(TrapFrame, Irql); 361 - } 362 - } 363 - 364 - VOID NTAPI 365 - KiInterruptDispatch2 (ULONG vector, KIRQL old_level) 366 - /* 367 - * FUNCTION: Calls all the interrupt handlers for a given irq. 368 - * ARGUMENTS: 369 - * vector - The number of the vector to call handlers for. 370 - * old_level - The irql of the processor when the irq took place. 371 - * NOTES: Must be called at DIRQL. 372 - */ 373 - { 374 - PKINTERRUPT isr; 375 - PLIST_ENTRY current; 376 - KIRQL oldlvl; 377 - PISR_TABLE CurrentIsr; 378 - 379 - DPRINT("I(0x%.08x, 0x%.08x)\n", vector, old_level); 380 - 381 - /* 382 - * Iterate the list until one of the isr tells us its device interrupted 383 - */ 384 - CurrentIsr = &IsrTable[vector][(ULONG)KeGetCurrentProcessorNumber()]; 385 - 386 - KiAcquireSpinLock(&CurrentIsr->Lock); 387 - 388 - CurrentIsr->Count++; 389 - current = CurrentIsr->ListHead.Flink; 390 - 391 - while (current != &CurrentIsr->ListHead) 392 - { 393 - isr = CONTAINING_RECORD(current,KINTERRUPT,InterruptListEntry); 394 - oldlvl = KeAcquireInterruptSpinLock(isr); 395 - if (isr->ServiceRoutine(isr, isr->ServiceContext)) 396 - { 397 - KeReleaseInterruptSpinLock(isr, oldlvl); 398 - break; 399 - } 400 - KeReleaseInterruptSpinLock(isr, oldlvl); 401 - current = current->Flink; 402 - } 403 - KiReleaseSpinLock(&CurrentIsr->Lock); 404 - } 405 - 406 - VOID 407 - KiInterruptDispatch3 (ULONG vector, PKIRQ_TRAPFRAME Trapframe) 408 - /* 409 - * FUNCTION: Calls the irq specific handler for an irq 410 - * ARGUMENTS: 411 - * irq = IRQ that has interrupted 412 - */ 413 - { 414 - KIRQL old_level; 415 - KTRAP_FRAME KernelTrapFrame; 416 - PKTHREAD CurrentThread; 417 - PKTRAP_FRAME OldTrapFrame=NULL; 418 - 419 - /* 420 - * At this point we have interrupts disabled, nothing has been done to 421 - * the PIC. 422 - */ 423 - 424 - KeGetCurrentPrcb()->InterruptCount++; 425 - 426 - /* 427 - * Notify the rest of the kernel of the raised irq level. For the 428 - * default HAL this will send an EOI to the PIC and alter the IRQL. 429 - */ 430 - if (!HalBeginSystemInterrupt (vector, 431 - vector, 432 - &old_level)) 433 - { 434 - return; 435 - } 436 - 437 - 438 - /* 439 - * Enable interrupts 440 - * NOTE: Only higher priority interrupts will get through 441 - */ 442 - _enable(); 443 - 444 - #ifndef CONFIG_SMP 445 - if (vector == 0) 446 - { 447 - KeIRQTrapFrameToTrapFrame(Trapframe, &KernelTrapFrame); 448 - KeUpdateSystemTime(&KernelTrapFrame, old_level, 100000); 449 - } 450 - else 451 - #endif 452 - { 453 - /* 454 - * Actually call the ISR. 455 - */ 456 - KiInterruptDispatch2(vector, old_level); 457 - } 458 - 459 - /* 460 - * End the system interrupt. 461 - */ 462 - _disable(); 463 - 464 - if (old_level==PASSIVE_LEVEL) 465 - { 466 - HalEndSystemInterrupt (APC_LEVEL, 0); 467 - 468 - CurrentThread = KeGetCurrentThread(); 469 - if (CurrentThread!=NULL && CurrentThread->ApcState.UserApcPending) 470 - { 471 - if (CurrentThread->TrapFrame == NULL) 472 - { 473 - OldTrapFrame = CurrentThread->TrapFrame; 474 - KeIRQTrapFrameToTrapFrame(Trapframe, &KernelTrapFrame); 475 - CurrentThread->TrapFrame = &KernelTrapFrame; 476 - } 477 - 478 - _enable(); 479 - KiDeliverApc(UserMode, NULL, NULL); 480 - _disable(); 481 - 482 - ASSERT(KeGetCurrentThread() == CurrentThread); 483 - if (CurrentThread->TrapFrame == &KernelTrapFrame) 484 - { 485 - KeTrapFrameToIRQTrapFrame(&KernelTrapFrame, Trapframe); 486 - CurrentThread->TrapFrame = OldTrapFrame; 487 - } 488 - } 489 - KeLowerIrql(PASSIVE_LEVEL); 490 - } 491 - else 492 - { 493 - HalEndSystemInterrupt (old_level, 0); 494 - } 495 - 496 - } 497 - 498 - static VOID 499 - KeDumpIrqList(VOID) 500 - { 501 - PKINTERRUPT current; 502 - PLIST_ENTRY current_entry; 503 - LONG i, j; 504 - KIRQL oldlvl; 505 - BOOLEAN printed; 506 - 507 - for (i=0;i<NR_TRAPS;i++) 508 - { 509 - printed = FALSE; 510 - KeRaiseIrql(i,&oldlvl); 511 - 512 - for (j=0; j < KeNumberProcessors; j++) 513 - { 514 - KiAcquireSpinLock(&IsrTable[i][j].Lock); 515 - 516 - current_entry = IsrTable[i][j].ListHead.Flink; 517 - current = CONTAINING_RECORD(current_entry,KINTERRUPT,InterruptListEntry); 518 - while (current_entry!=&(IsrTable[i][j].ListHead)) 519 - { 520 - if (printed == FALSE) 521 - { 522 - printed = TRUE; 523 - DPRINT("For irq %x:\n",i); 524 - } 525 - DPRINT(" Isr %x\n",current); 526 - current_entry = current_entry->Flink; 527 - current = CONTAINING_RECORD(current_entry,KINTERRUPT,InterruptListEntry); 528 - } 529 - KiReleaseSpinLock(&IsrTable[i][j].Lock); 530 - } 531 - KeLowerIrql(oldlvl); 532 - } 533 - } 534 - 535 - /* 536 - * @implemented 537 - */ 538 - BOOLEAN 539 - NTAPI 540 - KeConnectInterrupt(PKINTERRUPT InterruptObject) 541 - { 542 - KIRQL oldlvl,synch_oldlvl; 543 - PKINTERRUPT ListHead; 544 - ULONG Vector; 545 - PISR_TABLE CurrentIsr; 546 - BOOLEAN Result; 547 - 548 - DPRINT("KeConnectInterrupt()\n"); 549 - 550 - Vector = InterruptObject->Vector; 551 - 552 - if (Vector < 0 || Vector >= NR_TRAPS) 553 - return FALSE; 554 - 555 - ASSERT (InterruptObject->Number < KeNumberProcessors); 556 - 557 - KeSetSystemAffinityThread(1 << InterruptObject->Number); 558 - 559 - CurrentIsr = &IsrTable[Vector][(ULONG)InterruptObject->Number]; 560 - 561 - KeRaiseIrql(Vector,&oldlvl); 562 - KiAcquireSpinLock(&CurrentIsr->Lock); 563 - 564 - /* 565 - * Check if the vector is already in use that we can share it 566 - */ 567 - if (!IsListEmpty(&CurrentIsr->ListHead)) 568 - { 569 - ListHead = CONTAINING_RECORD(CurrentIsr->ListHead.Flink,KINTERRUPT,InterruptListEntry); 570 - if (InterruptObject->ShareVector == FALSE || ListHead->ShareVector==FALSE) 571 - { 572 - KiReleaseSpinLock(&CurrentIsr->Lock); 573 - KeLowerIrql(oldlvl); 574 - KeRevertToUserAffinityThread(); 575 - return FALSE; 576 - } 577 - } 578 - 579 - synch_oldlvl = KeAcquireInterruptSpinLock(InterruptObject); 580 - 581 - DPRINT("%x %x\n",CurrentIsr->ListHead.Flink, CurrentIsr->ListHead.Blink); 582 - 583 - Result = HalEnableSystemInterrupt(Vector, InterruptObject->Irql, InterruptObject->Mode); 584 - if (Result) 585 - { 586 - InsertTailList(&CurrentIsr->ListHead,&InterruptObject->InterruptListEntry); 587 - DPRINT("%x %x\n",InterruptObject->InterruptListEntry.Flink, InterruptObject->InterruptListEntry.Blink); 588 - } 589 - 590 - InterruptObject->Connected = TRUE; 591 - KeReleaseInterruptSpinLock(InterruptObject, synch_oldlvl); 592 - 593 - /* 594 - * Release the table spinlock 595 - */ 596 - KiReleaseSpinLock(&CurrentIsr->Lock); 597 - KeLowerIrql(oldlvl); 598 - 599 - KeDumpIrqList(); 600 - 601 - KeRevertToUserAffinityThread(); 602 - 603 - return Result; 604 - } 605 - 606 - /* 607 - * @implemented 608 - * 609 - * FUNCTION: Releases a drivers isr 610 - * ARGUMENTS: 611 - * InterruptObject = isr to release 612 - */ 613 - BOOLEAN 614 - NTAPI 615 - KeDisconnectInterrupt(PKINTERRUPT InterruptObject) 616 - { 617 - KIRQL oldlvl,synch_oldlvl; 618 - PISR_TABLE CurrentIsr; 619 - BOOLEAN State; 620 - 621 - DPRINT1("KeDisconnectInterrupt\n"); 622 - ASSERT (InterruptObject->Number < KeNumberProcessors); 623 - 624 - /* Set the affinity */ 625 - KeSetSystemAffinityThread(1 << InterruptObject->Number); 626 - 627 - /* Get the ISR Tabe */ 628 - CurrentIsr = &IsrTable[InterruptObject->Vector] 629 - [(ULONG)InterruptObject->Number]; 630 - 631 - /* Raise IRQL to required level and lock table */ 632 - KeRaiseIrql(InterruptObject->Vector,&oldlvl); 633 - KiAcquireSpinLock(&CurrentIsr->Lock); 634 - 635 - /* Check if it's actually connected */ 636 - if ((State = InterruptObject->Connected)) 637 - { 638 - /* Lock the Interrupt */ 639 - synch_oldlvl = KeAcquireInterruptSpinLock(InterruptObject); 640 - 641 - /* Remove this one, and check if all are gone */ 642 - RemoveEntryList(&InterruptObject->InterruptListEntry); 643 - if (IsListEmpty(&CurrentIsr->ListHead)) 644 - { 645 - /* Completely Disable the Interrupt */ 646 - HalDisableSystemInterrupt(InterruptObject->Vector, InterruptObject->Irql); 647 - } 648 - 649 - /* Disconnect it */ 650 - InterruptObject->Connected = FALSE; 651 - 652 - /* Release the interrupt lock */ 653 - KeReleaseInterruptSpinLock(InterruptObject, synch_oldlvl); 654 - } 655 - /* Release the table spinlock */ 656 - KiReleaseSpinLock(&CurrentIsr->Lock); 657 - KeLowerIrql(oldlvl); 658 - 659 - /* Go back to default affinity */ 660 - KeRevertToUserAffinityThread(); 661 - 662 - /* Return Old Interrupt State */ 663 - return State; 664 - } 665 - 666 - /* 667 - * @implemented 668 - */ 669 - VOID 670 - NTAPI 671 - KeInitializeInterrupt(PKINTERRUPT Interrupt, 672 - PKSERVICE_ROUTINE ServiceRoutine, 673 - PVOID ServiceContext, 674 - PKSPIN_LOCK SpinLock, 675 - ULONG Vector, 676 - KIRQL Irql, 677 - KIRQL SynchronizeIrql, 678 - KINTERRUPT_MODE InterruptMode, 679 - BOOLEAN ShareVector, 680 - CHAR ProcessorNumber, 681 - BOOLEAN FloatingSave) 682 - { 683 - /* Set the Interrupt Header */ 684 - Interrupt->Type = InterruptObject; 685 - Interrupt->Size = sizeof(KINTERRUPT); 686 - 687 - /* Check if we got a spinlock */ 688 - if (SpinLock) 689 - { 690 - Interrupt->ActualLock = SpinLock; 691 - } 692 - else 693 - { 694 - /* This means we'll be usin the built-in one */ 695 - KeInitializeSpinLock(&Interrupt->SpinLock); 696 - Interrupt->ActualLock = &Interrupt->SpinLock; 697 - } 698 - 699 - /* Set the other settings */ 700 - Interrupt->ServiceRoutine = ServiceRoutine; 701 - Interrupt->ServiceContext = ServiceContext; 702 - Interrupt->Vector = Vector; 703 - Interrupt->Irql = Irql; 704 - Interrupt->SynchronizeIrql = SynchronizeIrql; 705 - Interrupt->Mode = InterruptMode; 706 - Interrupt->ShareVector = ShareVector; 707 - Interrupt->Number = ProcessorNumber; 708 - Interrupt->FloatingSave = FloatingSave; 709 - 710 - /* Disconnect it at first */ 711 - Interrupt->Connected = FALSE; 712 - } 713 - 714 - VOID KePrintInterruptStatistic(VOID) 715 - { 716 - LONG i, j; 717 - 718 - for (j = 0; j < KeNumberProcessors; j++) 719 - { 720 - DPRINT1("CPU%d:\n", j); 721 - for (i = 0; i < NR_TRAPS; i++) 722 - { 723 - if (IsrTable[i][j].Count) 724 - { 725 - DPRINT1(" Irq %x(%d): %d\n", i, i, IsrTable[i][j].Count); 726 - } 727 - } 728 - } 729 - } 730 - 731 - BOOLEAN 732 - NTAPI 733 - KeDisableInterrupts(VOID) 734 - { 735 - ULONG Flags = 0; 736 - BOOLEAN Return; 737 - 738 - Flags = __readmsr(); 739 - Return = (Flags & 0x8000) ? TRUE: FALSE; 740 - 741 - /* Disable interrupts */ 742 - _disable(); 743 - return Return; 744 - } 745 - 746 - ULONG 747 - NTAPI 748 - KdpServiceDispatcher(ULONG Service, 749 - PVOID Buffer1, 750 - ULONG Buffer1Length, 751 - KPROCESSOR_MODE PreviousMode); 752 - 753 - typedef ULONG (*PSYSCALL_FUN) 754 - (ULONG,ULONG,ULONG,ULONG,ULONG,ULONG,ULONG,ULONG,ULONG,ULONG); 755 - 756 - VOID 757 - NTAPI 758 - KiSystemService(ppc_trap_frame_t *trap_frame) 759 - { 760 - int i; 761 - PKSYSTEM_ROUTINE SystemRoutine; 762 - PSYSCALL_FUN SyscallFunction; 763 - 764 - switch(trap_frame->gpr[0]) 765 - { 766 - case 0x10000: /* DebugService */ 767 - for( i = 0; i < trap_frame->gpr[5]; i++ ) 768 - { 769 - PearPCDebug(((PCHAR)trap_frame->gpr[4])[i]); 770 - WRITE_PORT_UCHAR((PVOID)0x800003f8, ((PCHAR)trap_frame->gpr[4])[i]); 771 - } 772 - trap_frame->gpr[3] = KdpServiceDispatcher 773 - (trap_frame->gpr[3], 774 - (PCHAR)trap_frame->gpr[4], 775 - trap_frame->gpr[5], 776 - UserMode /*KernelMode*/); 777 - break; 778 - case 0xf0000: /* Thread startup */ 779 - /* XXX how to use UserThread (gpr[6]) */ 780 - SystemRoutine = (PKSYSTEM_ROUTINE)trap_frame->gpr[3]; 781 - SystemRoutine((PKSTART_ROUTINE)trap_frame->gpr[4], 782 - (PVOID)trap_frame->gpr[5]); 783 - break; 784 - 785 - /* Handle a normal system call */ 786 - default: 787 - SyscallFunction = 788 - ((PSYSCALL_FUN*)KeServiceDescriptorTable 789 - [trap_frame->gpr[0] >> 12].Base)[trap_frame->gpr[0] & 0xfff]; 790 - trap_frame->gpr[3] = SyscallFunction 791 - (trap_frame->gpr[3], 792 - trap_frame->gpr[4], 793 - trap_frame->gpr[5], 794 - trap_frame->gpr[6], 795 - trap_frame->gpr[7], 796 - trap_frame->gpr[8], 797 - trap_frame->gpr[9], 798 - trap_frame->gpr[10], 799 - trap_frame->gpr[11], 800 - trap_frame->gpr[12]); 801 - break; 802 - } 803 - } 804 - 805 - /* EOF */
-222
ntoskrnl/ke/powerpc/stubs.c
··· 1 - /* 2 - * PROJECT: ReactOS Kernel 3 - * LICENSE: GPL - See COPYING in the top level directory 4 - * FILE: ntoskrnl/ke/powerpc/stubs.c 5 - * PURPOSE: VDM Support Services 6 - * PROGRAMMERS: Alex Ionescu (alex.ionescu@reactos.org) 7 - */ 8 - 9 - /* INCLUDES ******************************************************************/ 10 - 11 - #include <ntoskrnl.h> 12 - #define NDEBUG 13 - #include <debug.h> 14 - #include <ppcmmu/mmu.h> 15 - 16 - NTSTATUS 17 - NTAPI 18 - NtVdmControl(IN ULONG ControlCode, 19 - IN PVOID ControlData) 20 - { 21 - return STATUS_UNSUCCESSFUL; 22 - } 23 - 24 - NTSTATUS 25 - NTAPI 26 - Ke386CallBios(IN ULONG Int, 27 - OUT PCONTEXT Context) 28 - { 29 - return STATUS_UNSUCCESSFUL; 30 - } 31 - 32 - VOID 33 - NTAPI 34 - KiUnexpectedInterrupt(VOID) 35 - { 36 - } 37 - 38 - LONG NTAPI Exi386InterlockedDecrementLong(PLONG Addend) 39 - { 40 - return _InterlockedDecrement(Addend); 41 - } 42 - 43 - LONG NTAPI Exi386InterlockedIncrementLong(PLONG Addend) 44 - { 45 - return _InterlockedIncrement(Addend); 46 - } 47 - 48 - LONG NTAPI Exi386InterlockedExchangeUlong(PLONG Target, LONG Exch, LONG Compare) 49 - { 50 - return _InterlockedCompareExchange(Target, Exch, Compare); 51 - } 52 - 53 - /* 54 - * @unimplemented 55 - */ 56 - NTSTATUS 57 - NTAPI 58 - KeI386FlatToGdtSelector(IN ULONG Base, 59 - IN USHORT Length, 60 - IN USHORT Selector) 61 - { 62 - UNIMPLEMENTED; 63 - return 0; 64 - } 65 - 66 - /* 67 - * @unimplemented 68 - */ 69 - NTSTATUS 70 - NTAPI 71 - KeI386ReleaseGdtSelectors(OUT PULONG SelArray, 72 - IN ULONG NumOfSelectors) 73 - { 74 - UNIMPLEMENTED; 75 - return 0; 76 - } 77 - 78 - /* 79 - * @unimplemented 80 - */ 81 - NTSTATUS 82 - NTAPI 83 - KeI386AllocateGdtSelectors(OUT PULONG SelArray, 84 - IN ULONG NumOfSelectors) 85 - { 86 - UNIMPLEMENTED; 87 - return 0; 88 - } 89 - 90 - VOID 91 - NTAPI 92 - KeDumpStackFrames(PULONG Frame) 93 - { 94 - } 95 - 96 - LONG 97 - NTAPI 98 - Kei386EoiHelper() { return 0; } 99 - 100 - NTSTATUS 101 - NTAPI 102 - KeUserModeCallback(IN ULONG RoutineIndex, 103 - IN PVOID Argument, 104 - IN ULONG ArgumentLength, 105 - OUT PVOID *Result, 106 - OUT PULONG ResultLength) 107 - { 108 - return STATUS_UNSUCCESSFUL; 109 - } 110 - 111 - VOID 112 - NTAPI 113 - KiCoprocessorError() { } 114 - 115 - VOID 116 - NTAPI 117 - KiDispatchInterrupt() { } 118 - 119 - VOID 120 - NTAPI 121 - KiInitializeUserApc(IN PKEXCEPTION_FRAME ExceptionFrame, 122 - IN PKTRAP_FRAME TrapFrame, 123 - IN PKNORMAL_ROUTINE NormalRoutine, 124 - IN PVOID NormalContext, 125 - IN PVOID SystemArgument1, 126 - IN PVOID SystemArgument2) 127 - { 128 - } 129 - 130 - PVOID 131 - NTAPI 132 - KeSwitchKernelStack(PVOID StackBase, PVOID StackLimit) 133 - { 134 - return NULL; 135 - } 136 - 137 - VOID 138 - NTAPI 139 - KiSwapProcess(struct _KPROCESS *NewProcess, struct _KPROCESS *OldProcess) 140 - { 141 - PEPROCESS EProcess = (PEPROCESS)NewProcess; 142 - MmuSetVsid(0, 8, EProcess ? (ULONG)EProcess->UniqueProcessId : 0); 143 - } 144 - 145 - BOOLEAN 146 - NTAPI 147 - KiSwapContext(PKTHREAD CurrentThread, PKTHREAD NewThread) 148 - { 149 - KeGetPcr()->Prcb->NextThread = NewThread; 150 - __asm__("mtdec %0" : : "r" (1)); 151 - return TRUE; 152 - } 153 - 154 - VOID 155 - NTAPI 156 - KeI386VdmInitialize(VOID) 157 - { 158 - } 159 - 160 - NTSYSAPI 161 - NTSTATUS 162 - NTAPI 163 - NtCallbackReturn 164 - ( IN PVOID Result OPTIONAL, IN ULONG ResultLength, IN NTSTATUS Status ) 165 - { 166 - return STATUS_UNSUCCESSFUL; 167 - } 168 - 169 - NTSYSAPI 170 - NTSTATUS 171 - NTAPI 172 - NtContinue 173 - (IN PCONTEXT ThreadContext, IN BOOLEAN RaiseAlert) 174 - { 175 - return STATUS_UNSUCCESSFUL; 176 - } 177 - 178 - NTSYSAPI 179 - ULONG 180 - NTAPI 181 - NtGetTickCount() { return __rdtsc(); } 182 - 183 - NTSTATUS 184 - NTAPI 185 - NtSetLdtEntries 186 - (ULONG Selector1, LDT_ENTRY LdtEntry1, ULONG Selector2, LDT_ENTRY LdtEntry2) 187 - { 188 - return STATUS_UNSUCCESSFUL; 189 - } 190 - 191 - NTSYSAPI 192 - NTSTATUS 193 - NTAPI 194 - NtRaiseException 195 - (IN PEXCEPTION_RECORD ExceptionRecord, IN PCONTEXT ThreadContext, IN BOOLEAN HandleException ) 196 - { 197 - return STATUS_UNSUCCESSFUL; 198 - } 199 - 200 - void _alldiv() { } 201 - 202 - void _alldvrm() { } 203 - 204 - void _allmul() { } 205 - 206 - void _alloca_probe() { } 207 - 208 - void _allrem() { } 209 - 210 - void _allshl() { } 211 - 212 - void _allshr() { } 213 - 214 - void _aulldiv() { } 215 - 216 - void _aulldvrm() { } 217 - 218 - void _aullrem() { } 219 - 220 - void _aullshr() { } 221 - 222 - void _abnormal_termination() { }
-20
ntoskrnl/ke/powerpc/systimer.c
··· 1 - /* 2 - * PROJECT: ReactOS Kernel 3 - * LICENSE: GPL - See COPYING in the top level directory 4 - * FILE: ntoskrnl/ke/powerpc/systimer.c 5 - * PURPOSE: Kernel Initialization for x86 CPUs 6 - * PROGRAMMERS: Art Yerkes (ayerkes@speakeasy.net) 7 - */ 8 - 9 - /* INCLUDES *****************************************************************/ 10 - 11 - #include <ntoskrnl.h> 12 - #define NDEBUG 13 - #include <debug.h> 14 - 15 - ULONG 16 - NTAPI 17 - KiComputeTimerTableIndex(LONGLONG Timer) 18 - { 19 - return 0; // XXX arty fixme 20 - }
-222
ntoskrnl/ke/powerpc/thrdini.c
··· 1 - /* 2 - * COPYRIGHT: See COPYING in the top level directory 3 - * PROJECT: ReactOS kernel 4 - * FILE: ntoskrnl/ke/powerpc/thrdini.c 5 - * PURPOSE: i386 Thread Context Creation 6 - * PROGRAMMER: Alex Ionescu (alex@relsoft.net) 7 - * arty (ppc adaptation) 8 - */ 9 - 10 - /* INCLUDES ******************************************************************/ 11 - 12 - #include <ntoskrnl.h> 13 - //#define NDEBUG 14 - #include <debug.h> 15 - #include <ndk/powerpc/ketypes.h> 16 - #include <ppcmmu/mmu.h> 17 - 18 - typedef struct _KSWITCHFRAME 19 - { 20 - PVOID ExceptionList; 21 - BOOLEAN ApcBypassDisable; 22 - PVOID RetAddr; 23 - } KSWITCHFRAME, *PKSWITCHFRAME; 24 - 25 - typedef struct _KSTART_FRAME 26 - { 27 - PKSYSTEM_ROUTINE SystemRoutine; 28 - PKSTART_ROUTINE StartRoutine; 29 - PVOID StartContext; 30 - BOOLEAN UserThread; 31 - } KSTART_FRAME, *PKSTART_FRAME; 32 - 33 - typedef struct _KUINIT_FRAME 34 - { 35 - KSWITCHFRAME CtxSwitchFrame; 36 - KSTART_FRAME StartFrame; 37 - KTRAP_FRAME TrapFrame; 38 - FX_SAVE_AREA FxSaveArea; 39 - } KUINIT_FRAME, *PKUINIT_FRAME; 40 - 41 - typedef struct _KKINIT_FRAME 42 - { 43 - KSWITCHFRAME CtxSwitchFrame; 44 - KSTART_FRAME StartFrame; 45 - KTRAP_FRAME TrapFrame; 46 - FX_SAVE_AREA FxSaveArea; 47 - } KKINIT_FRAME, *PKKINIT_FRAME; 48 - 49 - /* FUNCTIONS *****************************************************************/ 50 - 51 - VOID 52 - NTAPI 53 - KiInitializeContextThread(IN PKTHREAD Thread, 54 - IN PKSYSTEM_ROUTINE SystemRoutine, 55 - IN PKSTART_ROUTINE StartRoutine, 56 - IN PVOID StartContext, 57 - IN PCONTEXT ContextPointer) 58 - { 59 - PFX_SAVE_AREA FxSaveArea; 60 - PKSTART_FRAME StartFrame; 61 - PKSWITCHFRAME CtxSwitchFrame; 62 - PKTRAP_FRAME TrapFrame; 63 - CONTEXT LocalContext; 64 - PCONTEXT Context = NULL; 65 - ppc_map_info_t pagemap[16]; 66 - PETHREAD EThread = (PETHREAD)Thread; 67 - PEPROCESS Process = EThread->ThreadsProcess; 68 - ULONG ContextFlags, i, pmsize = sizeof(pagemap) / sizeof(pagemap[0]); 69 - 70 - DPRINT("Thread: %08x ContextPointer: %08x SystemRoutine: %08x StartRoutine: %08x StartContext: %08x\n", 71 - Thread, 72 - ContextPointer, 73 - SystemRoutine, 74 - StartRoutine, 75 - StartContext); 76 - 77 - /* Check if this is a With-Context Thread */ 78 - if (ContextPointer) 79 - { 80 - /* Set up the Initial Frame */ 81 - PKUINIT_FRAME InitFrame; 82 - InitFrame = (PKUINIT_FRAME)((ULONG_PTR)Thread->InitialStack - 83 - sizeof(KUINIT_FRAME)); 84 - 85 - /* Copy over the context we got */ 86 - RtlCopyMemory(&LocalContext, ContextPointer, sizeof(CONTEXT)); 87 - Context = &LocalContext; 88 - ContextFlags = CONTEXT_CONTROL; 89 - 90 - /* Zero out the trap frame and save area */ 91 - RtlZeroMemory(&InitFrame->TrapFrame, 92 - KTRAP_FRAME_LENGTH + sizeof(FX_SAVE_AREA)); 93 - 94 - /* Setup the Fx Area */ 95 - FxSaveArea = &InitFrame->FxSaveArea; 96 - 97 - /* Disable any debug regiseters */ 98 - Context->ContextFlags &= ~CONTEXT_DEBUG_REGISTERS; 99 - 100 - /* Setup the Trap Frame */ 101 - TrapFrame = &InitFrame->TrapFrame; 102 - 103 - /* Set up a trap frame from the context. */ 104 - KeContextToTrapFrame(Context, 105 - NULL, 106 - TrapFrame, 107 - Context->ContextFlags | ContextFlags, 108 - UserMode); 109 - 110 - /* Set the previous mode as user */ 111 - TrapFrame->PreviousMode = UserMode; 112 - 113 - /* Terminate the Exception Handler List */ 114 - RtlZeroMemory(TrapFrame->ExceptionRecord, sizeof(TrapFrame->ExceptionRecord)); 115 - 116 - /* Setup the Stack for KiThreadStartup and Context Switching */ 117 - StartFrame = &InitFrame->StartFrame; 118 - CtxSwitchFrame = &InitFrame->CtxSwitchFrame; 119 - 120 - /* Tell the thread it will run in User Mode */ 121 - Thread->PreviousMode = UserMode; 122 - 123 - /* Tell KiThreadStartup of that too */ 124 - StartFrame->UserThread = TRUE; 125 - 126 - Thread->TrapFrame = TrapFrame; 127 - 128 - DPRINT("Thread %08x Iar %08x Msr %08x Gpr1 %08x Gpr3 %08x\n", 129 - Thread, 130 - TrapFrame->Iar, 131 - TrapFrame->Msr, 132 - TrapFrame->Gpr1, 133 - TrapFrame->Gpr3); 134 - } 135 - else 136 - { 137 - /* Set up the Initial Frame for the system thread */ 138 - PKKINIT_FRAME InitFrame; 139 - InitFrame = (PKKINIT_FRAME)((ULONG_PTR)Thread->InitialStack - 140 - sizeof(KKINIT_FRAME)); 141 - 142 - /* Setup the Fx Area */ 143 - FxSaveArea = &InitFrame->FxSaveArea; 144 - RtlZeroMemory(FxSaveArea, sizeof(FX_SAVE_AREA)); 145 - 146 - /* Setup the Stack for KiThreadStartup and Context Switching */ 147 - StartFrame = &InitFrame->StartFrame; 148 - CtxSwitchFrame = &InitFrame->CtxSwitchFrame; 149 - 150 - /* Tell the thread it will run in Kernel Mode */ 151 - Thread->PreviousMode = KernelMode; 152 - 153 - /* Tell KiThreadStartup of that too */ 154 - StartFrame->UserThread = FALSE; 155 - 156 - /* Setup the Trap Frame */ 157 - TrapFrame = &InitFrame->TrapFrame; 158 - Thread->TrapFrame = TrapFrame; 159 - 160 - TrapFrame->OldIrql = PASSIVE_LEVEL; 161 - TrapFrame->Iar = (ULONG)SystemRoutine; 162 - TrapFrame->Msr = 0xb030; 163 - TrapFrame->Gpr1 = ((ULONG)&InitFrame->StartFrame) - 0x200; 164 - TrapFrame->Gpr3 = (ULONG)StartRoutine; 165 - TrapFrame->Gpr4 = (ULONG)StartContext; 166 - __asm__("mr %0,13" : "=r" (((PULONG)&TrapFrame->Gpr0)[13])); 167 - 168 - DPRINT("Thread %08x Iar %08x Msr %08x Gpr1 %08x Gpr3 %08x\n", 169 - Thread, 170 - TrapFrame->Iar, 171 - TrapFrame->Msr, 172 - TrapFrame->Gpr1, 173 - TrapFrame->Gpr3); 174 - } 175 - 176 - /* Now setup the remaining data for KiThreadStartup */ 177 - StartFrame->StartContext = StartContext; 178 - StartFrame->StartRoutine = StartRoutine; 179 - StartFrame->SystemRoutine = SystemRoutine; 180 - 181 - /* And set up the Context Switch Frame */ 182 - CtxSwitchFrame->RetAddr = KiThreadStartup; 183 - CtxSwitchFrame->ApcBypassDisable = TRUE; 184 - CtxSwitchFrame->ExceptionList = EXCEPTION_CHAIN_END; 185 - 186 - /* Save back the new value of the kernel stack. */ 187 - Thread->KernelStack = (PVOID)CtxSwitchFrame; 188 - 189 - /* If we're the first thread of the new process, copy the top 16 pages 190 - * from process 0 */ 191 - if (Process && IsListEmpty(&Process->ThreadListHead)) 192 - { 193 - DPRINT("First Thread in Process %x\n", Process); 194 - MmuAllocVsid((ULONG)Process->UniqueProcessId, 0xff); 195 - 196 - for (i = 0; i < pmsize; i++) 197 - { 198 - pagemap[i].proc = 0; 199 - pagemap[i].addr = 0x7fff0000 + (i * PAGE_SIZE); 200 - } 201 - 202 - MmuInqPage(pagemap, pmsize); 203 - 204 - for (i = 0; i < pmsize; i++) 205 - { 206 - if (pagemap[i].phys) 207 - { 208 - pagemap[i].proc = (ULONG)Process->UniqueProcessId; 209 - pagemap[i].phys = 0; 210 - MmuMapPage(&pagemap[i], 1); 211 - DPRINT("Added map to the new process: P %08x A %08x\n", 212 - pagemap[i].proc, pagemap[i].addr); 213 - } 214 - } 215 - 216 - DPRINT("Did additional aspace setup in the new process\n"); 217 - } 218 - } 219 - 220 - /* EOF */ 221 - 222 -
-470
ntoskrnl/mm/powerpc/page.c
··· 1 - /* 2 - * COPYRIGHT: See COPYING in the top level directory 3 - * PROJECT: ReactOS kernel 4 - * FILE: ntoskrnl/mm/powerpc/page.c 5 - * PURPOSE: Low level memory managment manipulation 6 - * 7 - * PROGRAMMERS: David Welch (welch@cwcom.net) 8 - * Revised for PowerPC by arty 9 - */ 10 - 11 - /* INCLUDES ***************************************************************/ 12 - 13 - #include <ntoskrnl.h> 14 - #include <ppcmmu/mmu.h> 15 - //#define NDEBUG 16 - #include <debug.h> 17 - 18 - /* GLOBALS *****************************************************************/ 19 - 20 - #define HYPERSPACE_PAGEDIR_PTR ((PVOID)0xc0000000) 21 - 22 - #define PA_PRESENT (1ll<<63) 23 - #define PA_USER (1ll<<62) 24 - #define PA_ACCESSED 0x200 25 - #define PA_DIRTY 0x100 26 - #define PA_WT 0x20 27 - #define PA_CD 0x10 28 - #define PA_READWRITE 3 29 - 30 - #define HYPERSPACE (0xc0400000) 31 - #define IS_HYPERSPACE(v) (((ULONG)(v) >= HYPERSPACE && (ULONG)(v) < HYPERSPACE + 0x400000)) 32 - 33 - #define PTE_TO_PFN(X) ((X) >> PAGE_SHIFT) 34 - #define PFN_TO_PTE(X) ((X) << PAGE_SHIFT) 35 - 36 - #if defined(__GNUC__) 37 - #define PTE_TO_PAGE(X) ((LARGE_INTEGER)(LONGLONG)(PAGE_MASK(X))) 38 - #else 39 - __inline LARGE_INTEGER PTE_TO_PAGE(ULONG npage) 40 - { 41 - LARGE_INTEGER dummy; 42 - dummy.QuadPart = (LONGLONG)(PAGE_MASK(npage)); 43 - return dummy; 44 - } 45 - #endif 46 - 47 - /* FUNCTIONS ***************************************************************/ 48 - 49 - VOID 50 - NTAPI 51 - MiFlushTlbIpiRoutine(PVOID Address) 52 - { 53 - if (Address == (PVOID)0xffffffff) 54 - { 55 - __asm__("tlbsync"); 56 - } 57 - else if (Address == (PVOID)0xfffffffe) 58 - { 59 - __asm__("tlbsync"); 60 - } 61 - else 62 - { 63 - __asm__("tlbi %0" : "=r" (Address)); 64 - } 65 - } 66 - 67 - VOID 68 - MiFlushTlb(PULONG Pt, PVOID Address) 69 - { 70 - __asm__("tlbi %0" : "=r" (Address)); 71 - } 72 - 73 - static ULONG 74 - ProtectToFlags(ULONG flProtect) 75 - { 76 - return MMU_ALL_RW; // XXX hack 77 - } 78 - 79 - NTSTATUS 80 - NTAPI 81 - MmCopyMmInfo(PEPROCESS Src, 82 - PEPROCESS Dest, 83 - PPHYSICAL_ADDRESS DirectoryTableBase) 84 - { 85 - DPRINT("MmCopyMmInfo(Src %x, Dest %x)\n", Src, Dest); 86 - 87 - ASSERT(FALSE); 88 - 89 - return(STATUS_SUCCESS); 90 - } 91 - 92 - BOOLEAN 93 - NTAPI 94 - MmCreateProcessAddressSpace(IN ULONG MinWs, 95 - IN PEPROCESS Process, 96 - IN PLARGE_INTEGER DirectoryTableBase) 97 - { 98 - ASSERT(FALSE); 99 - return TRUE; 100 - } 101 - 102 - VOID 103 - NTAPI 104 - MmDeletePageTable(PEPROCESS Process, PVOID Address) 105 - { 106 - PEPROCESS CurrentProcess = PsGetCurrentProcess(); 107 - 108 - DPRINT1("DeletePageTable: Process: %x CurrentProcess %x\n", 109 - Process, CurrentProcess); 110 - 111 - if (Process != NULL && Process != CurrentProcess) 112 - { 113 - KeAttachProcess(&Process->Pcb); 114 - } 115 - 116 - if (Process) 117 - { 118 - DPRINT1("Revoking VSID %d\n", (paddr_t)Process->UniqueProcessId); 119 - MmuRevokeVsid((paddr_t)Process->UniqueProcessId, -1); 120 - } 121 - else 122 - { 123 - DPRINT1("No vsid to revoke\n"); 124 - } 125 - 126 - if (Process != NULL && Process != CurrentProcess) 127 - { 128 - KeDetachProcess(); 129 - } 130 - } 131 - 132 - VOID 133 - NTAPI 134 - MmFreePageTable(PEPROCESS Process, PVOID Address) 135 - { 136 - MmDeletePageTable(Process, Address); 137 - } 138 - 139 - PVOID 140 - NTAPI 141 - MmGetPhysicalAddressProcess(PEPROCESS Process, PVOID Addr) 142 - { 143 - ppc_map_info_t info = { 0 }; 144 - info.proc = Process ? (int)Process->UniqueProcessId : 0; 145 - info.addr = (vaddr_t)Addr; 146 - MmuInqPage(&info, 1); 147 - return (PVOID)info.phys; 148 - } 149 - 150 - PFN_NUMBER 151 - NTAPI 152 - MmGetPfnForProcess(PEPROCESS Process, 153 - PVOID Address) 154 - { 155 - return((PFN_NUMBER)MmGetPhysicalAddressProcess(Process, Address) >> PAGE_SHIFT); 156 - } 157 - 158 - VOID 159 - NTAPI 160 - MmDeleteVirtualMapping(PEPROCESS Process, PVOID Address, 161 - BOOLEAN* WasDirty, PPFN_NUMBER Page) 162 - /* 163 - * FUNCTION: Delete a virtual mapping 164 - */ 165 - { 166 - ppc_map_info_t info = { 0 }; 167 - 168 - DPRINT("MmDeleteVirtualMapping(%x, %x, %d, %x, %x)\n", 169 - Process, Address, WasDirty, Page); 170 - 171 - info.proc = Process ? (int)Process->UniqueProcessId : 0; 172 - info.addr = (vaddr_t)Address; 173 - MmuInqPage(&info, 1); 174 - 175 - /* 176 - * Return some information to the caller 177 - */ 178 - if (WasDirty != NULL) 179 - { 180 - *WasDirty = !!(info.flags & MMU_PAGE_DIRTY); 181 - } 182 - if (Page != NULL) 183 - { 184 - *Page = info.phys >> PAGE_SHIFT; 185 - } 186 - } 187 - 188 - VOID 189 - NTAPI 190 - MmDeletePageFileMapping(PEPROCESS Process, PVOID Address, 191 - SWAPENTRY* SwapEntry) 192 - /* 193 - * FUNCTION: Delete a virtual mapping 194 - */ 195 - { 196 - ppc_map_info_t info = { 0 }; 197 - /* 198 - * Decrement the reference count for this page table. 199 - */ 200 - if (Process != NULL && 201 - ((PMADDRESS_SPACE)&Process->VadRoot)->PageTableRefCountTable != NULL && 202 - Address < MmSystemRangeStart) 203 - { 204 - PUSHORT Ptrc; 205 - 206 - Ptrc = ((PMADDRESS_SPACE)&Process->VadRoot)->PageTableRefCountTable; 207 - MmFreePageTable(Process, Address); 208 - } 209 - 210 - /* 211 - * Return some information to the caller 212 - */ 213 - MmuInqPage(&info, 1); 214 - *SwapEntry = info.phys; 215 - } 216 - 217 - BOOLEAN 218 - NTAPI 219 - MmIsDirtyPage(PEPROCESS Process, PVOID Address) 220 - { 221 - ppc_map_info_t info = { 0 }; 222 - info.proc = Process ? (int)Process->UniqueProcessId : 0; 223 - info.addr = (vaddr_t)Address; 224 - MmuInqPage(&info, 1); 225 - return !!(info.flags & MMU_PAGE_DIRTY); 226 - } 227 - 228 - VOID 229 - NTAPI 230 - MmSetCleanPage(PEPROCESS Process, PVOID Address) 231 - { 232 - } 233 - 234 - VOID 235 - NTAPI 236 - MmSetDirtyPage(PEPROCESS Process, PVOID Address) 237 - { 238 - } 239 - 240 - BOOLEAN 241 - NTAPI 242 - MmIsPagePresent(PEPROCESS Process, PVOID Address) 243 - { 244 - ppc_map_info_t info = { 0 }; 245 - info.proc = Process ? (int)Process->UniqueProcessId : 0; 246 - info.addr = (vaddr_t)Address; 247 - MmuInqPage(&info, 1); 248 - return !!info.phys; 249 - } 250 - 251 - ULONGLONG MmGetPageEntryForProcess(PEPROCESS Process, PVOID Address) 252 - { 253 - return 0; // XXX arty 254 - } 255 - 256 - BOOLEAN 257 - NTAPI 258 - MmIsPageSwapEntry(PEPROCESS Process, PVOID Address) 259 - { 260 - ULONG Entry; 261 - Entry = MmGetPageEntryForProcess(Process, Address); 262 - return !(Entry & PA_PRESENT) && Entry != 0 ? TRUE : FALSE; 263 - } 264 - 265 - NTSTATUS 266 - NTAPI 267 - MmCreatePageFileMapping(PEPROCESS Process, 268 - PVOID Address, 269 - SWAPENTRY SwapEntry) 270 - { 271 - if (Process == NULL && Address < MmSystemRangeStart) 272 - { 273 - DPRINT1("No process\n"); 274 - ASSERT(FALSE); 275 - } 276 - if (Process != NULL && Address >= MmSystemRangeStart) 277 - { 278 - DPRINT1("Setting kernel address with process context\n"); 279 - ASSERT(FALSE); 280 - } 281 - if (SwapEntry & (1 << 31)) 282 - { 283 - ASSERT(FALSE); 284 - } 285 - 286 - // XXX arty 287 - 288 - return(STATUS_SUCCESS); 289 - } 290 - 291 - 292 - NTSTATUS 293 - NTAPI 294 - MmCreateVirtualMappingUnsafe(PEPROCESS Process, 295 - PVOID Address, 296 - ULONG flProtect, 297 - PPFN_NUMBER Pages, 298 - ULONG PageCount) 299 - { 300 - ULONG Attributes; 301 - PVOID Addr; 302 - ULONG i; 303 - ppc_map_info_t info = { 0 }; 304 - 305 - DPRINT("MmCreateVirtualMappingUnsafe(%x, %x, %x, %x (%x), %d)\n", 306 - Process, Address, flProtect, Pages, *Pages, PageCount); 307 - 308 - if (Process == NULL) 309 - { 310 - if (Address < MmSystemRangeStart) 311 - { 312 - DPRINT1("No process\n"); 313 - ASSERT(FALSE); 314 - } 315 - if (PageCount > 0x10000 || 316 - (ULONG_PTR) Address / PAGE_SIZE + PageCount > 0x100000) 317 - { 318 - DPRINT1("Page count to large\n"); 319 - ASSERT(FALSE); 320 - } 321 - } 322 - else 323 - { 324 - if (Address >= MmSystemRangeStart) 325 - { 326 - DPRINT1("Setting kernel address with process context\n"); 327 - ASSERT(FALSE); 328 - } 329 - if (PageCount > (ULONG_PTR)MmSystemRangeStart / PAGE_SIZE || 330 - (ULONG_PTR) Address / PAGE_SIZE + PageCount > 331 - (ULONG_PTR)MmSystemRangeStart / PAGE_SIZE) 332 - { 333 - DPRINT1("Page Count to large\n"); 334 - ASSERT(FALSE); 335 - } 336 - } 337 - 338 - Attributes = ProtectToFlags(flProtect); 339 - Addr = Address; 340 - 341 - for (i = 0; i < PageCount; i++, Addr = (PVOID)((ULONG_PTR)Addr + PAGE_SIZE)) 342 - { 343 - Process = PsGetCurrentProcess(); 344 - info.proc = ((Addr < MmSystemRangeStart) && Process) ? 345 - (int)Process->UniqueProcessId : 0; 346 - info.addr = (vaddr_t)Addr; 347 - info.flags = Attributes; 348 - MmuMapPage(&info, 1); 349 - //(void)InterlockedExchangeUL(Pt, PFN_TO_PTE(Pages[i]) | Attributes); 350 - if (Address < MmSystemRangeStart && 351 - ((PMADDRESS_SPACE)&Process->VadRoot)->PageTableRefCountTable != NULL && 352 - Attributes & PA_PRESENT) 353 - { 354 - #if 0 355 - PUSHORT Ptrc; 356 - 357 - Ptrc = ((PMADDRESS_SPACE)&Process->VadRoot)->PageTableRefCountTable; 358 - 359 - Ptrc[ADDR_TO_PAGE_TABLE(Addr)]++; 360 - #endif 361 - } 362 - } 363 - return(STATUS_SUCCESS); 364 - } 365 - 366 - NTSTATUS 367 - NTAPI 368 - MmCreateVirtualMapping(PEPROCESS Process, 369 - PVOID Address, 370 - ULONG flProtect, 371 - PPFN_NUMBER Pages, 372 - ULONG PageCount) 373 - { 374 - ULONG i; 375 - 376 - for (i = 0; i < PageCount; i++) 377 - { 378 - if (!MmIsUsablePage(Pages[i])) 379 - { 380 - DPRINT1("Page at address %x not usable\n", PFN_TO_PTE(Pages[i])); 381 - ASSERT(FALSE); 382 - } 383 - } 384 - 385 - return(MmCreateVirtualMappingUnsafe(Process, 386 - Address, 387 - flProtect, 388 - Pages, 389 - PageCount)); 390 - } 391 - 392 - ULONG 393 - NTAPI 394 - MmGetPageProtect(PEPROCESS Process, PVOID Address) 395 - { 396 - ULONG Protect = 0; 397 - ppc_map_info_t info = { 0 }; 398 - 399 - info.proc = Process ? (int)Process->UniqueProcessId : 0; 400 - info.addr = (vaddr_t)Address; 401 - MmuInqPage(&info, 1); 402 - 403 - if (!info.phys) { return PAGE_NOACCESS; } 404 - if (!(info.flags & MMU_KMASK)) 405 - { 406 - Protect |= PAGE_SYSTEM; 407 - if ((info.flags & MMU_KR) && (info.flags & MMU_KW)) 408 - Protect = PAGE_READWRITE; 409 - else if (info.flags & MMU_KR) 410 - Protect = PAGE_EXECUTE_READ; 411 - } 412 - else 413 - { 414 - if ((info.flags & MMU_UR) && (info.flags & MMU_UW)) 415 - Protect = PAGE_READWRITE; 416 - else 417 - Protect = PAGE_EXECUTE_READ; 418 - } 419 - return(Protect); 420 - } 421 - 422 - VOID 423 - NTAPI 424 - MmSetPageProtect(PEPROCESS Process, PVOID Address, ULONG flProtect) 425 - { 426 - //ULONG Attributes = 0; 427 - 428 - DPRINT("MmSetPageProtect(Process %x Address %x flProtect %x)\n", 429 - Process, Address, flProtect); 430 - 431 - #if 0 432 - Attributes = ProtectToPTE(flProtect); 433 - 434 - Pt = MmGetPageTableForProcess(Process, Address, FALSE); 435 - if (Pt == NULL) 436 - { 437 - ASSERT(FALSE); 438 - } 439 - InterlockedExchange((PLONG)Pt, PAGE_MASK(*Pt) | Attributes | (*Pt & (PA_ACCESSED|PA_DIRTY))); 440 - MiFlushTlb(Pt, Address); 441 - #endif 442 - } 443 - 444 - CODE_SEG("INIT") 445 - VOID 446 - NTAPI 447 - MmInitGlobalKernelPageDirectory(VOID) 448 - { 449 - } 450 - 451 - /* Create a simple, primitive mapping at the specified address on a new page */ 452 - NTSTATUS MmPPCCreatePrimitiveMapping(ULONG_PTR PageAddr) 453 - { 454 - NTSTATUS result; 455 - ppc_map_info_t info = { 0 }; 456 - info.flags = MMU_KRW; 457 - info.addr = (vaddr_t)PageAddr; 458 - result = MmuMapPage(&info, 1) ? STATUS_SUCCESS : STATUS_NO_MEMORY; 459 - return result; 460 - } 461 - 462 - /* Use our primitive allocator */ 463 - PFN_NUMBER MmPPCPrimitiveAllocPage() 464 - { 465 - paddr_t Result = MmuGetPage(); 466 - DbgPrint("Got Page %x\n", Result); 467 - return Result / PAGE_SIZE; 468 - } 469 - 470 - /* EOF */
-111
ntoskrnl/mm/powerpc/pfault.c
··· 1 - /* 2 - * COPYRIGHT: See COPYING in the top level directory 3 - * PROJECT: ReactOS kernel 4 - * FILE: ntoskrnl/mm/powerpc/pfault.c 5 - * PURPOSE: Paging file functions 6 - * 7 - * PROGRAMMERS: David Welch (welch@mcmail.com) 8 - */ 9 - 10 - /* INCLUDES *****************************************************************/ 11 - 12 - #include <ntoskrnl.h> 13 - #define NDEBUG 14 - #include <debug.h> 15 - #include <ppcmmu/mmu.h> 16 - 17 - /* EXTERNS *******************************************************************/ 18 - 19 - NTSTATUS 20 - NTAPI 21 - MmNotPresentFault(KPROCESSOR_MODE Mode, 22 - ULONG_PTR Address, 23 - BOOLEAN FromMdl); 24 - extern ULONG KiKernelTrapHandler(PKTRAP_FRAME Tf, ULONG ExceptionNr, PVOID Cr2); 25 - 26 - /* FUNCTIONS *****************************************************************/ 27 - 28 - VOID MmpPpcTrapFrameToTrapFrame(ppc_trap_frame_t *frame, PKTRAP_FRAME Tf) 29 - { 30 - RtlCopyMemory(&Tf->Gpr0, frame->gpr, 12 * sizeof(ULONG)); 31 - Tf->Lr = frame->lr; 32 - Tf->Cr = frame->cr; 33 - Tf->Ctr = frame->ctr; 34 - Tf->Xer = frame->xer; 35 - Tf->Iar = frame->srr0; 36 - Tf->Msr = frame->srr1 & 0xffff; 37 - Tf->Dr0 = frame->dar; 38 - Tf->Dr1 = frame->dsisr; 39 - } 40 - 41 - void CopyFrame(int *oldframe, int *ourframe) 42 - { 43 - int i; 44 - 45 - for (i = 0; i < sizeof(ppc_trap_frame_t) / sizeof(int); i++) 46 - { 47 - ourframe[i] = GetPhys((int)&oldframe[i]); 48 - } 49 - } 50 - 51 - void KiPageFaultHandler(int trap, ppc_trap_frame_t *frame) 52 - { 53 - NTSTATUS Status = STATUS_SUCCESS; 54 - KPROCESSOR_MODE Mode; 55 - EXCEPTION_RECORD Er; 56 - KTRAP_FRAME Tf; 57 - BOOLEAN AccessFault = !!(frame->dsisr & (1<<28)); 58 - vaddr_t VirtualAddr; 59 - PVOID TrapInfo = NULL; 60 - 61 - /* get the faulting address */ 62 - if (trap == 4) /* Instruction miss */ 63 - VirtualAddr = frame->srr0; 64 - else /* Data miss */ 65 - VirtualAddr = frame->dar; 66 - 67 - /* MSR_PR */ 68 - Mode = frame->srr1 & 0x4000 ? UserMode : KernelMode; 69 - DPRINT("Page Fault at %08x\n", frame->srr0); 70 - 71 - /* handle the fault */ 72 - if (AccessFault) 73 - { 74 - Status = MmAccessFault(Mode, (PVOID)VirtualAddr, FALSE, TrapInfo); 75 - } 76 - else 77 - { 78 - Status = MmNotPresentFault(Mode, VirtualAddr, FALSE); 79 - } 80 - 81 - if (NT_SUCCESS(Status)) 82 - { 83 - MmuCallbackRet(); 84 - } 85 - 86 - if (KeGetCurrentThread()->ApcState.UserApcPending) 87 - { 88 - KIRQL oldIrql; 89 - 90 - KeRaiseIrql(APC_LEVEL, &oldIrql); 91 - KiDeliverApc(UserMode, NULL, NULL); 92 - KeLowerIrql(oldIrql); 93 - } 94 - 95 - MmpPpcTrapFrameToTrapFrame(frame, &Tf); 96 - 97 - Er.ExceptionCode = STATUS_ACCESS_VIOLATION; 98 - Er.ExceptionFlags = 0; 99 - Er.ExceptionRecord = NULL; 100 - Er.ExceptionAddress = (PVOID)frame->srr0; 101 - Er.NumberParameters = 2; 102 - Er.ExceptionInformation[0] = AccessFault; 103 - Er.ExceptionInformation[1] = VirtualAddr; 104 - 105 - /* FIXME: Which exceptions are noncontinuable? */ 106 - Er.ExceptionFlags = 0; 107 - 108 - KiDispatchException(&Er, 0, &Tf, Mode, TRUE); 109 - MmuCallbackRet(); 110 - } 111 -
-16
ntoskrnl/ntos.cmake
··· 370 370 ${REACTOS_SOURCE_DIR}/ntoskrnl/mm/ARM3/arm/init.c 371 371 ${REACTOS_SOURCE_DIR}/ntoskrnl/ps/arm/psctx.c 372 372 ${REACTOS_SOURCE_DIR}/ntoskrnl/rtl/arm/rtlexcpt.c) 373 - elseif(ARCH STREQUAL "powerpc") 374 - list(APPEND ASM_SOURCE 375 - ${REACTOS_SOURCE_DIR}/ntoskrnl/ke/powerpc/main_asm.S 376 - ${REACTOS_SOURCE_DIR}/ntoskrnl/ke/powerpc/ctxhelp.S) 377 - list(APPEND SOURCE 378 - ${REACTOS_SOURCE_DIR}/ntoskrnl/config/powerpc/cmhardwr.c 379 - ${REACTOS_SOURCE_DIR}/ntoskrnl/ke/powerpc/cpu.c 380 - ${REACTOS_SOURCE_DIR}/ntoskrnl/ke/powerpc/exp.c 381 - ${REACTOS_SOURCE_DIR}/ntoskrnl/ke/powerpc/kiinit.c 382 - ${REACTOS_SOURCE_DIR}/ntoskrnl/ke/powerpc/ppc_irq.c 383 - ${REACTOS_SOURCE_DIR}/ntoskrnl/ke/powerpc/stubs.c 384 - ${REACTOS_SOURCE_DIR}/ntoskrnl/ke/powerpc/systimer.c 385 - ${REACTOS_SOURCE_DIR}/ntoskrnl/ke/powerpc/thrdini.c 386 - ${REACTOS_SOURCE_DIR}/ntoskrnl/ke/powerpc/ctxswitch.c 387 - ${REACTOS_SOURCE_DIR}/ntoskrnl/mm/powerpc/pfault.c 388 - ${REACTOS_SOURCE_DIR}/ntoskrnl/mm/powerpc/page.c) 389 373 endif() 390 374 391 375 if(NOT _WINKD_)
-277
sdk/include/reactos/libs/ppcmmu/mmu.h
··· 1 - #ifndef PPCMMU_H 2 - #define PPCMMU_H 3 - 4 - #include <string.h> 5 - 6 - /* PPC MMU object -- 7 - * Always called from kernel mode, maps the first 16 megabytes and uses 16 8 - * bytes per page between 0x30000 and 16 megs. Maximum memory size is 3 gig. 9 - * 10 - * Physical Memory Map: 11 - * 0x00300 -- Data Miss 12 - * 0x00400 -- Code Miss 13 - * 0x10000 -- MMU ucode 14 - * 0x20000 -- PTEG 15 - * 0x30000 -- Full map 16 - * 17 - * Actions: 18 - * 19 - * 1** -- MMU Related 20 - * 21 - * 100 -- Initialize 22 - * -- No arguments 23 - * 101 -- Map page 24 - * r4 -- virtual address 25 - * r5 -- ppc_map_info_t 26 - * 102 -- Erase page 27 - * r4 -- virtual address 28 - * 103 -- Set segment VSID 29 - * r4 -- Start seg 30 - * r5 -- End seg 31 - * r6 -- Vsid 32 - * 104 -- Set trap callback 33 - * r4 -- Trap number 34 - * r5 -- Callback address (VA) 35 - * 105 -- Query page 36 - * r4 -- Page addr 37 - * r5 -- Address of info struct 38 - * 106 -- Unit Test 39 - * 107 -- Turn on paging 40 - * 108 -- Unmap process 41 - * 109 -- Get lowest unallocated page 42 - * 10a -- Alloc vsid 43 - * 10b -- Revoke vsid 44 - * 10c -- Allocate a page and return it 45 - * 10d -- Return from trap callback 46 - * 10e -- Dump Map 47 - * 48 - * 2** -- Debug Stub and Interrupt Vectoring 49 - * 50 - * 200 -- GDB Initialize 51 - * r4 -- Device type 52 - * r4 -- Serial port addr 53 - * 201 -- GDB Enter 54 - * r4 -- Signal number 55 - */ 56 - 57 - #define MMUCODE 0x10000 58 - #define HTABORG 0x20000 59 - #define HTABSIZ 0x10000 60 - #define PAGETAB 0x30000 61 - 62 - #define PpcHashedPTE ((ppc_pteg_t*)(HTABORG)) 63 - #define PpcPageTable ((ppc_map_t*)(PAGETAB)) 64 - 65 - #define PPC_PAGE_ADDR(x) ((x) << 12) 66 - #define PPC_PAGE_NUMBER(x) ((x) >> 12) 67 - #define PPC_VSID_MASK 0xffffff 68 - #define PPC_PAGE_MASK 0xfff 69 - 70 - #define MMU_NONE 0 71 - #define MMU_KR 8 72 - #define MMU_KW 4 73 - #define MMU_UR 2 74 - #define MMU_UW 1 75 - #define MMU_ALL_R 10 76 - #define MMU_KRW 12 77 - #define MMU_KRW_UR 14 78 - #define MMU_ALL_RW 15 79 - 80 - #define MMU_PAGE_ACCESS 0x40000000 81 - #define MMU_PAGE_DIRTY 0x80000000 82 - 83 - #define MMU_KMASK 12 84 - #define MMU_UMASK 3 85 - 86 - extern char _binary_mmucode_start[], _binary_mmucode_end[]; 87 - 88 - /* thanks geist */ 89 - typedef unsigned long paddr_t; 90 - typedef unsigned long vaddr_t; 91 - 92 - typedef struct _ppc_pte_t { 93 - unsigned long pteh, ptel; 94 - } ppc_pte_t; 95 - 96 - typedef struct _ppc_pteg_t { 97 - ppc_pte_t block[8]; 98 - } ppc_pteg_t; 99 - 100 - typedef struct _ppc_map_t { 101 - ppc_pte_t pte; 102 - unsigned long proc; 103 - vaddr_t addr; 104 - } ppc_map_t; 105 - 106 - typedef struct _ppc_map_info_t { 107 - unsigned long flags, proc; 108 - vaddr_t addr; 109 - paddr_t phys; 110 - } ppc_map_info_t; 111 - 112 - typedef struct _ppc_trap_frame_t { 113 - unsigned long gpr[32]; 114 - unsigned long long fpr[32]; 115 - unsigned long srr0, srr1, cr, lr, ctr, dsisr, dar, xer; 116 - } ppc_trap_frame_t; 117 - 118 - typedef int (*MmuTrapHandler)(int trapid, ppc_trap_frame_t *trap); 119 - 120 - #include "mmuutil.h" 121 - 122 - static inline int PPCMMU(int action, void *arg1, void *arg2, void *arg3) 123 - { 124 - /* Set Bat0 to mmu object address */ 125 - int i, batu, batl, usebat[2] = { 0, 1 }, gotbat = 0, pc, mask; 126 - volatile int ret; 127 - int (*mmumain)(int action, void *arg1, void *arg2, void *arg3) = (void *)MMUCODE; 128 - __asm__("bl 1f\n\t" 129 - "\n1:\n\t" 130 - "mflr %0\n\t" : "=r" (pc)); 131 - 132 - for(i = 0, gotbat = 0; i < 4; i++) 133 - { 134 - /* Use the space above the trap handlers to store the old bats */ 135 - GetBat(i, 0, &batu, &batl); 136 - 137 - SetPhys(0xf000 + i * 16, batu); 138 - SetPhys(0xf004 + i * 16, batl); 139 - 140 - GetBat(i, 1, &batu, &batl); 141 - 142 - SetPhys(0xf008 + i * 16, batu); 143 - SetPhys(0xf00c + i * 16, batl); 144 - 145 - if (gotbat < 2) 146 - { 147 - if(batu & 0xffc) 148 - { 149 - mask = ~(0x1ffff | ((batu & 0xffc)>>2)<<17); 150 - if(!(batu & 2) || ((batu & mask) != (pc & mask))) 151 - usebat[gotbat++] = i; 152 - } else { 153 - mask = ~(0x1ffff | (batl << 17)); 154 - if(!(batl & 0x40) || ((batu & mask) != (pc & mask))) 155 - usebat[gotbat++] = i; 156 - } 157 - } 158 - } 159 - 160 - batu = 0xff; 161 - batl = 0x7f; 162 - SetBat(usebat[0], 0, batu, batl); 163 - SetBat(usebat[0], 1, batu, batl); 164 - batu += 8192 * 1024; 165 - batl += 8192 * 1024; 166 - SetBat(usebat[1], 0, batu, batl); 167 - SetBat(usebat[1], 1, batu, batl); 168 - 169 - ret = mmumain(action, arg1, arg2, arg3); 170 - 171 - return ret; 172 - } 173 - 174 - /* Expand this only if used ... That makes dependence on libmmu_code.a depend 175 - * on whether MmuInit is called in a clean way. 176 - */ 177 - #define MmuInit() _MmuInit(&_binary_mmucode_start, &_binary_mmucode_end) 178 - 179 - /* Copy in the mmu code and call init 180 - * This bootstrap should only be called the first time (i.e. in the bootloader 181 - * or the early boot code). Part of the purpose of this library is to 182 - * eliminate the need to do a complex mmu handoff between boot stages. 183 - */ 184 - static inline void _MmuInit(void *_start, void *_end) 185 - { 186 - int target = MMUCODE, copy; 187 - int *start = (int *)_start; 188 - while(start < (int *)_end) 189 - { 190 - memcpy(&copy, start++, sizeof(int)); 191 - SetPhys(target, copy); 192 - target += sizeof(int); 193 - } 194 - PPCMMU(0x100, 0, 0, 0); 195 - } 196 - 197 - static inline int MmuMapPage(ppc_map_info_t *info, int count) 198 - { 199 - return PPCMMU(0x101, info, (void *)count, 0); 200 - } 201 - 202 - static inline void MmuUnmapPage(ppc_map_info_t *info, int count) 203 - { 204 - PPCMMU(0x102, info, (void *)count, 0); 205 - } 206 - 207 - static inline void MmuSetVsid(int start, int end, int vsid) 208 - { 209 - PPCMMU(0x103, (void *)start, (void *)end, (void *)vsid); 210 - } 211 - 212 - static inline MmuTrapHandler MmuSetTrapHandler(int trap, MmuTrapHandler cb) 213 - { 214 - return (MmuTrapHandler)PPCMMU(0x104, (void *)trap, (void *)cb, 0); 215 - } 216 - 217 - static inline void MmuInqPage(ppc_map_info_t *info, int count) 218 - { 219 - PPCMMU(0x105, info, (void *)count, 0); 220 - } 221 - 222 - static inline int MmuUnitTest() 223 - { 224 - return PPCMMU(0x106, 0, 0, 0); 225 - } 226 - 227 - static inline int MmuTurnOn(void *fun, void *arg) 228 - { 229 - return PPCMMU(0x107, fun, arg, 0); 230 - } 231 - 232 - static inline void MmuSetMemorySize(paddr_t size) 233 - { 234 - PPCMMU(0x108, (void *)size, 0, 0); 235 - } 236 - 237 - static inline paddr_t MmuGetFirstPage() 238 - { 239 - return (paddr_t)PPCMMU(0x109, 0, 0, 0); 240 - } 241 - 242 - static inline void *MmuAllocVsid(int vsid, int mask) 243 - { 244 - return (void *)PPCMMU(0x10a, (void *)vsid, (void *)mask, 0); 245 - } 246 - 247 - static inline void MmuRevokeVsid(int vsid, int mask) 248 - { 249 - PPCMMU(0x10b, (void *)vsid, (void *)mask, 0); 250 - } 251 - 252 - static inline paddr_t MmuGetPage() 253 - { 254 - return PPCMMU(0x10c, 0,0,0); 255 - } 256 - 257 - static inline void MmuCallbackRet() 258 - { 259 - PPCMMU(0x10d, 0,0,0); 260 - } 261 - 262 - static inline void MmuDumpMap() 263 - { 264 - PPCMMU(0x10e, 0,0,0); 265 - } 266 - 267 - static inline void MmuDbgInit(int deviceType, int devicePort) 268 - { 269 - PPCMMU(0x200, (void *)deviceType, (void *)devicePort, 0); 270 - } 271 - 272 - static inline void MmuDbgEnter(int signal) 273 - { 274 - PPCMMU(0x201, (void *)signal, 0, 0); 275 - } 276 - 277 - #endif/*PPCMMU_H*/
-23
sdk/include/reactos/libs/ppcmmu/mmuutil.h
··· 1 - #ifndef FREELDR_MMU_H 2 - #define FREELDR_MMU_H 3 - 4 - int GetDEC(void); 5 - int GetMSR(void); 6 - int GetPhys( paddr_t addr ); 7 - int GetPhysHalf( paddr_t addr ); 8 - int GetPhysByte( paddr_t addr ); 9 - void SetPhys( paddr_t addr, int val ); 10 - void SetPhysHalf( paddr_t addr, int val ); 11 - void SetPhysByte( paddr_t addr, int val ); 12 - int GetSR(int n); 13 - void SetSR(int n, int val); 14 - void GetBat( int bat, int inst, int *batHi, int *batLo ); 15 - void SetBat( int bat, int inst, int batHi, int batLo ); 16 - int GetSDR1(void); 17 - void SetSDR1( int newsdr ); 18 - int BatHit( int bath, int batl, int virt ); 19 - int BatTranslate( int bath, int batl, int virt ); 20 - /* translate address */ 21 - int PpcVirt2phys( vaddr_t virt, int inst ); 22 - int PtegNumber( vaddr_t virt, int hfun ); 23 - #endif/*FREELDR_MMU_H*/
-1
sdk/lib/CMakeLists.txt
··· 34 34 add_subdirectory(ioevent) 35 35 add_subdirectory(lsalib) 36 36 add_subdirectory(nt) 37 - add_subdirectory(ppcmmu) 38 37 add_subdirectory(pseh) 39 38 40 39 if(KDBG)
-2
sdk/lib/crt/except/except.cmake
··· 64 64 list(APPEND CHKSTK_ASM_SOURCE except/amd64/chkstk_ms.s) 65 65 elseif(ARCH STREQUAL "arm") 66 66 list(APPEND CHKSTK_ASM_SOURCE except/arm/chkstk_asm.s) 67 - elseif(ARCH STREQUAL "powerpc") 68 - list(APPEND CHKSTK_ASM_SOURCE except/powerpc/chkstk_asm.s) 69 67 endif() 70 68 71 69 add_asm_files(chkstk_lib_asm ${CHKSTK_ASM_SOURCE})
-22
sdk/lib/crt/except/powerpc/chkstk_asm.s
··· 1 - /* 2 - * COPYRIGHT: See COPYING in the top level directory 3 - * PROJECT: ReactOS kernel 4 - * PURPOSE: Stack checker 5 - * FILE: lib/sdk/crt/except/powerpc/chkstk_asm.s 6 - * PROGRAMER: arty 7 - */ 8 - 9 - .globl _chkstk 10 - .globl _alloca_probe 11 - 12 - /* 13 - _chkstk() is called by all stack allocations of more than 4 KB. It grows the 14 - stack in areas of 4 KB each, trying to access each area. This ensures that the 15 - guard page for the stack is hit, and the stack growing triggered 16 - */ 17 - _chkstk: 18 - _alloca_probe: 19 - /* return */ 20 - blr 21 - 22 - /* EOF */
-75
sdk/lib/crt/except/powerpc/seh.s
··· 1 - /* 2 - * COPYRIGHT: See COPYING in the top level directory 3 - * PROJECT: ReactOS CRT 4 - * FILE: lib/sdk/crt/except/powerpc/seh.s 5 - * PURPOSE: SEH Support for the CRT 6 - * PROGRAMMERS: arty 7 - */ 8 - 9 - /* INCLUDES ******************************************************************/ 10 - 11 - #include <ndk/asm.h> 12 - 13 - #define DISPOSITION_DISMISS 0 14 - #define DISPOSITION_CONTINUE_SEARCH 1 15 - #define DISPOSITION_COLLIDED_UNWIND 3 16 - 17 - /* GLOBALS *******************************************************************/ 18 - 19 - .globl _global_unwind2 20 - .globl _local_unwind2 21 - .globl _abnormal_termination 22 - .globl _except_handler2 23 - .globl _except_handler3 24 - 25 - /* FUNCTIONS *****************************************************************/ 26 - 27 - unwind_handler: 28 - blr 29 - 30 - _global_unwind2: 31 - blr 32 - 33 - _local_unwind2: 34 - blr 35 - 36 - _except_handler2: 37 - blr 38 - 39 - _except_handler3: 40 - blr 41 - 42 - // 43 - // 44 - // REMOVE ME REMOVE ME REMOVE ME REMOVE ME REMOVE ME REMOVE ME REMOVE ME 45 - // sorry 46 - // 47 - // 48 - .globl RtlpGetStackLimits 49 - RtlpGetStackLimits: 50 - stwu 1,16(1) 51 - mflr 0 52 - 53 - stw 0,4(1) 54 - stw 3,8(1) 55 - stw 4,12(1) 56 - 57 - /* Get the current thread */ 58 - lwz 3,KPCR_CURRENT_THREAD(13) 59 - 60 - /* Get the stack limits */ 61 - lwz 4,KTHREAD_STACK_LIMIT(3) 62 - lwz 5,KTHREAD_INITIAL_STACK(3) 63 - subi 5,5,SIZEOF_FX_SAVE_AREA 64 - 65 - /* Return them */ 66 - lwz 3,8(1) 67 - stw 4,0(3) 68 - 69 - lwz 3,12(1) 70 - stw 5,0(3) 71 - 72 - addi 1,1,16 73 - 74 - /* return */ 75 - blr
-8
sdk/lib/ppcmmu/CMakeLists.txt
··· 1 - 2 - list(APPEND SOURCE dummy.c) 3 - 4 - if(ARCH STREQUAL "powerpc") 5 - list(APPEND SOURCE mmuutil.c) 6 - endif() 7 - 8 - add_library(ppcmmu ${SOURCE})
-222
sdk/lib/ppcmmu/devint.s
··· 1 - /* PowerPC Trap Handler first Half */ 2 - .text 3 - .globl mmumain 4 - .globl _mmumain 5 - mmumain: 6 - mr 0,1 7 - lis 1,2 8 - subi 1,1,448 9 - stw 0,20(1) 10 - stw 2,24(1) 11 - stw 3,28(1) 12 - stw 4,32(1) 13 - stw 5,36(1) 14 - stw 6,40(1) 15 - stw 7,44(1) 16 - stw 8,48(1) 17 - stw 9,52(1) 18 - stw 10,56(1) 19 - stw 11,60(1) 20 - stw 12,64(1) 21 - stw 13,68(1) 22 - stw 14,72(1) 23 - stw 15,76(1) 24 - stw 16,80(1) 25 - stw 17,84(1) 26 - stw 18,88(1) 27 - stw 19,92(1) 28 - stw 20,96(1) 29 - stw 21,100(1) 30 - stw 22,104(1) 31 - stw 23,108(1) 32 - stw 24,112(1) 33 - stw 25,116(1) 34 - stw 26,120(1) 35 - stw 27,124(1) 36 - stw 28,128(1) 37 - stw 29,132(1) 38 - stw 30,136(1) 39 - stw 31,140(1) 40 - mfsrr0 0 41 - stw 0,400(1) 42 - mfmsr 0 43 - stw 0,404(1) 44 - mfcr 0 45 - stw 0,408(1) 46 - mflr 0 47 - stw 0,412(1) 48 - mfctr 0 49 - stw 0,416(1) 50 - mfdsisr 0 51 - stw 0,420(1) 52 - mfdar 0 53 - stw 0,424(1) 54 - mfxer 0 55 - stw 0,428(1) 56 - addi 7,1,16 57 - lis 8,_mmumain@ha 58 - addi 8,8,_mmumain@l 59 - mtctr 8 60 - bctrl 61 - addi 1,1,16 62 - lwz 2,8(1) 63 - /* Don't reload r3, since we'll return a result */ 64 - lwz 4,16(1) 65 - lwz 5,20(1) 66 - lwz 6,24(1) 67 - lwz 7,28(1) 68 - lwz 8,32(1) 69 - lwz 9,36(1) 70 - lwz 10,40(1) 71 - lwz 11,44(1) 72 - lwz 12,48(1) 73 - lwz 13,52(1) 74 - lwz 14,56(1) 75 - lwz 15,60(1) 76 - lwz 16,64(1) 77 - lwz 17,68(1) 78 - lwz 18,72(1) 79 - lwz 19,76(1) 80 - lwz 20,80(1) 81 - lwz 21,84(1) 82 - lwz 22,88(1) 83 - lwz 23,92(1) 84 - lwz 24,96(1) 85 - lwz 25,100(1) 86 - lwz 26,104(1) 87 - lwz 27,108(1) 88 - lwz 28,112(1) 89 - lwz 29,116(1) 90 - lwz 30,120(1) 91 - lwz 31,124(1) 92 - lwz 0,392(1) 93 - mtcr 0 94 - lwz 0,396(1) 95 - mtsrr0 0 96 - lwz 0,400(1) 97 - mtctr 0 98 - lwz 0,388(1) /* Copy out new MSR bits if needed */ 99 - lwz 1,4(1) 100 - mtsrr1 0 101 - rfi 102 - 103 - .globl trap_start 104 - .globl trap_end 105 - trap_start: 106 - mtsprg1 1 107 - lis 1,2 108 - subi 1,1,448 109 - stw 0,16(1) 110 - mfsprg1 0 111 - stw 0,20(1) 112 - stw 2,24(1) 113 - stw 3,28(1) 114 - stw 4,32(1) 115 - stw 5,36(1) 116 - stw 6,40(1) 117 - stw 7,44(1) 118 - stw 8,48(1) 119 - stw 9,52(1) 120 - stw 10,56(1) 121 - stw 11,60(1) 122 - stw 12,64(1) 123 - stw 13,68(1) 124 - stw 14,72(1) 125 - stw 15,76(1) 126 - stw 16,80(1) 127 - stw 17,84(1) 128 - stw 18,88(1) 129 - stw 19,92(1) 130 - stw 20,96(1) 131 - stw 21,100(1) 132 - stw 22,104(1) 133 - stw 23,108(1) 134 - stw 24,112(1) 135 - stw 25,116(1) 136 - stw 26,120(1) 137 - stw 27,124(1) 138 - stw 28,128(1) 139 - stw 29,132(1) 140 - stw 30,136(1) 141 - stw 31,140(1) 142 - mfsrr0 0 143 - stw 0,400(1) 144 - mfsrr1 0 145 - stw 0,404(1) 146 - mfcr 0 147 - stw 0,408(1) 148 - mflr 0 149 - stw 0,412(1) 150 - mfctr 0 151 - stw 0,416(1) 152 - mfdsisr 0 153 - stw 0,420(1) 154 - mfdar 0 155 - stw 0,424(1) 156 - mfxer 0 157 - stw 0,428(1) 158 - bl 1f 159 - 1: mflr 5 160 - addi 4,1,16 161 - rlwinm 3,5,24,0xff 162 - lwz 5,36(5) 163 - mtctr 5 164 - lis 5,trap_finish_start@ha 165 - addi 5,5,trap_finish_start@l 166 - mtlr 5 167 - bctr 168 - trap_end: 169 - .space 4 170 - 171 - .globl trap_finish_start 172 - trap_finish_start: 173 - addi 1,1,16 174 - lwz 2,8(1) 175 - lwz 3,12(1) 176 - lwz 4,16(1) 177 - lwz 5,20(1) 178 - lwz 6,24(1) 179 - lwz 7,28(1) 180 - lwz 8,32(1) 181 - lwz 9,36(1) 182 - lwz 10,40(1) 183 - lwz 11,44(1) 184 - lwz 12,48(1) 185 - lwz 13,52(1) 186 - lwz 14,56(1) 187 - lwz 15,60(1) 188 - lwz 16,64(1) 189 - lwz 17,68(1) 190 - lwz 18,72(1) 191 - lwz 19,76(1) 192 - lwz 20,80(1) 193 - lwz 21,84(1) 194 - lwz 22,88(1) 195 - lwz 23,92(1) 196 - lwz 24,96(1) 197 - lwz 25,100(1) 198 - lwz 26,104(1) 199 - lwz 27,108(1) 200 - lwz 28,112(1) 201 - lwz 29,116(1) 202 - lwz 30,120(1) 203 - lwz 31,124(1) 204 - lwz 0,384(1) 205 - mtsrr0 0 206 - lwz 0,388(1) 207 - mtsrr1 0 208 - lwz 0,392(1) 209 - mtcr 0 210 - lwz 0,396(1) 211 - mtlr 0 212 - lwz 0,400(1) 213 - mtctr 0 214 - lwz 0,404(1) 215 - mtdsisr 0 216 - lwz 0,412(1) 217 - mtdar 0 218 - lwz 0,416(1) 219 - mtxer 0 220 - lwz 0,0(1) 221 - lwz 1,4(1) 222 - rfi
sdk/lib/ppcmmu/dummy.c

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-475
sdk/lib/ppcmmu/gdblib.c
··· 1 - /**************************************************************************** 2 - 3 - THIS SOFTWARE IS NOT COPYRIGHTED 4 - 5 - HP offers the following for use in the public domain. HP makes no 6 - warranty with regard to the software or it's performance and the 7 - user accepts the software "AS IS" with all faults. 8 - 9 - HP DISCLAIMS ANY WARRANTIES, EXPRESS OR IMPLIED, WITH REGARD 10 - TO THIS SOFTWARE INCLUDING BUT NOT LIMITED TO THE WARRANTIES 11 - OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. 12 - 13 - ****************************************************************************/ 14 - 15 - /**************************************************************************** 16 - * Header: remcom.c,v 1.34 91/03/09 12:29:49 glenne Exp $ 17 - * 18 - * Module name: remcom.c $ 19 - * Revision: 1.34 $ 20 - * Date: 91/03/09 12:29:49 $ 21 - * Contributor: Lake Stevens Instrument Division$ 22 - * 23 - * Description: low level support for gdb debugger. $ 24 - * 25 - * Considerations: only works on target hardware $ 26 - * 27 - * Written by: Glenn Engel $ 28 - * ModuleState: Experimental $ 29 - * 30 - * NOTES: See Below $ 31 - * 32 - * Modified for 386 by Jim Kingdon, Cygnus Support. 33 - * Modified for ReactOS by Casper S. Hornstrup <chorns@users.sourceforge.net> 34 - * Modified heavily for PowerPC ReactOS by arty 35 - * 36 - * To enable debugger support, two things need to happen. One, setting 37 - * up a routine so that it is in the exception path, is necessary in order 38 - * to allow any breakpoints or error conditions to be properly intercepted 39 - * and reported to gdb. 40 - * Two, a breakpoint needs to be generated to begin communication. 41 - ER* 42 - * Because gdb will sometimes write to the stack area to execute function 43 - * calls, this program cannot rely on using the supervisor stack so it 44 - * uses it's own stack area. 45 - * 46 - ************* 47 - * 48 - * The following gdb commands are supported: 49 - * 50 - * command function Return value 51 - * 52 - * g return the value of the CPU Registers hex data or ENN 53 - * G set the value of the CPU Registers OK or ENN 54 - * 55 - * mAA..AA,LLLL Read LLLL bytes at address AA..AA hex data or ENN 56 - * MAA..AA,LLLL: Write LLLL bytes at address AA.AA OK or ENN 57 - * 58 - * c Resume at current address SNN ( signal NN) 59 - * cAA..AA Continue at address AA..AA SNN 60 - * 61 - * s Step one instruction SNN 62 - * sAA..AA Step one instruction from AA..AA SNN 63 - * 64 - * k kill 65 - * 66 - * ? What was the last sigval ? SNN (signal NN) 67 - * 68 - * All commands and responses are sent with a packet which includes a 69 - * Checksum. A packet consists of 70 - * 71 - * $<packet info>#<Checksum>. 72 - * 73 - * where 74 - * <packet info> :: <characters representing the command or response> 75 - * <Checksum> :: < two hex digits computed as modulo 256 sum of <packetinfo>> 76 - * 77 - * When a packet is received, it is first acknowledged with either '+' or '-'. 78 - * '+' indicates a successful transfer. '-' indicates a failed transfer. 79 - * 80 - * Example: 81 - * 82 - * Host: Reply: 83 - * $m0,10#2a +$00010203040506070809101112131415#42 84 - * 85 - ****************************************************************************/ 86 - 87 - #include "ppcmmu/mmu.h" 88 - 89 - #define GDB_SAVE_SIZE 0x66 90 - 91 - typedef struct _BREAKPOINT { 92 - int OldCode; 93 - int *Address; 94 - } BREAKPOINT, *PBREAKPOINT; 95 - 96 - BREAKPOINT BreakPoints[64]; 97 - char DataOutBuffer[1024]; 98 - volatile int DataOutAddr, DataOutCsum; 99 - char DataInBuffer[128]; 100 - volatile int DataInAddr, ParseState = 0, ComputedCsum, ActualCsum; 101 - volatile int PacketSent = 0, SendSignal = 0; 102 - volatile int Continue = 0, Signal = 0; 103 - volatile ppc_trap_frame_t RegisterSaves, *RegisterSaveArea = &RegisterSaves; 104 - char *hex = "0123456789abcdef"; 105 - 106 - #define RCV 0 107 - #define THR 0 108 - #define BAUDLOW 0 109 - #define BAUDHIGH 1 110 - #define IER 1 111 - #define FCR 2 112 - #define ISR 2 113 - #define LCR 3 114 - #define MCR 4 115 - #define LSR 5 116 - #define MSR 6 117 - #define SPR 7 118 - 119 - extern void send(char *serport, char c); 120 - extern char recv(char *serport); 121 - extern void setup(char *serport, int baud); 122 - 123 - char *serport = (char *)0x800003f8; 124 - 125 - int isxdigit(int ch) 126 - { 127 - return 128 - (ch >= 'A' && ch <= 'F') || 129 - (ch >= 'a' && ch <= 'f') || 130 - (ch >= '0' && ch <= '9'); 131 - } 132 - 133 - inline void sync() { 134 - __asm__("eieio\n\t" 135 - "sync"); 136 - } 137 - 138 - inline void send(char *serport, char c) { 139 - /* Wait for Clear to Send */ 140 - while( !(GetPhysByte((paddr_t)serport+LSR) & 0x20) ) sync(); 141 - 142 - SetPhysByte((paddr_t)serport+THR, c); 143 - sync(); 144 - } 145 - 146 - inline int rdy(char *serport) 147 - { 148 - sync(); 149 - return (GetPhysByte((paddr_t)serport+LSR) & 0x20); 150 - } 151 - 152 - inline int chr(char *serport) 153 - { 154 - sync(); 155 - return GetPhysByte((paddr_t)serport+LSR) & 1; 156 - } 157 - 158 - inline char recv(char *serport) { 159 - char c; 160 - 161 - while( !chr(serport) ) sync(); 162 - 163 - c = GetPhysByte((paddr_t)serport+RCV); 164 - sync(); 165 - 166 - return c; 167 - } 168 - 169 - void setup(char *serport, int baud) { 170 - int x = 115200 / baud; 171 - SetPhysByte((paddr_t)serport+LCR, 128); 172 - sync(); 173 - SetPhysByte((paddr_t)serport+BAUDLOW, x & 255); 174 - sync(); 175 - SetPhysByte((paddr_t)serport+BAUDHIGH, x >> 8); 176 - sync(); 177 - SetPhysByte((paddr_t)serport+LCR, 3); 178 - sync(); 179 - } 180 - 181 - void SerialSetUp(int deviceType, void *deviceAddr, int baud) 182 - { 183 - int i; 184 - serport = deviceAddr; 185 - setup(serport, baud); 186 - } 187 - 188 - extern int SerialInterrupt(int signal, ppc_trap_frame_t *tf); 189 - 190 - void IntEnable() 191 - { 192 - SetPhysByte((paddr_t)serport+IER, GetPhysByte((paddr_t)serport+IER) | 1); 193 - } 194 - 195 - void SerialWrite(int ch) 196 - { 197 - send(serport, ch); 198 - } 199 - 200 - int SerialRead() 201 - { 202 - return recv(serport); 203 - } 204 - 205 - int hex2int(int ch) 206 - { 207 - if (ch >= 'a' && ch <= 'f') return ch + 10 - 'a'; 208 - else if (ch >= 'A' && ch <= 'F') return ch + 10 - 'A'; 209 - else return ch - '0'; 210 - } 211 - 212 - int PacketReadHexNumber(int dig) 213 - { 214 - int i; 215 - int result = 0; 216 - for (i = 0; i < dig && isxdigit(DataInBuffer[DataInAddr]); i++) 217 - { 218 - result <<= 4; 219 - result |= hex2int(DataInBuffer[DataInAddr++]); 220 - } 221 - return result; 222 - } 223 - 224 - void PacketWriteChar(int ch) 225 - { 226 - DataOutCsum += ch; 227 - DataOutBuffer[DataOutAddr++] = ch; 228 - } 229 - 230 - int PacketWriteHexNumber(int hnum, int dig) 231 - { 232 - int i; 233 - hnum <<= (8 - dig) * 4; 234 - for (i = 0; i < dig; i++) 235 - { 236 - PacketWriteChar(hex[(hnum >> 28) & 15]); 237 - hnum <<= 4; 238 - } 239 - return i; 240 - } 241 - 242 - void PacketStart() 243 - { 244 - DataOutCsum = 0; 245 - DataOutAddr = 0; 246 - } 247 - 248 - void PacketFinish() 249 - { 250 - int i, ch, count = 0; 251 - 252 - PacketSent = 0; 253 - 254 - SerialWrite('$'); 255 - for (i = 0; i < DataOutAddr; i++) 256 - { 257 - SerialWrite(DataOutBuffer[i]); 258 - } 259 - SerialWrite('#'); 260 - SerialWrite(hex[(DataOutCsum >> 4) & 15]); 261 - SerialWrite(hex[DataOutCsum & 15]); 262 - 263 - while(!chr(serport) && ((ch = SerialRead()) != '+') && (ch != '$')); 264 - if (ch == '$') 265 - { 266 - ParseState = 0; 267 - DataInAddr = 0; 268 - ComputedCsum = 0; 269 - } 270 - } 271 - 272 - 273 - void PacketWriteString(char *str) 274 - { 275 - while(*str) PacketWriteChar(*str++); 276 - } 277 - 278 - void PacketOk() 279 - { 280 - PacketStart(); 281 - PacketWriteString("OK"); 282 - PacketFinish(); 283 - } 284 - 285 - void PacketEmpty() 286 - { 287 - PacketStart(); 288 - PacketFinish(); 289 - } 290 - 291 - void PacketWriteSignal(int code) 292 - { 293 - PacketStart(); 294 - PacketWriteChar('S'); 295 - PacketWriteHexNumber(code, 2); 296 - PacketFinish(); 297 - } 298 - 299 - void PacketWriteError(int code) 300 - { 301 - PacketStart(); 302 - PacketWriteChar('E'); 303 - PacketWriteHexNumber(code, 2); 304 - PacketFinish(); 305 - } 306 - 307 - void marker() { } 308 - 309 - void GotPacket() 310 - { 311 - int i, memaddr, memsize; 312 - 313 - Continue = 0; 314 - switch (DataInBuffer[DataInAddr++]) 315 - { 316 - case 'g': 317 - PacketStart(); 318 - for (i = 0; i < GDB_SAVE_SIZE; i++) 319 - { 320 - PacketWriteHexNumber(((int *)RegisterSaveArea)[i], 8); 321 - } 322 - PacketFinish(); 323 - break; 324 - 325 - case 'G': 326 - for (i = 0; i < sizeof(*RegisterSaveArea) / sizeof(int); i++) 327 - { 328 - ((int *)RegisterSaveArea)[i] = PacketReadHexNumber(8); 329 - } 330 - PacketOk(); 331 - break; 332 - 333 - case 'm': 334 - memaddr = PacketReadHexNumber(8); 335 - DataInAddr++; 336 - memsize = PacketReadHexNumber(8); 337 - PacketStart(); 338 - while(memsize-- > 0) 339 - { 340 - PacketWriteHexNumber(*((char *)memaddr++), 2); 341 - } 342 - PacketFinish(); 343 - break; 344 - 345 - case 'M': 346 - memaddr = PacketReadHexNumber(8); 347 - DataInAddr++; 348 - memsize = PacketReadHexNumber(8); 349 - DataInAddr++; 350 - while(memsize-- > 0) 351 - { 352 - *((char *)memaddr++) = PacketReadHexNumber(2); 353 - } 354 - PacketOk(); 355 - break; 356 - 357 - case '?': 358 - PacketWriteSignal(Signal); 359 - break; 360 - 361 - case 'c': 362 - PacketOk(); 363 - Continue = 1; 364 - break; 365 - 366 - case 'S': 367 - PacketOk(); 368 - Continue = 0; 369 - break; 370 - 371 - case 's': 372 - RegisterSaveArea->srr1 |= 0x400; 373 - PacketOk(); 374 - Continue = 1; 375 - marker(); 376 - break; 377 - 378 - case 'q': 379 - switch (DataInBuffer[1]) 380 - { 381 - case 'S': /*upported => nothing*/ 382 - PacketEmpty(); 383 - break; 384 - 385 - case 'O': /*ffsets*/ 386 - PacketEmpty(); 387 - break; 388 - } 389 - break; 390 - 391 - default: 392 - PacketEmpty(); 393 - break; 394 - } 395 - } 396 - 397 - int SerialInterrupt(int signal, ppc_trap_frame_t *tf) 398 - { 399 - int ch; 400 - 401 - if (!chr(serport)) return 0; 402 - 403 - Signal = signal; 404 - RegisterSaveArea = tf; 405 - 406 - do 407 - { 408 - ch = SerialRead(); 409 - 410 - if (ch == 3) /* Break in - tehe */ 411 - { 412 - Continue = 0; 413 - PacketWriteSignal(3); 414 - } 415 - else if (ch == '+') 416 - { 417 - /* Nothing */ 418 - } 419 - else if (ch == '$') 420 - { 421 - DataInAddr = 0; 422 - ParseState = 0; 423 - ComputedCsum = 0; 424 - ActualCsum = 0; 425 - } 426 - else if (ch == '#' && ParseState == 0) 427 - { 428 - ParseState = 2; 429 - } 430 - else if (ParseState == 0) 431 - { 432 - ComputedCsum += ch; 433 - DataInBuffer[DataInAddr++] = ch; 434 - } 435 - else if (ParseState == 2) 436 - { 437 - ActualCsum = ch; 438 - ParseState++; 439 - } 440 - else if (ParseState == 3) 441 - { 442 - ActualCsum = hex2int(ch) | (hex2int(ActualCsum) << 4); 443 - ComputedCsum &= 255; 444 - ParseState = -1; 445 - if (ComputedCsum == ActualCsum) 446 - { 447 - ComputedCsum = 0; 448 - DataInBuffer[DataInAddr] = 0; 449 - DataInAddr = 0; 450 - Continue = 0; 451 - SerialWrite('+'); 452 - GotPacket(); 453 - } 454 - else 455 - SerialWrite('-'); 456 - } 457 - else if (ParseState == -1) 458 - SerialWrite('-'); 459 - } 460 - while (!Continue); 461 - return 1; 462 - } 463 - 464 - int TakeException(int n, ppc_trap_frame_t *tf) 465 - { 466 - Signal = n; 467 - RegisterSaveArea = tf; 468 - PacketWriteSignal(Signal); 469 - SendSignal = 0; 470 - Continue = 0; 471 - while(!Continue) SerialInterrupt(n, tf); 472 - return 1; 473 - } 474 - 475 - /* EOF */
-8
sdk/lib/ppcmmu/ldscript
··· 1 - OUTPUT_FORMAT(elf32-powerpc); 2 - 3 - SECTIONS 4 - { 5 - .text : { *(.text) } 6 - .data : { *(.data) *(.rodata) } 7 - .bss : { *(.sbss) *(.bss) *(COMMON) } 8 - }
-766
sdk/lib/ppcmmu/mmuobject.c
··· 1 - #include <stdarg.h> 2 - #include "ppcmmu/mmu.h" 3 - #include "ppcmmu/mmuutil.h" 4 - #include "mmuobject.h" 5 - 6 - typedef unsigned long ULONG; 7 - 8 - /* 9 - 10 - The MMU Object: 11 - 0x00300 -- Data miss 12 - 0x00400 -- Instruction miss 13 - 0x10000 -- Entry point 14 - ... Code 15 - 0x20000 -- Physical map (PTE + Process Ptr + Address : 16 bytes) 16 - 17 - 4096 / 16 bytes = 256 entries per page 18 - 256 pages = 1Megabyte = 1 page table page 19 - 20 - Setup by freeldr and used to build the kernel map, then used by the kernel 21 - 22 - Calling: 23 - 24 - r3 -- Action 25 - r4 .. r6 -- Args 26 - 27 - Actions: 28 - 00 Init 29 - 01 Map pages 30 - 02 erase pages 31 - 03 set segment vsid 32 - 04 page miss callback 33 - 05 inquire page 34 - 06 unit test 35 - 07 alloc page 36 - 08 set memory size 37 - 09 get first usable page 38 - 10 alloc vsid 39 - 11 revoke vsid 40 - */ 41 - 42 - #define MMU_ADDR_RESERVED ((vaddr_t)-2) 43 - 44 - MmuTrapHandler callback[0x30]; 45 - typedef struct _MmuFreePage { 46 - int page; 47 - struct _MmuFreePage *next; 48 - } MmuFreePage; 49 - typedef struct _MmuFreeTree { 50 - struct _MmuFreeTree *next; 51 - } MmuFreeTree; 52 - typedef struct _MmuVsidTree { 53 - ppc_map_t *leaves[256]; 54 - } MmuVsidTree; 55 - typedef struct _MmuVsidInfo { 56 - int vsid; 57 - struct _MmuVsidInfo *next; 58 - MmuVsidTree *tree[256]; 59 - } MmuVsidInfo; 60 - MmuFreePage *FreeList = 0; 61 - // Pages are allocated one by one until NextPage == RamSize >> PPC_PAGE_SHIFT 62 - // Then we take only from the free list 63 - int Clock = 0, TreeAlloc = 0, GdbAttach = 0, Booted = 0, Vsid[16]; 64 - paddr_t RamSize, FirstUsablePage, NextPage; 65 - MmuVsidTree *NextTreePage = 0; 66 - MmuFreeTree *FreeTree; 67 - MmuVsidInfo *Segs[16], *VsidHead = 0; 68 - 69 - extern void fmtout(const char *fmt, ...); 70 - extern char *serport; 71 - int ptegreload(ppc_trap_frame_t *frame, vaddr_t addr); 72 - void SerialSetUp(int deviceType, void *deviceAddr, int baud); 73 - int SerialInterrupt(int n, ppc_trap_frame_t *tf); 74 - void TakeException(int n, ppc_trap_frame_t *tf); 75 - int mmuisfreepage(paddr_t pageno); 76 - void copy(void *t, void *s, int b); 77 - paddr_t mmunewpage(); 78 - void dumpmap(); 79 - void trapcallback(int action, ppc_trap_frame_t *trap_frame); 80 - 81 - int _mmumain(int action, void *arg1, void *arg2, void *arg3, void *tf) 82 - { 83 - ppc_trap_frame_t *trap_frame = (action >= 0x100) ? tf : arg1; 84 - int ret = 0, tmp, i; 85 - 86 - switch(action) 87 - { 88 - /* Trap Handlers */ 89 - case 3: 90 - if(!ptegreload(trap_frame, trap_frame->dar)) 91 - { 92 - trapcallback(action, trap_frame); 93 - } 94 - break; 95 - case 4: 96 - if(!ptegreload(trap_frame, trap_frame->srr0)) 97 - { 98 - trapcallback(action, trap_frame); 99 - } 100 - break; 101 - 102 - case 5: 103 - /* EE -- Try to get a serial interrupt if debugging enabled, then fall 104 - * back to primary handler 105 - */ 106 - if (!SerialInterrupt(action, trap_frame) && callback[action]) 107 - { 108 - trapcallback(action, trap_frame); 109 - } 110 - break; 111 - case 0: 112 - case 2: 113 - case 6: 114 - case 7: 115 - case 8: 116 - case 9: 117 - case 0xa: 118 - case 0xc: 119 - case 0x20: 120 - trapcallback(action, trap_frame); 121 - break; 122 - 123 - /* MMU Functions */ 124 - case 0x100: 125 - initme(); 126 - trap_frame->srr1 |= 0x8000; 127 - break; 128 - case 0x101: 129 - ret = mmuaddpage(arg1, (int)arg2); 130 - break; 131 - case 0x102: 132 - mmudelpage(arg1, (int)arg2); 133 - break; 134 - case 0x103: 135 - mmusetvsid((int)arg1, (int)arg2, (int)arg3); 136 - break; 137 - case 0x104: 138 - ret = (int)callback[(int)arg1]; 139 - callback[(int)arg1] = (MmuTrapHandler)arg2; 140 - break; 141 - case 0x105: 142 - mmugetpage(arg1, (int)arg2); 143 - break; 144 - case 0x106: 145 - ret = mmunitest(); 146 - break; 147 - case 0x107: 148 - callkernel(arg1, arg2); 149 - break; 150 - case 0x108: 151 - mmusetramsize((paddr_t)arg1); 152 - break; 153 - case 0x109: 154 - return FirstUsablePage; 155 - case 0x10a: 156 - mmuallocvsid((int)arg1, (int)arg2); 157 - break; 158 - case 0x10b: 159 - mmufreevsid((int)arg1, (int)arg2); 160 - break; 161 - case 0x10c: 162 - ret = mmunewpage(); 163 - break; 164 - case 0x10d: 165 - copy(trap_frame, (void *)0xf040, sizeof(*trap_frame)); 166 - __asm__("mr 1,%0\n\tb trap_finish_start" : : "r" 167 - (((int)trap_frame) - 16)); 168 - break; 169 - case 0x10e: 170 - dumpmap(); 171 - break; 172 - 173 - case 0x200: 174 - SerialSetUp((int)arg1, arg2, 9600); 175 - break; 176 - case 0x201: 177 - TakeException((int)arg1, trap_frame); 178 - break; 179 - 180 - default: 181 - while(1); 182 - } 183 - 184 - /* Restore bats when we were called voluntarily. We may not get a chance 185 - * to do this after returning. 186 - * 187 - * At this point, we're in address space that matches physical space. 188 - * We turn off mapping, restore bats, then let rfi switch us back to where 189 - * we came. 190 - */ 191 - 192 - if (action >= 0x100) 193 - { 194 - __asm__("mfmsr %0" : "=r" (tmp)); 195 - tmp &= ~0x30; 196 - __asm__("mtmsr %0" : : "r" (tmp)); 197 - 198 - for(i = 0; i < 4; i++) { 199 - SetBat(i, 0, GetPhys(0xf000 + i * 16), GetPhys(0xf004 + i * 16)); 200 - SetBat(i, 1, GetPhys(0xf008 + i * 16), GetPhys(0xf00c + i * 16)); 201 - } 202 - } 203 - 204 - return ret; 205 - } 206 - 207 - void trapcallback(int action, ppc_trap_frame_t *trap_frame) 208 - { 209 - if ((paddr_t)callback[action] < PAGETAB) 210 - callback[action](action, trap_frame); 211 - else 212 - { 213 - int framecopy = 0xf040; 214 - copy((void *)framecopy, trap_frame, sizeof(*trap_frame)); 215 - trap_frame->srr0 = (int)callback[action]; 216 - trap_frame->srr1 &= 0x7fff; 217 - trap_frame->gpr[3] = action; 218 - trap_frame->gpr[4] = framecopy; 219 - __asm__("mr 1,%0\n\tsubi 1,1,16\n\tb trap_finish_start" : : "r" (trap_frame)); 220 - } 221 - } 222 - 223 - void outchar(char c) 224 - { 225 - SetPhysByte(0x800003f8, c); 226 - } 227 - 228 - void copy(void *target, void *src, int bytes) 229 - { 230 - while(bytes--) *((char *)target++) = *((char *)src++); 231 - } 232 - 233 - void outstr(const char *str) 234 - { 235 - while(*str) outchar(*str); 236 - } 237 - 238 - void outdig(int dig) 239 - { 240 - if(dig < 10) outchar(dig + '0'); 241 - else outchar(dig - 10 + 'A'); 242 - } 243 - 244 - void outnum(unsigned long num) 245 - { 246 - int i; 247 - for( i = 0; i < 8; i++ ) 248 - { 249 - outdig(num >> 28); 250 - num <<= 4; 251 - } 252 - } 253 - 254 - void fmtout(const char *str, ...) 255 - { 256 - va_list ap; 257 - va_start(ap, str); 258 - while(*str) 259 - { 260 - if(*str == '%') 261 - { 262 - if(str[1] == '%') 263 - { 264 - outchar('%'); 265 - } 266 - else if(str[1] == 's') 267 - { 268 - outstr(va_arg(ap, const char *)); 269 - } 270 - else 271 - { 272 - outnum(va_arg(ap, int)); 273 - } 274 - str++; 275 - } 276 - else 277 - { 278 - outchar(*str); 279 - } 280 - str++; 281 - } 282 - va_end(ap); 283 - } 284 - 285 - void mmusetramsize(paddr_t ramsize) 286 - { 287 - ppc_map_t *last_map = &PpcPageTable[PPC_PAGE_NUMBER(ramsize)]; 288 - if(!RamSize) 289 - { 290 - RamSize = ramsize; 291 - FirstUsablePage = (paddr_t)last_map; 292 - NextPage = PPC_PAGE_NUMBER(FirstUsablePage) + 1; 293 - } 294 - } 295 - 296 - int ignore(int trapCode, ppc_trap_frame_t *trap) 297 - { 298 - return 1; 299 - } 300 - 301 - int fpenable(int trapCode, ppc_trap_frame_t *trap) 302 - { 303 - /* Turn on FP */ 304 - trap->srr1 |= 8192; 305 - return 1; 306 - } 307 - 308 - extern int trap_start[], trap_end[]; 309 - void copy_trap_handler(int trap) 310 - { 311 - int i; 312 - paddr_t targetArea = trap * 0x100; 313 - 314 - /* Set target addr */ 315 - trap_end[0] = (int)_mmumain; 316 - 317 - for (i = 0; i <= trap_end - trap_start; i++) 318 - { 319 - SetPhys(targetArea + (i * sizeof(int)), trap_start[i]); 320 - } 321 - } 322 - 323 - void initme() 324 - { 325 - int i; 326 - 327 - for(i = 0; i < HTABSIZ / sizeof(int); i++) 328 - { 329 - ((int *)HTABORG)[i] = 0; 330 - } 331 - 332 - /* Default to hang on unknown exception */ 333 - for(i = 0; i < 30; i++) 334 - { 335 - callback[i] = (MmuTrapHandler)TakeException; 336 - if (i != 1) /* Preserve reset handler */ 337 - copy_trap_handler(i); 338 - } 339 - 340 - /* Serial Interrupt */ 341 - callback[5] = 0; /* Do nothing until the user asks */ 342 - 343 - /* Program Exception */ 344 - callback[6] = (MmuTrapHandler)TakeException; 345 - 346 - /* Floating point exception */ 347 - callback[8] = fpenable; 348 - 349 - /* Ignore decrementer and EE */ 350 - callback[9] = ignore; 351 - 352 - /* Single Step */ 353 - callback[0x20] = (MmuTrapHandler)TakeException; 354 - } 355 - 356 - ppc_map_t *allocpage() 357 - { 358 - MmuFreePage *FreePage = 0; 359 - 360 - if (FreeList) 361 - { 362 - if ((void *)FreeList == (void *)PpcPageTable) 363 - { 364 - fmtout("Problem! FreeList: page 0 is free\n"); 365 - while(1); 366 - } 367 - 368 - FreePage = FreeList; 369 - FreeList = FreeList->next; 370 - ((ppc_map_t*)FreePage)->addr = MMU_ADDR_RESERVED; 371 - return ((ppc_map_t*)FreePage); 372 - } 373 - else 374 - { 375 - while(!mmuisfreepage(NextPage) && NextPage < PPC_PAGE_NUMBER(RamSize)) 376 - { 377 - NextPage++; 378 - } 379 - if (NextPage < PPC_PAGE_NUMBER(RamSize)) 380 - { 381 - if (NextPage < 0x30) 382 - { 383 - fmtout("Problem! NextPage is low (%x)\n", NextPage); 384 - while(1); 385 - } 386 - 387 - PpcPageTable[NextPage].addr = MMU_ADDR_RESERVED; 388 - return &PpcPageTable[NextPage++]; 389 - } 390 - else 391 - { 392 - return NULL; 393 - } 394 - } 395 - } 396 - 397 - void freepage(ppc_map_t *PagePtr) 398 - { 399 - MmuFreePage *FreePage = (MmuFreePage*)PagePtr; 400 - PagePtr->proc = PagePtr->addr = 0; 401 - FreePage->next = FreeList; 402 - FreeList = FreePage; 403 - } 404 - 405 - MmuVsidTree *allocvsidtree() 406 - { 407 - if(FreeTree) 408 - { 409 - MmuVsidTree *result = (MmuVsidTree*)FreeTree; 410 - FreeTree = FreeTree->next; 411 - return result; 412 - } 413 - else if(TreeAlloc >= 3 || !NextTreePage) 414 - { 415 - ppc_map_t *map = allocpage(); 416 - NextTreePage = (MmuVsidTree*)PPC_PAGE_ADDR((map - PpcPageTable)); 417 - TreeAlloc = 1; 418 - return NextTreePage; 419 - } 420 - else 421 - { 422 - return &NextTreePage[TreeAlloc++]; 423 - } 424 - } 425 - 426 - void freevsidtree(MmuVsidTree *tree) 427 - { 428 - int i; 429 - for(i = 0; i < 256; i++) 430 - if(tree->leaves[i]) 431 - freepage(tree->leaves[i]); 432 - MmuFreeTree *NextFreeTree = (MmuFreeTree *)tree; 433 - NextFreeTree->next = FreeTree; 434 - FreeTree = NextFreeTree; 435 - } 436 - 437 - void *allocvsid(int vsid) 438 - { 439 - ppc_map_t *map = allocpage(); 440 - MmuVsidInfo *info; 441 - if(!map) return 0; 442 - map->pte.pteh = map->pte.ptel = 0; 443 - info = (MmuVsidInfo*)PPC_PAGE_ADDR((map - PpcPageTable)); 444 - info->vsid = vsid; 445 - info->next = VsidHead; 446 - VsidHead = info; 447 - return info; 448 - } 449 - 450 - void mmuallocvsid(int vsid, int mask) 451 - { 452 - int i; 453 - for(i = 0; i < 16; i++) 454 - { 455 - if(mask & (1 << i)) 456 - allocvsid((vsid << 4) + i); 457 - } 458 - } 459 - 460 - MmuVsidInfo *findvsid(int vsid) 461 - { 462 - MmuVsidInfo *info; 463 - for(info = VsidHead; info; info = info->next) 464 - { 465 - if(info->vsid == vsid) return info; 466 - } 467 - return 0; 468 - } 469 - 470 - void freevsid(int vsid) 471 - { 472 - int i; 473 - MmuVsidInfo *info = findvsid(vsid); 474 - if(!info) return; 475 - ppc_map_t *map = &PpcPageTable[PPC_PAGE_NUMBER((paddr_t)info)]; 476 - for(i = 0; i < 256; i++) 477 - { 478 - if(info->tree[i]) 479 - freevsidtree(info->tree[i]); 480 - } 481 - freepage(map); 482 - } 483 - 484 - void mmufreevsid(int vsid, int mask) 485 - { 486 - int i; 487 - for(i = 0; i < 16; i++) 488 - { 489 - if(mask & (1 << i)) 490 - freevsid((vsid << 4) + i); 491 - } 492 - } 493 - 494 - int mmuaddpage(ppc_map_info_t *info, int count) 495 - { 496 - int i, iva = 0, vsid, phys, virt; 497 - int ptehi; 498 - int ptelo, vsid_table_hi, vsid_table_lo; 499 - ppc_map_t *PagePtr; 500 - MmuVsidInfo *VsidInfo; 501 - MmuVsidTree *VsidTree; 502 - 503 - for(i = 0; i < count; i++) 504 - { 505 - info[i].phys &= ~PPC_PAGE_MASK; 506 - info[i].addr &= ~PPC_PAGE_MASK; 507 - 508 - virt = info[i].addr; 509 - vsid = ((info[i].addr >> 28) & 15) | (info[i].proc << 4); 510 - VsidInfo = findvsid(vsid); 511 - 512 - if(!VsidInfo) return -1; 513 - 514 - ptehi = (1 << 31) | (vsid << 7) | ((virt >> 22) & 0x3f); 515 - 516 - if(info[i].phys) { 517 - PagePtr = &PpcPageTable[PPC_PAGE_NUMBER(info[i].phys)]; 518 - } else { 519 - PagePtr = allocpage(); 520 - if(!PagePtr) 521 - { 522 - return 0; 523 - } 524 - } 525 - 526 - phys = PPC_PAGE_ADDR((PagePtr - PpcPageTable)); 527 - ptelo = phys & ~PPC_PAGE_MASK; 528 - 529 - if (phys < 0x30000) 530 - { 531 - /* Should not be allocating physical */ 532 - fmtout("Allocated physical: %x, logical %x\n", phys, virt); 533 - fmtout("PagePtr %x (page %d)\n", PagePtr, i); 534 - fmtout("info [ %x %x %x %x ]\n", info[i].proc, info[i].addr, info[i].flags, info[i].phys); 535 - while(1); 536 - } 537 - 538 - /* Update page data */ 539 - PagePtr->pte.pteh = ptehi; 540 - PagePtr->pte.ptel = ptelo; 541 - PagePtr->proc = info[i].proc; 542 - PagePtr->addr = virt; 543 - 544 - vsid_table_hi = virt >> 20 & 255; 545 - vsid_table_lo = virt >> 12 & 255; 546 - 547 - if(!VsidInfo->tree[vsid_table_hi]) 548 - VsidInfo->tree[vsid_table_hi] = allocvsidtree(); 549 - VsidTree = VsidInfo->tree[vsid_table_hi]; 550 - if(!VsidTree) return 0; 551 - VsidTree->leaves[vsid_table_lo] = PagePtr; 552 - 553 - __asm__("tlbie %0\n\tsync\n\tisync" : : "r" (iva)); 554 - } 555 - return 1; 556 - } 557 - 558 - paddr_t mmunewpage() 559 - { 560 - ppc_map_t *PagePtr = allocpage(); 561 - if (!PagePtr) return 0; 562 - return PPC_PAGE_ADDR(PagePtr - PpcPageTable); 563 - } 564 - 565 - ppc_pteg_t *PtegFromPage(ppc_map_t *map, int hfun) 566 - { 567 - if(!map->proc && !map->addr) return 0; 568 - return &PpcHashedPTE[PtegNumber(map->addr, hfun)]; 569 - } 570 - 571 - int PageMatch(vaddr_t addr, ppc_pte_t pte) 572 - { 573 - int vsid_pte = (pte.pteh >> 7) & 15, api_pte = pte.pteh & 63; 574 - return 575 - (((addr >> 28) & 15) == vsid_pte) && 576 - (((addr >> 22) & 63) == api_pte); 577 - } 578 - 579 - ppc_map_t *mmuvirtmap(vaddr_t addr) 580 - { 581 - int seg = (addr >> 28) & 15; 582 - MmuVsidInfo *seginfo = Segs[seg]; 583 - MmuVsidTree *segtree = 0; 584 - if(!seginfo) return 0; 585 - segtree = seginfo->tree[(addr >> 20) & 255]; 586 - if(!segtree) return 0; 587 - return segtree->leaves[(addr >> 12) & 255]; 588 - } 589 - 590 - void mmudelpage(ppc_map_info_t *info, int count) 591 - { 592 - int i, j, k, ipa; 593 - ppc_map_t *PagePtr; 594 - ppc_pteg_t *PageEntry; 595 - ppc_pte_t ZeroPte = { 0 }; 596 - 597 - for(i = 0; i < count; i++) 598 - { 599 - if (info[i].phys) 600 - { 601 - ipa = info[i].phys; 602 - PagePtr = &PpcPageTable[ipa]; 603 - info[i].proc = PagePtr->proc; 604 - info[i].addr = PagePtr->addr; 605 - } 606 - else 607 - { 608 - PagePtr = mmuvirtmap(info[i].addr); 609 - ipa = PPC_PAGE_ADDR(PagePtr - PpcPageTable); 610 - } 611 - 612 - for(j = 0; j < 2; j++) 613 - { 614 - PageEntry = PtegFromPage(PagePtr, j); 615 - for(k = 0; k < 8; k++) 616 - { 617 - if(PageMatch(ipa, PageEntry->block[k])) 618 - { 619 - if(PageEntry->block[k].ptel & 0x100) 620 - info[i].flags |= MMU_PAGE_DIRTY; 621 - PageEntry->block[k] = ZeroPte; 622 - } 623 - } 624 - } 625 - freepage(PagePtr); 626 - __asm__("tlbie %0\n\tsync\n\tisync" : : "r" (info[i].addr)); 627 - } 628 - } 629 - 630 - void mmugetpage(ppc_map_info_t *info, int count) 631 - { 632 - int i; 633 - ppc_map_t *PagePtr; 634 - 635 - for( i = 0; i < count; i++ ) 636 - { 637 - if(!info[i].addr && !info[i].proc) 638 - { 639 - PagePtr = &((ppc_map_t*)PAGETAB)[info[i].phys]; 640 - info[i].proc = PagePtr->proc; 641 - info[i].addr = PagePtr->addr; 642 - info[i].flags = MMU_ALL_RW; 643 - } else { 644 - vaddr_t addr = info[i].addr; 645 - int vsid = ((addr >> 28) & 15) | (info[i].proc << 4); 646 - PagePtr = mmuvirtmap(info[i].addr); 647 - if(!PagePtr) 648 - info[i].phys = 0; 649 - else 650 - { 651 - info[i].phys = PPC_PAGE_ADDR(PagePtr - PpcPageTable); 652 - info[i].flags = MMU_ALL_RW; // HACK 653 - } 654 - } 655 - } 656 - } 657 - 658 - int mmuisfreepage(paddr_t pageno) 659 - { 660 - ppc_map_t *PagePtr = PpcPageTable + pageno; 661 - return !PagePtr->addr; 662 - } 663 - 664 - void mmusetvsid(int start, int end, int vsid) 665 - { 666 - int i, sr, s_vsid; 667 - for(i = start; i < end; i++) 668 - { 669 - s_vsid = (vsid << 4) | (i & 15); 670 - sr = (GetSR(i) & ~PPC_VSID_MASK) | s_vsid; 671 - if (Booted) 672 - SetSR(i, sr); 673 - Segs[i] = findvsid(s_vsid); 674 - Vsid[i] = vsid; 675 - } 676 - } 677 - 678 - int ptegreload(ppc_trap_frame_t *frame, vaddr_t addr) 679 - { 680 - int hfun = (Clock >> 3) & 1, ptegnum = PtegNumber(addr, hfun); 681 - ppc_map_t *map = mmuvirtmap(addr); 682 - if(!map) return 0; 683 - map->pte.pteh = (map->pte.pteh & ~64) | (hfun << 6); 684 - PpcHashedPTE[ptegnum].block[Clock & 7] = map->pte; 685 - #if 0 686 - fmtout("Reloading addr %x (phys %x) at %x[%x] (%x:%x)\r\n", 687 - addr, PPC_PAGE_ADDR(map - PpcPageTable), ptegnum, Clock & 15, 688 - PpcHashedPTE[ptegnum].block[Clock&7].pteh, 689 - PpcHashedPTE[ptegnum].block[Clock&7].ptel); 690 - #endif 691 - Clock++; 692 - __asm__("tlbie %0\n\tsync\n\tisync" : : "r" (addr)); 693 - return 1; 694 - } 695 - 696 - void printmap(vaddr_t vaddr, ppc_map_t *map) 697 - { 698 - fmtout("%x: proc %x addr %x\n", 699 - PPC_PAGE_ADDR(map - PpcPageTable), 700 - map->proc, vaddr); 701 - } 702 - 703 - void dumptree(vaddr_t vaddr, MmuVsidTree *tree) 704 - { 705 - int j; 706 - 707 - for (j = 0; j < 256; j++) 708 - { 709 - if (tree->leaves[j]) 710 - { 711 - printmap(vaddr | (j << 12), tree->leaves[j]); 712 - } 713 - } 714 - } 715 - 716 - void dumpvsid(MmuVsidInfo *vsid) 717 - { 718 - int i; 719 - 720 - fmtout("vsid %d (%x):\n", vsid->vsid>>4, vsid->vsid<<28); 721 - for (i = 0; i < 256; i++) 722 - { 723 - if (vsid->tree[i]) 724 - { 725 - dumptree((vsid->vsid<<28) | i << 20, vsid->tree[i]); 726 - } 727 - } 728 - } 729 - 730 - void dumpmap() 731 - { 732 - int i,j; 733 - ppc_map_t *map; 734 - MmuVsidInfo *vsid; 735 - fmtout("Address spaces:\n"); 736 - for (vsid = VsidHead; vsid; vsid = vsid->next) 737 - { 738 - dumpvsid(vsid); 739 - } 740 - } 741 - 742 - void callkernel(void *fun_ptr, void *arg) 743 - { 744 - int i; 745 - 746 - Booted = 1; 747 - 748 - for (i = 0; i < 16; i++) 749 - { 750 - // Patch up the vsid map. We shouldn't muck with these until we're 751 - // booted. 752 - mmusetvsid(i, i+1, Vsid[i]); 753 - } 754 - 755 - void (*fun)(void *) = fun_ptr; 756 - __asm__("mfmsr 3\n\t" 757 - "ori 3,3,0x30\n\t" 758 - "mtmsr 3\n\t" 759 - "mtsdr1 %0\n\t" 760 - "mr 0,%2\n\t" 761 - "mtctr 0\n\t" 762 - "mr 3,%1\n\t" 763 - "bctrl\n\t" 764 - : : "r" (HTABORG), "r" (arg), "r" (fun)); 765 - /* BYE ! */ 766 - }
-14
sdk/lib/ppcmmu/mmuobject.h
··· 1 - #pragma once 2 - 3 - void initme(void); 4 - void mmusetramsize(paddr_t size); 5 - int mmuaddpage(ppc_map_info_t *info, int count); 6 - void mmudelpage(ppc_map_info_t *info, int count); 7 - void mmugetpage(ppc_map_info_t *info, int count); 8 - void mmusetvsid(int start, int end, int vsid); 9 - void *allocvsid(int); 10 - void mmuallocvsid(int vsid, int mask); 11 - void freevsid(int); 12 - void mmufreevsid(int vsid, int mask); 13 - int mmunitest(void); 14 - void callkernel(void *fun_ptr, void *arg);
-23
sdk/lib/ppcmmu/mmutest.c
··· 1 - #include "ppcmmu/mmu.h" 2 - #include "ppcmmu/mmuutil.h" 3 - #include "mmuobject.h" 4 - 5 - int mmunitest() 6 - { 7 - int ret; 8 - int (*fun)(int ret) = (void *)0x80000000; 9 - ppc_map_info_t info = { 0 }; 10 - volatile int oldmsr, msr = 0x2030; 11 - __asm__("mfmsr 0\n\tstw 0,0(%0)" : : "r" (&oldmsr)); 12 - mmusetvsid(8, 9, 0); 13 - info.flags = MMU_ALL_RW; 14 - info.proc = 0; 15 - info.addr = (vaddr_t)fun; 16 - mmuaddpage(&info, 1); 17 - __asm__("mtmsr %0" : : "r" (msr)); 18 - __asm__("mtsdr1 %0" : : "r" (HTABORG)); 19 - *((int *)fun) = 0x4e800020; 20 - ret = fun(3); 21 - __asm__("mtmsr %0" : : "r" (oldmsr)); 22 - return ret != 3; 23 - }
-411
sdk/lib/ppcmmu/mmuutil.c
··· 1 - #include "ppcmmu/mmu.h" 2 - #include "ppcmmu/mmuutil.h" 3 - 4 - inline int GetMSR() { 5 - register int res asm ("r3"); 6 - __asm__("mfmsr 3"); 7 - return res; 8 - } 9 - 10 - inline int GetDEC() { 11 - register int res asm ("r3"); 12 - __asm__("mfdec 3"); 13 - return res; 14 - } 15 - 16 - __asm__("\t.globl GetPhys\n" 17 - "GetPhys:\t\n" 18 - "mflr 0\n\t" 19 - "stwu 0,-16(1)\n\t" 20 - "mfmsr 5\n\t" 21 - "andi. 6,5,0xffef\n\t"/* turn off MSR[DR] */ 22 - "mtmsr 6\n\t" 23 - "isync\n\t" 24 - "sync\n\t" 25 - "lwz 3,0(3)\n\t" /* Get actual value at phys addr r3 */ 26 - "mtmsr 5\n\t" 27 - "isync\n\t" 28 - "sync\n\t" 29 - "lwz 0,0(1)\n\t" 30 - "addi 1,1,16\n\t" 31 - "mtlr 0\n\t" 32 - "blr" 33 - ); 34 - 35 - __asm__("\t.globl GetPhysHalf\n" 36 - "GetPhysHalf:\t\n" 37 - "mflr 0\n\t" 38 - "stwu 0,-16(1)\n\t" 39 - "mfmsr 5\n\t" 40 - "andi. 6,5,0xffef\n\t"/* turn off MSR[DR] */ 41 - "mtmsr 6\n\t" 42 - "isync\n\t" 43 - "sync\n\t" 44 - "lhz 3,0(3)\n\t" /* Get actual value at phys addr r3 */ 45 - "mtmsr 5\n\t" 46 - "isync\n\t" 47 - "sync\n\t" 48 - "lwz 0,0(1)\n\t" 49 - "addi 1,1,16\n\t" 50 - "mtlr 0\n\t" 51 - "blr" 52 - ); 53 - 54 - __asm__("\t.globl GetPhysByte\n" 55 - "GetPhysByte:\t\n" 56 - "mflr 0\n\t" 57 - "stwu 0,-16(1)\n\t" 58 - "mfmsr 5\n\t" 59 - "andi. 6,5,0xffef\n\t"/* turn off MSR[DR] */ 60 - "mtmsr 6\n\t" 61 - "isync\n\t" 62 - "sync\n\t" 63 - "lbz 3,0(3)\n\t" /* Get actual value at phys addr r3 */ 64 - "mtmsr 5\n\t" 65 - "isync\n\t" 66 - "sync\n\t" 67 - "lwz 0,0(1)\n\t" 68 - "addi 1,1,16\n\t" 69 - "mtlr 0\n\t" 70 - "blr" 71 - ); 72 - 73 - __asm__("\t.globl SetPhys\n" 74 - "SetPhys:\t\n" 75 - "mflr 0\n\t" 76 - "stwu 0,-16(1)\n\t" 77 - "mfmsr 5\n\t" 78 - "andi. 6,5,0xffef\n\t"/* turn off MSR[DR] */ 79 - "mtmsr 6\n\t" 80 - "sync\n\t" 81 - "eieio\n\t" 82 - "stw 4,0(3)\n\t" /* Set actual value at phys addr r3 */ 83 - "dcbst 0,3\n\t" 84 - "mtmsr 5\n\t" 85 - "sync\n\t" 86 - "eieio\n\t" 87 - "mr 3,4\n\t" 88 - "lwz 0,0(1)\n\t" 89 - "addi 1,1,16\n\t" 90 - "mtlr 0\n\t" 91 - "blr" 92 - ); 93 - 94 - __asm__("\t.globl SetPhysHalf\n" 95 - "SetPhysHalf:\t\n" 96 - "mflr 0\n\t" 97 - "stwu 0,-16(1)\n\t" 98 - "mfmsr 5\n\t" 99 - "andi. 6,5,0xffef\n\t"/* turn off MSR[DR] */ 100 - "mtmsr 6\n\t" 101 - "sync\n\t" 102 - "eieio\n\t" 103 - "sth 4,0(3)\n\t" /* Set actual value at phys addr r3 */ 104 - "dcbst 0,3\n\t" 105 - "mtmsr 5\n\t" 106 - "sync\n\t" 107 - "eieio\n\t" 108 - "mr 3,4\n\t" 109 - "lwz 0,0(1)\n\t" 110 - "addi 1,1,16\n\t" 111 - "mtlr 0\n\t" 112 - "blr" 113 - ); 114 - 115 - __asm__("\t.globl SetPhysByte\n" 116 - "SetPhysByte:\t\n" 117 - "mflr 0\n\t" 118 - "stwu 0,-16(1)\n\t" 119 - "mfmsr 5\n\t" 120 - "andi. 6,5,0xffef\n\t"/* turn off MSR[DR] */ 121 - "mtmsr 6\n\t" 122 - "sync\n\t" 123 - "eieio\n\t" 124 - "stb 4,0(3)\n\t" /* Set actual value at phys addr r3 */ 125 - "dcbst 0,3\n\t" 126 - "mtmsr 5\n\t" 127 - "sync\n\t" 128 - "eieio\n\t" 129 - "mr 3,4\n\t" 130 - "lwz 0,0(1)\n\t" 131 - "addi 1,1,16\n\t" 132 - "mtlr 0\n\t" 133 - "blr" 134 - ); 135 - 136 - inline int GetSR(int n) { 137 - register int res = 0; 138 - switch( n ) { 139 - case 0: 140 - __asm__("mfsr %0,0" : "=r" (res)); 141 - break; 142 - case 1: 143 - __asm__("mfsr %0,1" : "=r" (res)); 144 - break; 145 - case 2: 146 - __asm__("mfsr %0,2" : "=r" (res)); 147 - break; 148 - case 3: 149 - __asm__("mfsr %0,3" : "=r" (res)); 150 - break; 151 - case 4: 152 - __asm__("mfsr %0,4" : "=r" (res)); 153 - break; 154 - case 5: 155 - __asm__("mfsr %0,5" : "=r" (res)); 156 - break; 157 - case 6: 158 - __asm__("mfsr %0,6" : "=r" (res)); 159 - break; 160 - case 7: 161 - __asm__("mfsr %0,7" : "=r" (res)); 162 - break; 163 - case 8: 164 - __asm__("mfsr %0,8" : "=r" (res)); 165 - break; 166 - case 9: 167 - __asm__("mfsr %0,9" : "=r" (res)); 168 - break; 169 - case 10: 170 - __asm__("mfsr %0,10" : "=r" (res)); 171 - break; 172 - case 11: 173 - __asm__("mfsr %0,11" : "=r" (res)); 174 - break; 175 - case 12: 176 - __asm__("mfsr %0,12" : "=r" (res)); 177 - break; 178 - case 13: 179 - __asm__("mfsr %0,13" : "=r" (res)); 180 - break; 181 - case 14: 182 - __asm__("mfsr %0,14" : "=r" (res)); 183 - break; 184 - case 15: 185 - __asm__("mfsr %0,15" : "=r" (res)); 186 - break; 187 - } 188 - return res; 189 - } 190 - 191 - inline void SetSR(int n, int val) { 192 - switch( n ) { 193 - case 0: 194 - __asm__("mtsr 0,%0" : : "r" (val)); 195 - break; 196 - case 1: 197 - __asm__("mtsr 1,%0" : : "r" (val)); 198 - break; 199 - case 2: 200 - __asm__("mtsr 2,%0" : : "r" (val)); 201 - break; 202 - case 3: 203 - __asm__("mtsr 3,%0" : : "r" (val)); 204 - break; 205 - case 4: 206 - __asm__("mtsr 4,%0" : : "r" (val)); 207 - break; 208 - case 5: 209 - __asm__("mtsr 5,%0" : : "r" (val)); 210 - break; 211 - case 6: 212 - __asm__("mtsr 6,%0" : : "r" (val)); 213 - break; 214 - case 7: 215 - __asm__("mtsr 7,%0" : : "r" (val)); 216 - break; 217 - case 8: 218 - __asm__("mtsr 8,%0" : : "r" (val)); 219 - break; 220 - case 9: 221 - __asm__("mtsr 9,%0" : : "r" (val)); 222 - break; 223 - case 10: 224 - __asm__("mtsr 10,%0" : : "r" (val)); 225 - break; 226 - case 11: 227 - __asm__("mtsr 11,%0" : : "r" (val)); 228 - break; 229 - case 12: 230 - __asm__("mtsr 12,%0" : : "r" (val)); 231 - break; 232 - case 13: 233 - __asm__("mtsr 13,%0" : : "r" (val)); 234 - break; 235 - case 14: 236 - __asm__("mtsr 14,%0" : : "r" (val)); 237 - break; 238 - case 15: 239 - __asm__("mtsr 15,%0" : : "r" (val)); 240 - break; 241 - } 242 - } 243 - 244 - void GetBat( int bat, int inst, int *batHi, int *batLo ) { 245 - register int bh asm("r3"), bl asm("r4"); 246 - if( inst ) { 247 - switch( bat ) { 248 - case 0: 249 - __asm__("mfibatu 3,0"); 250 - __asm__("mfibatl 4,0"); 251 - break; 252 - case 1: 253 - __asm__("mfibatu 3,1"); 254 - __asm__("mfibatl 4,1"); 255 - break; 256 - case 2: 257 - __asm__("mfibatu 3,2"); 258 - __asm__("mfibatl 4,2"); 259 - break; 260 - case 3: 261 - __asm__("mfibatu 3,3"); 262 - __asm__("mfibatl 4,3"); 263 - break; 264 - } 265 - } else { 266 - switch( bat ) { 267 - case 0: 268 - __asm__("mfdbatu 3,0"); 269 - __asm__("mfdbatl 4,0"); 270 - break; 271 - case 1: 272 - __asm__("mfdbatu 3,1"); 273 - __asm__("mfdbatl 4,1"); 274 - break; 275 - case 2: 276 - __asm__("mfdbatu 3,2"); 277 - __asm__("mfdbatl 4,2"); 278 - break; 279 - case 3: 280 - __asm__("mfdbatu 3,3"); 281 - __asm__("mfdbatl 4,3"); 282 - break; 283 - } 284 - } 285 - *batHi = bh; 286 - *batLo = bl; 287 - } 288 - 289 - #define BATSET(n,t) \ 290 - case n: __asm__("mt" #t "batu " #n ",%0\n\tmt" #t "batl " #n ",%1" \ 291 - : : "r" (batHi), "r" (batLo)); break; 292 - 293 - void SetBat( int bat, int inst, int batHi, int batLo ) { 294 - if( inst ) { 295 - switch( bat ) { 296 - BATSET(0,i); 297 - BATSET(1,i); 298 - BATSET(2,i); 299 - BATSET(3,i); 300 - } 301 - } else { 302 - switch( bat ) { 303 - BATSET(0,d); 304 - BATSET(1,d); 305 - BATSET(2,d); 306 - BATSET(3,d); 307 - } 308 - } 309 - __asm__("isync\n\tsync"); 310 - } 311 - 312 - inline int GetSDR1() { 313 - register int res asm("r3"); 314 - __asm__("mfsdr1 3"); 315 - return res; 316 - } 317 - 318 - inline void SetSDR1( int sdr ) { 319 - int i,j; 320 - __asm__("mtsdr1 3"); 321 - __asm__("sync"); 322 - __asm__("isync"); 323 - 324 - for( i = 0; i < 256; i++ ) { 325 - j = i << 12; 326 - __asm__("tlbie %0,0" : : "r" (j)); 327 - } 328 - __asm__("eieio"); 329 - __asm__("tlbsync"); 330 - __asm__("ptesync"); 331 - } 332 - 333 - inline int BatTranslate( int batu, int batl, int virt ) { 334 - int mask; 335 - if(batu & 0x3fc) 336 - { 337 - mask = ~(0x1ffff | ((batu & 0x3fc)>>2)<<17); 338 - if((batu & 2) && ((batu & mask) == (virt & mask))) 339 - return (batl & mask) | (virt & ~mask); 340 - } else { 341 - mask = ~(0x1ffff | (batl << 17)); 342 - if(!(batl & 0x40) || ((batu & mask) != (virt & mask))) 343 - return (batl & mask) | (virt & ~mask); 344 - } 345 - return -1; 346 - } 347 - 348 - inline int BatHit( int batu, int batl, int virt ) { 349 - return BatTranslate( batu, batl, virt ) != -1; 350 - } 351 - 352 - /* translate address */ 353 - int PpcVirt2phys( vaddr_t virt, int inst ) { 354 - int msr = GetMSR(); 355 - int txmask = inst ? 0x20 : 0x10; 356 - int i, bath, batl, sr, sdr1, physbase, vahi, valo; 357 - int npteg, hash, hashmask, ptehi, ptelo, ptegaddr; 358 - int vsid, pteh, ptevsid, pteapi; 359 - 360 - if( msr & txmask ) { 361 - sr = GetSR( virt >> 28 ); 362 - vsid = sr & 0xfffffff; 363 - vahi = vsid >> 4; 364 - valo = (vsid << 28) | (virt & 0xfffffff); 365 - if( sr & 0x80000000 ) { 366 - return valo; 367 - } 368 - 369 - for( i = 0; i < 4; i++ ) { 370 - GetBat( i, inst, &bath, &batl ); 371 - if( BatHit( bath, batl, virt ) ) { 372 - return BatTranslate( bath, batl, virt ); 373 - } 374 - } 375 - 376 - sdr1 = GetSDR1(); 377 - 378 - physbase = sdr1 & ~0xffff; 379 - hashmask = ((sdr1 & 0x1ff) << 10) | 0x3ff; 380 - hash = (vsid & 0x7ffff) ^ ((valo >> 12) & 0xffff); 381 - npteg = hashmask + 1; 382 - 383 - for( pteh = 0; pteh < 0x80; pteh += 64, hash ^= 0x7ffff ) { 384 - ptegaddr = ((hashmask & hash) * 64) + physbase; 385 - 386 - for( i = 0; i < 8; i++ ) { 387 - ptehi = GetPhys( ptegaddr + (i * 8) ); 388 - ptelo = GetPhys( ptegaddr + (i * 8) + 4 ); 389 - 390 - ptevsid = (ptehi >> 7) & 0xffffff; 391 - pteapi = ptehi & 0x3f; 392 - 393 - if( (ptehi & 64) != pteh ) continue; 394 - if( ptevsid != (vsid & 0xffffff) ) continue; 395 - if( pteapi != ((virt >> 22) & 0x3f) ) continue; 396 - 397 - return (ptelo & 0xfffff000) | (virt & 0xfff); 398 - } 399 - } 400 - return -1; 401 - } else { 402 - return virt; 403 - } 404 - } 405 - 406 - int PtegNumber(vaddr_t virt, int hfun) 407 - { 408 - int sr = GetSR( (virt >> 28) & 0xf ); 409 - int vsid = sr & PPC_VSID_MASK; 410 - return ((((vsid & 0x7ffff) ^ ((virt >> 12) & 0xffff)) ^ (hfun ? -1 : 0)) & ((HTABSIZ - 1) >> 3) & 0x3ff); 411 - }
-2
sdk/lib/pseh/CMakeLists.txt
··· 43 43 i386/framebased-gcchack-asm.S) 44 44 elseif(ARCH STREQUAL "amd64") 45 45 list(APPEND SOURCE amd64/framebased.S) 46 - elseif(ARCH STREQUAL "powerpc") 47 - list(APPEND SOURCE powerpc/framebased.S) 48 46 endif() 49 47 50 48 add_library(pseh ${SOURCE} ${ASM_SOURCE})
-69
sdk/lib/pseh/powerpc/framebased.S
··· 1 - // Copyright (c) 2004/2005 KJK::Hyperion 2 - 3 - // Permission is hereby granted, free of charge, to any person obtaining a copy 4 - // of this software and associated documentation files (the "Software"), to deal 5 - // in the Software without restriction, including without limitation the rights 6 - // to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 7 - // copies of the Software, and to permit persons to whom the Software is 8 - // furnished to dos so, subject to the following conditions: 9 - 10 - // The above copyright notice and this permission notice shall be included in all 11 - // copies or substantial portions of the Software. 12 - 13 - // THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 14 - // IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 15 - // FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE 16 - // AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 17 - // LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 18 - // OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 19 - // SOFTWARE. 20 - 21 - .text 22 - 23 - .globl _SEHCleanHandlerEnvironment 24 - _SEHCleanHandlerEnvironment: 25 - blr 26 - 27 - .globl _SEHCurrentRegistration 28 - _SEHCurrentRegistration: 29 - lwz 3,0(13) 30 - blr 31 - 32 - // R3: Frame to store in 33 - .globl _SEHRegisterFrame 34 - _SEHRegisterFrame: 35 - lwz 4,0(13) 36 - stw 3,0(13) 37 - stw 4,0(3) 38 - blr 39 - 40 - .globl _SEHUnregisterFrame 41 - _SEHUnregisterFrame: 42 - lwz 3,0(13) 43 - lwz 3,0(3) 44 - stw 3,0(13) 45 - blr 46 - 47 - .globl _SEHGlobalUnwind 48 - _SEHGlobalUnwind: 49 - 50 - .extern _SEHRtlUnwind 51 - 52 - // RtlUnwind clobbers all the "don't clobber" registers, so we save them 53 - lwz 3,4(1) 54 - stwu 1,-132(1) 55 - stmw 2,-128(1) 56 - 57 - xor 6,6,6 58 - xor 5,5,5 59 - lis 4,.RestoreRegisters@ha 60 - addi 4,4,.RestoreRegisters@l # Where to jump back to 61 - # We already have r3 62 - bl _SEHRtlUnwind 63 - 64 - .RestoreRegisters: 65 - lmw 2,-128(1) 66 - addi 1,1,132 67 - blr 68 - 69 - // EOF
-10
sdk/lib/rtl/CMakeLists.txt
··· 104 104 arm/except.c 105 105 byteswap.c 106 106 mem.c) 107 - elseif(ARCH STREQUAL "powerpc") 108 - list(APPEND ASM_SOURCE 109 - powerpc/rtlmem.s 110 - powerpc/rtlswap.s) 111 - list(APPEND SOURCE 112 - byteswap.c 113 - powerpc/debug.c 114 - powerpc/except.c 115 - powerpc/interlocked.c 116 - powerpc/thread.c) 117 107 endif() 118 108 119 109 add_asm_files(rtl_asm ${ASM_SOURCE})
-41
sdk/lib/rtl/powerpc/debug.c
··· 1 - #include <ntddk.h> 2 - #include <winddk.h> 3 - 4 - NTKERNELAPI 5 - VOID 6 - DbgBreakPoint() { __asm__("ti 31,0,0"); } 7 - 8 - NTKERNELAPI 9 - VOID 10 - DbgBreakPointWithStatus(ULONG Status) { __asm__("ti 31,0,0"); } 11 - 12 - ULONG 13 - NTAPI 14 - DebugService 15 - (ULONG Service, PVOID Argument1, PVOID Argument1, PVOID Argument3, PVOID Argument4) 16 - { 17 - ULONG Result; 18 - __asm__("mr 0,%1\n\t" 19 - "mr 3,%2\n\t" 20 - "mr 4,%3\n\t" 21 - "mr 5,%4\n\t" 22 - "mr 6,%5\n\t" 23 - "mr 7,%6\n\t" 24 - "sc\n\t" 25 - "mr %0,3\n\t" : 26 - "=r" (Result) : 27 - "r" (0x10000), 28 - "r" (Service), 29 - "r" (Argument1), 30 - "r" (Argument2), 31 - "r" (Argument3), 32 - "r" (Argument4) ); 33 - return Result; 34 - } 35 - 36 - VOID 37 - NTAPI 38 - DebugService2 39 - (PVOID Arg1, PVOID Arg2, ULONG Service) 40 - { 41 - }
-54
sdk/lib/rtl/powerpc/except.c
··· 1 - /* COPYRIGHT: See COPYING in the top level directory 2 - * PROJECT: ReactOS Runtime Library 3 - * PURPOSE: User-Mode Exception Support 4 - * FILE: lib/rtl/powerpc/except.c 5 - * PROGRAMERS: Alex Ionescu (alex@relsoft.net) 6 - * David Welch <welch@cwcom.net> 7 - * Skywing <skywing@valhallalegends.com> 8 - * KJK::Hyperion <noog@libero.it> 9 - */ 10 - 11 - /* INCLUDES *****************************************************************/ 12 - 13 - #include <rtl.h> 14 - #define NDEBUG 15 - #include <debug.h> 16 - 17 - NTSYSAPI 18 - VOID 19 - NTAPI 20 - RtlCaptureContext 21 - (OUT PCONTEXT ContextRecord) 22 - { 23 - // XXX arty fixme 24 - } 25 - 26 - NTSYSAPI 27 - BOOLEAN 28 - NTAPI 29 - RtlDispatchException 30 - (IN PEXCEPTION_RECORD ExceptionRecord, 31 - IN PCONTEXT Context) 32 - { 33 - // XXX arty fixme 34 - return TRUE; 35 - } 36 - 37 - VOID 38 - NTAPI 39 - RtlUnwind(IN PVOID TargetFrame OPTIONAL, 40 - IN PVOID TargetIp OPTIONAL, 41 - IN PEXCEPTION_RECORD ExceptionRecord OPTIONAL, 42 - IN PVOID ReturnValue) 43 - { 44 - // XXX arty fixme 45 - } 46 - 47 - NTSYSAPI 48 - VOID 49 - NTAPI 50 - RtlGetCallersAddress( 51 - OUT PVOID *CallersAddress, 52 - OUT PVOID *CallersCaller) 53 - { 54 - }
-128
sdk/lib/rtl/powerpc/interlocked.c
··· 1 - typedef unsigned int size_t; 2 - #include <ntddk.h> 3 - #include <winddk.h> 4 - #include <string.h> 5 - #include <intrin.h> 6 - 7 - NTKERNELAPI 8 - LONG 9 - FASTCALL 10 - InterlockedExchange( 11 - LONG volatile *Target, LONG Value) 12 - { 13 - return _InterlockedExchange(Target, Value); 14 - } 15 - 16 - NTKERNELAPI 17 - LONG 18 - FASTCALL 19 - InterlockedExchangeAdd( 20 - LONG volatile *Target, LONG Value) 21 - { 22 - return _InterlockedExchangeAdd(Target, Value); 23 - } 24 - 25 - NTKERNELAPI 26 - LONG 27 - WINAPI 28 - InterlockedCompareExchange( 29 - LONG volatile *Destination, 30 - LONG Exchange, LONG Comparand) 31 - { 32 - return _InterlockedCompareExchange(Destination, Exchange, Comparand); 33 - } 34 - 35 - NTKERNELAPI 36 - LONG 37 - FASTCALL 38 - InterlockedIncrement 39 - (IN OUT LONG volatile *Addend) 40 - { 41 - return _InterlockedIncrement(Addend); 42 - } 43 - 44 - NTKERNELAPI 45 - LONG 46 - FASTCALL 47 - InterlockedDecrement( 48 - IN OUT LONG volatile *Addend) 49 - { 50 - return _InterlockedDecrement(Addend); 51 - } 52 - 53 - PSLIST_ENTRY 54 - WINAPI 55 - InterlockedPopEntrySList( 56 - PSLIST_HEADER ListHead) 57 - { 58 - PSLIST_ENTRY Result = NULL; 59 - KIRQL OldIrql; 60 - static BOOLEAN GLLInit = FALSE; 61 - static KSPIN_LOCK GlobalListLock; 62 - 63 - if(!GLLInit) 64 - { 65 - KeInitializeSpinLock(&GlobalListLock); 66 - GLLInit = TRUE; 67 - } 68 - 69 - KeAcquireSpinLock(&GlobalListLock, &OldIrql); 70 - if(ListHead->Next.Next) 71 - { 72 - Result = ListHead->Next.Next; 73 - ListHead->Next.Next = Result->Next; 74 - } 75 - KeReleaseSpinLock(&GlobalListLock, OldIrql); 76 - return Result; 77 - } 78 - 79 - NTKERNELAPI 80 - PSLIST_ENTRY 81 - FASTCALL 82 - InterlockedPushEntrySList( 83 - IN PSLIST_HEADER ListHead, 84 - IN PSLIST_ENTRY ListEntry) 85 - { 86 - PVOID PrevValue; 87 - 88 - do 89 - { 90 - PrevValue = ListHead->Next.Next; 91 - ListEntry->Next = PrevValue; 92 - } 93 - while (InterlockedCompareExchangePointer(&ListHead->Next.Next, 94 - ListEntry, 95 - PrevValue) != PrevValue); 96 - 97 - return (PSLIST_ENTRY)PrevValue; 98 - } 99 - 100 - NTKERNELAPI 101 - VOID 102 - FASTCALL 103 - ExInterlockedAddLargeStatistic( 104 - IN PLARGE_INTEGER Addend, 105 - IN ULONG Increment) 106 - { 107 - _InterlockedAddLargeStatistic(&Addend->QuadPart, Increment); 108 - } 109 - 110 - NTKERNELAPI 111 - LONGLONG 112 - FASTCALL 113 - ExInterlockedCompareExchange64( 114 - IN OUT PLONGLONG Destination, 115 - IN PLONGLONG Exchange, 116 - IN PLONGLONG Comparand, 117 - IN PKSPIN_LOCK Lock) 118 - { 119 - KIRQL OldIrql; 120 - LONGLONG Result; 121 - 122 - KeAcquireSpinLock(Lock, &OldIrql); 123 - Result = *Destination; 124 - if(*Destination == Result) 125 - *Destination = *Exchange; 126 - KeReleaseSpinLock(Lock, OldIrql); 127 - return Result; 128 - }
-101
sdk/lib/rtl/powerpc/rtlmem.s
··· 1 - /* 2 - * 3 - */ 4 - 5 - .globl RtlCompareMemory 6 - .globl RtlCompareMemoryUlong 7 - .globl RtlFillMemory 8 - .globl RtlFillMemoryUlong 9 - .globl RtlFillMemoryUlonglong 10 - .globl RtlMoveMemory 11 - .globl RtlZeroMemory 12 - 13 - RtlCompareMemory: 14 - 1: 15 - mr 0,5 16 - 17 - cmpwi 0,5,4 18 - blt 2f 19 - 20 - lwz 6,0(3) 21 - lwz 7,0(3) 22 - addi 6,6,-7 23 - cmpwi 0,6,0 24 - bne 2f 25 - 26 - addi 3,3,4 27 - addi 4,4,4 28 - subi 5,5,4 29 - b 1b 30 - 31 - 2: 32 - cmpwi 0,5,0 33 - beq 3f 34 - 35 - lbz 6,0(3) 36 - lbz 7,0(4) 37 - addi 6,6,-7 38 - cmpwi 0,6,0 39 - bne 3f 40 - 41 - addi 3,3,1 42 - addi 4,4,1 43 - subi 5,5,1 44 - b 2b 45 - 46 - 3: 47 - mr 4,0 48 - sub 3,4,5 49 - blr 50 - 51 - RtlCompareMemoryUlong: 52 - or 6,3,4 53 - or 6,6,5 54 - andi. 6,6,3 55 - bne RtlCompareMemory 56 - xor 3,3,3 57 - blr 58 - 59 - RtlFillMemory: 60 - rlwinm 6,5,8,0xff00 61 - rlwinm 7,5,0,0xff 62 - or 7,6,7 63 - rlwinm 5,7,16,0xffff0000 64 - or 5,7,5 65 - 66 - 1: 67 - cmpwi 0,4,4 68 - blt 2f 69 - 70 - stw 5,0(3) 71 - 72 - addi 3,3,4 73 - subi 4,4,4 74 - b 1b 75 - 76 - 2: 77 - cmpwi 0,4,0 78 - beq 3f 79 - 80 - stb 5,0(3) 81 - 82 - addi 3,3,1 83 - subi 4,4,1 84 - b 2b 85 - 86 - 3: 87 - blr 88 - 89 - RtlFillMemoryUlong: 90 - b RtlFillMemory 91 - 92 - RtlFillMemoryUlonglong: 93 - b RtlFillMemoryUlong 94 - 95 - RtlMoveMemory: 96 - b memmove 97 - 98 - RtlZeroMemory: 99 - mr 5,4 100 - xor 4,4,4 101 - b memset
-41
sdk/lib/rtl/powerpc/rtlswap.s
··· 1 - /* 2 - * COPYRIGHT: See COPYING in the top level directory 3 - * PROJECT: ReactOS Run-Time Library 4 - * PURPOSE: Byte swap functions 5 - * FILE: lib/rtl/powerpc/rtlswap.s 6 - * PROGRAMER: Alex Ionescu (alex.ionescu@reactos.org) 7 - */ 8 - 9 - .globl RtlUshortByteSwap 10 - .globl RtlUlongByteSwap 11 - .globl RtlUlonglongByteSwap 12 - 13 - /* FUNCTIONS ***************************************************************/ 14 - 15 - RtlUshortByteSwap: 16 - /* Swap high and low bits */ 17 - rlwinm 4,3,24,0xff 18 - rlwinm 5,3,8,0xff00 19 - or 3,4,5 20 - blr 21 - 22 - RtlUlongByteSwap: 23 - rlwinm 4,3,8,0xff 24 - rlwinm 5,3,24,0xff000000 25 - or 4,4,5 26 - rlwinm 5,3,8,0xff0000 27 - rlwinm 3,3,24,0xff00 28 - or 3,4,5 29 - or 3,3,6 30 - blr 31 - 32 - RtlUlonglongByteSwap: 33 - stwu 1,16(1) 34 - stw 4,4(1) 35 - bl RtlUlongByteSwap 36 - stw 3,4(1) 37 - lwz 3,4(1) 38 - bl RtlUlongByteSwap 39 - lwz 4,4(1) 40 - subi 1,1,16 41 - blr
-38
sdk/lib/rtl/powerpc/thread.c
··· 1 - /* 2 - * COPYRIGHT: See COPYING in the top level directory 3 - * PROJECT: ReactOS system libraries 4 - * PURPOSE: Rtl user thread functions 5 - * FILE: lib/rtl/powerpc/thread.c 6 - * PROGRAMERS: 7 - * Alex Ionescu (alex@relsoft.net) 8 - * Eric Kohl 9 - * KJK::Hyperion 10 - */ 11 - 12 - /* INCLUDES *****************************************************************/ 13 - 14 - #include <rtl.h> 15 - #include "i386/ketypes.h" 16 - 17 - #define NDEBUG 18 - #include <debug.h> 19 - 20 - /* PRIVATE FUNCTIONS *******************************************************/ 21 - 22 - /* 23 - * @implemented 24 - */ 25 - VOID 26 - NTAPI 27 - RtlInitializeContext(IN HANDLE ProcessHandle, 28 - OUT PCONTEXT ThreadContext, 29 - IN PVOID ThreadStartParam OPTIONAL, 30 - IN PTHREAD_START_ROUTINE ThreadStartAddress, 31 - IN PINITIAL_TEB InitialTeb) 32 - { 33 - DPRINT("RtlInitializeContext: (hProcess: %p, ThreadContext: %p, Teb: %p\n", 34 - ProcessHandle, ThreadContext, InitialTeb); 35 - // XXX arty fixme 36 - } 37 - 38 - /* EOF */