A modern Music Player Daemon based on Rockbox open source high quality audio player
tsiry-sandratraina.com
libadwaita
audio
rust
zig
deno
mpris
rockbox
mpd
1#include "config.h"
2
3/* These output formats should be in the config-files */
4
5#ifdef CPU_COLDFIRE
6OUTPUT_FORMAT(elf32-m68k)
7#elif defined(CPU_ARM)
8OUTPUT_FORMAT(elf32-littlearm)
9#elif defined(CPU_MIPS)
10OUTPUT_FORMAT(elf32-littlemips)
11#else
12/* We can have an #error here we don't use this file when build sims! */
13#error Unknown CPU architecture
14#endif
15
16#ifdef DEBUG
17#define STUBOFFSET 0x10000
18#else
19#define STUBOFFSET 0
20#endif
21
22#if defined(CPU_PP)
23#ifdef CPU_PP502x
24#define NOCACHE_BASE 0x10000000
25#else
26#define NOCACHE_BASE 0x28000000
27#endif /* CPU_* */
28#define CACHEALIGN_SIZE 16
29#endif /* CPU_PP */
30
31#if CONFIG_CPU==IMX31L
32/* No fudges! */
33#include "imx31l.h"
34#define DRAMSIZE ((MEMORYSIZE * 0x100000) - STUBOFFSET - PLUGIN_BUFFER_SIZE \
35 - CODEC_SIZE - QHARRAY_SIZE - FRAME_SIZE - TTB_SIZE)
36
37#elif CONFIG_CPU==DM320
38
39#ifndef LCD_NATIVE_WIDTH
40#define LCD_NATIVE_WIDTH LCD_WIDTH
41#endif
42
43#ifndef LCD_NATIVE_HEIGHT
44#define LCD_NATIVE_HEIGHT LCD_HEIGHT
45#endif
46
47#ifdef MROBE_500
48/* Give this 1 meg to allow it to align to the MMU boundary */
49#define LCD_FUDGE LCD_NATIVE_WIDTH%32
50#define LCD_BUFFER_SIZE ((LCD_NATIVE_WIDTH+LCD_FUDGE)*LCD_NATIVE_HEIGHT*2)
51#define LCD_TTB_AREA 0x100000*((LCD_BUFFER_SIZE>>19)+1)
52#else
53/* must be 16Kb (0x4000) aligned */
54#define TTB_SIZE (0x4000)
55#define LCD_BUFFER_SIZE (LCD_NATIVE_WIDTH*LCD_NATIVE_HEIGHT*2)
56#define LCD_TTB_AREA (TTB_SIZE + LCD_BUFFER_SIZE)
57#endif
58
59#define DRAMSIZE (MEMORYSIZE * 0x100000) - STUBOFFSET - PLUGIN_BUFFER_SIZE - CODEC_SIZE - LCD_TTB_AREA
60
61#elif CONFIG_CPU==S3C2440
62#include "cpu.h"
63/* must be 16Kb (0x4000) aligned */
64#define TTB_SIZE (0x4000)
65#define DRAMSIZE (MEMORYSIZE * 0x100000) - STUBOFFSET - PLUGIN_BUFFER_SIZE - CODEC_SIZE - LCD_BUFFER_SIZE - TTB_SIZE
66
67#elif CONFIG_CPU==TCC7801
68#include "cpu.h"
69#define DRAMSIZE (MEMORYSIZE * 0x100000) - STUBOFFSET - PLUGIN_BUFFER_SIZE - CODEC_SIZE - TTB_SIZE
70
71#elif CONFIG_CPU==AS3525 || CONFIG_CPU==AS3525v2
72#include "cpu.h"
73#define DRAMORIG DRAM_ORIG
74#if defined(AMS_LOWMEM) || (CONFIG_CPU == AS3525v2)
75#define DRAMSIZE (DRAM_SIZE - PLUGIN_BUFFER_SIZE - STUBOFFSET - TTB_SIZE)
76#else
77#define DRAMSIZE (DRAM_SIZE - PLUGIN_BUFFER_SIZE - STUBOFFSET - CODEC_SIZE - TTB_SIZE)
78#endif
79#elif CONFIG_CPU==S5L8702 || CONFIG_CPU==S5L8720
80#define ASM
81#include "cpu.h"
82#define DRAMSIZE (DRAM_SIZE - PLUGIN_BUFFER_SIZE - CODEC_SIZE - TTB_SIZE)
83#elif CONFIG_CPU==IMX233
84#include "cpu.h"
85#define DRAMSIZE (DRAM_SIZE - PLUGIN_BUFFER_SIZE - CODEC_SIZE - FRAME_SIZE - TTB_SIZE)
86#elif CONFIG_CPU==X1000
87#include "cpu.h"
88#undef STUBOFFSET
89#define DRAMSIZE (X1000_DRAM_SIZE - PLUGIN_BUFFER_SIZE - CODEC_SIZE)
90#endif
91
92 /* default to full RAM (minus codecs&plugins) unless specified otherwise */
93#ifndef DRAMSIZE
94#define DRAMSIZE (MEMORYSIZE * 0x100000) - PLUGIN_BUFFER_SIZE - STUBOFFSET - CODEC_SIZE
95#endif
96
97/* MCF5249 have 96KB of IRAM */
98#if CONFIG_CPU == MCF5249
99#define DRAMORIG 0x31000000
100#define IRAMORIG 0x1000c000
101#define IRAMSIZE 0xc000
102
103/* MCF5250 have 128KB of IRAM */
104#elif CONFIG_CPU == MCF5250
105#define DRAMORIG 0x31000000
106#define IRAMORIG 0x1000c800
107#define IRAMSIZE 0x13800
108
109#elif CONFIG_CPU == PP5022 || CONFIG_CPU == PP5024
110/* PP5022/24 have 128KB of IRAM */
111#define DRAMORIG 0x00000000
112#define IRAMORIG 0x4000c000
113#define IRAMSIZE 0x14000
114
115#elif defined(CPU_PP)
116/* all other PP's have 96KB of IRAM */
117#define DRAMORIG 0x00000000
118#define IRAMORIG 0x4000c000
119#define IRAMSIZE 0x0c000
120
121#elif CONFIG_CPU == PNX0101
122#define DRAMORIG 0xc00000 + STUBOFFSET
123#define IRAMORIG 0x407000
124#define IRAMSIZE 0x9000
125
126#elif CONFIG_CPU == IMX31L || CONFIG_CPU == S3C2440
127#define DRAMORIG 0x0 + STUBOFFSET
128#define IRAM DRAM
129#define IRAMSIZE 0
130
131#elif CONFIG_CPU==DM320
132#define DRAMORIG CONFIG_SDRAM_START + STUBOFFSET
133#define IRAM DRAM
134/* The bit of IRAM that is available is used in the core */
135#define IRAMSIZE 0
136
137#elif defined(CPU_TCC780X)
138#define DRAMORIG 0x20000000
139#if CONFIG_CPU==TCC7801
140#define IRAMORIG 0x1000c000
141#define IRAMSIZE 0xc000
142#else
143#define IRAM DRAM
144#define IRAMSIZE 0
145#endif
146
147#elif CONFIG_CPU==AS3525 || CONFIG_CPU==AS3525v2
148#if defined(AMS_LOWMEM) || (CONFIG_CPU == AS3525v2)
149#define IRAMSIZE 0 /* simulates no IRAM since codec is already entirely in IRAM */
150#define CODEC_ORIGIN (IRAM_ORIG + IRAM_SIZE - CODEC_SIZE)
151#define PLUGIN_ORIGIN (DRAM_ORIG + DRAMSIZE)
152#else
153#define IRAMORIG (IRAM_ORIG + 0x20000)
154#define IRAMSIZE (IRAM_ORIG + IRAM_SIZE - IRAMORIG)
155#endif
156
157#elif CONFIG_CPU==S5L8700
158/* S5L8700 have 256KB of IRAM */
159#define DRAMORIG 0x08000000
160#define IRAMORIG (0x00000000 + (48*1024))
161#define IRAMSIZE (208*1024)
162
163#elif CONFIG_CPU==S5L8701
164/* S5L8701 have 176KB of IRAM */
165#define DRAMORIG 0x08000000
166#define IRAMORIG (0x00000000 + (48*1024))
167#define IRAMSIZE (128*1024)
168
169#elif CONFIG_CPU==S5L8702
170/* S5L8702 have 256KB of IRAM */
171/* IRAM1 (2nd 128KB block) is not used because it is slower than DRAM */
172#define DRAMORIG 0x08000000
173#define IRAMORIG (0x00000000 + (48*1024))
174#define IRAMSIZE (80*1024)
175
176#elif CONFIG_CPU==S5L8720
177/* S5L8720 have 192KB of IRAM */
178/* TODO: check if IRAM1 is also slow as in S5L8702 above */
179#define DRAMORIG 0x08000000
180#define IRAMORIG (0x00000000 + (56*1024))
181#define IRAMSIZE (136*1024)
182
183#elif CONFIG_CPU == JZ4732 || CONFIG_CPU == JZ4760B
184#undef STUBOFFSET
185#ifdef DEBUG
186#define STUBOFFSET 0x14000
187#else
188#define STUBOFFSET 0x4000
189#endif
190#define DRAMORIG 0x80000000 + STUBOFFSET
191#define IRAM DRAM
192#define IRAMSIZE 0
193/* The bit of IRAM that is available is used in the core */
194
195#elif CONFIG_CPU == X1000
196#define DRAMORIG X1000_DRAM_BASE
197#define IRAM DRAM
198#define IRAMSIZE 0
199
200#elif CONFIG_CPU == RK27XX
201#define DRAMORIG 0x60000000
202#define IRAM DRAM
203#define IRAMSIZE 0
204
205#elif CONFIG_CPU == IMX233
206#include "cpu.h"
207/* The IRAM is too small and already partly used by the core */
208#define DRAMORIG CACHED_DRAM_ADDR
209#define IRAM DRAM
210#define IRAMSIZE 0
211
212#else
213#define DRAMORIG 0x09000000 + STUBOFFSET
214#endif
215
216#ifndef NOCACHE_BASE
217/* Default to no offset if target doesn't define this */
218#define NOCACHE_BASE 0x00000000
219#endif
220
221#define PLUGIN_LENGTH PLUGIN_BUFFER_SIZE
222
223
224#ifndef CODEC_ORIGIN /* targets can specify another origin */
225#define CODEC_ORIGIN (DRAMORIG + (DRAMSIZE))
226#endif
227
228#ifndef PLUGIN_ORIGIN /* targets can specify another origin */
229#define PLUGIN_ORIGIN (CODEC_ORIGIN + CODEC_SIZE)
230#endif
231
232#ifdef CODEC
233#define THIS_LENGTH CODEC_SIZE
234#define THIS_ORIGIN CODEC_ORIGIN
235#elif defined OVERLAY_OFFSET
236#define THIS_LENGTH (DRAMSIZE - OVERLAY_OFFSET)
237#define THIS_ORIGIN (DRAMORIG + OVERLAY_OFFSET)
238#elif defined IMGVDECODER_OFFSET
239#define THIS_LENGTH (PLUGIN_LENGTH - IMGVDECODER_OFFSET)
240#define THIS_ORIGIN (PLUGIN_ORIGIN + IMGVDECODER_OFFSET)
241#else /* plugin */
242#define THIS_LENGTH PLUGIN_LENGTH
243#define THIS_ORIGIN PLUGIN_ORIGIN
244#endif
245
246MEMORY
247{
248 PLUGIN_RAM : ORIGIN = THIS_ORIGIN, LENGTH = THIS_LENGTH
249#if defined(IRAMSIZE) && IRAMSIZE != 0
250 PLUGIN_IRAM : ORIGIN = IRAMORIG, LENGTH = IRAMSIZE
251#endif
252}
253
254SECTIONS
255{
256 .header : {
257 _plugin_start_addr = .;
258 plugin_start_addr = .;
259 KEEP(*(.header))
260 } > PLUGIN_RAM
261
262 .text :
263 {
264 *(.text*)
265#if defined(IRAMSIZE) && IRAMSIZE == 0
266 *(.icode)
267#endif
268#ifdef CPU_ARM
269 *(.glue_7)
270 *(.glue_7t)
271#endif
272 } > PLUGIN_RAM
273
274 .rodata :
275 {
276 *(.rodata*)
277#if defined(IRAMSIZE) && IRAMSIZE == 0
278 *(.irodata)
279#endif
280 } > PLUGIN_RAM
281
282 .data :
283 {
284 *(.data*)
285#if defined(IRAMSIZE) && IRAMSIZE == 0
286 *(.idata)
287#endif
288 } > PLUGIN_RAM
289
290#if NOCACHE_BASE != 0
291 .ncdata . + NOCACHE_BASE :
292 {
293 . = ALIGN(CACHEALIGN_SIZE);
294 *(.ncdata*)
295 . = ALIGN(CACHEALIGN_SIZE);
296/* EABI currently needs these defined here, otherwise .iram and .bss can
297 sometimes have an incorrect load address, breaking codecs and plugins. */
298 bssaddr = . - NOCACHE_BASE;
299#if defined(IRAMSIZE) && IRAMSIZE != 0
300 iramcopy = . - NOCACHE_BASE;
301#endif
302 } AT> PLUGIN_RAM
303/* This definition is used when NOCACHE_BASE is 0. The address offset bug only
304 seems to occur when the empty .ncdata is present. */
305#else
306 bssaddr = .;
307#if defined(IRAMSIZE) && IRAMSIZE != 0
308 iramcopy = .;
309#endif
310#endif
311
312 /DISCARD/ :
313 {
314 *(.eh_frame)
315#ifdef CPU_MIPS
316 *(.MIPS.abiflags)
317 *(.rel.dyn)
318#endif
319 }
320
321 .bss bssaddr (NOLOAD) :
322 {
323 plugin_bss_start = .;
324 _plugin_bss_start = .;
325 *(.bss*)
326#if defined(IRAMSIZE) && IRAMSIZE == 0
327 *(.ibss)
328#endif
329 *(COMMON)
330 . = ALIGN(0x4);
331 } > PLUGIN_RAM
332
333#if NOCACHE_BASE != 0
334 .ncbss . + NOCACHE_BASE (NOLOAD) :
335 {
336 . = ALIGN(CACHEALIGN_SIZE);
337 *(.ncbss*)
338 . = ALIGN(CACHEALIGN_SIZE);
339 /* We won't trust this one any more than with .ncdata */
340 pluginendaddr = . - NOCACHE_BASE;
341 } AT> PLUGIN_RAM
342#else
343 pluginendaddr = .;
344#endif
345
346 /* Final end of plugin after IRAM setup. The plugin or codec buffer
347 is considered unused by the in-RAM image at this point once IRAM
348 is copied. */
349 .pluginend pluginendaddr :
350 {
351 _plugin_end_addr = .;
352 plugin_end_addr = .;
353 }
354
355#if defined(IRAMSIZE) && IRAMSIZE != 0
356 .iram IRAMORIG : AT (iramcopy)
357 {
358 iramstart = .;
359 *(.icode)
360 *(.irodata)
361 *(.idata)
362 iramend = .;
363 } > PLUGIN_IRAM
364
365 .ibss (NOLOAD) :
366 {
367 iedata = .;
368 *(.ibss)
369 . = ALIGN(0x4);
370 iend = .;
371 } > PLUGIN_IRAM
372
373 loadendaddr = MAX(plugin_end_addr, LOADADDR(.iram) + SIZEOF(.iram));
374#else
375 loadendaddr = plugin_end_addr;
376#endif
377
378 /* This is for ovl_offset.pl and is the highest address that must
379 be loaded into the plugin buffer (past the end of last data in
380 stored image). */
381 .pluginloadend loadendaddr :
382 {
383 _plugin_load_end_addr = .;
384 plugin_load_end_addr = .;
385 }
386
387 /* Special trick to avoid a linker error when no other sections are
388 left after garbage collection (plugin not for this platform) */
389 .comment 0 :
390 {
391 KEEP(*(.comment))
392 }
393}