tjh.dev
1{ lib
2, buildPythonPackage
3, fetchPypi
4, pythonOlder
5, jinja2
6, ply
7, verilog
8, pytestCheckHook
9}:
10
11buildPythonPackage rec {
12 pname = "pyverilog";
13 version = "1.3.0";
14
15 src = fetchPypi {
16 inherit pname version;
17 sha256 = "1a74k8r21swmfwvgv4c014y6nbcyl229fspxw89ygsgb0j83xnar";
18 };
19
20 disabled = pythonOlder "3.7";
21
22 patchPhase = ''
23 # The path to Icarus can still be overridden via an environment variable at runtime.
24 substituteInPlace pyverilog/vparser/preprocessor.py \
25 --replace "iverilog = 'iverilog'" "iverilog = '${verilog}/bin/iverilog'"
26 '';
27
28 propagatedBuildInputs = [
29 jinja2
30 ply
31 verilog
32 ];
33
34 preCheck = ''
35 substituteInPlace pytest.ini \
36 --replace "python_paths" "pythonpath"
37 '';
38
39 nativeCheckInputs = [
40 pytestCheckHook
41 ];
42
43 meta = with lib; {
44 homepage = "https://github.com/PyHDI/Pyverilog";
45 description = "Python-based Hardware Design Processing Toolkit for Verilog HDL";
46 license = licenses.asl20;
47 maintainers = with maintainers; [ trepetti ];
48 };
49}