tjh.dev
1{
2 lib,
3 buildPythonPackage,
4 fetchPypi,
5 pythonOlder,
6 jinja2,
7 ply,
8 iverilog,
9 pytestCheckHook,
10}:
11
12buildPythonPackage rec {
13 pname = "pyverilog";
14 version = "1.3.0";
15 format = "setuptools";
16
17 src = fetchPypi {
18 inherit pname version;
19 sha256 = "1a74k8r21swmfwvgv4c014y6nbcyl229fspxw89ygsgb0j83xnar";
20 };
21
22 disabled = pythonOlder "3.7";
23
24 patchPhase = ''
25 # The path to Icarus can still be overridden via an environment variable at runtime.
26 substituteInPlace pyverilog/vparser/preprocessor.py \
27 --replace "iverilog = 'iverilog'" "iverilog = '${iverilog}/bin/iverilog'"
28 '';
29
30 propagatedBuildInputs = [
31 jinja2
32 ply
33 iverilog
34 ];
35
36 preCheck = ''
37 substituteInPlace pytest.ini \
38 --replace "python_paths" "pythonpath"
39 '';
40
41 nativeCheckInputs = [ pytestCheckHook ];
42
43 meta = with lib; {
44 homepage = "https://github.com/PyHDI/Pyverilog";
45 description = "Python-based Hardware Design Processing Toolkit for Verilog HDL";
46 license = licenses.asl20;
47 maintainers = with maintainers; [ trepetti ];
48 };
49}