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kernel
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linux
dt-bindings: dma: Convert apm,xgene-storm-dma to DT schema
Convert APM X-Gene Storm DMA binding to DT schema format. It's a
straight-forward conversion.
Link: https://patch.msgid.link/20251013213037.684981-1-robh@kernel.org
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
+59
-47
+59
Documentation/devicetree/bindings/dma/apm,xgene-storm-dma.yaml
+59
Documentation/devicetree/bindings/dma/apm,xgene-storm-dma.yaml
···
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/dma/apm,xgene-storm-dma.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: APM X-Gene Storm SoC DMA
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maintainers:
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- Khuong Dinh <khuong@os.amperecomputing.com>
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properties:
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compatible:
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const: apm,xgene-storm-dma
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reg:
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items:
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- description: DMA control and status registers
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- description: Descriptor ring control and status registers
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- description: Descriptor ring command registers
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- description: SoC efuse registers
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interrupts:
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items:
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- description: DMA error reporting interrupt
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- description: DMA channel 0 completion interrupt
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- description: DMA channel 1 completion interrupt
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- description: DMA channel 2 completion interrupt
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- description: DMA channel 3 completion interrupt
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clocks:
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maxItems: 1
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dma-coherent: true
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required:
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- compatible
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- reg
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- interrupts
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- clocks
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additionalProperties: false
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examples:
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- |
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dma@1f270000 {
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compatible = "apm,xgene-storm-dma";
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reg = <0x1f270000 0x10000>,
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<0x1f200000 0x10000>,
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<0x1b000000 0x400000>,
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<0x1054a000 0x100>;
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interrupts = <0x0 0x82 0x4>,
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<0x0 0xb8 0x4>,
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<0x0 0xb9 0x4>,
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<0x0 0xba 0x4>,
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<0x0 0xbb 0x4>;
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dma-coherent;
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clocks = <&dmaclk 0>;
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};
-47
Documentation/devicetree/bindings/dma/apm-xgene-dma.txt
-47
Documentation/devicetree/bindings/dma/apm-xgene-dma.txt
···
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Applied Micro X-Gene SoC DMA nodes
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DMA nodes are defined to describe on-chip DMA interfaces in
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APM X-Gene SoC.
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Required properties for DMA interfaces:
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- compatible: Should be "apm,xgene-dma".
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- device_type: set to "dma".
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- reg: Address and length of the register set for the device.
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It contains the information of registers in the following order:
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1st - DMA control and status register address space.
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2nd - Descriptor ring control and status register address space.
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3rd - Descriptor ring command register address space.
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4th - Soc efuse register address space.
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- interrupts: DMA has 5 interrupts sources. 1st interrupt is
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DMA error reporting interrupt. 2nd, 3rd, 4th and 5th interrupts
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are completion interrupts for each DMA channels.
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- clocks: Reference to the clock entry.
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-
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Optional properties:
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- dma-coherent : Present if dma operations are coherent
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-
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Example:
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dmaclk: dmaclk@1f27c000 {
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compatible = "apm,xgene-device-clock";
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#clock-cells = <1>;
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clocks = <&socplldiv2 0>;
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reg = <0x0 0x1f27c000 0x0 0x1000>;
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reg-names = "csr-reg";
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clock-output-names = "dmaclk";
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};
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dma: dma@1f270000 {
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compatible = "apm,xgene-storm-dma";
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device_type = "dma";
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reg = <0x0 0x1f270000 0x0 0x10000>,
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<0x0 0x1f200000 0x0 0x10000>,
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<0x0 0x1b000000 0x0 0x400000>,
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<0x0 0x1054a000 0x0 0x100>;
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interrupts = <0x0 0x82 0x4>,
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<0x0 0xb8 0x4>,
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<0x0 0xb9 0x4>,
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<0x0 0xba 0x4>,
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<0x0 0xbb 0x4>;
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dma-coherent;
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clocks = <&dmaclk 0>;
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};