tjh.dev / kernel
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gpu: host1x: Fix mask for syncpoint increment register

On Tegra186+, the syncpoint ID has 10 bits of space. To allow
using more than 256 syncpoints, fix the mask.

Fixes: 9abdd497cd0a ("gpu: host1x: Tegra234 device data and headers")
Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>

authored by

Mikko Perttunen and committed by
Thierry Reding 79aad29c 3d905751

+3 -3
+1 -1
drivers/gpu/host1x/hw/hw_host1x06_uclass.h
··· 53 53 host1x_uclass_incr_syncpt_cond_f(v) 54 54 static inline u32 host1x_uclass_incr_syncpt_indx_f(u32 v) 55 55 { 56 - return (v & 0xff) << 0; 56 + return (v & 0x3ff) << 0; 57 57 } 58 58 #define HOST1X_UCLASS_INCR_SYNCPT_INDX_F(v) \ 59 59 host1x_uclass_incr_syncpt_indx_f(v)
+1 -1
drivers/gpu/host1x/hw/hw_host1x07_uclass.h
··· 53 53 host1x_uclass_incr_syncpt_cond_f(v) 54 54 static inline u32 host1x_uclass_incr_syncpt_indx_f(u32 v) 55 55 { 56 - return (v & 0xff) << 0; 56 + return (v & 0x3ff) << 0; 57 57 } 58 58 #define HOST1X_UCLASS_INCR_SYNCPT_INDX_F(v) \ 59 59 host1x_uclass_incr_syncpt_indx_f(v)
+1 -1
drivers/gpu/host1x/hw/hw_host1x08_uclass.h
··· 53 53 host1x_uclass_incr_syncpt_cond_f(v) 54 54 static inline u32 host1x_uclass_incr_syncpt_indx_f(u32 v) 55 55 { 56 - return (v & 0xff) << 0; 56 + return (v & 0x3ff) << 0; 57 57 } 58 58 #define HOST1X_UCLASS_INCR_SYNCPT_INDX_F(v) \ 59 59 host1x_uclass_incr_syncpt_indx_f(v)