Mailbox hardware registers are 64 bit wide, but the interrupt handler currently reads only 32 bits with readl() at offset 0x4 (upper 32 bits). This returns an incorrect value, while reading using readq() returns the expected value. Use readq() to access the 64 bit register and pass the expected value to the mailbox client. Fixes: 0e2a9a03106c ("mailbox: Add support for QTI CPUCP mailbox controller") Signed-off-by: Sivansh Gupta <sivansh.gupta@oss.qualcomm.com> Reviewed-by: Sibi Sankar <sibi.sankar@oss.qualcomm.com> Signed-off-by: Jassi Brar <jassisinghbrar@gmail.com>