Linux kernel mirror (for testing)
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1/* SPDX-License-Identifier: GPL-2.0-only */
2/*
3 * Copyright (C) 2012 Regents of the University of California
4 */
5
6#ifndef _ASM_RISCV_PROCESSOR_H
7#define _ASM_RISCV_PROCESSOR_H
8
9#include <linux/const.h>
10#include <linux/cache.h>
11#include <linux/prctl.h>
12
13#include <vdso/processor.h>
14
15#include <asm/ptrace.h>
16
17/*
18 * addr is a hint to the maximum userspace address that mmap should provide, so
19 * this macro needs to return the largest address space available so that
20 * mmap_end < addr, being mmap_end the top of that address space.
21 * See Documentation/arch/riscv/vm-layout.rst for more details.
22 */
23#define arch_get_mmap_end(addr, len, flags) \
24({ \
25 unsigned long mmap_end; \
26 typeof(addr) _addr = (addr); \
27 if ((_addr) == 0 || is_compat_task() || \
28 ((_addr + len) > BIT(VA_BITS - 1))) \
29 mmap_end = STACK_TOP_MAX; \
30 else \
31 mmap_end = (_addr + len); \
32 mmap_end; \
33})
34
35#define arch_get_mmap_base(addr, base) \
36({ \
37 unsigned long mmap_base; \
38 typeof(addr) _addr = (addr); \
39 typeof(base) _base = (base); \
40 unsigned long rnd_gap = DEFAULT_MAP_WINDOW - (_base); \
41 if ((_addr) == 0 || is_compat_task() || \
42 ((_addr + len) > BIT(VA_BITS - 1))) \
43 mmap_base = (_base); \
44 else \
45 mmap_base = (_addr + len) - rnd_gap; \
46 mmap_base; \
47})
48
49#ifdef CONFIG_64BIT
50#define DEFAULT_MAP_WINDOW (UL(1) << (MMAP_VA_BITS - 1))
51#define STACK_TOP_MAX TASK_SIZE_64
52#else
53#define DEFAULT_MAP_WINDOW TASK_SIZE
54#define STACK_TOP_MAX TASK_SIZE
55#endif
56#define STACK_ALIGN 16
57
58#define STACK_TOP DEFAULT_MAP_WINDOW
59
60/*
61 * This decides where the kernel will search for a free chunk of vm
62 * space during mmap's.
63 */
64#ifdef CONFIG_64BIT
65#define TASK_UNMAPPED_BASE PAGE_ALIGN((UL(1) << MMAP_MIN_VA_BITS) / 3)
66#else
67#define TASK_UNMAPPED_BASE PAGE_ALIGN(TASK_SIZE / 3)
68#endif
69
70#ifndef __ASSEMBLY__
71
72struct task_struct;
73struct pt_regs;
74
75/*
76 * We use a flag to track in-kernel Vector context. Currently the flag has the
77 * following meaning:
78 *
79 * - bit 0: indicates whether the in-kernel Vector context is active. The
80 * activation of this state disables the preemption. On a non-RT kernel, it
81 * also disable bh.
82 * - bits 8: is used for tracking preemptible kernel-mode Vector, when
83 * RISCV_ISA_V_PREEMPTIVE is enabled. Calling kernel_vector_begin() does not
84 * disable the preemption if the thread's kernel_vstate.datap is allocated.
85 * Instead, the kernel set this bit field. Then the trap entry/exit code
86 * knows if we are entering/exiting the context that owns preempt_v.
87 * - 0: the task is not using preempt_v
88 * - 1: the task is actively using preempt_v. But whether does the task own
89 * the preempt_v context is decided by bits in RISCV_V_CTX_DEPTH_MASK.
90 * - bit 16-23 are RISCV_V_CTX_DEPTH_MASK, used by context tracking routine
91 * when preempt_v starts:
92 * - 0: the task is actively using, and own preempt_v context.
93 * - non-zero: the task was using preempt_v, but then took a trap within.
94 * Thus, the task does not own preempt_v. Any use of Vector will have to
95 * save preempt_v, if dirty, and fallback to non-preemptible kernel-mode
96 * Vector.
97 * - bit 30: The in-kernel preempt_v context is saved, and requries to be
98 * restored when returning to the context that owns the preempt_v.
99 * - bit 31: The in-kernel preempt_v context is dirty, as signaled by the
100 * trap entry code. Any context switches out-of current task need to save
101 * it to the task's in-kernel V context. Also, any traps nesting on-top-of
102 * preempt_v requesting to use V needs a save.
103 */
104#define RISCV_V_CTX_DEPTH_MASK 0x00ff0000
105
106#define RISCV_V_CTX_UNIT_DEPTH 0x00010000
107#define RISCV_KERNEL_MODE_V 0x00000001
108#define RISCV_PREEMPT_V 0x00000100
109#define RISCV_PREEMPT_V_DIRTY 0x80000000
110#define RISCV_PREEMPT_V_NEED_RESTORE 0x40000000
111
112/* CPU-specific state of a task */
113struct thread_struct {
114 /* Callee-saved registers */
115 unsigned long ra;
116 unsigned long sp; /* Kernel mode stack */
117 unsigned long s[12]; /* s[0]: frame pointer */
118 struct __riscv_d_ext_state fstate;
119 unsigned long bad_cause;
120 u32 riscv_v_flags;
121 u32 vstate_ctrl;
122 struct __riscv_v_ext_state vstate;
123 unsigned long align_ctl;
124 struct __riscv_v_ext_state kernel_vstate;
125};
126
127/* Whitelist the fstate from the task_struct for hardened usercopy */
128static inline void arch_thread_struct_whitelist(unsigned long *offset,
129 unsigned long *size)
130{
131 *offset = offsetof(struct thread_struct, fstate);
132 *size = sizeof_field(struct thread_struct, fstate);
133}
134
135#define INIT_THREAD { \
136 .sp = sizeof(init_stack) + (long)&init_stack, \
137 .align_ctl = PR_UNALIGN_NOPRINT, \
138}
139
140#define task_pt_regs(tsk) \
141 ((struct pt_regs *)(task_stack_page(tsk) + THREAD_SIZE \
142 - ALIGN(sizeof(struct pt_regs), STACK_ALIGN)))
143
144#define KSTK_EIP(tsk) (task_pt_regs(tsk)->epc)
145#define KSTK_ESP(tsk) (task_pt_regs(tsk)->sp)
146
147
148/* Do necessary setup to start up a newly executed thread. */
149extern void start_thread(struct pt_regs *regs,
150 unsigned long pc, unsigned long sp);
151
152extern unsigned long __get_wchan(struct task_struct *p);
153
154
155static inline void wait_for_interrupt(void)
156{
157 __asm__ __volatile__ ("wfi");
158}
159
160extern phys_addr_t dma32_phys_limit;
161
162struct device_node;
163int riscv_of_processor_hartid(struct device_node *node, unsigned long *hartid);
164int riscv_early_of_processor_hartid(struct device_node *node, unsigned long *hartid);
165int riscv_of_parent_hartid(struct device_node *node, unsigned long *hartid);
166
167extern void riscv_fill_hwcap(void);
168extern int arch_dup_task_struct(struct task_struct *dst, struct task_struct *src);
169
170extern unsigned long signal_minsigstksz __ro_after_init;
171
172#ifdef CONFIG_RISCV_ISA_V
173/* Userspace interface for PR_RISCV_V_{SET,GET}_VS prctl()s: */
174#define RISCV_V_SET_CONTROL(arg) riscv_v_vstate_ctrl_set_current(arg)
175#define RISCV_V_GET_CONTROL() riscv_v_vstate_ctrl_get_current()
176extern long riscv_v_vstate_ctrl_set_current(unsigned long arg);
177extern long riscv_v_vstate_ctrl_get_current(void);
178#endif /* CONFIG_RISCV_ISA_V */
179
180extern int get_unalign_ctl(struct task_struct *tsk, unsigned long addr);
181extern int set_unalign_ctl(struct task_struct *tsk, unsigned int val);
182
183#define GET_UNALIGN_CTL(tsk, addr) get_unalign_ctl((tsk), (addr))
184#define SET_UNALIGN_CTL(tsk, val) set_unalign_ctl((tsk), (val))
185
186#endif /* __ASSEMBLY__ */
187
188#endif /* _ASM_RISCV_PROCESSOR_H */