tjh.dev
Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
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linux
1What: /sys/class/accel/accel<n>/device/armcp_kernel_ver
2Date: Jan 2019
3KernelVersion: 5.1
4Contact: ogabbay@kernel.org
5Description: Version of the Linux kernel running on the device's CPU.
6 Will be DEPRECATED in Linux kernel version 5.10, and be
7 replaced with cpucp_kernel_ver
8
9What: /sys/class/accel/accel<n>/device/armcp_ver
10Date: Jan 2019
11KernelVersion: 5.1
12Contact: ogabbay@kernel.org
13Description: Version of the application running on the device's CPU
14 Will be DEPRECATED in Linux kernel version 5.10, and be
15 replaced with cpucp_ver
16
17What: /sys/class/accel/accel<n>/device/clk_max_freq_mhz
18Date: Jun 2019
19KernelVersion: 5.7
20Contact: ogabbay@kernel.org
21Description: Allows the user to set the maximum clock frequency, in MHz.
22 The device clock might be set to lower value than the maximum.
23 The user should read the clk_cur_freq_mhz to see the actual
24 frequency value of the device clock. This property is valid
25 only for the Gaudi ASIC family
26
27What: /sys/class/accel/accel<n>/device/clk_cur_freq_mhz
28Date: Jun 2019
29KernelVersion: 5.7
30Contact: ogabbay@kernel.org
31Description: Displays the current frequency, in MHz, of the device clock.
32 This property is valid only for the Gaudi ASIC family
33
34What: /sys/class/accel/accel<n>/device/cpld_ver
35Date: Jan 2019
36KernelVersion: 5.1
37Contact: ogabbay@kernel.org
38Description: Version of the Device's CPLD F/W
39
40What: /sys/class/accel/accel<n>/device/cpucp_kernel_ver
41Date: Oct 2020
42KernelVersion: 5.10
43Contact: ogabbay@kernel.org
44Description: Version of the Linux kernel running on the device's CPU
45
46What: /sys/class/accel/accel<n>/device/cpucp_ver
47Date: Oct 2020
48KernelVersion: 5.10
49Contact: ogabbay@kernel.org
50Description: Version of the application running on the device's CPU
51
52What: /sys/class/accel/accel<n>/device/device_type
53Date: Jan 2019
54KernelVersion: 5.1
55Contact: ogabbay@kernel.org
56Description: Displays the code name of the device according to its type.
57 The supported values are: "GOYA"
58
59What: /sys/class/accel/accel<n>/device/eeprom
60Date: Jan 2019
61KernelVersion: 5.1
62Contact: ogabbay@kernel.org
63Description: A binary file attribute that contains the contents of the
64 on-board EEPROM
65
66What: /sys/class/accel/accel<n>/device/fuse_ver
67Date: Jan 2019
68KernelVersion: 5.1
69Contact: ogabbay@kernel.org
70Description: Displays the device's version from the eFuse
71
72What: /sys/class/accel/accel<n>/device/fw_os_ver
73Date: Dec 2021
74KernelVersion: 5.18
75Contact: ogabbay@kernel.org
76Description: Version of the firmware OS running on the device's CPU
77
78What: /sys/class/accel/accel<n>/device/hard_reset
79Date: Jan 2019
80KernelVersion: 5.1
81Contact: ogabbay@kernel.org
82Description: Interface to trigger a hard-reset operation for the device.
83 Hard-reset will reset ALL internal components of the device
84 except for the PCI interface and the internal PLLs
85
86What: /sys/class/accel/accel<n>/device/hard_reset_cnt
87Date: Jan 2019
88KernelVersion: 5.1
89Contact: ogabbay@kernel.org
90Description: Displays how many times the device have undergone a hard-reset
91 operation since the driver was loaded
92
93What: /sys/class/accel/accel<n>/device/high_pll
94Date: Jan 2019
95KernelVersion: 5.1
96Contact: ogabbay@kernel.org
97Description: Allows the user to set the maximum clock frequency for MME, TPC
98 and IC when the power management profile is set to "automatic".
99 This property is valid only for the Goya ASIC family
100
101What: /sys/class/accel/accel<n>/device/ic_clk
102Date: Jan 2019
103KernelVersion: 5.1
104Contact: ogabbay@kernel.org
105Description: Allows the user to set the maximum clock frequency, in Hz, of
106 the Interconnect fabric. Writes to this parameter affect the
107 device only when the power management profile is set to "manual"
108 mode. The device IC clock might be set to lower value than the
109 maximum. The user should read the ic_clk_curr to see the actual
110 frequency value of the IC. This property is valid only for the
111 Goya ASIC family
112
113What: /sys/class/accel/accel<n>/device/ic_clk_curr
114Date: Jan 2019
115KernelVersion: 5.1
116Contact: ogabbay@kernel.org
117Description: Displays the current clock frequency, in Hz, of the Interconnect
118 fabric. This property is valid only for the Goya ASIC family
119
120What: /sys/class/accel/accel<n>/device/infineon_ver
121Date: Jan 2019
122KernelVersion: 5.1
123Contact: ogabbay@kernel.org
124Description: Version of the Device's power supply F/W code. Relevant only to GOYA and GAUDI
125
126What: /sys/class/accel/accel<n>/device/max_power
127Date: Jan 2019
128KernelVersion: 5.1
129Contact: ogabbay@kernel.org
130Description: Allows the user to set the maximum power consumption of the
131 device in milliwatts.
132
133What: /sys/class/accel/accel<n>/device/mme_clk
134Date: Jan 2019
135KernelVersion: 5.1
136Contact: ogabbay@kernel.org
137Description: Allows the user to set the maximum clock frequency, in Hz, of
138 the MME compute engine. Writes to this parameter affect the
139 device only when the power management profile is set to "manual"
140 mode. The device MME clock might be set to lower value than the
141 maximum. The user should read the mme_clk_curr to see the actual
142 frequency value of the MME. This property is valid only for the
143 Goya ASIC family
144
145What: /sys/class/accel/accel<n>/device/mme_clk_curr
146Date: Jan 2019
147KernelVersion: 5.1
148Contact: ogabbay@kernel.org
149Description: Displays the current clock frequency, in Hz, of the MME compute
150 engine. This property is valid only for the Goya ASIC family
151
152What: /sys/class/accel/accel<n>/device/module_id
153Date: Nov 2023
154KernelVersion: not yet upstreamed
155Contact: ogabbay@kernel.org
156Description: Displays the device's module id
157
158What: /sys/class/accel/accel<n>/device/parent_device
159Date: Nov 2023
160KernelVersion: 6.8
161Contact: ttayar@habana.ai
162Description: Displays the name of the parent device of the accel device
163
164What: /sys/class/accel/accel<n>/device/pci_addr
165Date: Jan 2019
166KernelVersion: 5.1
167Contact: ogabbay@kernel.org
168Description: Displays the PCI address of the device. This is needed so the
169 user would be able to open a device based on its PCI address
170
171What: /sys/class/accel/accel<n>/device/pm_mng_profile
172Date: Jan 2019
173KernelVersion: 5.1
174Contact: ogabbay@kernel.org
175Description: Power management profile. Values are "auto", "manual". In "auto"
176 mode, the driver will set the maximum clock frequency to a high
177 value when a user-space process opens the device's file (unless
178 it was already opened by another process). The driver will set
179 the max clock frequency to a low value when there are no user
180 processes that are opened on the device's file. In "manual"
181 mode, the user sets the maximum clock frequency by writing to
182 ic_clk, mme_clk and tpc_clk. This property is valid only for
183 the Goya ASIC family
184
185What: /sys/class/accel/accel<n>/device/preboot_btl_ver
186Date: Jan 2019
187KernelVersion: 5.1
188Contact: ogabbay@kernel.org
189Description: Version of the device's preboot F/W code
190
191What: /sys/class/accel/accel<n>/device/security_enabled
192Date: Oct 2022
193KernelVersion: 6.1
194Contact: obitton@habana.ai
195Description: Displays the device's security status
196
197What: /sys/class/accel/accel<n>/device/soft_reset
198Date: Jan 2019
199KernelVersion: 5.1
200Contact: ogabbay@kernel.org
201Description: Interface to trigger a soft-reset operation for the device.
202 Soft-reset will reset only the compute and DMA engines of the
203 device
204
205What: /sys/class/accel/accel<n>/device/soft_reset_cnt
206Date: Jan 2019
207KernelVersion: 5.1
208Contact: ogabbay@kernel.org
209Description: Displays how many times the device have undergone a soft-reset
210 operation since the driver was loaded
211
212What: /sys/class/accel/accel<n>/device/status
213Date: Jan 2019
214KernelVersion: 5.1
215Contact: ogabbay@kernel.org
216Description: Status of the card:
217
218 * "operational" - Device is available for work.
219 * "in reset" - Device is going through reset, will be
220 available shortly.
221 * "disabled" - Device is not usable.
222 * "needs reset" - Device is not usable until a hard reset
223 is initiated.
224 * "in device creation" - Device is not available yet, as it
225 is still initializing.
226 * "in reset after device release" - Device is going through
227 a compute-reset which is executed after a device release
228 (relevant for Gaudi2 only).
229
230What: /sys/class/accel/accel<n>/device/thermal_ver
231Date: Jan 2019
232KernelVersion: 5.1
233Contact: ogabbay@kernel.org
234Description: Version of the Device's thermal daemon
235
236What: /sys/class/accel/accel<n>/device/tpc_clk
237Date: Jan 2019
238KernelVersion: 5.1
239Contact: ogabbay@kernel.org
240Description: Allows the user to set the maximum clock frequency, in Hz, of
241 the TPC compute engines. Writes to this parameter affect the
242 device only when the power management profile is set to "manual"
243 mode. The device TPC clock might be set to lower value than the
244 maximum. The user should read the tpc_clk_curr to see the actual
245 frequency value of the TPC. This property is valid only for
246 Goya ASIC family
247
248What: /sys/class/accel/accel<n>/device/tpc_clk_curr
249Date: Jan 2019
250KernelVersion: 5.1
251Contact: ogabbay@kernel.org
252Description: Displays the current clock frequency, in Hz, of the TPC compute
253 engines. This property is valid only for the Goya ASIC family
254
255What: /sys/class/accel/accel<n>/device/uboot_ver
256Date: Jan 2019
257KernelVersion: 5.1
258Contact: ogabbay@kernel.org
259Description: Version of the u-boot running on the device's CPU
260
261What: /sys/class/accel/accel<n>/device/vrm_ver
262Date: Jan 2022
263KernelVersion: 5.17
264Contact: ogabbay@kernel.org
265Description: Version of the Device's Voltage Regulator Monitor F/W code. N/A to GOYA and GAUDI