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1/* SPDX-License-Identifier: GPL-2.0-only */ 2/* 3 * Copyright (C) 2007-2008 Advanced Micro Devices, Inc. 4 * Author: Joerg Roedel <joerg.roedel@amd.com> 5 */ 6 7#ifndef __LINUX_IOMMU_H 8#define __LINUX_IOMMU_H 9 10#include <linux/scatterlist.h> 11#include <linux/device.h> 12#include <linux/types.h> 13#include <linux/errno.h> 14#include <linux/err.h> 15#include <linux/of.h> 16#include <uapi/linux/iommu.h> 17 18#define IOMMU_READ (1 << 0) 19#define IOMMU_WRITE (1 << 1) 20#define IOMMU_CACHE (1 << 2) /* DMA cache coherency */ 21#define IOMMU_NOEXEC (1 << 3) 22#define IOMMU_MMIO (1 << 4) /* e.g. things like MSI doorbells */ 23/* 24 * Where the bus hardware includes a privilege level as part of its access type 25 * markings, and certain devices are capable of issuing transactions marked as 26 * either 'supervisor' or 'user', the IOMMU_PRIV flag requests that the other 27 * given permission flags only apply to accesses at the higher privilege level, 28 * and that unprivileged transactions should have as little access as possible. 29 * This would usually imply the same permissions as kernel mappings on the CPU, 30 * if the IOMMU page table format is equivalent. 31 */ 32#define IOMMU_PRIV (1 << 5) 33 34struct iommu_ops; 35struct iommu_group; 36struct bus_type; 37struct device; 38struct iommu_domain; 39struct iommu_domain_ops; 40struct notifier_block; 41struct iommu_sva; 42struct iommu_fault_event; 43struct iommu_dma_cookie; 44 45/* iommu fault flags */ 46#define IOMMU_FAULT_READ 0x0 47#define IOMMU_FAULT_WRITE 0x1 48 49typedef int (*iommu_fault_handler_t)(struct iommu_domain *, 50 struct device *, unsigned long, int, void *); 51typedef int (*iommu_dev_fault_handler_t)(struct iommu_fault *, void *); 52 53struct iommu_domain_geometry { 54 dma_addr_t aperture_start; /* First address that can be mapped */ 55 dma_addr_t aperture_end; /* Last address that can be mapped */ 56 bool force_aperture; /* DMA only allowed in mappable range? */ 57}; 58 59/* Domain feature flags */ 60#define __IOMMU_DOMAIN_PAGING (1U << 0) /* Support for iommu_map/unmap */ 61#define __IOMMU_DOMAIN_DMA_API (1U << 1) /* Domain for use in DMA-API 62 implementation */ 63#define __IOMMU_DOMAIN_PT (1U << 2) /* Domain is identity mapped */ 64#define __IOMMU_DOMAIN_DMA_FQ (1U << 3) /* DMA-API uses flush queue */ 65 66#define __IOMMU_DOMAIN_SVA (1U << 4) /* Shared process address space */ 67 68#define IOMMU_DOMAIN_ALLOC_FLAGS ~__IOMMU_DOMAIN_DMA_FQ 69/* 70 * This are the possible domain-types 71 * 72 * IOMMU_DOMAIN_BLOCKED - All DMA is blocked, can be used to isolate 73 * devices 74 * IOMMU_DOMAIN_IDENTITY - DMA addresses are system physical addresses 75 * IOMMU_DOMAIN_UNMANAGED - DMA mappings managed by IOMMU-API user, used 76 * for VMs 77 * IOMMU_DOMAIN_DMA - Internally used for DMA-API implementations. 78 * This flag allows IOMMU drivers to implement 79 * certain optimizations for these domains 80 * IOMMU_DOMAIN_DMA_FQ - As above, but definitely using batched TLB 81 * invalidation. 82 * IOMMU_DOMAIN_SVA - DMA addresses are shared process addresses 83 * represented by mm_struct's. 84 */ 85#define IOMMU_DOMAIN_BLOCKED (0U) 86#define IOMMU_DOMAIN_IDENTITY (__IOMMU_DOMAIN_PT) 87#define IOMMU_DOMAIN_UNMANAGED (__IOMMU_DOMAIN_PAGING) 88#define IOMMU_DOMAIN_DMA (__IOMMU_DOMAIN_PAGING | \ 89 __IOMMU_DOMAIN_DMA_API) 90#define IOMMU_DOMAIN_DMA_FQ (__IOMMU_DOMAIN_PAGING | \ 91 __IOMMU_DOMAIN_DMA_API | \ 92 __IOMMU_DOMAIN_DMA_FQ) 93#define IOMMU_DOMAIN_SVA (__IOMMU_DOMAIN_SVA) 94 95struct iommu_domain { 96 unsigned type; 97 const struct iommu_domain_ops *ops; 98 unsigned long pgsize_bitmap; /* Bitmap of page sizes in use */ 99 struct iommu_domain_geometry geometry; 100 struct iommu_dma_cookie *iova_cookie; 101 enum iommu_page_response_code (*iopf_handler)(struct iommu_fault *fault, 102 void *data); 103 void *fault_data; 104 union { 105 struct { 106 iommu_fault_handler_t handler; 107 void *handler_token; 108 }; 109 struct { /* IOMMU_DOMAIN_SVA */ 110 struct mm_struct *mm; 111 int users; 112 }; 113 }; 114}; 115 116static inline bool iommu_is_dma_domain(struct iommu_domain *domain) 117{ 118 return domain->type & __IOMMU_DOMAIN_DMA_API; 119} 120 121enum iommu_cap { 122 IOMMU_CAP_CACHE_COHERENCY, /* IOMMU_CACHE is supported */ 123 IOMMU_CAP_NOEXEC, /* IOMMU_NOEXEC flag */ 124 IOMMU_CAP_PRE_BOOT_PROTECTION, /* Firmware says it used the IOMMU for 125 DMA protection and we should too */ 126 /* 127 * Per-device flag indicating if enforce_cache_coherency() will work on 128 * this device. 129 */ 130 IOMMU_CAP_ENFORCE_CACHE_COHERENCY, 131 /* 132 * IOMMU driver does not issue TLB maintenance during .unmap, so can 133 * usefully support the non-strict DMA flush queue. 134 */ 135 IOMMU_CAP_DEFERRED_FLUSH, 136}; 137 138/* These are the possible reserved region types */ 139enum iommu_resv_type { 140 /* Memory regions which must be mapped 1:1 at all times */ 141 IOMMU_RESV_DIRECT, 142 /* 143 * Memory regions which are advertised to be 1:1 but are 144 * commonly considered relaxable in some conditions, 145 * for instance in device assignment use case (USB, Graphics) 146 */ 147 IOMMU_RESV_DIRECT_RELAXABLE, 148 /* Arbitrary "never map this or give it to a device" address ranges */ 149 IOMMU_RESV_RESERVED, 150 /* Hardware MSI region (untranslated) */ 151 IOMMU_RESV_MSI, 152 /* Software-managed MSI translation window */ 153 IOMMU_RESV_SW_MSI, 154}; 155 156/** 157 * struct iommu_resv_region - descriptor for a reserved memory region 158 * @list: Linked list pointers 159 * @start: System physical start address of the region 160 * @length: Length of the region in bytes 161 * @prot: IOMMU Protection flags (READ/WRITE/...) 162 * @type: Type of the reserved region 163 * @free: Callback to free associated memory allocations 164 */ 165struct iommu_resv_region { 166 struct list_head list; 167 phys_addr_t start; 168 size_t length; 169 int prot; 170 enum iommu_resv_type type; 171 void (*free)(struct device *dev, struct iommu_resv_region *region); 172}; 173 174struct iommu_iort_rmr_data { 175 struct iommu_resv_region rr; 176 177 /* Stream IDs associated with IORT RMR entry */ 178 const u32 *sids; 179 u32 num_sids; 180}; 181 182/** 183 * enum iommu_dev_features - Per device IOMMU features 184 * @IOMMU_DEV_FEAT_SVA: Shared Virtual Addresses 185 * @IOMMU_DEV_FEAT_IOPF: I/O Page Faults such as PRI or Stall. Generally 186 * enabling %IOMMU_DEV_FEAT_SVA requires 187 * %IOMMU_DEV_FEAT_IOPF, but some devices manage I/O Page 188 * Faults themselves instead of relying on the IOMMU. When 189 * supported, this feature must be enabled before and 190 * disabled after %IOMMU_DEV_FEAT_SVA. 191 * 192 * Device drivers enable a feature using iommu_dev_enable_feature(). 193 */ 194enum iommu_dev_features { 195 IOMMU_DEV_FEAT_SVA, 196 IOMMU_DEV_FEAT_IOPF, 197}; 198 199#define IOMMU_NO_PASID (0U) /* Reserved for DMA w/o PASID */ 200#define IOMMU_FIRST_GLOBAL_PASID (1U) /*starting range for allocation */ 201#define IOMMU_PASID_INVALID (-1U) 202typedef unsigned int ioasid_t; 203 204#ifdef CONFIG_IOMMU_API 205 206/** 207 * struct iommu_iotlb_gather - Range information for a pending IOTLB flush 208 * 209 * @start: IOVA representing the start of the range to be flushed 210 * @end: IOVA representing the end of the range to be flushed (inclusive) 211 * @pgsize: The interval at which to perform the flush 212 * @freelist: Removed pages to free after sync 213 * @queued: Indicates that the flush will be queued 214 * 215 * This structure is intended to be updated by multiple calls to the 216 * ->unmap() function in struct iommu_ops before eventually being passed 217 * into ->iotlb_sync(). Drivers can add pages to @freelist to be freed after 218 * ->iotlb_sync() or ->iotlb_flush_all() have cleared all cached references to 219 * them. @queued is set to indicate when ->iotlb_flush_all() will be called 220 * later instead of ->iotlb_sync(), so drivers may optimise accordingly. 221 */ 222struct iommu_iotlb_gather { 223 unsigned long start; 224 unsigned long end; 225 size_t pgsize; 226 struct list_head freelist; 227 bool queued; 228}; 229 230/** 231 * struct iommu_ops - iommu ops and capabilities 232 * @capable: check capability 233 * @hw_info: report iommu hardware information. The data buffer returned by this 234 * op is allocated in the iommu driver and freed by the caller after 235 * use. The information type is one of enum iommu_hw_info_type defined 236 * in include/uapi/linux/iommufd.h. 237 * @domain_alloc: allocate iommu domain 238 * @probe_device: Add device to iommu driver handling 239 * @release_device: Remove device from iommu driver handling 240 * @probe_finalize: Do final setup work after the device is added to an IOMMU 241 * group and attached to the groups domain 242 * @set_platform_dma_ops: Returning control back to the platform DMA ops. This op 243 * is to support old IOMMU drivers, new drivers should use 244 * default domains, and the common IOMMU DMA ops. 245 * @device_group: find iommu group for a particular device 246 * @get_resv_regions: Request list of reserved regions for a device 247 * @of_xlate: add OF master IDs to iommu grouping 248 * @is_attach_deferred: Check if domain attach should be deferred from iommu 249 * driver init to device driver init (default no) 250 * @dev_enable/disable_feat: per device entries to enable/disable 251 * iommu specific features. 252 * @page_response: handle page request response 253 * @def_domain_type: device default domain type, return value: 254 * - IOMMU_DOMAIN_IDENTITY: must use an identity domain 255 * - IOMMU_DOMAIN_DMA: must use a dma domain 256 * - 0: use the default setting 257 * @default_domain_ops: the default ops for domains 258 * @remove_dev_pasid: Remove any translation configurations of a specific 259 * pasid, so that any DMA transactions with this pasid 260 * will be blocked by the hardware. 261 * @pgsize_bitmap: bitmap of all possible supported page sizes 262 * @owner: Driver module providing these ops 263 */ 264struct iommu_ops { 265 bool (*capable)(struct device *dev, enum iommu_cap); 266 void *(*hw_info)(struct device *dev, u32 *length, u32 *type); 267 268 /* Domain allocation and freeing by the iommu driver */ 269 struct iommu_domain *(*domain_alloc)(unsigned iommu_domain_type); 270 271 struct iommu_device *(*probe_device)(struct device *dev); 272 void (*release_device)(struct device *dev); 273 void (*probe_finalize)(struct device *dev); 274 void (*set_platform_dma_ops)(struct device *dev); 275 struct iommu_group *(*device_group)(struct device *dev); 276 277 /* Request/Free a list of reserved regions for a device */ 278 void (*get_resv_regions)(struct device *dev, struct list_head *list); 279 280 int (*of_xlate)(struct device *dev, struct of_phandle_args *args); 281 bool (*is_attach_deferred)(struct device *dev); 282 283 /* Per device IOMMU features */ 284 int (*dev_enable_feat)(struct device *dev, enum iommu_dev_features f); 285 int (*dev_disable_feat)(struct device *dev, enum iommu_dev_features f); 286 287 int (*page_response)(struct device *dev, 288 struct iommu_fault_event *evt, 289 struct iommu_page_response *msg); 290 291 int (*def_domain_type)(struct device *dev); 292 void (*remove_dev_pasid)(struct device *dev, ioasid_t pasid); 293 294 const struct iommu_domain_ops *default_domain_ops; 295 unsigned long pgsize_bitmap; 296 struct module *owner; 297}; 298 299/** 300 * struct iommu_domain_ops - domain specific operations 301 * @attach_dev: attach an iommu domain to a device 302 * Return: 303 * * 0 - success 304 * * EINVAL - can indicate that device and domain are incompatible due to 305 * some previous configuration of the domain, in which case the 306 * driver shouldn't log an error, since it is legitimate for a 307 * caller to test reuse of existing domains. Otherwise, it may 308 * still represent some other fundamental problem 309 * * ENOMEM - out of memory 310 * * ENOSPC - non-ENOMEM type of resource allocation failures 311 * * EBUSY - device is attached to a domain and cannot be changed 312 * * ENODEV - device specific errors, not able to be attached 313 * * <others> - treated as ENODEV by the caller. Use is discouraged 314 * @set_dev_pasid: set an iommu domain to a pasid of device 315 * @map: map a physically contiguous memory region to an iommu domain 316 * @map_pages: map a physically contiguous set of pages of the same size to 317 * an iommu domain. 318 * @unmap: unmap a physically contiguous memory region from an iommu domain 319 * @unmap_pages: unmap a number of pages of the same size from an iommu domain 320 * @flush_iotlb_all: Synchronously flush all hardware TLBs for this domain 321 * @iotlb_sync_map: Sync mappings created recently using @map to the hardware 322 * @iotlb_sync: Flush all queued ranges from the hardware TLBs and empty flush 323 * queue 324 * @iova_to_phys: translate iova to physical address 325 * @enforce_cache_coherency: Prevent any kind of DMA from bypassing IOMMU_CACHE, 326 * including no-snoop TLPs on PCIe or other platform 327 * specific mechanisms. 328 * @enable_nesting: Enable nesting 329 * @set_pgtable_quirks: Set io page table quirks (IO_PGTABLE_QUIRK_*) 330 * @free: Release the domain after use. 331 */ 332struct iommu_domain_ops { 333 int (*attach_dev)(struct iommu_domain *domain, struct device *dev); 334 int (*set_dev_pasid)(struct iommu_domain *domain, struct device *dev, 335 ioasid_t pasid); 336 337 int (*map)(struct iommu_domain *domain, unsigned long iova, 338 phys_addr_t paddr, size_t size, int prot, gfp_t gfp); 339 int (*map_pages)(struct iommu_domain *domain, unsigned long iova, 340 phys_addr_t paddr, size_t pgsize, size_t pgcount, 341 int prot, gfp_t gfp, size_t *mapped); 342 size_t (*unmap)(struct iommu_domain *domain, unsigned long iova, 343 size_t size, struct iommu_iotlb_gather *iotlb_gather); 344 size_t (*unmap_pages)(struct iommu_domain *domain, unsigned long iova, 345 size_t pgsize, size_t pgcount, 346 struct iommu_iotlb_gather *iotlb_gather); 347 348 void (*flush_iotlb_all)(struct iommu_domain *domain); 349 void (*iotlb_sync_map)(struct iommu_domain *domain, unsigned long iova, 350 size_t size); 351 void (*iotlb_sync)(struct iommu_domain *domain, 352 struct iommu_iotlb_gather *iotlb_gather); 353 354 phys_addr_t (*iova_to_phys)(struct iommu_domain *domain, 355 dma_addr_t iova); 356 357 bool (*enforce_cache_coherency)(struct iommu_domain *domain); 358 int (*enable_nesting)(struct iommu_domain *domain); 359 int (*set_pgtable_quirks)(struct iommu_domain *domain, 360 unsigned long quirks); 361 362 void (*free)(struct iommu_domain *domain); 363}; 364 365/** 366 * struct iommu_device - IOMMU core representation of one IOMMU hardware 367 * instance 368 * @list: Used by the iommu-core to keep a list of registered iommus 369 * @ops: iommu-ops for talking to this iommu 370 * @dev: struct device for sysfs handling 371 * @max_pasids: number of supported PASIDs 372 */ 373struct iommu_device { 374 struct list_head list; 375 const struct iommu_ops *ops; 376 struct fwnode_handle *fwnode; 377 struct device *dev; 378 u32 max_pasids; 379}; 380 381/** 382 * struct iommu_fault_event - Generic fault event 383 * 384 * Can represent recoverable faults such as a page requests or 385 * unrecoverable faults such as DMA or IRQ remapping faults. 386 * 387 * @fault: fault descriptor 388 * @list: pending fault event list, used for tracking responses 389 */ 390struct iommu_fault_event { 391 struct iommu_fault fault; 392 struct list_head list; 393}; 394 395/** 396 * struct iommu_fault_param - per-device IOMMU fault data 397 * @handler: Callback function to handle IOMMU faults at device level 398 * @data: handler private data 399 * @faults: holds the pending faults which needs response 400 * @lock: protect pending faults list 401 */ 402struct iommu_fault_param { 403 iommu_dev_fault_handler_t handler; 404 void *data; 405 struct list_head faults; 406 struct mutex lock; 407}; 408 409/** 410 * struct dev_iommu - Collection of per-device IOMMU data 411 * 412 * @fault_param: IOMMU detected device fault reporting data 413 * @iopf_param: I/O Page Fault queue and data 414 * @fwspec: IOMMU fwspec data 415 * @iommu_dev: IOMMU device this device is linked to 416 * @priv: IOMMU Driver private data 417 * @max_pasids: number of PASIDs this device can consume 418 * @attach_deferred: the dma domain attachment is deferred 419 * @pci_32bit_workaround: Limit DMA allocations to 32-bit IOVAs 420 * @require_direct: device requires IOMMU_RESV_DIRECT regions 421 * 422 * TODO: migrate other per device data pointers under iommu_dev_data, e.g. 423 * struct iommu_group *iommu_group; 424 */ 425struct dev_iommu { 426 struct mutex lock; 427 struct iommu_fault_param *fault_param; 428 struct iopf_device_param *iopf_param; 429 struct iommu_fwspec *fwspec; 430 struct iommu_device *iommu_dev; 431 void *priv; 432 u32 max_pasids; 433 u32 attach_deferred:1; 434 u32 pci_32bit_workaround:1; 435 u32 require_direct:1; 436}; 437 438int iommu_device_register(struct iommu_device *iommu, 439 const struct iommu_ops *ops, 440 struct device *hwdev); 441void iommu_device_unregister(struct iommu_device *iommu); 442int iommu_device_sysfs_add(struct iommu_device *iommu, 443 struct device *parent, 444 const struct attribute_group **groups, 445 const char *fmt, ...) __printf(4, 5); 446void iommu_device_sysfs_remove(struct iommu_device *iommu); 447int iommu_device_link(struct iommu_device *iommu, struct device *link); 448void iommu_device_unlink(struct iommu_device *iommu, struct device *link); 449int iommu_deferred_attach(struct device *dev, struct iommu_domain *domain); 450 451static inline struct iommu_device *dev_to_iommu_device(struct device *dev) 452{ 453 return (struct iommu_device *)dev_get_drvdata(dev); 454} 455 456static inline void iommu_iotlb_gather_init(struct iommu_iotlb_gather *gather) 457{ 458 *gather = (struct iommu_iotlb_gather) { 459 .start = ULONG_MAX, 460 .freelist = LIST_HEAD_INIT(gather->freelist), 461 }; 462} 463 464extern int bus_iommu_probe(const struct bus_type *bus); 465extern bool iommu_present(const struct bus_type *bus); 466extern bool device_iommu_capable(struct device *dev, enum iommu_cap cap); 467extern bool iommu_group_has_isolated_msi(struct iommu_group *group); 468extern struct iommu_domain *iommu_domain_alloc(const struct bus_type *bus); 469extern void iommu_domain_free(struct iommu_domain *domain); 470extern int iommu_attach_device(struct iommu_domain *domain, 471 struct device *dev); 472extern void iommu_detach_device(struct iommu_domain *domain, 473 struct device *dev); 474extern int iommu_sva_unbind_gpasid(struct iommu_domain *domain, 475 struct device *dev, ioasid_t pasid); 476extern struct iommu_domain *iommu_get_domain_for_dev(struct device *dev); 477extern struct iommu_domain *iommu_get_dma_domain(struct device *dev); 478extern int iommu_map(struct iommu_domain *domain, unsigned long iova, 479 phys_addr_t paddr, size_t size, int prot, gfp_t gfp); 480extern size_t iommu_unmap(struct iommu_domain *domain, unsigned long iova, 481 size_t size); 482extern size_t iommu_unmap_fast(struct iommu_domain *domain, 483 unsigned long iova, size_t size, 484 struct iommu_iotlb_gather *iotlb_gather); 485extern ssize_t iommu_map_sg(struct iommu_domain *domain, unsigned long iova, 486 struct scatterlist *sg, unsigned int nents, 487 int prot, gfp_t gfp); 488extern phys_addr_t iommu_iova_to_phys(struct iommu_domain *domain, dma_addr_t iova); 489extern void iommu_set_fault_handler(struct iommu_domain *domain, 490 iommu_fault_handler_t handler, void *token); 491 492extern void iommu_get_resv_regions(struct device *dev, struct list_head *list); 493extern void iommu_put_resv_regions(struct device *dev, struct list_head *list); 494extern void iommu_set_default_passthrough(bool cmd_line); 495extern void iommu_set_default_translated(bool cmd_line); 496extern bool iommu_default_passthrough(void); 497extern struct iommu_resv_region * 498iommu_alloc_resv_region(phys_addr_t start, size_t length, int prot, 499 enum iommu_resv_type type, gfp_t gfp); 500extern int iommu_get_group_resv_regions(struct iommu_group *group, 501 struct list_head *head); 502 503extern int iommu_attach_group(struct iommu_domain *domain, 504 struct iommu_group *group); 505extern void iommu_detach_group(struct iommu_domain *domain, 506 struct iommu_group *group); 507extern struct iommu_group *iommu_group_alloc(void); 508extern void *iommu_group_get_iommudata(struct iommu_group *group); 509extern void iommu_group_set_iommudata(struct iommu_group *group, 510 void *iommu_data, 511 void (*release)(void *iommu_data)); 512extern int iommu_group_set_name(struct iommu_group *group, const char *name); 513extern int iommu_group_add_device(struct iommu_group *group, 514 struct device *dev); 515extern void iommu_group_remove_device(struct device *dev); 516extern int iommu_group_for_each_dev(struct iommu_group *group, void *data, 517 int (*fn)(struct device *, void *)); 518extern struct iommu_group *iommu_group_get(struct device *dev); 519extern struct iommu_group *iommu_group_ref_get(struct iommu_group *group); 520extern void iommu_group_put(struct iommu_group *group); 521extern int iommu_register_device_fault_handler(struct device *dev, 522 iommu_dev_fault_handler_t handler, 523 void *data); 524 525extern int iommu_unregister_device_fault_handler(struct device *dev); 526 527extern int iommu_report_device_fault(struct device *dev, 528 struct iommu_fault_event *evt); 529extern int iommu_page_response(struct device *dev, 530 struct iommu_page_response *msg); 531 532extern int iommu_group_id(struct iommu_group *group); 533extern struct iommu_domain *iommu_group_default_domain(struct iommu_group *); 534 535int iommu_enable_nesting(struct iommu_domain *domain); 536int iommu_set_pgtable_quirks(struct iommu_domain *domain, 537 unsigned long quirks); 538 539void iommu_set_dma_strict(void); 540 541extern int report_iommu_fault(struct iommu_domain *domain, struct device *dev, 542 unsigned long iova, int flags); 543 544static inline void iommu_flush_iotlb_all(struct iommu_domain *domain) 545{ 546 if (domain->ops->flush_iotlb_all) 547 domain->ops->flush_iotlb_all(domain); 548} 549 550static inline void iommu_iotlb_sync(struct iommu_domain *domain, 551 struct iommu_iotlb_gather *iotlb_gather) 552{ 553 if (domain->ops->iotlb_sync) 554 domain->ops->iotlb_sync(domain, iotlb_gather); 555 556 iommu_iotlb_gather_init(iotlb_gather); 557} 558 559/** 560 * iommu_iotlb_gather_is_disjoint - Checks whether a new range is disjoint 561 * 562 * @gather: TLB gather data 563 * @iova: start of page to invalidate 564 * @size: size of page to invalidate 565 * 566 * Helper for IOMMU drivers to check whether a new range and the gathered range 567 * are disjoint. For many IOMMUs, flushing the IOMMU in this case is better 568 * than merging the two, which might lead to unnecessary invalidations. 569 */ 570static inline 571bool iommu_iotlb_gather_is_disjoint(struct iommu_iotlb_gather *gather, 572 unsigned long iova, size_t size) 573{ 574 unsigned long start = iova, end = start + size - 1; 575 576 return gather->end != 0 && 577 (end + 1 < gather->start || start > gather->end + 1); 578} 579 580 581/** 582 * iommu_iotlb_gather_add_range - Gather for address-based TLB invalidation 583 * @gather: TLB gather data 584 * @iova: start of page to invalidate 585 * @size: size of page to invalidate 586 * 587 * Helper for IOMMU drivers to build arbitrarily-sized invalidation commands 588 * where only the address range matters, and simply minimising intermediate 589 * syncs is preferred. 590 */ 591static inline void iommu_iotlb_gather_add_range(struct iommu_iotlb_gather *gather, 592 unsigned long iova, size_t size) 593{ 594 unsigned long end = iova + size - 1; 595 596 if (gather->start > iova) 597 gather->start = iova; 598 if (gather->end < end) 599 gather->end = end; 600} 601 602/** 603 * iommu_iotlb_gather_add_page - Gather for page-based TLB invalidation 604 * @domain: IOMMU domain to be invalidated 605 * @gather: TLB gather data 606 * @iova: start of page to invalidate 607 * @size: size of page to invalidate 608 * 609 * Helper for IOMMU drivers to build invalidation commands based on individual 610 * pages, or with page size/table level hints which cannot be gathered if they 611 * differ. 612 */ 613static inline void iommu_iotlb_gather_add_page(struct iommu_domain *domain, 614 struct iommu_iotlb_gather *gather, 615 unsigned long iova, size_t size) 616{ 617 /* 618 * If the new page is disjoint from the current range or is mapped at 619 * a different granularity, then sync the TLB so that the gather 620 * structure can be rewritten. 621 */ 622 if ((gather->pgsize && gather->pgsize != size) || 623 iommu_iotlb_gather_is_disjoint(gather, iova, size)) 624 iommu_iotlb_sync(domain, gather); 625 626 gather->pgsize = size; 627 iommu_iotlb_gather_add_range(gather, iova, size); 628} 629 630static inline bool iommu_iotlb_gather_queued(struct iommu_iotlb_gather *gather) 631{ 632 return gather && gather->queued; 633} 634 635/* PCI device grouping function */ 636extern struct iommu_group *pci_device_group(struct device *dev); 637/* Generic device grouping function */ 638extern struct iommu_group *generic_device_group(struct device *dev); 639/* FSL-MC device grouping function */ 640struct iommu_group *fsl_mc_device_group(struct device *dev); 641 642/** 643 * struct iommu_fwspec - per-device IOMMU instance data 644 * @ops: ops for this device's IOMMU 645 * @iommu_fwnode: firmware handle for this device's IOMMU 646 * @flags: IOMMU_FWSPEC_* flags 647 * @num_ids: number of associated device IDs 648 * @ids: IDs which this device may present to the IOMMU 649 * 650 * Note that the IDs (and any other information, really) stored in this structure should be 651 * considered private to the IOMMU device driver and are not to be used directly by IOMMU 652 * consumers. 653 */ 654struct iommu_fwspec { 655 const struct iommu_ops *ops; 656 struct fwnode_handle *iommu_fwnode; 657 u32 flags; 658 unsigned int num_ids; 659 u32 ids[]; 660}; 661 662/* ATS is supported */ 663#define IOMMU_FWSPEC_PCI_RC_ATS (1 << 0) 664 665/** 666 * struct iommu_sva - handle to a device-mm bond 667 */ 668struct iommu_sva { 669 struct device *dev; 670 struct iommu_domain *domain; 671}; 672 673int iommu_fwspec_init(struct device *dev, struct fwnode_handle *iommu_fwnode, 674 const struct iommu_ops *ops); 675void iommu_fwspec_free(struct device *dev); 676int iommu_fwspec_add_ids(struct device *dev, u32 *ids, int num_ids); 677const struct iommu_ops *iommu_ops_from_fwnode(struct fwnode_handle *fwnode); 678 679static inline struct iommu_fwspec *dev_iommu_fwspec_get(struct device *dev) 680{ 681 if (dev->iommu) 682 return dev->iommu->fwspec; 683 else 684 return NULL; 685} 686 687static inline void dev_iommu_fwspec_set(struct device *dev, 688 struct iommu_fwspec *fwspec) 689{ 690 dev->iommu->fwspec = fwspec; 691} 692 693static inline void *dev_iommu_priv_get(struct device *dev) 694{ 695 if (dev->iommu) 696 return dev->iommu->priv; 697 else 698 return NULL; 699} 700 701static inline void dev_iommu_priv_set(struct device *dev, void *priv) 702{ 703 dev->iommu->priv = priv; 704} 705 706int iommu_probe_device(struct device *dev); 707 708int iommu_dev_enable_feature(struct device *dev, enum iommu_dev_features f); 709int iommu_dev_disable_feature(struct device *dev, enum iommu_dev_features f); 710 711int iommu_device_use_default_domain(struct device *dev); 712void iommu_device_unuse_default_domain(struct device *dev); 713 714int iommu_group_claim_dma_owner(struct iommu_group *group, void *owner); 715void iommu_group_release_dma_owner(struct iommu_group *group); 716bool iommu_group_dma_owner_claimed(struct iommu_group *group); 717 718int iommu_device_claim_dma_owner(struct device *dev, void *owner); 719void iommu_device_release_dma_owner(struct device *dev); 720 721struct iommu_domain *iommu_sva_domain_alloc(struct device *dev, 722 struct mm_struct *mm); 723int iommu_attach_device_pasid(struct iommu_domain *domain, 724 struct device *dev, ioasid_t pasid); 725void iommu_detach_device_pasid(struct iommu_domain *domain, 726 struct device *dev, ioasid_t pasid); 727struct iommu_domain * 728iommu_get_domain_for_dev_pasid(struct device *dev, ioasid_t pasid, 729 unsigned int type); 730ioasid_t iommu_alloc_global_pasid(struct device *dev); 731void iommu_free_global_pasid(ioasid_t pasid); 732#else /* CONFIG_IOMMU_API */ 733 734struct iommu_ops {}; 735struct iommu_group {}; 736struct iommu_fwspec {}; 737struct iommu_device {}; 738struct iommu_fault_param {}; 739struct iommu_iotlb_gather {}; 740 741static inline bool iommu_present(const struct bus_type *bus) 742{ 743 return false; 744} 745 746static inline bool device_iommu_capable(struct device *dev, enum iommu_cap cap) 747{ 748 return false; 749} 750 751static inline struct iommu_domain *iommu_domain_alloc(const struct bus_type *bus) 752{ 753 return NULL; 754} 755 756static inline void iommu_domain_free(struct iommu_domain *domain) 757{ 758} 759 760static inline int iommu_attach_device(struct iommu_domain *domain, 761 struct device *dev) 762{ 763 return -ENODEV; 764} 765 766static inline void iommu_detach_device(struct iommu_domain *domain, 767 struct device *dev) 768{ 769} 770 771static inline struct iommu_domain *iommu_get_domain_for_dev(struct device *dev) 772{ 773 return NULL; 774} 775 776static inline int iommu_map(struct iommu_domain *domain, unsigned long iova, 777 phys_addr_t paddr, size_t size, int prot, gfp_t gfp) 778{ 779 return -ENODEV; 780} 781 782static inline size_t iommu_unmap(struct iommu_domain *domain, 783 unsigned long iova, size_t size) 784{ 785 return 0; 786} 787 788static inline size_t iommu_unmap_fast(struct iommu_domain *domain, 789 unsigned long iova, int gfp_order, 790 struct iommu_iotlb_gather *iotlb_gather) 791{ 792 return 0; 793} 794 795static inline ssize_t iommu_map_sg(struct iommu_domain *domain, 796 unsigned long iova, struct scatterlist *sg, 797 unsigned int nents, int prot, gfp_t gfp) 798{ 799 return -ENODEV; 800} 801 802static inline void iommu_flush_iotlb_all(struct iommu_domain *domain) 803{ 804} 805 806static inline void iommu_iotlb_sync(struct iommu_domain *domain, 807 struct iommu_iotlb_gather *iotlb_gather) 808{ 809} 810 811static inline phys_addr_t iommu_iova_to_phys(struct iommu_domain *domain, dma_addr_t iova) 812{ 813 return 0; 814} 815 816static inline void iommu_set_fault_handler(struct iommu_domain *domain, 817 iommu_fault_handler_t handler, void *token) 818{ 819} 820 821static inline void iommu_get_resv_regions(struct device *dev, 822 struct list_head *list) 823{ 824} 825 826static inline void iommu_put_resv_regions(struct device *dev, 827 struct list_head *list) 828{ 829} 830 831static inline int iommu_get_group_resv_regions(struct iommu_group *group, 832 struct list_head *head) 833{ 834 return -ENODEV; 835} 836 837static inline void iommu_set_default_passthrough(bool cmd_line) 838{ 839} 840 841static inline void iommu_set_default_translated(bool cmd_line) 842{ 843} 844 845static inline bool iommu_default_passthrough(void) 846{ 847 return true; 848} 849 850static inline int iommu_attach_group(struct iommu_domain *domain, 851 struct iommu_group *group) 852{ 853 return -ENODEV; 854} 855 856static inline void iommu_detach_group(struct iommu_domain *domain, 857 struct iommu_group *group) 858{ 859} 860 861static inline struct iommu_group *iommu_group_alloc(void) 862{ 863 return ERR_PTR(-ENODEV); 864} 865 866static inline void *iommu_group_get_iommudata(struct iommu_group *group) 867{ 868 return NULL; 869} 870 871static inline void iommu_group_set_iommudata(struct iommu_group *group, 872 void *iommu_data, 873 void (*release)(void *iommu_data)) 874{ 875} 876 877static inline int iommu_group_set_name(struct iommu_group *group, 878 const char *name) 879{ 880 return -ENODEV; 881} 882 883static inline int iommu_group_add_device(struct iommu_group *group, 884 struct device *dev) 885{ 886 return -ENODEV; 887} 888 889static inline void iommu_group_remove_device(struct device *dev) 890{ 891} 892 893static inline int iommu_group_for_each_dev(struct iommu_group *group, 894 void *data, 895 int (*fn)(struct device *, void *)) 896{ 897 return -ENODEV; 898} 899 900static inline struct iommu_group *iommu_group_get(struct device *dev) 901{ 902 return NULL; 903} 904 905static inline void iommu_group_put(struct iommu_group *group) 906{ 907} 908 909static inline 910int iommu_register_device_fault_handler(struct device *dev, 911 iommu_dev_fault_handler_t handler, 912 void *data) 913{ 914 return -ENODEV; 915} 916 917static inline int iommu_unregister_device_fault_handler(struct device *dev) 918{ 919 return 0; 920} 921 922static inline 923int iommu_report_device_fault(struct device *dev, struct iommu_fault_event *evt) 924{ 925 return -ENODEV; 926} 927 928static inline int iommu_page_response(struct device *dev, 929 struct iommu_page_response *msg) 930{ 931 return -ENODEV; 932} 933 934static inline int iommu_group_id(struct iommu_group *group) 935{ 936 return -ENODEV; 937} 938 939static inline int iommu_set_pgtable_quirks(struct iommu_domain *domain, 940 unsigned long quirks) 941{ 942 return 0; 943} 944 945static inline int iommu_device_register(struct iommu_device *iommu, 946 const struct iommu_ops *ops, 947 struct device *hwdev) 948{ 949 return -ENODEV; 950} 951 952static inline struct iommu_device *dev_to_iommu_device(struct device *dev) 953{ 954 return NULL; 955} 956 957static inline void iommu_iotlb_gather_init(struct iommu_iotlb_gather *gather) 958{ 959} 960 961static inline void iommu_iotlb_gather_add_page(struct iommu_domain *domain, 962 struct iommu_iotlb_gather *gather, 963 unsigned long iova, size_t size) 964{ 965} 966 967static inline bool iommu_iotlb_gather_queued(struct iommu_iotlb_gather *gather) 968{ 969 return false; 970} 971 972static inline void iommu_device_unregister(struct iommu_device *iommu) 973{ 974} 975 976static inline int iommu_device_sysfs_add(struct iommu_device *iommu, 977 struct device *parent, 978 const struct attribute_group **groups, 979 const char *fmt, ...) 980{ 981 return -ENODEV; 982} 983 984static inline void iommu_device_sysfs_remove(struct iommu_device *iommu) 985{ 986} 987 988static inline int iommu_device_link(struct device *dev, struct device *link) 989{ 990 return -EINVAL; 991} 992 993static inline void iommu_device_unlink(struct device *dev, struct device *link) 994{ 995} 996 997static inline int iommu_fwspec_init(struct device *dev, 998 struct fwnode_handle *iommu_fwnode, 999 const struct iommu_ops *ops) 1000{ 1001 return -ENODEV; 1002} 1003 1004static inline void iommu_fwspec_free(struct device *dev) 1005{ 1006} 1007 1008static inline int iommu_fwspec_add_ids(struct device *dev, u32 *ids, 1009 int num_ids) 1010{ 1011 return -ENODEV; 1012} 1013 1014static inline 1015const struct iommu_ops *iommu_ops_from_fwnode(struct fwnode_handle *fwnode) 1016{ 1017 return NULL; 1018} 1019 1020static inline int 1021iommu_dev_enable_feature(struct device *dev, enum iommu_dev_features feat) 1022{ 1023 return -ENODEV; 1024} 1025 1026static inline int 1027iommu_dev_disable_feature(struct device *dev, enum iommu_dev_features feat) 1028{ 1029 return -ENODEV; 1030} 1031 1032static inline struct iommu_fwspec *dev_iommu_fwspec_get(struct device *dev) 1033{ 1034 return NULL; 1035} 1036 1037static inline int iommu_device_use_default_domain(struct device *dev) 1038{ 1039 return 0; 1040} 1041 1042static inline void iommu_device_unuse_default_domain(struct device *dev) 1043{ 1044} 1045 1046static inline int 1047iommu_group_claim_dma_owner(struct iommu_group *group, void *owner) 1048{ 1049 return -ENODEV; 1050} 1051 1052static inline void iommu_group_release_dma_owner(struct iommu_group *group) 1053{ 1054} 1055 1056static inline bool iommu_group_dma_owner_claimed(struct iommu_group *group) 1057{ 1058 return false; 1059} 1060 1061static inline void iommu_device_release_dma_owner(struct device *dev) 1062{ 1063} 1064 1065static inline int iommu_device_claim_dma_owner(struct device *dev, void *owner) 1066{ 1067 return -ENODEV; 1068} 1069 1070static inline struct iommu_domain * 1071iommu_sva_domain_alloc(struct device *dev, struct mm_struct *mm) 1072{ 1073 return NULL; 1074} 1075 1076static inline int iommu_attach_device_pasid(struct iommu_domain *domain, 1077 struct device *dev, ioasid_t pasid) 1078{ 1079 return -ENODEV; 1080} 1081 1082static inline void iommu_detach_device_pasid(struct iommu_domain *domain, 1083 struct device *dev, ioasid_t pasid) 1084{ 1085} 1086 1087static inline struct iommu_domain * 1088iommu_get_domain_for_dev_pasid(struct device *dev, ioasid_t pasid, 1089 unsigned int type) 1090{ 1091 return NULL; 1092} 1093 1094static inline ioasid_t iommu_alloc_global_pasid(struct device *dev) 1095{ 1096 return IOMMU_PASID_INVALID; 1097} 1098 1099static inline void iommu_free_global_pasid(ioasid_t pasid) {} 1100#endif /* CONFIG_IOMMU_API */ 1101 1102/** 1103 * iommu_map_sgtable - Map the given buffer to the IOMMU domain 1104 * @domain: The IOMMU domain to perform the mapping 1105 * @iova: The start address to map the buffer 1106 * @sgt: The sg_table object describing the buffer 1107 * @prot: IOMMU protection bits 1108 * 1109 * Creates a mapping at @iova for the buffer described by a scatterlist 1110 * stored in the given sg_table object in the provided IOMMU domain. 1111 */ 1112static inline size_t iommu_map_sgtable(struct iommu_domain *domain, 1113 unsigned long iova, struct sg_table *sgt, int prot) 1114{ 1115 return iommu_map_sg(domain, iova, sgt->sgl, sgt->orig_nents, prot, 1116 GFP_KERNEL); 1117} 1118 1119#ifdef CONFIG_IOMMU_DEBUGFS 1120extern struct dentry *iommu_debugfs_dir; 1121void iommu_debugfs_setup(void); 1122#else 1123static inline void iommu_debugfs_setup(void) {} 1124#endif 1125 1126#ifdef CONFIG_IOMMU_DMA 1127#include <linux/msi.h> 1128 1129/* Setup call for arch DMA mapping code */ 1130void iommu_setup_dma_ops(struct device *dev, u64 dma_base, u64 dma_limit); 1131 1132int iommu_get_msi_cookie(struct iommu_domain *domain, dma_addr_t base); 1133 1134int iommu_dma_prepare_msi(struct msi_desc *desc, phys_addr_t msi_addr); 1135void iommu_dma_compose_msi_msg(struct msi_desc *desc, struct msi_msg *msg); 1136 1137#else /* CONFIG_IOMMU_DMA */ 1138 1139struct msi_desc; 1140struct msi_msg; 1141 1142static inline void iommu_setup_dma_ops(struct device *dev, u64 dma_base, u64 dma_limit) 1143{ 1144} 1145 1146static inline int iommu_get_msi_cookie(struct iommu_domain *domain, dma_addr_t base) 1147{ 1148 return -ENODEV; 1149} 1150 1151static inline int iommu_dma_prepare_msi(struct msi_desc *desc, phys_addr_t msi_addr) 1152{ 1153 return 0; 1154} 1155 1156static inline void iommu_dma_compose_msi_msg(struct msi_desc *desc, struct msi_msg *msg) 1157{ 1158} 1159 1160#endif /* CONFIG_IOMMU_DMA */ 1161 1162/* 1163 * Newer generations of Tegra SoCs require devices' stream IDs to be directly programmed into 1164 * some registers. These are always paired with a Tegra SMMU or ARM SMMU, for which the contents 1165 * of the struct iommu_fwspec are known. Use this helper to formalize access to these internals. 1166 */ 1167#define TEGRA_STREAM_ID_BYPASS 0x7f 1168 1169static inline bool tegra_dev_iommu_get_stream_id(struct device *dev, u32 *stream_id) 1170{ 1171#ifdef CONFIG_IOMMU_API 1172 struct iommu_fwspec *fwspec = dev_iommu_fwspec_get(dev); 1173 1174 if (fwspec && fwspec->num_ids == 1) { 1175 *stream_id = fwspec->ids[0] & 0xffff; 1176 return true; 1177 } 1178#endif 1179 1180 return false; 1181} 1182 1183#ifdef CONFIG_IOMMU_SVA 1184static inline void mm_pasid_init(struct mm_struct *mm) 1185{ 1186 mm->pasid = IOMMU_PASID_INVALID; 1187} 1188static inline bool mm_valid_pasid(struct mm_struct *mm) 1189{ 1190 return mm->pasid != IOMMU_PASID_INVALID; 1191} 1192void mm_pasid_drop(struct mm_struct *mm); 1193struct iommu_sva *iommu_sva_bind_device(struct device *dev, 1194 struct mm_struct *mm); 1195void iommu_sva_unbind_device(struct iommu_sva *handle); 1196u32 iommu_sva_get_pasid(struct iommu_sva *handle); 1197#else 1198static inline struct iommu_sva * 1199iommu_sva_bind_device(struct device *dev, struct mm_struct *mm) 1200{ 1201 return NULL; 1202} 1203 1204static inline void iommu_sva_unbind_device(struct iommu_sva *handle) 1205{ 1206} 1207 1208static inline u32 iommu_sva_get_pasid(struct iommu_sva *handle) 1209{ 1210 return IOMMU_PASID_INVALID; 1211} 1212static inline void mm_pasid_init(struct mm_struct *mm) {} 1213static inline bool mm_valid_pasid(struct mm_struct *mm) { return false; } 1214static inline void mm_pasid_drop(struct mm_struct *mm) {} 1215#endif /* CONFIG_IOMMU_SVA */ 1216 1217#endif /* __LINUX_IOMMU_H */